CN117193471A - Waveform generator, multi-signal channel delay correction method and medium - Google Patents
Waveform generator, multi-signal channel delay correction method and medium Download PDFInfo
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Abstract
A waveform generator, comprising: at least two waveform generation channels; at least two output channels; a switching unit; an analog-to-digital conversion unit; the processing unit is used for: generating two paths of same digital correction waveform signals; and adjusting the time delay of one digital correction waveform signal for a plurality of times, and after each adjustment: the added two paths of analog correction waveform signals are converted into correction waveform sampling signals; acquiring signal amplitude values of all correction waveform sampling signals, and acquiring the maximum signal amplitude value of the correction waveform sampling signals and the corresponding adjusted target time delay based on all the signal amplitude values and the corresponding adjusted time delay; and carrying out delay correction on one path of digital correction waveform signals based on the target time delay, so that the time delays of the two paths of analog correction waveform signals are synchronous. The delay correction can be realized based on the waveform generator, so that the cost of synchronous calibration is low. The application also provides a multi-signal channel delay correction method and a medium.
Description
Technical Field
The application relates to the technical field of signal transmission, in particular to a waveform generator, a multi-signal channel delay correction method and a medium.
Background
A waveform generator is an electronic test device for generating a waveform-like function signal, which is an important source of signal. The waveform generator has the modulation function and can carry out additional functions such as amplitude modulation, frequency modulation and the like on the output signals, so that the waveform generator is widely applied to the fields of circuit teaching, development design, electronic product detection and the like.
In some application scenarios, a user requires signals output by multiple output channels of the waveform generator and keeping a certain phase relationship, that is, multiple signals need to be synchronized, and with the continuous development of technology, the requirement on multi-channel synchronization of the waveform generator is also higher and higher.
In the current scheme, synchronous calibration of multiple channels on a waveform generator mainly depends on a signal acquisition instrument with high bandwidth and high sampling rate, so that the cost of synchronous calibration is relatively high, manual measurement is mainly relied on, and the calibration efficiency is low. Therefore, new technical solutions are also needed.
Disclosure of Invention
The application mainly solves the technical problem of high cost of synchronous calibration.
According to a first aspect, there is provided in one embodiment a waveform generator comprising:
at least two wave generation channels, each wave generation channel is used for converting digital wave signals received by the input end of the wave generation channel into analog wave signals;
at least two output channels, the output channels are used for outputting at least part of the analog waveform signals received by the input ends of the output channels to external equipment;
a switching unit, configured to output at least part of the two analog waveform signals to the two output channels, and/or add at least part of the two analog waveform signals;
the analog-to-digital conversion unit is used for converting the two paths of analog waveform signals after addition into waveform sampling signals;
a processing unit for:
generating two paths of same digital correction waveform signals;
and adjusting the time delay of one digital correction waveform signal for a plurality of times, and after each adjustment: respectively outputting two paths of digital correction waveform signals to two paths of waveform generation channels, wherein the two paths of waveform generation channels respectively convert the digital correction waveform signals into analog correction waveform signals; the switching unit is controlled to add at least part of the two analog correction waveform signals, and the analog-to-digital conversion unit converts the added two analog correction waveform signals into correction waveform sampling signals;
acquiring signal amplitude values of the correction waveform sampling signals, and acquiring maximum signal amplitude values of the correction waveform sampling signals and corresponding adjusted target time delays based on the signal amplitude values and corresponding adjusted time delays;
and carrying out delay correction on one path of digital correction waveform signals based on the target time delay, so that the time delays of the two paths of analog correction waveform signals are synchronous.
In some embodiments, the switching unit includes:
the switching module is used for respectively outputting two paths of analog waveform signals to the two paths of output channels or adding the two paths of analog waveform signals;
and the isolation module is used for respectively carrying out isolation processing on the two paths of analog correction waveform signals before the switching unit adds the two paths of analog correction waveform signals.
In some embodiments, the switching unit includes:
the isolation module is used for respectively isolating and outputting the first parts of the two paths of analog waveform signals and the second parts of the two paths of analog waveform signals and outputting the second parts of the two paths of analog waveform signals to the two paths of output channels;
and the switching module is used for adding the first parts of the two paths of the analog waveform signals after isolation.
In some embodiments, the analog-to-digital conversion unit comprises:
the amplitude detection module is used for converting the added two paths of analog waveform signals into detection signals which represent the signal amplitude and have the frequency lower than that of the analog waveform signals;
and the analog-to-digital converter is used for converting the detection signal into the waveform sampling signal.
In some embodiments, the amplitude detection module includes a detector, and the detector detects the added two analog waveform signals to obtain the detection signal.
In some embodiments, the processing unit comprises:
a processor for outputting at least the two identical digital correction waveform signals;
and the phase-shifting filter is used for filtering one path of the digital correction waveform signals so as to carry out time delay adjustment and/or delay correction on one path of the digital correction waveform signals.
In some embodiments, the obtaining the maximum signal amplitude of the correction waveform sampling signal and the corresponding adjusted target delay based on each signal amplitude and corresponding each adjusted delay includes:
fitting the signal amplitude values and the corresponding adjusted time delays to obtain fitting results;
and obtaining the maximum signal amplitude of the correction waveform sampling signal and the target time delay correspondingly adjusted based on the fitting result.
In some embodiments, the waveform generation channel includes a digital-to-analog converter for converting the digital waveform signal to the analog waveform signal; the delay correction of the one path of the digital correction waveform signal includes:
dividing the target time delay into integer time delay and fraction time delay of the sampling period based on the sampling period of the digital-to-analog converter;
based on the fractional time delay, the phase-shifting filter is used for carrying out delay correction on one path of digital correction waveform signals; and based on the integral multiple time delay, the processor is used for carrying out delay correction on one path of the digital correction waveform signals.
According to a second aspect, in one embodiment, a method for correcting delay of multiple signal channels is provided, and the method is applied to two signal channels, where the signal channels can adjust delay of signals output by the signal channels, and includes:
when the two paths of signal channels respectively output the same analog correction waveform signals, and one path of signal channels adjusts the time delay of the analog correction waveform signals for a plurality of times, adding at least part of the two paths of analog correction waveform signals after each adjustment and performing analog-to-digital conversion to obtain correction waveform sampling signals;
acquiring signal amplitude values of the correction waveform sampling signals, and acquiring maximum signal amplitude values of the correction waveform sampling signals and corresponding adjusted target time delays based on the signal amplitude values and corresponding adjusted time delays;
the target time delay is used for carrying out delay correction on the analog correction waveform signals by one path of the signal channels so as to enable the time delays of the two paths of the analog correction waveform signals to be synchronous.
According to a third aspect, an embodiment provides a computer readable storage medium having stored thereon a program executable by a processor to implement the method according to the second aspect.
According to the waveform generator of the embodiment, the target time delay can be obtained based on the amplitude values of the signals and the corresponding adjusted time delays, so that the phase measurement of the signals is not required by using an external signal acquisition instrument, the high-precision measurement of the signals output by the waveform generation channel is not required, the delay correction can be realized directly based on the waveform generator, and the cost of synchronous calibration is low.
Drawings
FIG. 1 is a schematic diagram of a waveform generator according to an embodiment;
FIG. 2 is a schematic diagram of a waveform generator according to another embodiment;
FIG. 3 is a diagram showing the relationship between the effective value Urms and the phase error value in one embodiment;
fig. 4 is a flowchart of a multi-signal channel delay correction method according to an embodiment.
Detailed Description
The application will be described in further detail below with reference to the drawings by means of specific embodiments. Wherein like elements in different embodiments are numbered alike in association. In the following embodiments, numerous specific details are set forth in order to provide a better understanding of the present application. However, one skilled in the art will readily recognize that some of the features may be omitted, or replaced by other elements, materials, or methods in different situations. In some instances, related operations of the present application have not been shown or described in the specification in order to avoid obscuring the core portions of the present application, and may be unnecessary to persons skilled in the art from a detailed description of the related operations, which may be presented in the description and general knowledge of one skilled in the art.
Furthermore, the described features, operations, or characteristics of the description may be combined in any suitable manner in various embodiments. Also, various steps or acts in the method descriptions may be interchanged or modified in a manner apparent to those of ordinary skill in the art. Thus, the various orders in the description and drawings are for clarity of description of only certain embodiments, and are not meant to be required orders unless otherwise indicated.
The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The term "coupled" as used herein includes both direct and indirect coupling (coupling), unless otherwise indicated.
In the current scheme, because the signal is required to be measured by an external signal acquisition instrument, the signal synchronization of multiple channels is realized based on the measured result, and in the signal measurement process, the signal synchronization method not only depends on high-performance equipment, such as a high-bandwidth and high-sampling-rate signal acquisition instrument. Meanwhile, a signal acquisition instrument is required to be manually operated to realize signal measurement, so that the efficiency of synchronous calibration is low, and the cost of synchronous calibration is high due to high-performance equipment.
In some embodiments of the present application, when delay correction is performed on two waveform generation channels, the two waveform generation channels output the same signal, and then after each time delay of one signal is adjusted, the two signals are added, and signal amplitudes of the added signals are obtained. And obtaining the maximum signal amplitude of the added signal and the corresponding adjusted target time delay based on the signal amplitudes and the corresponding adjusted time delays. When the added signals reach the maximum signal amplitude, the target time delay which is adjusted correspondingly can synchronize the signals output by the two paths of waveform generation channels, so that after one path of signals is subjected to delay correction based on the target time delay, the time delay generated by the waveform generation channels can be corrected, and the time delays of the two paths of signals are synchronized. The target time delay can be obtained based on the amplitude values of the signals and the corresponding adjusted time delays, so that the phase measurement of the signals is not required by using an external signal acquisition instrument, the high-precision measurement of the signals output by the waveform generation channel is not required, the delay correction can be realized directly based on the waveform generator, the synchronous calibration efficiency is high, and the cost is low.
In some embodiments, a waveform generator is provided, which is used for outputting any waveform according to the needs of a user, for example, outputting a sine wave, a square wave and other functional signals, and can correct any two paths of output signals so as to enable the any two paths of output signals to be synchronously output. Referring to fig. 1, the waveform generator includes at least two waveform generating channels 10, at least two output channels 20, a switching unit 30, an analog-to-digital conversion unit 40 and a processing unit 50, and the waveform generator is described in detail below.
Each waveform generation channel 10 is used for converting a digital waveform signal received at an input terminal thereof into an analog waveform signal. In some embodiments, the waveform generation channel 10 receives the digital sequence output from the processing unit 50 through its input, then digital-to-analog converts the digital sequence, and outputs a corresponding waveform signal through its output. In some embodiments, waveform generation channel 10 generally includes a digital-to-analog converter (DAC) and a low pass filter. The digital-to-analog converter is used for carrying out digital-to-analog conversion on the digital waveform signals, and the low-pass filter is used for carrying out filtering processing on the signals after digital-to-analog conversion so as to obtain analog waveform signals.
Each output channel 20 may be connected to the outside, so that the output channel 20 is used to output the analog waveform signal received at its input to the external device. In the present embodiment, the output channels 20 correspond in number to the waveform generation channels 10 for outputting signals output by the corresponding waveform generation channels 10 to an external device.
The switching unit 30 is configured to output at least part of any two analog waveform signals to the two output channels 20, respectively, and/or add at least part of any two analog waveform signals. In this embodiment, the switching unit 30 is configured to be connected to at least two waveform generation channels 10, so that signals output by at least two waveform generation channels 10 can be switched to the output channels 20 respectively, or signals output by any two waveform generation channels 10 in the at least two waveform generation channels 10 can be added.
Referring back to fig. 1, in some embodiments, the switching unit 30 includes a switching module. The switching module includes at least two sets of switching devices 34 corresponding to the waveform generation channels 10, and one set of switching devices 34 is used for switching the output of one waveform generation channel 10. In some embodiments, a first terminal of the switching device 34 is connected to the waveform generation channel 10 for receiving the analog waveform signal, a second terminal of the switching device 34 is connected to the output channel 20 for outputting the analog waveform signal to an external device, and a third terminal of the switching device 34 is connected to a third terminal of another switching device 34, so that the two analog waveform signals can be added. The switching device 34 may have its first terminal connected to its second terminal or third terminal under the control of the processing unit 50, thereby achieving output switching of the waveform generation channel 10. In this embodiment, the switching device 34 may be implemented as a single pole double throw switch or a switching transistor. In some embodiments, the switching unit 30 may further include an isolation module, where the isolation module is configured to isolate the two analog correction waveform signals before the switching unit 30 adds the two analog correction waveform signals. In this embodiment, since two analog correction waveform signals need to be added, in order to avoid mutual interference between the two signals, the two signals are separately isolated before being added. In some embodiments, the isolation module may include multiple sets of isolation devices 32, where each set of isolation devices 32 is configured to isolate an analog waveform signal, and a first end of the isolation device is connected to a third end of the switching device 34, and a second end of the isolation device is connected to a second end of another isolation device 32, for example, where the isolation device 32 may be implemented using a photocoupler.
Referring to fig. 2, in some embodiments, the switching unit 30 includes an isolation module and a switching module. The isolation module is configured to isolate and output a first portion of the two analog waveform signals, and isolate and output a second portion of the two analog waveform signals, which may be all or part of the analog waveform signals, to the two output channels 20, respectively. In some embodiments, the isolation module includes at least two sets of isolation devices 32 corresponding to the waveform generation channel 10, with one set of isolation devices 32 being used to isolate the output signal of one waveform generation channel 10. The first end of the isolation device 32 is connected to the waveform generation channel 10 for receiving the analog waveform signal, the second end of the isolation device 32 is connected to the output channel 20 for isolating the second portion of the analog waveform signal and outputting the isolated portion to the external device through the output channel 20, and the third end of the isolation device 32 is connected to the switching module for isolating the first portion of the analog waveform signal and outputting the isolated portion to the switching module. The switching module is used for adding the first parts of the two analog waveform signals, or the switching module can be used for switching the first parts of the two analog waveform signals to the ground respectively. In this embodiment, the isolation module performs power division and isolation processing on the analog waveform signals, and then the switching module adds at least part of the two analog corrected waveform signals to avoid mutual interference between the two signals. And one of the signals after the power is divided into at least two paths can be used for outputting to the output channel 20, and the other signal can be used for subsequent delay correction so as to realize real-time correction on the analog waveform signal. In some embodiments, the switching module may be implemented with one or more sets of switching devices 34. In some embodiments, the isolation device 32 may be a T-type coupler, which includes a resistor R1, a resistor R2, and a resistor R3, where one end of the resistor R1, the resistor R2, and the resistor R3 are connected, the other end of the resistor R1 is connected to the waveform generation channel 10, the other end of the resistor R2 is connected to the output channel 20, and the other end of the resistor R3 is connected to the switching module. The coupling degree of each output of the T-shaped coupler is adjusted by setting the resistor R1, the resistor R2 and the resistor R3. In this embodiment, the component parameters of the T-couplers are equal, so the coupling degrees are also the same.
The analog-to-digital conversion unit 40 is configured to convert the two-way analog waveform signals after addition into waveform sampling signals. In some embodiments, the analog-to-digital conversion unit 40 includes an analog-to-digital converter (ADC) for performing analog-to-digital conversion to convert the added two-way analog waveform signal into a waveform sample signal. In some embodiments, the analog-to-digital conversion unit 40 may further include an amplitude detection module, where the amplitude detection module is configured to convert the two-path analog waveform signals after the addition into detection signals that are characterized by signal amplitudes and have frequencies lower than those of the analog waveform signals, and then convert the detection signals into waveform sampling signals through the analog-to-digital converter. In some embodiments, the amplitude detection module includes a detector, and the detector is configured to detect the two added analog waveform signals to obtain a detection signal. In this embodiment, the frequency of the two added analog waveform signals can be reduced by detecting the signals by the detector, for example, when the two analog waveform signals are all signals such as sine waves and triangular waves, the detector can obtain a direct current signal representing the amplitude of the added signals after detecting the signals, so that the frequency of the direct current signal is reduced. In some embodiments, the detector detects the summed signal to obtain an envelope signal that characterizes the amplitude of the signal, thereby reducing its frequency. In this embodiment, the amplitude detection module may reduce the frequency of the two analog waveform signals after addition, so as to reduce the performance requirement of the analog-to-digital converter, for example, reduce the requirement of high sampling frequency, and reduce the complexity of hardware design and software design.
The processing unit 50 is configured to output one or more arbitrary waveform sequences according to the user's needs, which may be converted into corresponding analog waveform signals by one or more of the waveform generation channels 10. The processing unit 50 is further configured to adjust the delay of the analog waveform signal, so as to perform delay correction on any two paths of the at least two paths of waveform generation channels 10, so that the delays of the signals output by the any two paths of waveform generation channels 10 are synchronous. The processing unit 50 is further configured to obtain a signal amplitude of the waveform sampling signal based on the waveform sampling signal output by the analog-to-digital conversion unit 40.
In some embodiments, processing unit 50 includes a processor 52 and a phase shifting filter 54. The processor 52 is configured to output a sequence of arbitrary waveforms and calculate a signal amplitude of a waveform sampling signal, and the phase shift filter 54 is configured to filter the sequence output by the processor 52 and adjust a phase of the sequence to implement delay adjustment of the sequence, thereby adjusting a delay of the sequence corresponding to an analog waveform signal. In some embodiments, it may be possible to select whether delay adjustment of the sequence by the phase shift filter 54 is required by switching the switch. In some embodiments, the processor 52 may also be configured to delay correct, e.g., shift, the sequence of arbitrary waveforms output by the processor such that the sequence of arbitrary waveforms produces delays corresponding to integer multiples of the digital-to-analog converter sampling period in the waveform generation channel 10. In some embodiments, the processing unit 50 may control the phase-shifting filter 54 to perform delay adjustment or delay correction on the signal output by the waveform generation channel 10 separately, or may control the phase-shifting filter 54 to perform delay adjustment or delay correction together with itself.
In this embodiment, the frequency domain function of the phase-shift filter 54 is:
H d (w)＝e -j2πf(D+d1)
where W represents an angular frequency variation and f represents a frequency, as can be seen from the frequency domain function of the phase-shifting filter 54, when any signal x [ n ] passes through the phase-shifting filter 54, its phase shift is: 2 pi f (D+d1), the corresponding delay is: d+d1. Wherein f is the frequency of any signal x [ n ]. D is a constant related to the order of the phase-shifting filter 54, which is a positive integer, and the corresponding order is also equal for the same phase-shifting filter 54. d1 is a coefficient adjusted by the processing unit 50 to the phase-shift filter 54, so that the phase-shift filter 54 can generate different delays to the input signal by adjusting the coefficient.
The above is a description of the waveform generator, and the following describes the process of performing delay correction for any two-way waveform generation channel 10.
The processing unit 50 generates two identical digital correction waveform signals, e.g. the same original sequence x 1 [n]And x 2 [n]. Wherein the original sequence x 1 [n]And x 2 [n]The frequency and the amplitude are the same, or the frequency is the same, and the amplitude is in a corresponding proportion relation. The digital correction waveform signal is a periodic signal, such as a sine wave, a cosine wave, a triangle wave, or the like, which varies periodically. In some embodiments, processing unit 50 generates x 1 [n],x 2 [n]The specific expression of the cosine wave number digital sequence with the same amplitude and the same frequency is as follows:
x 1 [n]＝x 2 [n]＝cos(w 0 nT)；
wherein w is 0 Which represents the angular frequency of the signal,t is the sampling period of the digital-to-analog converter, and n is an integer. The two signals can be directly output to the two waveform generation channels 10 needing delay correction, or x can be generated after passing through the same phase-shift filter 54 1 [k],x 2 [k]And then output to the waveform generation path 10. After the digital-analog conversion is performed through the two paths of waveform generation channels 10, the same analog waveform signals are respectively output, and the two paths of signals transmitted to the switching unit 30 are respectively x after the analog waveform signals reach the tail end of the waveform generation channels 10 1 (t) and x 2 (t) the specific expression is:
x 1 (t)＝cos(w 0 t+θ 1 )；
x 2 (t)＝cos(w 0 t+θ 2 )；
wherein θ 1 And theta 2 Respectively represent x 1 (t) and x 2 The initial phase of (t), t representing a time variable. In the above two equations, since each of the phase-shift filters 54 in the initial condition is identical, the two signals are also identical in signal sequence after passing through the phase-shift filter 54. And θ of the two signals after reaching the end of the waveform generation channel 10 1 And theta 2 It is not equal and characterizes the delay difference d that occurs when the two signals reach the end. In the ideal case of two-channel signal delay synchronization, however, θ is required 1 ＝θ 2 。
At this time, the processing unit 50 may add at least part of the two signals by controlling the switching unit 30. For example, the two signals are added after passing through the T-type power coupler, and the expression of the addition is:
wherein A represents the coupling degree of the T-shaped coupler, and the parameters of the components of the two paths of T-shaped couplers are equal, so that the coupling degree A is the same.
Then, the detector in the analog-to-digital conversion unit 40 first adds the received sum signal s 1 (t) transformation intoA frequency lower than the sum signal s 1 Detection Signal s of (t) 2 (t), thus no matter the addition signal s 1 (t) a low frequency signal or a high frequency signal up to several GHz, which can be converted into a low frequency detection signal s after detection by a detector 2 (t) then the analog-to-digital converter pair detection signal s in the analog-to-digital conversion unit 40 2 (t) performing analog-to-digital conversion to obtain a corrected waveform sampling signal, and obtaining a detection signal s based on the corrected waveform sampling signal 2 The effective value of (t) Urms. Thereby enabling the analog-to-digital converter to detect the signal s 2 And (t) when analog-to-digital conversion is carried out, the requirement on a high-speed sampling analog-to-digital converter can be reduced, and the complexity of hardware design and software design is reduced.
From the sum signal s 1 The expression of (t) shows that when the two signals of the output channel 20 (CH 1) and the output channel 20 (CH 2) are synchronous, namely:
θ 1 ＝θ 2 ，cos [(θ 1 -θ 2 )/2]＝1；
at this time, the signal s is added 1 (t) the effective value rms reaches a maximum, and the detector outputs a detection signal s 2 The effective value of (t) Urms also reaches a maximum. Please refer to fig. 3, which shows the relationship between the effective value Urms and the phase error value Δθ, where Δθ=θ 1 -θ 2 . It can be seen that delta theta is within [ -pi, pi]In, when theta 1 <θ 2 When Δθ=θ 1 -θ 2 <0, along with the increase of delta theta, the detection signal s output by the detector 2 The effective value ulms of (t) will become large; when theta is as 1 >θ 2 When, i.e. Δθ=θ 1 -θ 2 >0, as delta theta becomes larger, the detection signal s output by the detector 2 The effective value uims of (t) will become smaller.
As can be seen from the above, when detecting the signal s 2 When the effective value Urms of (t) reaches the maximum, θ can be judged in reverse 1 ＝θ 2 . Thus, the processing unit 50 can adjust the time delay of one of the two signals, i.e. take the other signal as the reference signal, for example, the coefficients of the phase-shifting filter 54 can be configured so that the original digital sequence of one of the two signalsThe delay is generated after the phase shift filter 54, and the processor may also shift the original digital sequence of one of the paths. After the processing unit 50 adjusts the delay of one of the signals, a corresponding detection signal s can be obtained 2 (t)。
Due to the detection signal s 2 When the effective value Urms of (t) reaches the maximum, the actual value deviates from the theoretical value due to various errors such as interference or measurement, and therefore the theoretical value cannot be directly used for judging the detection signal s 2 Whether the effective value of (t) Urms reaches a maximum. For example, add signal s 1 When the rms value of (t) reaches the maximum, the theoretical value is 2A/. Cndot.2, and the value corresponds to the detection signal s 2 The effective value Urms of (t) also corresponds to the maximum, however the actual value obtained by the processing unit 50 based on the correction waveform sampling signal fluctuates up and down the theoretical value.
In this regard, the processing unit 50 may obtain a plurality of corresponding detection signals s after adjusting the delay of one of the signals a plurality of times 2 (t) and then the respective detection signals s are obtained by the processing unit 50 2 Effective value Urms of (t), e.g. adjust x 1 (t) delay, i.e. in x 2 (t) as a reference signal. Based on a plurality of detection signals s 2 Fitting the effective value Urms of (t) and the corresponding adjusted time delays to obtain a fitting result. In the present embodiment, when the processing unit 50 changes x 1 After (t) the signal corresponds to the value of the coefficient d1 of the phase-shift filter 54, the signal s is detected 2 The effective value Urms of (t) will also change correspondingly, as follows:
when theta is as 1 <θ 2 I.e. Δθ=θ 1 -θ 2 <In the case of 0, the detection signal s is detected during the phase error value Δθ changes from a negative value to a value close to 0 2 The effective value uims of (t) is also becoming large. When theta is as 1 >θ 2 I.e. Δθ=θ 1 -θ 2 >In the case of 0, the signal s is detected during the change of the phase error value Δθ from 0 2 The effective value Urms of (t) becomes smaller. The processing unit 50 can therefore be based on the detection signal s 2 The change of the effective value Urms of (t) can be judged in the initial conditionθ 1 And theta 2 And adjusts the value of the coefficient d1 based on the magnitude relation so that the phase error value delta theta is within [ -pi, pi [ -)]The internal changes are carried out so as to obtain a better fitting result, thereby obtaining the detection signal s accurately and subsequently 2 (t) maximum value of the effective value uims. In some embodiments, due to the detection signal s 2 (t) there is only one maximum value of the effective value Urms, so even if the phase error value Deltaθ is not [ -pi, pi]With internal changes, e.g. in [ -pi, 0]Or [0, pi ]]The inner part is changed, and a better fitting result can be obtained.
When x is adjusted multiple times 1 After the delay of (t), a series of Δθ= [ θ ] can be obtained 1 ,θ 2 ,θ n-1 ,θ n ]And the processing unit 50 obtains the detection signal s 2 (t) a series of effective values y= [ U ] 1 ,U 2 ,…U n-1 ,U n ]While each value of the coefficient d1 of the phase-shift filter 54 is equal to θ 1 Is one-to-one, so that there is also a one-to-one relationship with each value of Δθ. Based on a series of d1= [ d1 ] 1 ,d1 2 ,…,d1 n-1 ,d1 n ]And a series of effective values t= [ U ] 1 ,U 2 ,…U n-1 ,U n ]Fitting is performed, and the processing unit 50 calculates a linear fitting curve as follows:
y＝a n d1 n …+a 2 d1 2 +a 1 d1 1 +a 0 ；
in the linear fitting curve, n is larger than or equal to 1, and an appropriate value can be taken according to practical situations, for example, when n is larger than or equal to 7, the fitting degree of the linear fitting curve is better.
The maximum value of the effective value y is then calculated based on the linear fit curve, which may be derived, for example, and the root of the derivative at 0:
the obtained root is then brought into a linear fitting curve to calculateAnd (3) obtaining the root corresponding to the maximum value of the effective value y in the linear fitting curve, namely the optimal solution of d1. After the processing unit 50 configures the optimal solution of d1 to the corresponding phase shift filter 54, the signal x can be implemented 1 (t) performing delay correction so that the signal x 1 (t) sum signal x 2 (t) after passing through the two-way waveform generation channel 10, high-precision synchronization can be achieved, so that high-precision synchronization of the output channel 20 (CH 1) and the output channel 20 (CH 2) can be achieved, and in-phase of the output waveforms can be achieved.
The processing unit 50 records and saves the optimal solution of d1 as the calibration data of the two output channels 20, and then when the two output channels 20 output arbitrary waveform signals, delay correction can be performed on the arbitrary waveform signals output by the two output channels based on the calibration data.
In some embodiments, when performing delay correction based on the optimal solution of d1, the optimal solution of d1 may be configured to the corresponding phase shift filter 54, and correction of the overall delay may be achieved by the phase shift filter 54. D1 can also be split into an integer time delay and a fractional time delay of the sampling period based on the sampling period of the digital-to-analog converter in the waveform generation channel 10, namely:
d1＝aT+d2；
wherein T is the sampling period of the digital-to-analog converter, a is an integer greater than or equal to 0, and d2 is the fractional time delay of the sampling period. The processing unit 50 then shifts the corresponding digital signal based on the integer times of the sampling period to achieve the correction of the time delay, and controls the corresponding phase shift filter 54 to perform the correction of the time delay based on the fractional times of the sampling period. In this embodiment, the integral multiple time delay of the sampling period is implemented by shifting, which is simple and consumes less resources, and the fractional multiple time delay of the sampling period is implemented by the phase shift filter 54, which can implement the time delay of one fractional multiple of the sampling period of the digital-to-analog converter, thereby improving the accuracy of synchronization.
As can be seen from the above, any two-way waveform generation path 10 may be subjected to delay correction, and when it is necessary to perform delay correction on the other two-way waveform generation path 10, the above-described delay correction process may be repeated based on the other two-way waveform generation path 10.
In some embodiments, a multi-signal channel delay correction method is provided, which is applied to two signal channels, and the signal channels can adjust the delay of signals output by the signal channels. Referring to fig. 4, the multi-signal channel delay correction method includes the following steps:
step 100: the delay of the analog corrected waveform signal is adjusted. When the two paths of signal channels respectively output the same analog correction waveform signals, one path of signal channel adjusts the time delay of the analog correction waveform signals for a plurality of times, and at least part of the two paths of analog correction waveform signals are added and analog-to-digital converted after each adjustment, so as to obtain correction waveform sampling signals.
Step 200: and calculating the target time delay. And acquiring signal amplitude values of the correction waveform sampling signals, and acquiring the maximum signal amplitude value of the correction waveform sampling signals and the corresponding adjusted target time delay based on the signal amplitude values and the corresponding adjusted time delay.
Step 300: delay correction is performed. The target time delay is used for carrying out delay correction on the analog correction waveform signals by one path of the signal channels so as to enable the time delays of the two paths of the analog correction waveform signals to be synchronous.
In some embodiments, the obtaining the maximum signal amplitude of the correction waveform sampling signal and the corresponding adjusted target delay based on the signal amplitudes and the corresponding adjusted delays includes: fitting the signal amplitude values and the corresponding adjusted time delays to obtain fitting results; and obtaining the maximum signal amplitude of the correction waveform sampling signal and the target time delay correspondingly adjusted based on the fitting result.
Some embodiments provide a computer readable storage medium having a program stored thereon, the program being executable by a processor to implement the multi-signal channel delay correction method described above.
Those skilled in the art will appreciate that all or part of the functions of the various methods in the above embodiments may be implemented by hardware, or may be implemented by a computer program. When all or part of the functions in the above embodiments are implemented by means of a computer program, the program may be stored in a computer readable storage medium, and the storage medium may include: read-only memory, random access memory, magnetic disk, optical disk, hard disk, etc., and the program is executed by a computer to realize the above-mentioned functions. For example, the program is stored in the memory of the device, and when the program in the memory is executed by the processor, all or part of the functions described above can be realized. In addition, when all or part of the functions in the above embodiments are implemented by means of a computer program, the program may be stored in a storage medium such as a server, another computer, a magnetic disk, an optical disk, a flash disk, or a removable hard disk, and the program in the above embodiments may be implemented by downloading or copying the program into a memory of a local device or updating a version of a system of the local device, and when the program in the memory is executed by a processor.
The foregoing description of the application has been presented for purposes of illustration and description, and is not intended to be limiting. Several simple deductions, modifications or substitutions may also be made by a person skilled in the art to which the application pertains, based on the idea of the application.
Claims (10)
1. A waveform generator, comprising:
at least two wave generation channels, each wave generation channel is used for converting digital wave signals received by the input end of the wave generation channel into analog wave signals;
at least two output channels, the output channels are used for outputting at least part of the analog waveform signals received by the input ends of the output channels to external equipment;
a switching unit, configured to output at least part of the two analog waveform signals to the two output channels, and/or add at least part of the two analog waveform signals;
the analog-to-digital conversion unit is used for converting the two paths of analog waveform signals after addition into waveform sampling signals;
a processing unit for:
generating two paths of same digital correction waveform signals;
and adjusting the time delay of one digital correction waveform signal for a plurality of times, and after each adjustment: respectively outputting two paths of digital correction waveform signals to two paths of waveform generation channels, wherein the two paths of waveform generation channels respectively convert the digital correction waveform signals into analog correction waveform signals; the switching unit is controlled to add at least part of the two analog correction waveform signals, and the analog-to-digital conversion unit converts the added two analog correction waveform signals into correction waveform sampling signals;
acquiring signal amplitude values of the correction waveform sampling signals, and acquiring maximum signal amplitude values of the correction waveform sampling signals and corresponding adjusted target time delays based on the signal amplitude values and corresponding adjusted time delays;
and carrying out delay correction on one path of digital correction waveform signals based on the target time delay, so that the time delays of the two paths of analog correction waveform signals are synchronous.
2. The waveform generator of claim 1, wherein the switching unit comprises:
the switching module is used for respectively outputting two paths of analog waveform signals to the two paths of output channels or adding the two paths of analog waveform signals;
and the isolation module is used for respectively carrying out isolation processing on the two paths of analog correction waveform signals before the switching unit adds the two paths of analog correction waveform signals.
3. The waveform generator of claim 1, wherein the switching unit comprises:
the isolation module is used for respectively isolating and outputting the first parts of the two paths of analog waveform signals and the second parts of the two paths of analog waveform signals and outputting the second parts of the two paths of analog waveform signals to the two paths of output channels;
and the switching module is used for adding the first parts of the two paths of the analog waveform signals after isolation.
4. The waveform generator of claim 1, wherein the analog-to-digital conversion unit comprises:
the amplitude detection module is used for converting the added two paths of analog waveform signals into detection signals which represent the signal amplitude and have the frequency lower than that of the analog waveform signals;
and the analog-to-digital converter is used for converting the detection signal into the waveform sampling signal.
5. The waveform generator as claimed in claim 4, wherein said amplitude detection module comprises a detector for detecting the added two analog waveform signals to obtain said detected signal.
6. The waveform generator of claim 1, wherein the processing unit comprises:
a processor for outputting at least the two identical digital correction waveform signals;
and the phase-shifting filter is used for filtering one path of the digital correction waveform signals so as to carry out time delay adjustment and/or delay correction on one path of the digital correction waveform signals.
7. The waveform generator of any one of claims 1-6, wherein the deriving the maximum signal amplitude of the corrected waveform sample signal and its corresponding adjusted target delay based on each signal amplitude and corresponding each adjusted delay comprises:
fitting the signal amplitude values and the corresponding adjusted time delays to obtain fitting results;
and obtaining the maximum signal amplitude of the correction waveform sampling signal and the target time delay correspondingly adjusted based on the fitting result.
8. The waveform generator of claim 6, wherein said waveform generation channel comprises a digital-to-analog converter for converting said digital waveform signal to said analog waveform signal; the delay correction of the one path of the digital correction waveform signal includes:
dividing the target time delay into integer time delay and fraction time delay of the sampling period based on the sampling period of the digital-to-analog converter;
based on the fractional time delay, the phase-shifting filter is used for carrying out delay correction on one path of digital correction waveform signals; and based on the integral multiple time delay, the processor is used for carrying out delay correction on one path of the digital correction waveform signals.
9. A method for correcting delay of multiple signal channels, which is applied to two signal channels, wherein the signal channels can adjust delay of signals output by the signal channels, and the method comprises:
when the two paths of signal channels respectively output the same analog correction waveform signals, and one path of signal channels adjusts the time delay of the analog correction waveform signals for a plurality of times, adding at least part of the two paths of analog correction waveform signals after each adjustment and performing analog-to-digital conversion to obtain correction waveform sampling signals;
acquiring signal amplitude values of the correction waveform sampling signals, and acquiring maximum signal amplitude values of the correction waveform sampling signals and corresponding adjusted target time delays based on the signal amplitude values and corresponding adjusted time delays;
the target time delay is used for carrying out delay correction on the analog correction waveform signals by one path of the signal channels so as to enable the time delays of the two paths of the analog correction waveform signals to be synchronous.
10. A computer readable storage medium having stored thereon a program executable by a processor to implement the method of claim 9.
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