CN117192488B - Initial signal processing system and method based on FPGA - Google Patents
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Abstract
The invention discloses an initial signal processing system and method based on an FPGA, and belongs to the technical field of information processing. The invention comprises the following steps: s10: judging whether the carrier signal received by the receiver is deviated or not according to the radar movement condition, the position information of the receiver and the carrier signal frequency change condition received by the receiver; s20: correcting a carrier signal received by a receiver; s30: determining a theoretical value of a signal frequency of a carrier signal received by a receiver; s40: a signal amplitude of a carrier signal received by a receiver is determined. The invention eliminates the influence of offset of the signals received by the receiver caused by the movement of the transmitter and the movement of the receiver, ensures that the signals received by the receiver can accurately reflect the transmitted signals of the transmitter, further improves the processing effect of the system on the signals, and avoids the influence of the FPGA chip on solving the signal amplitude due to the incapability of directly calculating the index and the evolution operation by using the Cordic algorithm in the FPGA chip.
Description
Technical Field
The invention relates to the technical field of information, in particular to an initial signal processing system and method based on an FPGA.
Background
Along with the progress of society, electronic counterreconnaissance technology occupies an increasingly important position in the military national defense industry, electronic reconnaissance is mainly used for acquiring important military information, working parameters of hostile radar signals are extracted in a complex electromagnetic environment by utilizing reconnaissance equipment, positioning, identifying and analyzing are carried out on hostile radar, and functions and purposes of the hostile radar are defined. In the electronic reconnaissance, the external radar signal needs to be processed and analyzed, so the research and development of the receiver is the main working content in the electronic reconnaissance field. Compared with the traditional receiver, the digital receiver has more advantages and stronger performance, and with the continuous development of the communication industry, the digital receiver becomes an indispensable important product in the electronic reconnaissance field.
At present, the age of integrated circuits is rapidly developed, digital signal processing technology is also updated continuously, and digital receivers have more choices on hardware-mounted platforms, such as FPGA, ASIC, DSP. The FPGA is a device with very high integration level, the basic structure is based on a lookup table, rich interconnection resources and storage resources are arranged in the FPGA, hundreds of thousands of basic gates can be stored, and the design period and cost of the FPGA are far lower than those of a DSP processing chip and an ASIC special chip. The prior FPGA chip is added with digital signal processing, embedded processing, high-speed interfaces and other high-end technologies, and certain operations which can only be realized in the DSP in the past can be realized in the FPGA, so that the FPGA is widely favored by modern electronic designers with the advantages of repeatability, abundant internal logic resources, low price and the like.
At present, in a digital receiver system, signals received by the digital receiver tend to deviate due to the influence of factors such as transmitter movement, receiver movement and the like, so that the frequency deviation needs to be corrected, but the existing system is excessively complicated and low in efficiency in the frequency deviation correction process, and the problem that the amplitude of the signals cannot be directly obtained through indexes in the data receiver cannot be solved by the existing FPGA.
Disclosure of Invention
The invention aims to provide an initial signal processing system and method based on an FPGA, so as to solve the problems in the background technology.
In order to solve the technical problems, the invention provides the following technical scheme: an initial signal processing method based on an FPGA, the method comprising:
s10: judging whether the carrier signal received by the receiver is deviated or not according to the radar movement condition, the position information of the receiver and the carrier signal frequency change condition received by the receiver;
s20: correcting a carrier signal received by a receiver;
s30: determining a theoretical value of a signal frequency of a carrier signal received by a receiver;
s40: a signal amplitude of a carrier signal received by a receiver is determined.
Further, the step S10 includes:
s101: acquiring the movement speed of the radar at each moment compared with the receiver and the position information of the radar at each moment by using the detection equipment, acquiring the position coordinates of the radar at each moment compared with the receiver by combining the position information of the receiver, and calculating the distance information of the radar at each moment compared with the receiver by using a distance calculation formula based on the acquired position coordinates;
s102: according to [ (V) t *k)/(2πb t )]Judging whether the carrier signal received by the receiver at the time t is offset or not, if [ (V) t *k)/(2πb t )]Not equal to 0, if G t -[(V t *k)/(2πb t )]If the signal is not shifted, the receiver determines that the carrier signal received by the receiver is not shifted, wherein t represents time, k represents wave number corresponding to the carrier signal sent by the radar, and V t Representing the radar's speed of movement compared to the receiver when time t is.
[(V t *k)/(2πb t )]Representing the frequency offset between the signal frequency of the carrier signal transmitted by the radar and the signal frequency of the carrier signal received by the receiver.
Further, the specific method for correcting the carrier signal received by the receiver in S20 is as follows:
if it is determined in S102 that the carrier signal received by the receiver is shifted, the correction processing is performed on the carrier signal frequency received by the receiver at each time according to the distance information calculated in S101, where the specific method of the correction processing is as follows:
and I, dividing the carrier signal frequency received by the receiver at each moment and the distance information of the radar compared with the receiver at each moment to obtain a training set and a testing set, wherein the dividing ratio of the training set to the testing set is 8:2, the expression forms of the training set and the testing set are (carrier signal frequency, distance value and time value), a prediction model is built by utilizing the training set, the built prediction model is trained by utilizing the testing set, an optimal prediction model is obtained, and a relation coefficient beta between the carrier signal frequency and the distance value is determined according to the obtained optimal prediction model;
the specific formula for recovering the carrier signal frequency received by the receiver at each moment is as follows:
G t ＝{L′ t +{Sgn(b t -b′)*[(L t -L′ t )/L′ t ]*β}+(R t -r t )*α}*(1-K)；
wherein b t Representing the distance value of the radar compared to the receiver when the time is t, b' represents the initial distance of the radar compared to the receiver, sgn () represents the sign function, when b t When b' > 0, sgn (b) t -b')=1, when b t When b' < 0, sgn (b) t -b') = -1, when b t When b' =0, sgn (b t -b′)＝0，L′ t Represents the initial carrier signal frequency received by the receiver, K represents the thermal noise coefficient of the receiver, R t Indicating the corresponding working voltage value of the receiver when the time is t, r t Representing the standard working voltage value corresponding to the receiver when the time is t, alpha represents the carrier signal frequency increment value corresponding to each 1 DEG increase or decrease of the working voltage of the receiver, L t Representing the frequency of the carrier signal received by the receiver when the time is t, G t The carrier signal frequency obtained by recovering the carrier signal frequency received by the receiver when the time is t is shown.
Further, the S30 is based on the offset [ (V) generated at time t by the carrier signal received by the receiver t *k)/(2πb t )]The theoretical value of the signal frequency of the carrier signal received by the receiver at the time t is determined, and a specific determination formula is as follows:
W t ＝G t +[(V t *k)/(2πb t )]；
wherein W is t A theoretical value representing the signal frequency of the carrier signal received by the receiver when the time is t.
Further, the step S40 includes:
s401: the theoretical value of the signal frequency of the carrier signal received by the receiver at each moment determined in the step S30 is calculated on a plane rectangular coordinate systemRepresenting the theoretical value W of the signal frequency by taking time t as the abscissa in a plane rectangular coordinate system t Is the ordinate;
s402: the signal amplitude of the carrier signal received by the receiver is determined, and the specific determining method comprises the following steps:
i. Set initial vector (x 0 ,y 0 ) The real part of (a) is a, the imaginary part is b, if a < 0 and b is equal to or greater than 0, the initial vector (x 0 ,y 0 ) Rotated by 90 DEG, otherwise, judging whether a < 0 and b < 0 are satisfied, if so, adding an initial vector (x 0 ,y 0 ) Rotated by-90 DEG, if not, the initial vector (x 0 ,y 0 ) No angular rotation is performed, where x 0 Representing the abscissa of the initial vector, y 0 Representing the ordinate of the initial vector;
setting an FPGA chip in a receiver, wherein the FPGA chip utilizes a Cordic algorithm to perform angle rotation treatment on an initial vector (x 'obtained after angle rotation treatment in a plane rectangular coordinate system' 0 ,y′ 0 ) By a certain number of rotations, a vector (x i ,y i ) Wherein lim (y i 0), vector (x i ,y i ) Is the value of the abscissa, if the initial vector (x 0 ,y 0 ) Without angular rotation (x' 0 ,y′ 0 )＝(x 0 ,y 0 )；
The FPGA is a product further developed on the basis of programmable devices such as PAL (programmable array logic), GAL (general array logic) and the like, and a Cordic algorithm, namely a coordinate rotation digital computing method is used;
due to the vector (x i-1 ，y i-1 ) By rotating theta clockwise i Angle-derived vector (x) i ，y i ) The rotation equation can thus be derived as:
x i ＝cos(θ i )(x i-1 +y i-1 tanθ i )；
y i ＝cos(θ i )(y i-1 +x i-1 tanθ i )；
cos (θ) i ) Removing to obtain a pseudo rotation equation:
x i ＝x i-1 +y i-1 tanθ i ；
y i ＝y i-1 +x i-1 tanθ i ；
utilization 2 -i Instead of tan theta i Realizing the calculation of trigonometric functions, the initial vector (x' 0 ,y′ 0 ) Rotation angle θ of the ith rotation i ＝arctan2 -i The angle after rotation is denoted by z, then z i ＝z i-1 -d i θ i When z i When the infinite approximation is made to 0, the initial vector (x' 0 ,y′ 0 ) Stop rotation, initial vector (x' 0 ,y′ 0 ) Angle θ= Σarctan2 with positive X-axis direction -i Where i=1, 2, …, n, represents the initial vector (x' 0 ,y′ 0 ) The number corresponding to the number of rotations, n, represents the initial vector (x' 0 ,y′ 0 ) Is the sum symbol, the upper sign of sigma is n, the lower sign is i=1, d i Representing the initial vector (x' 0 ,y′ 0 ) In the rotation direction at the i-th rotation, the initial vector (x' 0 ,y′ 0 ) D when rotating clockwise i When the initial vector (x' 0 ,y′ 0 ) D when rotating anticlockwise i ＝-1，z i Representing the initial vector (x' 0 ,y′ 0 ) The included angle between the ith rotation and the positive direction of the X axis;
due toThe initial vector (x' 0 ,y′ 0 ) After n rotations, the initial vector (x' 0 ,y′ 0 ) Compensation factor of vector modulus->Wherein, pi represents a continuous multiplication symbol, the upper label of pi is n, and the lower label is i=1;
the improved rotation equation is:
x i ＝x i-1 +y i-1 d i 2 -i ；
y i ＝y i-1 +x i-1 d i 2 -i ；
z i ＝z i-1 -d i θ i ；
III. signal amplitude A=x of the carrier signal received by the receiver n /K n Will be 1/K n Data expansion 2 of (2) m Doubling to give K, where a=kx n Finally, intercepting the low m bits of A to obtain the signal amplitude of the carrier signal received by the receiver, wherein m represents a constant, x n Representing the initial vector (x' 0 ,y′ 0 ) The abscissa of the vector obtained after the nth rotation requires 1/K since the FPGA chip cannot perform decimal operation when solving for A n Data expansion 2 of (2) m The multiplication gives K.
An initial signal processing system based on an FPGA comprises a carrier signal offset prediction module, a carrier signal correction processing module, a carrier signal frequency determination module and a signal amplitude determination module;
the carrier signal offset prediction module is used for judging whether the carrier signal received by the receiver is offset or not according to the radar motion condition, the position information of the receiver and the carrier signal frequency change condition received by the receiver, and transmitting a judgment result to the carrier signal correction processing module;
the carrier signal correction processing module is used for correcting the carrier signal received by the receiver according to the judgment result transmitted by the carrier signal offset prediction module, and transmitting the signal frequency of the carrier signal after correction to the carrier signal frequency determination module;
the carrier signal frequency determining module is used for determining a theoretical value of the signal frequency of the carrier signal received by the receiver according to the signal frequency of the corrected carrier signal transmitted by the carrier signal correction processing module, and transmitting the determined theoretical value to the signal amplitude determining module;
the signal amplitude determining module is used for determining the signal amplitude of the carrier signal received by the receiver according to the theoretical value of the signal frequency transmitted by the carrier signal frequency determining module.
Further, the carrier signal offset prediction module comprises a calculation unit and a carrier signal offset unit;
the computing unit computes distance information of the radar compared with the receiver at each moment according to the position information of the radar at each moment and the position information of the receiver, and transmits the computed distance information to the carrier signal offset unit and the carrier signal correction processing module;
the carrier signal offset unit receives the distance information transmitted by the calculation unit according to [ (V) t *k)/(2πb t )]Judging whether the carrier signal received by the receiver at the time t is offset or not, transmitting the judging result to a carrier signal correction processing module, and calculating the offset [ (V) t *k)/(2πb t )]To the carrier signal frequency determination module.
Further, the carrier signal correction processing module receives the judgment result transmitted by the carrier signal offset unit, combines the distance information transmitted by the calculation unit, corrects the carrier signal frequency received by the receiver at each moment, and transmits the carrier signal frequency obtained after correction to the carrier signal frequency determining module.
Further, the carrier signal frequency determining module receives the offset transmitted by the carrier signal offset unit, combines the carrier signal frequency obtained after the correction processing transmitted by the carrier signal correction processing module, determines the theoretical value of the signal frequency of the carrier signal received by the receiver at the time t, and transmits the theoretical value of the signal frequency of the determined carrier signal to the signal amplitude determining module.
Further, the signal amplitude determining module comprises a distributed display unit, a rotation processing unit, a vector processing unit and a signal amplitude calculating unit;
the distribution display unit receives the theoretical value of the signal frequency of the carrier signal transmitted by the carrier signal frequency determining module, represents the received information on a plane rectangular coordinate system, and transmits the representing result to the rotation processing unit;
the rotation processing unit is used for receiving the representation result transmitted by the distribution display unit, determining an initial vector of a carrier signal based on the received information, judging whether the determined initial vector is in a quadrant, selecting whether to perform rotation processing on the initial vector according to the judgment result, transmitting the initial vector obtained after the rotation processing to the vector processing unit if the rotation processing is performed, and transmitting the determined initial vector to the vector processing unit if the rotation processing is not performed;
the vector processing unit receives the initial vector transmitted by the rotation processing unit, determines an improved rotation equation by combining with a Cordic algorithm, and transmits the determined improved rotation equation to the signal amplitude calculation unit;
the signal amplitude calculation unit receives the improved rotation equation transmitted by the vector processing unit, and determines the signal amplitude of the carrier signal received by the receiver based on the received information.
Compared with the prior art, the invention has the following beneficial effects:
1. according to the invention, the offset of the signal received by the receiver is calculated by the radar compared with the movement speed and the distance information of the receiver, the signal received by the receiver is corrected by combining the working temperature and the working voltage change condition of the receiver based on the calculation result, the influence of the offset of the signal received by the receiver caused by the movement of the transmitter and the movement of the receiver is eliminated, the signal received by the receiver can accurately reflect the transmitting signal of the transmitter, and the signal processing effect of the system is further improved.
2. According to the invention, the relation between the carrier signal frequency and the distance value is searched through the training model, so that unified management of the signal frequency received by the receiver is realized, the processing complexity of the signal frequency is reduced, and the processing efficiency of the system is further improved.
3. According to the invention, the Cordic algorithm is used in the FPGA chip to calculate the signal amplitude received by the receiver, so that the influence of the FPGA chip on the signal amplitude solving caused by incapability of directly calculating the index and the evolution operation is avoided, and meanwhile, the processing efficiency of the system on the initial signal is further improved due to the advantages of the FPGA chip such as the repeatability, the abundant internal logic resources, the low price and the like.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
FIG. 1 is a schematic workflow diagram of an FPGA-based initial signal processing system and method of the present invention;
fig. 2 is a schematic structural diagram of the working principle of the initial signal processing system and method based on the FPGA of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1 and 2, the present invention provides the following technical solutions: an initial signal processing method based on FPGA, the method includes:
s10: judging whether the carrier signal received by the receiver is deviated or not according to the radar movement condition, the position information of the receiver and the carrier signal frequency change condition received by the receiver;
s10 comprises the following steps:
s101: acquiring the movement speed of the radar at each moment compared with the receiver and the position information of the radar at each moment by using the detection equipment, acquiring the position coordinates of the radar at each moment compared with the receiver by combining the position information of the receiver, and calculating the distance information of the radar at each moment compared with the receiver by using a distance calculation formula based on the acquired position coordinates;
s102: according to [ (V) t *k)/(2πb t )]Judging whether the carrier signal received by the receiver at the time t is offset or not, if [ (V) t *k)/(2πb t )]Not equal to 0, if G t -[(V t *k)/(2πb t )]If the signal is not shifted, the receiver determines that the carrier signal received by the receiver is not shifted, wherein t represents time, k represents wave number corresponding to the carrier signal sent by the radar, and V t Representing the radar's speed of movement compared to the receiver when time t is.
[(V t *k)/(2πb t )]A frequency offset between a signal frequency representing a carrier signal transmitted by the radar and a signal frequency of a carrier signal received by the receiver;
s20: correcting a carrier signal received by a receiver;
the specific method for correcting the carrier signal received by the receiver in S20 is as follows:
if it is determined in S102 that the carrier signal received by the receiver is shifted, the correction processing is performed on the carrier signal frequency received by the receiver at each time according to the distance information calculated in S101, where the specific method of the correction processing is as follows:
and I, dividing the carrier signal frequency received by the receiver at each moment and the distance information of the radar compared with the receiver at each moment to obtain a training set and a testing set, wherein the dividing ratio of the training set to the testing set is 8:2, the expression forms of the training set and the testing set are (carrier signal frequency, distance value and time value), a prediction model is built by utilizing the training set, the built prediction model is trained by utilizing the testing set, an optimal prediction model is obtained, and a relation coefficient beta between the carrier signal frequency and the distance value is determined according to the obtained optimal prediction model;
the specific formula for recovering the carrier signal frequency received by the receiver at each moment is as follows:
G t ＝{L′ t +{Sgn(b t -b′)*[(L t -L′ t )/L′ t ]*β}+(R t -r t )*α}*(1-K)；
wherein b t Representing the distance value of the radar compared to the receiver when the time is t, b' represents the initial distance of the radar compared to the receiver, sgn () represents the sign function, when b t When b' > 0, sgn (b) t -b')=1, when b t When b' < 0, sgn (b) t -b') = -1, when b t When b' =0, sgn (b t -b′)＝0，L′ t Represents the initial carrier signal frequency received by the receiver, K represents the thermal noise coefficient of the receiver, R t Indicating the corresponding working voltage value of the receiver when the time is t, r t Representing the standard working voltage value corresponding to the receiver when the time is t, alpha represents the carrier signal frequency increment value corresponding to each 1 DEG increase or decrease of the working voltage of the receiver, L t Representing the frequency of the carrier signal received by the receiver when the time is t, G t The carrier signal frequency obtained by recovering the carrier signal frequency received by the receiver when the time is t is shown.
S30: determining a theoretical value of a signal frequency of a carrier signal received by a receiver;
s30, generating offset [ (V) at time t according to the carrier signal received by the receiver t *k)/(2πb t )]The theoretical value of the signal frequency of the carrier signal received by the receiver at the time t is determined, and a specific determination formula is as follows:
W t ＝G t +[(V t *k)/(2πb t )]；
wherein W is t A theoretical value representing the signal frequency of the carrier signal received by the receiver when the time is t.
S40: a signal amplitude of a carrier signal received by a receiver is determined.
S40 includes:
s401: the theoretical value of the signal frequency of the carrier signal received by the receiver at each moment determined in S30 is expressed on a plane rectangular coordinate system, the plane rectangular coordinate system takes the time t as the abscissa, and the theoretical value W of the signal frequency t Is the ordinate;
s402: the signal amplitude of the carrier signal received by the receiver is determined, and the specific determining method comprises the following steps:
i. Set initial vector (x 0 ,y 0 ) The real part of (a) is a, the imaginary part is b, if a < 0 and b is equal to or greater than 0, the initial vector (x 0 ,y 0 ) Rotated by 90 DEG, otherwise, judging whether a < 0 and b < 0 are satisfied, if so, adding an initial vector (x 0 ,y 0 ) Rotated by-90 DEG, if not, the initial vector (x 0 ,y 0 ) No angular rotation is performed, where x 0 Representing the abscissa of the initial vector, y 0 Representing the ordinate of the initial vector;
setting an FPGA chip in a receiver, wherein the FPGA chip utilizes a Cordic algorithm to perform angle rotation treatment on an initial vector (x 'obtained after angle rotation treatment in a plane rectangular coordinate system' 0 ,y′ 0 ) By a certain number of rotations, a vector (x i ,y i ) Wherein lim (y i 0), vector (x i ,y i ) Is the value of the abscissa, if the initial vector (x 0 ,y 0 ) Without angular rotation (x' 0 ,y′ 0 )＝(x 0 ,y 0 )；
The FPGA is a product further developed on the basis of programmable devices such as PAL (programmable array logic), GAL (general array logic) and the like, and a Cordic algorithm, namely a coordinate rotation digital computing method is used;
due to the vector (x i-1 ，y i-1 ) By rotating theta clockwise i Angle-derived vector (x) i ，y i ) The rotation equation can thus be derived as:
x i ＝cos(θ i )(x i-1 +y i-1 tanθ i )；
y i ＝cos(θ i )(y i-1 +x i-1 tanθ i )；
cos (θ) i ) Removing to obtain a pseudo rotation equation:
x i ＝x i-1 +y i-1 tanθ i ；
y i ＝y i-1 +x i-1 tanθ i ；
utilization 2 -i Instead of tan theta i Realizing the calculation of trigonometric functions, the initial vector (x' 0 ,y′ 0 ) Rotation angle θ of the ith rotation i ＝arctan2 -i The angle after rotation is denoted by z, then z i ＝z i-1 -d i θ i When z i When the infinite approximation is made to 0, the initial vector (x' 0 ,y′ 0 ) Stop rotation, initial vector (x' 0 ,y′ 0 ) Angle θ= Σarctan2 with positive X-axis direction -i Where i=1, 2, …, n, represents the initial vector (x' 0 ,y′ 0 ) The number corresponding to the number of rotations, n, represents the initial vector (x' 0 ,y′ 0 ) Is the sum symbol, the upper sign of sigma is n, the lower sign is i=1, d i Representing the initial vector (x' 0 ,y′ 0 ) In the rotation direction at the i-th rotation, the initial vector (x' 0 ,y′ 0 ) D when rotating clockwise i When the initial vector (x' 0 ,y′ 0 ) D when rotating anticlockwise i ＝-1，z i Representing the initial vector (x' 0 ,y′ 0 ) The included angle between the ith rotation and the positive direction of the X axis;
due toThe initial vector (x' 0 ,y′ 0 ) After n rotations, the initial vector (x' 0 ,y′ 0 ) Compensation factor of vector modulus->Wherein, pi represents a continuous multiplication symbol, the upper label of pi is n, and the lower label is i=1;
the improved rotation equation is:
x i ＝x i-1 +y i-1 d i 2 -i ；
y i ＝y i-1 +x i-1 d i 2 -i ；
z i ＝z i-1 -d i θ i ；
III. signal amplitude A=x of the carrier signal received by the receiver n /K n Will be 1/K n Data expansion 2 of (2) m Doubling to give K, where a=kx n Finally, intercepting the low m bits of A to obtain the signal amplitude of the carrier signal received by the receiver, wherein m represents a constant, x n Representing the initial vector (x' 0 ,y′ 0 ) The abscissa of the vector obtained after the nth rotation requires 1/K since the FPGA chip cannot perform decimal operation when solving for A n Data expansion 2 of (2) m The multiplication gives K.
An initial signal processing system based on an FPGA comprises a carrier signal offset prediction module, a carrier signal correction processing module, a carrier signal frequency determination module and a signal amplitude determination module;
the carrier signal offset prediction module is used for judging whether the carrier signal received by the receiver is offset or not according to the radar motion condition, the position information of the receiver and the carrier signal frequency change condition received by the receiver, and transmitting a judgment result to the carrier signal correction processing module;
the carrier signal offset prediction module comprises a calculation unit and a carrier signal offset unit;
the computing unit computes distance information of the radar compared with the receiver at each moment according to the position information of the radar at each moment and the position information of the receiver, and transmits the computed distance information to the carrier signal offset unit and the carrier signal correction processing module;
the carrier signal offset unit receives the distance information transmitted by the calculation unit according to [ (V) t *k)/(2πb t )]Judging whether the carrier signal received by the receiver at the time t is offset or not, transmitting the judging result to a carrier signal correction processing module, and calculating the offset [ (V) t *k)/(2πb t )]To the carrier signal frequency determination module.
The carrier signal correction processing module is used for correcting the carrier signal received by the receiver according to the judgment result transmitted by the carrier signal offset prediction module, and transmitting the signal frequency of the carrier signal after correction to the carrier signal frequency determination module;
the carrier signal correction processing module receives the judgment result transmitted by the carrier signal offset unit, combines the distance information transmitted by the calculation unit, corrects the carrier signal frequency received by the receiver at each moment, and transmits the carrier signal frequency obtained after correction to the carrier signal frequency determination module.
The carrier signal frequency determining module is used for determining a theoretical value of the signal frequency of the carrier signal received by the receiver according to the signal frequency of the corrected carrier signal transmitted by the carrier signal correction processing module, and transmitting the determined theoretical value to the signal amplitude determining module;
the carrier signal frequency determining module receives the offset transmitted by the carrier signal offset unit, combines the carrier signal frequency obtained after the correction processing transmitted by the carrier signal correction processing module, determines the theoretical value of the signal frequency of the carrier signal received by the receiver at the time t, and transmits the theoretical value of the signal frequency of the determined carrier signal to the signal amplitude determining module.
The signal amplitude determining module is used for determining the signal amplitude of the carrier signal received by the receiver according to the theoretical value of the signal frequency transmitted by the carrier signal frequency determining module.
The signal amplitude determining module comprises a distribution display unit, a rotation processing unit, a vector processing unit and a signal amplitude calculating unit;
the distribution display unit receives the theoretical value of the signal frequency of the carrier signal transmitted by the carrier signal frequency determining module, represents the received information on a plane rectangular coordinate system, and transmits the representing result to the rotation processing unit;
the rotation processing unit receives the representation result transmitted by the distribution display unit, determines an initial vector of a carrier signal based on the received information, judges the quadrant where the determined initial vector is located, selects whether to perform rotation processing on the initial vector according to the judgment result, transmits the initial vector obtained after the rotation processing to the vector processing unit if the rotation processing is performed, and transmits the determined initial vector to the vector processing unit if the rotation processing is not performed;
the vector processing unit receives the initial vector transmitted by the rotation processing unit, determines an improved rotation equation by combining with the Cordic algorithm, and transmits the determined improved rotation equation to the signal amplitude calculation unit;
the signal amplitude calculation unit receives the improved rotation equation transmitted by the vector processing unit, and determines the signal amplitude of the carrier signal received by the receiver based on the received information.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
Finally, it should be noted that: the foregoing description is only a preferred embodiment of the present invention, and the present invention is not limited thereto, but it is to be understood that modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art, although the present invention has been described in detail with reference to the foregoing embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
1. An initial signal processing method based on FPGA is characterized in that: the method comprises the following steps:
s10: judging whether the carrier signal received by the receiver is deviated or not according to the radar movement condition, the position information of the receiver and the carrier signal frequency change condition received by the receiver;
the S10 includes:
s101: acquiring the movement speed of the radar at each moment compared with the receiver and the position information of the radar at each moment by using the detection equipment, acquiring the position coordinates of the radar at each moment compared with the receiver by combining the position information of the receiver, and calculating the distance information of the radar at each moment compared with the receiver by using a distance calculation formula based on the acquired position coordinates;
s102: according to [ (V) t *k)/(2πb t )]Judging whether the carrier signal received by the receiver at the time t is offset or not, if [ (V) t *k)/(2πb t )]Not equal to 0, if G t -[(V t *k)/(2πb t )]If the signal is not shifted, the receiver determines that the carrier signal received by the receiver is not shifted, wherein t represents time, k represents wave number corresponding to the carrier signal sent by the radar, and b t Representing the distance value of the radar compared to the receiver when the time is t, V t Represents the radar's velocity of motion compared to the receiver when time is t, G t Representing the carrier signal frequency obtained by recovering the carrier signal frequency received by the receiver when the time is t;
s20: correcting a carrier signal received by a receiver;
the specific method for correcting the carrier signal received by the receiver in S20 is as follows:
if it is determined in S102 that the carrier signal received by the receiver is shifted, the correction processing is performed on the carrier signal frequency received by the receiver at each time according to the distance information calculated in S101, where the specific method of the correction processing is as follows:
dividing the carrier signal frequency received by a receiver at each moment and the distance information of a radar compared with the receiver at each moment to obtain a training set and a testing set, establishing a prediction model by using the training set, training the established prediction model by using the testing set to obtain an optimal prediction model, and determining a relation coefficient beta between the carrier signal frequency and a distance value according to the obtained optimal prediction model;
the specific formula for recovering the carrier signal frequency received by the receiver at each moment is as follows:
G t ＝{L′ t +{Sgn(b t -b′)*[(L t -L′ t )/L′ t ]*β}+(R t -r t )*α}*(1-K)；
where b 'represents the initial distance of the radar compared to the receiver, sgn () represents the sign function, L' t Represents the initial carrier signal frequency received by the receiver, K represents the thermal noise coefficient of the receiver, R t Indicating the corresponding working voltage value of the receiver when the time is t, r t Representing the standard working voltage value corresponding to the receiver when the time is t, alpha represents the carrier signal frequency increment value corresponding to each 1 DEG increase or decrease of the working voltage of the receiver, L t Representing the frequency of the carrier signal received by the receiver when the time is t;
s30: determining a theoretical value of a signal frequency of a carrier signal received by a receiver;
s40: a signal amplitude of a carrier signal received by a receiver is determined.
2. The initial signal processing method based on the FPGA of claim 1, wherein: the S30 is based on the offset [ (V) generated at time t by the carrier signal received by the receiver t *k)/(2πb t )]The theoretical value of the signal frequency of the carrier signal received by the receiver at the time t is determined, and a specific determination formula is as follows:
W t ＝G t +[(V t *k)/(2πb t )]；
wherein W is t A theoretical value representing the signal frequency of the carrier signal received by the receiver when the time is t.
3. An initial signal processing method based on FPGA according to claim 2, characterized in that: the S40 includes:
s401: the theoretical value of the signal frequency of the carrier signal received by the receiver at each moment determined in S30 is expressed on a plane rectangular coordinate system, the plane rectangular coordinate system takes the time t as the abscissa, and the theoretical value W of the signal frequency t Is the ordinate;
s402: the signal amplitude of the carrier signal received by the receiver is determined, and the specific determining method comprises the following steps:
i. Set initial vector (x 0 ,y 0 ) The real part of (a) is a, the imaginary part is b, if a < 0 and b is equal to or greater than 0, the initial vector (x 0 ,y 0 ) Rotated by 90 DEG, otherwise, judging whether a < 0 and b < 0 are satisfied, if so, adding an initial vector (x 0 ,y 0 ) Rotated by-90 DEG, if not, the initial vector (x 0 ,y 0 ) No angular rotation is performed, where x 0 Representing the abscissa of the initial vector, y 0 Representing the ordinate of the initial vector;
setting an FPGA chip in a receiver, wherein the FPGA chip utilizes a Cordic algorithm to perform angle rotation treatment on an initial vector (x 'obtained after angle rotation treatment in a plane rectangular coordinate system' 0 ,y′ 0 ) By a certain number of rotations, a vector (x i ,y i ) Wherein lim (y i 0), vector (x i ,y i ) Is the value of the abscissa, if the initial vector (x 0 ,y 0 ) Without angular rotation (x' 0 ,y′ 0 )＝(x 0 ,y 0 )；
Due to the vector (x i-1 ，y i-1 ) By rotating theta clockwise i Angle-derived vector (x) i ，y i ) The rotation equation can thus be derived as:
x i ＝cos(θ i )(x i-1 +y i-1 tanθ i )；
y i ＝cos(θ i )(y i-1 +x i-1 tanθ i )；
cos (θ) i ) Removing to obtain a pseudo rotation equation:
x i ＝x i-1 +y i-1 tanθ i ；
y i ＝y i-1 +x i-1 tanθ i ；
utilization 2 -i Instead of tan theta i Realizing the calculation of trigonometric functions, the initial vector (x' 0 ,y′ 0 ) Rotation angle θ of the ith rotation i ＝arctan2 -i The angle after rotation is denoted by z, then z i ＝z i-1 -d i θ i When z i When the infinite approximation is made to 0, the initial vector (x' 0 ,y′ 0 ) Stop rotation, initial vector (x' 0 ,y′ 0 ) Angle θ= Σarctan2 with positive X-axis direction -i Where i=1, 2, …, n, represents the initial vector (x' 0 ,y′ 0 ) The number corresponding to the number of rotations, n, represents the initial vector (x' 0 ,y′ 0 ) Is the sum symbol, the upper sign of sigma is n, the lower sign is i=1, d i Representing the initial vector (x' 0 ,y′ 0 ) In the rotation direction at the i-th rotation, the initial vector (x' 0 ,y′ 0 ) D when rotating clockwise i When the initial vector (x' 0 ,y′ 0 ) D when rotating anticlockwise i ＝-1，z i Representing the initial vector (x' 0 ,y′ 0 ) The included angle between the ith rotation and the positive direction of the X axis;
due toThe initial vector (x' 0 ,y′ 0 ) After n rotations, the initial vector (x' 0 ,y′ 0 ) Compensation factor of vector modulus->Wherein, pi represents a continuous multiplication symbol, the upper label of pi is n, and the lower label is i=1;
the improved rotation equation is:
x i ＝x i-1 +y i-1 d i 2 -i ；
y i ＝y i-1 +x i-1 d i 2 -i ；
z i ＝z i-1 -d i θ i ；
III. signal amplitude A=x of the carrier signal received by the receiver n /K n Will be 1/K n Data expansion 2 of (2) m Doubling to give K, where a=kx n Finally, intercepting the low m bits of A to obtain the signal amplitude of the carrier signal received by the receiver, wherein m represents a constant, x n Representing the initial vector (x' 0 ,y′ 0 ) The abscissa of the vector obtained after the nth rotation.
4. An FPGA-based initial signal processing system applied to the FPGA-based initial signal processing method of any one of claims 1 to 3, characterized in that: the system comprises a carrier signal offset prediction module, a carrier signal correction processing module, a carrier signal frequency determining module and a signal amplitude determining module;
the carrier signal offset prediction module is used for judging whether the carrier signal received by the receiver is offset or not according to the radar motion condition, the position information of the receiver and the carrier signal frequency change condition received by the receiver, and transmitting a judgment result to the carrier signal correction processing module;
the carrier signal correction processing module is used for correcting the carrier signal received by the receiver according to the judgment result transmitted by the carrier signal offset prediction module, and transmitting the signal frequency of the carrier signal after correction to the carrier signal frequency determination module;
the carrier signal frequency determining module is used for determining a theoretical value of the signal frequency of the carrier signal received by the receiver according to the signal frequency of the corrected carrier signal transmitted by the carrier signal correction processing module, and transmitting the determined theoretical value to the signal amplitude determining module;
the signal amplitude determining module is used for determining the signal amplitude of the carrier signal received by the receiver according to the theoretical value of the signal frequency transmitted by the carrier signal frequency determining module.
5. An FPGA-based initial signal processing system according to claim 4, wherein: the carrier signal offset prediction module comprises a calculation unit and a carrier signal offset unit;
the computing unit computes distance information of the radar compared with the receiver at each moment according to the position information of the radar at each moment and the position information of the receiver, and transmits the computed distance information to the carrier signal offset unit and the carrier signal correction processing module;
the carrier signal offset unit receives the distance information transmitted by the calculation unit according to [ (V) t *k)/(2πb t )]Judging whether the carrier signal received by the receiver at the time t is offset or not, transmitting the judging result to a carrier signal correction processing module, and calculating the offset [ (V) t *k)/(2πb t )]To the carrier signal frequency determination module.
6. An FPGA-based initial signal processing system according to claim 5, wherein: the carrier signal correction processing module receives the judgment result transmitted by the carrier signal offset unit, combines the distance information transmitted by the calculation unit, corrects the carrier signal frequency received by the receiver at each moment, and transmits the carrier signal frequency obtained after correction to the carrier signal frequency determination module.
7. An FPGA-based initial signal processing system according to claim 6, wherein: the carrier signal frequency determining module receives the offset transmitted by the carrier signal offset unit, combines the carrier signal frequency obtained after the correction processing transmitted by the carrier signal correction processing module, determines the theoretical value of the signal frequency of the carrier signal received by the receiver at the time t, and transmits the theoretical value of the signal frequency of the determined carrier signal to the signal amplitude determining module.
8. An FPGA-based initial signal processing system according to claim 7, wherein: the signal amplitude determining module comprises a distributed display unit, a rotation processing unit, a vector processing unit and a signal amplitude calculating unit;
the distribution display unit receives the theoretical value of the signal frequency of the carrier signal transmitted by the carrier signal frequency determining module, represents the received information on a plane rectangular coordinate system, and transmits the representing result to the rotation processing unit;
the rotation processing unit is used for receiving the representation result transmitted by the distribution display unit, determining an initial vector of a carrier signal based on the received information, judging whether the determined initial vector is in a quadrant, selecting whether to perform rotation processing on the initial vector according to the judgment result, transmitting the initial vector obtained after the rotation processing to the vector processing unit if the rotation processing is performed, and transmitting the determined initial vector to the vector processing unit if the rotation processing is not performed;
the vector processing unit receives the initial vector transmitted by the rotation processing unit, determines an improved rotation equation by combining with a Cordic algorithm, and transmits the determined improved rotation equation to the signal amplitude calculation unit;
the signal amplitude calculation unit receives the improved rotation equation transmitted by the vector processing unit, and determines the signal amplitude of the carrier signal received by the receiver based on the received information.
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