CN117153905A - Crystalline silicon solar cell and preparation method thereof - Google Patents
Crystalline silicon solar cell and preparation method thereof Download PDFInfo
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- CN117153905A CN117153905A CN202311060838.5A CN202311060838A CN117153905A CN 117153905 A CN117153905 A CN 117153905A CN 202311060838 A CN202311060838 A CN 202311060838A CN 117153905 A CN117153905 A CN 117153905A
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- 229910021419 crystalline silicon Inorganic materials 0.000 title claims abstract description 32
- 238000002360 preparation method Methods 0.000 title abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 102
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 102
- 239000010703 silicon Substances 0.000 claims abstract description 102
- 239000000758 substrate Substances 0.000 claims abstract description 102
- 238000005245 sintering Methods 0.000 claims abstract description 17
- 238000002161 passivation Methods 0.000 claims description 49
- 238000000034 method Methods 0.000 claims description 28
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 18
- 238000004519 manufacturing process Methods 0.000 claims description 18
- 229910052709 silver Inorganic materials 0.000 claims description 18
- 239000004332 silver Substances 0.000 claims description 18
- 239000011267 electrode slurry Substances 0.000 claims description 12
- 238000007650 screen-printing Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 description 15
- 239000002184 metal Substances 0.000 description 15
- 239000002131 composite material Substances 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 5
- 238000002425 crystallisation Methods 0.000 description 5
- 230000008025 crystallization Effects 0.000 description 5
- 238000011161 development Methods 0.000 description 5
- 238000007639 printing Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 238000005303 weighing Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The application relates to the technical field of solar cells, in particular to a crystalline silicon solar cell and a preparation method thereof. The crystalline silicon solar cell comprises a silicon substrate, a p-type doped layer arranged on one side of the first surface of the silicon substrate, and a first electrode pattern which is arranged on one side of the p-type doped layer away from the silicon substrate and is electrically connected with the p-type doped layer; the first surface is any one of two surfaces of the silicon substrate which are oppositely arranged along the thickness direction of the silicon substrate. The preparation method provided by the application can avoid high-temperature sintering, reduce contact resistance and improve open-circuit voltage.
Description
Technical Field
The application relates to the technical field of solar cells, in particular to a crystalline silicon solar cell and a preparation method thereof.
Background
Along with the updating of the cell structure, except for the heterojunction solar cell (HJT), electrode slurry used by other solar cells is slurry which needs to be sintered at high temperature (such as silver slurry with the sintering temperature of 850-900 ℃), namely, silicon nitride (SiNx) passivation layers are required to be burnt at high temperature, so that ohmic contact is formed between the electrode slurry and the silicon substrate, but the silicon substrate is damaged and deformed due to the high-temperature sintering process, so that the warping rate of the silicon substrate is higher, and the silicon substrate is unfavorable for the development of the thinning crystallization direction of the silicon substrate. And silver is used as a noble metal, so that the price is high, and the manufacturing cost of the solar cell is high.
Disclosure of Invention
Based on this, it is necessary to provide a crystalline silicon solar cell capable of avoiding high temperature sintering and a method for manufacturing the same.
In a first aspect, the present application provides a crystalline silicon solar cell, including a silicon substrate, a p-type doped layer disposed on a first surface side of the silicon substrate, and a first electrode pattern disposed on a side of the p-type doped layer away from the silicon substrate and electrically connected to the p-type doped layer;
the first surface is any one of two surfaces of the silicon substrate which are oppositely arranged along the thickness direction of the silicon substrate.
In some embodiments, the crystalline silicon solar cell further comprises: a first passivation layer disposed between the p-type doped layer and the first electrode pattern;
and a first slot is formed in the first passivation layer, and the first electrode pattern and the p-type doped layer form ohmic contact through the first slot to realize electric connection.
In some embodiments, the crystalline silicon solar cell further comprises: the n-type doped layer is arranged on one side of the second surface of the silicon substrate, and the second electrode pattern is arranged on one side of the n-type doped layer away from the silicon substrate and is electrically connected with the n-type doped layer;
the second surface is a surface opposite to the first surface.
In some embodiments, the crystalline silicon solar cell further comprises: a second passivation layer disposed between the n-type doped layer and the second electrode pattern;
and a second slotting is arranged on the second passivation layer, and the second electrode pattern and the n-type doped layer form ohmic contact through the second slotting to realize electric connection.
In some embodiments, the crystalline silicon solar cell further comprises: the n-type doped layer is arranged on one side of the first surface of the silicon substrate, and the second electrode pattern is arranged on one side of the n-type doped layer away from the silicon substrate and is electrically connected with the n-type doped layer;
wherein the p-doped layer and the n-doped layer are located in different regions of the silicon substrate.
In some embodiments, the crystalline silicon solar cell further includes a third passivation layer disposed between the second electrode pattern and the n-type doped layer;
and a third slot is formed in the third passivation layer, and the second electrode pattern is in ohmic contact with the n-type doped layer through the third slot to realize electric connection.
In some embodiments, the materials of the first electrode pattern and the second electrode pattern include: one or more of silver, aluminum and silver-coated copper.
In a second aspect, the present application provides a method for preparing a crystalline silicon solar cell according to the first aspect, comprising the steps of:
and forming the p-type doped layer on the first surface of the silicon substrate, and forming a first electrode pattern on one side of the p-type doped layer far away from the silicon substrate.
In some embodiments, before forming the first electrode pattern on a side of the p-type doped layer remote from the silicon substrate, further comprising:
forming a first passivation layer on a surface of the p-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the first passivation layer to form a first grooving, wherein the first grooving penetrates through the first passivation layer.
In some embodiments, the forming a first electrode pattern on a side of the p-type doped layer remote from the silicon substrate includes:
preparing a first electrode slurry;
and forming first electrode slurry in the first grooves by screen printing, and sintering to prepare the first electrode patterns.
In some embodiments, the method of making further comprises: and forming an n-type doped layer on the second surface of the silicon substrate, and forming a second electrode pattern on one side of the n-type doped layer away from the silicon substrate.
In some embodiments, before forming the second electrode pattern on a side of the n-type doped layer away from the silicon substrate, the method further includes:
forming a second passivation layer on a surface of the n-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the second passivation layer to form a second grooving, wherein the second grooving penetrates through the second passivation layer.
In some embodiments, the method of making further comprises: forming an n-type doped layer on the first surface of the silicon substrate, and forming a second electrode pattern on one side of the n-type doped layer away from the silicon substrate;
wherein the p-doped layer and the n-doped layer are located in different regions of the silicon substrate.
In some embodiments, before forming the second electrode pattern on a side of the n-type doped layer away from the silicon substrate, the method further includes: forming a third passivation layer on a surface of the n-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the third passivation layer to form a third grooving, wherein the third grooving penetrates through the third passivation layer.
According to the crystalline silicon solar cell provided by the application, the first electrode pattern electrically connected with the p-type doped layer is directly formed, so that the electrode is directly contacted with the silicon substrate, the use of high-temperature silver paste is avoided, the deformation of the silicon substrate is avoided, the thin crystallization development of the silicon substrate is facilitated, and the manufacturing cost is saved. And after high-temperature sintering is not needed, other metals with richer reserves and lower price can be adopted to replace the conventionally used high-temperature silver paste, so that the preparation materials are enriched and the manufacturing cost is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present application, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a TOPCon solar cell fabricated in example 1;
fig. 2 is a schematic structural diagram of the IBC solar cell manufactured in example 2.
Reference numerals illustrate: 1. an n-type silicon substrate; 2. a p-type emitter; 3. al (Al) 2 O 3 /SiN x A composite layer; 4. a metal electrode; 5. SiO (SiO) 2 A layer; 6. a doped polysilicon layer (n+ -poly Si layer); 7. a silicon nitride layer; 8. an electrode gate groove; 9. a first tunnel oxide layer; 10. borosilicate glass layers (BSG layers); 11. phosphor-containing glass bodies (PSG layers); 12. suede; 13. first AlO X A layer; 14. second AlO X A layer; 15. SiN (SiN) x /SiO 2 A composite layer; 16. first SiN x A layer; 17. third AlO X A layer; 18. second SiN x A layer; 19. a second tunnel oxide layer; 20. fourth AlO X A layer; 21. third SiN x A layer.
Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
Terminology
Unless otherwise indicated or contradicted, terms or phrases used herein have the following meanings:
the term "and/or" as used herein includes any and all combinations of one or more of the associated listed items. For example, "a and/or B" includes A, B and "a and B in combination" three parallel schemes.
In the present application, unless otherwise indicated, "one or more" means any one of the listed items or any combination of the listed items.
In the present application, "further," "still further," "special," "for example," "such as," "example," "illustrated," etc. are for descriptive purposes to indicate that there is a relationship between different solutions in the preceding and following contexts, but should not be construed as limiting the preceding solution or the scope of the application. In the present application, a (e.g., B), where B is one non-limiting example of a, is understood not to be limited to B, unless otherwise stated.
In the present application, "optional" means optional or not, that is, means any one selected from two parallel schemes of "with" or "without". If multiple "alternatives" occur in a technical solution, if no particular description exists and there is no contradiction or mutual constraint, then each "alternative" is independent. In the present application, "optionally containing", and the like are described, meaning "containing or not containing". "optional component X" means that component X is present or absent, or that component X is present or absent.
In the present application, the terms "first", "second", "third", "fourth", etc. are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or quantity, nor as implying an importance or quantity of a technical feature being indicated. Moreover, the terms "first," "second," "third," "fourth," and the like are used for non-exhaustive list description purposes only, and are not to be construed as limiting the number of closed forms.
The terms "comprising," "including," and "comprising," as used herein, are synonymous, inclusive or open-ended, and do not exclude additional, unrecited members, elements, or method steps.
In the present application, a numerical range (i.e., a numerical range) is referred to, and, unless otherwise indicated, a distribution of optional values within the numerical range is considered to be continuous and includes two numerical endpoints (i.e., a minimum value and a maximum value) of the numerical range, and each numerical value between the two numerical endpoints. When a numerical range merely points to integers within the numerical range, unless expressly stated otherwise, both endpoints of the numerical range are inclusive of the integer between the two endpoints, and each integer between the two endpoints is equivalent to the integer directly recited. When multiple numerical ranges are provided to describe a feature or characteristic, the numerical ranges may be combined. In other words, unless otherwise indicated, the numerical ranges disclosed herein are to be understood as including any and all subranges subsumed therein. The "numerical value" in the numerical interval may be any quantitative value, such as a number, a percentage, a proportion, or the like. "numerical intervals" allows for the broad inclusion of numerical interval types such as percentage intervals, proportion intervals, ratio intervals, and the like.
In the present application, the method flow involves a plurality of steps, and the steps are not strictly limited in order to be performed in other orders than that shown unless explicitly stated otherwise herein. Moreover, any step may include a plurality of sub-steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, the order of which is not necessarily sequential, and may be performed in rotation or alternately or simultaneously with other steps or a part of the sub-steps or stages of other steps.
Electrode pastes conventionally used to form metal electrodes in solar cells are often silver pastes that require high temperature sintering. However, the high temperature sintering process can cause deformation of the silicon substrate, and in order to avoid deformation, a thick silicon substrate is usually required, which is unfavorable for the development of thin crystallization of the silicon substrate. And the contact resistance of the solar cell is high, and the open circuit voltage is low. For this reason, the present application provides a method of manufacturing a solar cell to improve the above-described problems.
In a first aspect, the present application provides a crystalline silicon solar cell, including a silicon substrate, a p-type doped layer disposed on a first surface side of the silicon substrate, and a first electrode pattern disposed on a side of the p-type doped layer away from the silicon substrate and electrically connected to the p-type doped layer;
the first surface is any one of two surfaces of the silicon substrate which are oppositely arranged along the thickness direction of the silicon substrate.
According to the crystalline silicon solar cell provided by the application, the first electrode pattern electrically connected with the p-type doped layer is directly formed, so that the electrode is directly contacted with the silicon substrate, the use of high-temperature silver paste is avoided, the deformation of the silicon substrate is avoided, the thin crystallization development of the silicon substrate is facilitated, and the manufacturing cost is saved. And after high-temperature sintering is not needed, other metals with richer reserves and lower price can be adopted to replace the conventionally used high-temperature silver paste, so that the preparation materials are enriched and the manufacturing cost is reduced.
In some embodiments, the crystalline silicon solar cell further comprises: a first passivation layer disposed between the p-type doped layer and the first electrode pattern;
the first passivation layer is provided with a first slot, and the first electrode pattern forms ohmic contact with the p-type doped layer through the first slot to realize electric connection.
In some embodiments, the material of the first passivation layerMay be Al 2 O 3 /SiN x And (3) a composite layer.
In some embodiments, the crystalline silicon solar cell further comprises: the second electrode pattern is arranged on one side of the n-type doped layer far away from the silicon substrate and is electrically connected with the n-type doped layer;
the second surface is a surface opposite to the first surface.
In some embodiments, the crystalline silicon solar cell further comprises: a second passivation layer disposed between the n-type doped layer and the second electrode pattern;
and a second slot is arranged on the second passivation layer, and the second electrode pattern forms ohmic contact with the n-type doped layer through the second slot to realize electric connection.
In some embodiments, the second passivation layer is SiO 2 Layers or AlO X A layer.
In some embodiments, the crystalline silicon solar cell further comprises: the second electrode pattern is arranged on one side of the n-type doped layer far away from the silicon substrate and is electrically connected with the n-type doped layer;
wherein the p-type doped layer and the n-type doped layer are located in different regions of the silicon substrate.
In some embodiments, the crystalline silicon solar cell further includes a third passivation layer disposed between the second electrode pattern and the n-type doped layer;
and a third slot is formed in the third passivation layer, and the second electrode pattern is in ohmic contact with the n-type doped layer through the third slot to realize electric connection.
In some embodiments, the third passivation layer is SiO 2 Layers or AlO X A layer.
In some embodiments, the first surface is a back side of the crystalline silicon solar cell and the second surface is a front side of the crystalline silicon solar cell.
In some embodiments, the materials of the first electrode pattern and the second electrode pattern include: one or more of silver, aluminum and silver-coated copper.
In a second aspect, the present application provides a method for preparing a crystalline silicon solar cell according to the first aspect, comprising the steps of:
a p-type doped layer is formed on a first surface of the silicon substrate, and a first electrode pattern is formed on one side of the p-type doped layer away from the silicon substrate.
In some embodiments, before forming the first electrode pattern on a side of the p-type doped layer remote from the silicon substrate, further comprising:
forming a first passivation layer on a surface of the p-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the first passivation layer to form a first grooving, wherein the first grooving penetrates through the first passivation layer.
By carrying out laser grooving on the electrode area, the direct contact between the metal electrode slurry and the silicon substrate is realized, so that the high-temperature sintering in the sintering process of the metal electrode slurry can be avoided, the deformation of the silicon substrate can not be caused, the thin crystallization development of the silicon substrate is facilitated, and the manufacturing cost is saved. And after high-temperature sintering is not needed, other metals with richer reserves and lower price can be adopted to replace the conventionally used high-temperature silver paste, so that the preparation materials are enriched and the manufacturing cost is reduced.
In addition, the laser grooving can prepare narrower electrode grid grooves, the shading area can be reduced, and the grid lines are distributed more uniformly. And since the metal electrode is in direct contact with the silicon substrate, contact resistance can be reduced and open circuit voltage can be increased.
In some embodiments, forming a first electrode pattern on a side of the p-type doped layer remote from the silicon substrate includes:
preparing a first electrode slurry;
and forming first electrode slurry in the first grooves by screen printing, and sintering to prepare first electrode patterns.
In the application, the technological parameters of the screen printing process are not limited, and the printing technological parameters commonly used in the field of solar cell preparation can be selected. It should be noted that the temperature of the baking used in the screen printing process does not exceed 200 ℃. Because the laser grooving is performed in advance, the sintering can be performed in a lower range, and the negative influence caused by high temperature is avoided.
In some embodiments, the method of making further comprises: an n-type doped layer is formed on the second surface of the silicon substrate, and a second electrode pattern is formed on one side of the n-type doped layer away from the silicon substrate.
In some embodiments, before forming the second electrode pattern on the side of the n-type doped layer away from the silicon substrate, the method further comprises:
forming a second passivation layer on a surface of the n-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the second passivation layer to form a second grooving, wherein the second grooving penetrates through the second passivation layer.
In some embodiments, forming a second electrode pattern on a side of the n-doped layer remote from the silicon substrate includes:
preparing a second electrode slurry;
and forming second electrode slurry in the second grooves by screen printing, and sintering to prepare second electrode patterns.
In the present application, the screen printing process parameters and sintering parameters are the same as those of the first electrode pattern, and will not be described herein.
In some embodiments, the method of making further comprises: forming an n-type doped layer on the first surface of the silicon substrate, and forming a second electrode pattern on one side of the n-type doped layer away from the silicon substrate;
wherein the p-type doped layer and the n-type doped layer are located in different regions of the silicon substrate.
In some embodiments, before forming the second electrode pattern on the side of the n-type doped layer away from the silicon substrate, the method further comprises: forming a third passivation layer on a surface of the n-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the third passivation layer to form a third grooving, wherein the third grooving penetrates through the third passivation layer.
The present application will be described in further detail with reference to specific examples. It is to be understood that these examples are illustrative of the present application and are not intended to limit the scope of the present application. The experimental methods in the following examples, in which specific conditions are not noted, are preferably referred to the guidelines given in the present application, and may be according to the experimental manual or conventional conditions in the art, the conditions suggested by the manufacturer, or the experimental methods known in the art.
In the specific examples described below, the measurement parameters relating to the raw material components, unless otherwise specified, may have fine deviations within the accuracy of weighing. Temperature and time parameters are involved, allowing acceptable deviations from instrument testing accuracy or operational accuracy.
The raw materials used in the following examples are commercially available unless otherwise indicated.
Example 1
The solar cell prepared in this example is a TOPCon solar cell, and the structure thereof is shown in fig. 1.
The method comprises the following specific steps:
1) Assembled TOPCON solar cell
According to the structure shown in FIG. 1, a p-type emitter 2 and Al are formed on the back surface of an n-type silicon substrate 1 in sequence using process conditions and methods known in the art 2 O 3 /SiN x A composite layer 3; at the same time, sequentially forming SiO on the front surface of the n-type silicon substrate 1 2 Layer 5, doped polysilicon layer 6 and silicon nitride layer 7.
2) Laser grooving
As shown in FIG. 1, the respective components are represented by Al 2 O 3 /SiN x The composite layer 3 and the silicon nitride layer 7 are laser grooved to form electrode gate grooves 8 so that the metal electrode can directly contact the p-type emitter 2 and the doped polysilicon layer 6.
3) Preparation of electrodes
Silver paste is printed in the electrode grid grooves 8 by adopting a screen printing process to form the metal electrode 4.
Example 2
The solar cell prepared in this embodiment is an IBC solar cell, and the structure of the solar cell is shown in fig. 2. The method comprises the following specific steps:
1) Assembled IBC solar cell
According to FIG. 2In the structure, a suede 12 and a first AlO are sequentially formed on the front surface of the n-type silicon substrate 1 by adopting the process conditions and methods known in the art X Layer 13 and SiN x /SiO 2 A composite layer 15; simultaneously, a first tunneling oxide layer 9 and a second AlO are sequentially formed on the back surface of the n-type silicon substrate 1 X Layer 14 and second tunnel oxide layer 19, and BSG layer 10 and fourth AlO are sequentially formed on the side of first tunnel oxide layer 9 facing away from n-type silicon substrate 1 X Layer 20 and second SiN x Layer 18; in the second AlO X The side of the layer 14 facing away from the n-type silicon substrate 1 forms a first SiN x Layer 16; a PSG layer 11 and a third AlO layer are sequentially formed on the side of the second tunneling oxide layer 19 facing away from the n-type silicon substrate 1 X Layer 17 and third SiN x Layer 21.
2) Laser grooving
As shown in FIG. 2, for the second SiN x Layer 18 and fourth AlO X The layer 20 is subjected to laser grooving to form an electrode grid groove 8 so that the metal electrode can be directly contacted with the BSG layer 10; for the third AlO X Layer 17 and third SiN x The layer 21 is laser grooved to form electrode gate grooves 8 to enable the metal electrode to be in direct contact with the PSG layer 11.
3) Preparation of electrodes
Silver paste is printed in the electrode grid grooves 8 by adopting a screen printing process to form the metal electrode 4.
Comparative example 1
This comparative example was prepared in substantially the same manner as in example 1 except that: no laser grooving was performed. Directly printing silver paste by adopting a traditional printing process to form the metal electrode.
Comparative example 2
This comparative example was prepared in substantially the same manner as in example 2, except that: no laser grooving was performed. Directly printing silver paste by adopting a traditional printing process to form the metal electrode.
The battery materials prepared in examples 1 to 2 and comparative examples 1 and 2 were subjected to performance test, and the test results are shown in table 1 below.
The contact resistance is tested by adopting a TLM test method.
TABLE 1
As can be seen from table 1 above, the solar cell manufactured by the manufacturing method provided by the application has a lower contact resistance and a higher open circuit voltage.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. The scope of the application is therefore intended to be covered by the appended claims, and the description and drawings should be construed in view of the scope of the appended claims.
Claims (14)
1. The crystalline silicon solar cell is characterized by comprising a silicon substrate, a p-type doping layer arranged on one side of a first surface of the silicon substrate, and a first electrode pattern which is arranged on one side of the p-type doping layer away from the silicon substrate and is electrically connected with the p-type doping layer;
the first surface is any one of two surfaces of the silicon substrate which are oppositely arranged along the thickness direction of the silicon substrate.
2. The crystalline silicon solar cell of claim 1, further comprising: a first passivation layer disposed between the p-type doped layer and the first electrode pattern;
and a first slot is formed in the first passivation layer, and the first electrode pattern and the p-type doped layer form ohmic contact through the first slot to realize electric connection.
3. The crystalline silicon solar cell of claim 1, further comprising: the n-type doped layer is arranged on one side of the second surface of the silicon substrate, and the second electrode pattern is arranged on one side of the n-type doped layer away from the silicon substrate and is electrically connected with the n-type doped layer;
the second surface is a surface opposite to the first surface.
4. The crystalline silicon solar cell of claim 3, further comprising: a second passivation layer disposed between the n-type doped layer and the second electrode pattern;
and a second slotting is arranged on the second passivation layer, and the second electrode pattern and the n-type doped layer form ohmic contact through the second slotting to realize electric connection.
5. The crystalline silicon solar cell of claim 1, further comprising: the n-type doped layer is arranged on one side of the first surface of the silicon substrate, and the second electrode pattern is arranged on one side of the n-type doped layer away from the silicon substrate and is electrically connected with the n-type doped layer;
wherein the p-doped layer and the n-doped layer are located in different regions of the silicon substrate.
6. The crystalline silicon solar cell of claim 5, further comprising a third passivation layer disposed between the second electrode pattern and the n-type doped layer;
and a third slot is formed in the third passivation layer, and the second electrode pattern is in ohmic contact with the n-type doped layer through the third slot to realize electric connection.
7. The crystalline silicon solar cell according to any one of claims 1 to 6, wherein the materials of the first electrode pattern and the second electrode pattern comprise: one or more of silver, aluminum and silver-coated copper.
8. A method of producing a crystalline silicon solar cell according to any one of claims 1 to 7, comprising the steps of:
and forming the p-type doped layer on the first surface of the silicon substrate, and forming a first electrode pattern on one side of the p-type doped layer far away from the silicon substrate.
9. The method of preparing as claimed in claim 8, further comprising, before forming the first electrode pattern on a side of the p-type doped layer remote from the silicon substrate:
forming a first passivation layer on a surface of the p-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the first passivation layer to form a first grooving, wherein the first grooving penetrates through the first passivation layer.
10. The method of claim 9, wherein forming a first electrode pattern on a side of the p-doped layer remote from the silicon substrate comprises:
preparing a first electrode slurry;
and forming first electrode slurry in the first grooves by screen printing, and sintering to prepare the first electrode patterns.
11. The method of manufacturing according to claim 8, further comprising: and forming an n-type doped layer on the second surface of the silicon substrate, and forming a second electrode pattern on one side of the n-type doped layer away from the silicon substrate.
12. The method of manufacturing according to claim 11, further comprising, before forming the second electrode pattern on a side of the n-type doped layer remote from the silicon substrate:
forming a second passivation layer on a surface of the n-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the second passivation layer to form a second grooving, wherein the second grooving penetrates through the second passivation layer.
13. The method of manufacturing according to claim 1, further comprising: forming an n-type doped layer on the first surface of the silicon substrate, and forming a second electrode pattern on one side of the n-type doped layer away from the silicon substrate;
wherein the p-doped layer and the n-doped layer are located in different regions of the silicon substrate.
14. The method of manufacturing of claim 13, further comprising, prior to forming the second electrode pattern on a side of the n-doped layer remote from the silicon substrate: forming a third passivation layer on a surface of the n-type doped layer away from the silicon substrate; and
and carrying out laser grooving on the third passivation layer to form a third grooving, wherein the third grooving penetrates through the third passivation layer.
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