CN117146995A - Multi-point temperature detection circuit capable of covering whole chip - Google Patents

Multi-point temperature detection circuit capable of covering whole chip Download PDF

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Publication number
CN117146995A
CN117146995A CN202311035407.3A CN202311035407A CN117146995A CN 117146995 A CN117146995 A CN 117146995A CN 202311035407 A CN202311035407 A CN 202311035407A CN 117146995 A CN117146995 A CN 117146995A
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detection circuit
temperature
full
chip
isolation
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易新敏
毛帅
徐海峰
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SG Micro Beijing Co Ltd
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SG Micro Beijing Co Ltd
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Priority to CN202311035407.3A priority Critical patent/CN117146995A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01KMEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/2872Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
    • G01R31/2874Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Environmental & Geological Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A multi-point temperature detection circuit capable of covering an entire chip, the multi-point temperature detection circuit comprising: the voltage detection circuits are arranged in a chip area where the temperature change sensitive module is located; the voltage detection circuit comprises a current source and a plurality of full-isolation MOS tubes which are sequentially connected in series between a power supply VDD and a ground potential GND, a body diode of the corresponding full-isolation MOS tube is equivalently connected in parallel between the source electrode and the drain electrode of each full-isolation MOS tube, and the potential at the connection point of the current source and the nearest full-isolation MOS tube is led out to serve as an output voltage V of the voltage detection circuit tj The method comprises the steps of carrying out a first treatment on the surface of the And the temperature rise threshold comparison circuit judges whether the temperature of the corresponding detection area exceeds an allowable limit value according to the output voltages of the N voltage detection circuits. The application can accurately detect the temperature and protect the chip from over-temperature, and improve the reliability of the chip.

Description

Multi-point temperature detection circuit capable of covering whole chip
Technical Field
The application belongs to the technical field of electronic circuits, relates to a chip temperature detection circuit, and particularly relates to a multipoint temperature detection circuit capable of covering a whole chip.
Background
In an IC chip, the high temperature will cause unstable operation of the chip, reduced performance of the chip, and even damage of the chip, and in order to avoid the situation that the chip is overheated at high temperature, a temperature detection and over-temperature protection circuit needs to be designed in the chip.
With the improvement of chip integration level, the chip area increases, and the power tube is integrated in the chip, can cause chip local quick heating under the circumstances of power tube excessive current, if the temperature detection of power tube does not surpass the temperature threshold value of power tube thereby trigger under the condition of temperature protection, and the device that just generates heat is far away from temperature detection circuit, probably leads to the unable normal work of the device that generates heat that is far away from temperature detection circuit, functional failure even burn to bring the reliability problem of chip. Therefore, it is necessary to perform multipoint temperature detection for different chip areas including power switching tubes with relatively large load currents.
Existing multipoint temperature detection circuits provide a temperature sampling unit near each sampling point, typically comprising a diode, and utilize the negative temperature characteristics of the diode to effect temperature detection at the corresponding sampling point. However, the output voltage signal of the diode is not obvious enough along with the temperature change, so that the temperature detection sensitivity and accuracy are not enough; in addition, in the vicinity of the power tube of the switching power supply circuit, voltage is unstable, high voltage or negative voltage may occur, and such a sudden change in voltage may cause leakage of the diode. Many factors lead to unreliable temperature detection results, and it is difficult to well ensure the reliability of the chip.
Disclosure of Invention
In order to solve the defects in the prior art, the application provides a multipoint temperature detection circuit capable of covering the whole chip, so as to accurately and reliably detect the temperature and protect the chip from over-temperature and improve the reliability of the chip.
The application adopts the following technical scheme.
A multi-point temperature detection circuit capable of covering an entire chip, the multi-point temperature detection circuit comprising:
the voltage detection circuits are arranged in a chip area where the temperature change sensitive module is located; the voltage detection circuit comprises a current source and a plurality of fully isolated MOS tubes, wherein the voltage detection circuit comprisesThe current source and the plurality of full-isolation MOS tubes are sequentially connected in series between a power supply VDD and a ground potential GND, a body diode of the corresponding full-isolation MOS tube is equivalently connected in parallel between the source electrode and the drain electrode of each full-isolation MOS tube, and the potential at the connection point of the current source and the full-isolation MOS tube closest to the current source is led out to serve as an output voltage V of the voltage detection circuit tj
And the temperature rise threshold comparison circuit judges whether the temperature of the corresponding detection area exceeds an allowable limit value according to the output voltages of the N voltage detection circuits.
The application further includes the following preferred embodiments.
The number of the fully-isolated MOS transistors included in the voltage detection circuit is 2-3.
When the plurality of fully-isolated MOS tubes are all fully-isolated NMOS tubes, the P-type substrate and the active region of the fully-isolated NMOS tubes need to be fully wrapped by the N-type doped isolating ring, so that PN junctions between the isolating ring and the P-type substrate are reversely biased.
In all the full-isolation NMOS tubes, the source electrode of the first full-isolation NMOS tube is connected with the output end of the zero-temperature current bias power supply, the drain electrode of the former full-isolation NMOS tube is connected with the source electrode of the adjacent latter full-isolation NMOS tube, and the grid electrodes of all the full-isolation NMOS tubes are connected with the drain electrode of the last full-isolation NMOS tube and then connected to the ground potential GND;
the positive electrode and the negative electrode of the body diode of each full-isolation NMOS tube are respectively and equivalently connected with the source electrode and the drain electrode of the corresponding full-isolation NMOS tube.
When the plurality of fully-isolated MOS tubes are all fully-isolated PMOS tubes, the N-type substrate and the active region of the fully-isolated PMOS tubes need to be fully wrapped by the P-type doped isolating ring, so that PN junctions between the isolating ring and the N-type substrate are reversely biased.
The bias current Ibias provided by the current source is zero temperature current.
The temperature rise threshold comparison circuit comprises comparators with the same number as the voltage detection circuit, and the positive input end of each comparator is connected with a common reference voltage V T_ref The reverse input end of each comparator is correspondingly connected with the output voltage V of each voltage detection circuit tj_n The output signal of each comparatorT shut_n The method is used for judging whether the temperature of the corresponding area to be detected exceeds an allowable limit value;
wherein V is tj_n Represents the output voltage value, T, of the nth voltage detection circuit shut_n Represents the output signal of the nth comparator, N is less than or equal to N.
Alternatively, one or more of the comparators have their positive inputs connected to the common reference voltage V T_ref The other comparators having their positive inputs connected to a voltage different from the common reference voltage V T_ref Is set to be a reference voltage of (a).
The multipoint temperature detection circuit further comprises an over-temperature protection circuit, and when the temperature of any area to be detected exceeds the allowable limit value, the temperature rise threshold comparison circuit outputs a control signal to trigger the over-temperature protection circuit to turn off the power supply of the chip.
When the output signal T of any comparator shut_n When the output is high level signal, the over-temperature protection circuit of the chip is triggered to act.
The over-temperature protection circuit of the chip can disconnect the power supply of the whole chip or disconnect the power supply of the chip corresponding to the over-temperature area.
The application has the advantages that compared with the prior art,
according to the circuit, the plurality of fully-isolated MOS tubes connected in series are arranged in the voltage detection circuit, the amplitude of the output voltage of the voltage detection circuit along with the temperature change is improved by utilizing the superposition effect of the negative temperature effect of the plurality of fully-isolated MOS tubes connected in series, the temperature identification degree is improved, the temperature detection result of each sampling point is more accurate and reliable, and the reliability of a chip is further improved. Meanwhile, the plurality of MOS tubes connected in series in each voltage detection circuit are set to be full isolation tubes, so that the condition that the temperature detection circuit affects the well potential of other modules can be avoided, and the reliability of the chip is further ensured.
Drawings
FIG. 1 is a schematic diagram of a voltage detection circuit in a multi-point temperature detection circuit according to the present application;
FIG. 2 is a schematic diagram of a temperature rise threshold comparison circuit in the multipoint temperature detection circuit according to the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. The described embodiments of the application are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art without making any inventive effort, are within the scope of the present application.
The application discloses a multipoint temperature detection circuit capable of covering a whole chip, which comprises N voltage detection circuits and a temperature rise threshold comparison circuit, wherein N is an integer greater than 1, and the multipoint temperature detection circuit also can further comprise a chip over-temperature protection circuit.
And N voltage detection circuits, wherein the voltage detection circuits are arranged in the chip area.
And the temperature rise threshold comparison circuit judges whether the temperature of the corresponding detection area exceeds an allowable limit value according to the output voltages of the N voltage detection circuits.
The multipoint temperature detection circuit further comprises an over-temperature protection circuit (not shown in the attached drawings), and when the temperature of any area to be detected exceeds the allowable limit value, the temperature rise threshold comparison circuit outputs a control signal to trigger the over-temperature protection circuit to close the power supply of the chip.
As shown in fig. 1, the voltage detection circuit of the present application includes a current source, a first fully-isolated NMOS and a second fully-isolated NMOS, where the current source, the first fully-isolated NMOS and the second fully-isolated NMOS are sequentially connected in series between a power supply VDD and a ground potential GND, a body diode D1 of the first fully-isolated NMOS is equivalently connected in parallel between a source and a drain of the first fully-isolated NMOS, a body diode D2 of the second fully-isolated NMOS is connected in parallel between the source and the drain of the second fully-isolated NMOS, and a potential at a connection point of the current source and the first fully-isolated NMOS is led out as an output voltage Vtj of the voltage detection circuit.
In the embodiment of the application, referring to fig. 1, the source electrode of the first fully-isolated NMOS tube is connected to the output end of the zero-temperature current bias power supply, the drain electrode of the first fully-isolated NMOS tube is connected to the source electrode of the second fully-isolated NMOS tube, and the gate electrode of the first fully-isolated NMOS tube, the gate electrode of the second fully-isolated NMOS tube and the drain electrode of the second fully-isolated NMOS tube are connected to the ground potential GND; the anode and the cathode of the body diode D1 of the first full-isolation NMOS tube are equivalently connected with the source electrode and the drain electrode of the first full-isolation NMOS tube respectively; the anode and the cathode of the body diode D2 of the second full-isolation NMOS tube are equivalently connected with the source electrode and the drain electrode of the second full-isolation NMOS tube respectively.
When other numbers of full-isolation NMOS tubes are arranged, the source electrode of a first full-isolation NMOS tube is connected with the output end of a current source, the drain electrode of the former full-isolation NMOS tube is connected with the source electrode of the adjacent latter full-isolation NMOS tube, and the grid electrodes of all the full-isolation NMOS tubes are connected with the drain electrode of the last full-isolation NMOS tube and then connected to the ground potential GND; at this time, the anode and the cathode of the body diode of each fully-isolated NMOS tube are equivalently connected with the source electrode and the drain electrode of the corresponding fully-isolated NMOS tube respectively.
It is clear to those skilled in the art that when the fully isolated PMOS transistor is used, the gates of the two fully isolated PMOS transistors are grounded, the drain electrode of the first fully isolated PMOS transistor is connected to the current source, the source electrode and the substrate are connected to the drain electrode of the second fully isolated PMOS transistor, the source electrode and the substrate of the second fully isolated PMOS transistor are grounded, and the two diodes connected in parallel are correspondingly adjusted. The application uses a fully isolated NMOS tube as a preferred embodiment, but an alternative to a fully isolated PMOS tube is also within the scope of the application.
In a preferred embodiment of the application, the current source is a zero temperature current source, i.e. it provides a bias current I bias The temperature coefficient of the bias current is 0, and the magnitude of the current does not change with temperature or changes obviously. In the application, the basic working principle of the voltage detection circuit is to realize the detection of the local temperature of the chip by utilizing the negative temperature characteristic of the body diodes of the full isolation MOS transistors MN1 and MN 2. Specifically, the output voltage V tj Can be equivalently the sum of the voltages of the two body diodes D1 and D2 corresponding to MN1 and MN2, thusV tj Exhibits negative temperature characteristics (i.e., V as the temperature increases tj Reduced) and the circuit is inserted into all the modules which are sensitive to temperature change in the chip, the V output by each module can be realized tj The working temperature of the module is detected and fed back in real time, so that the purpose of protecting the chip is achieved.
The purpose of the embodiment is to improve the recognition degree of the temperature by adopting two fully-isolated MOS transistors in each voltage detection circuit. For example, if the temperature rises by 10 ℃, when only one diode is used, V tj Will decrease by 5mV when two diodes are used, V tj The voltage difference due to the temperature rise is increased by 10mV, so that the temperature change is more easily detected. Simulation proves that the mode of increasing the output voltage of the voltage detection circuit by increasing the number of the series full-isolation MOS transistors can further reduce the occupied chip area on the premise of increasing the same voltage amplitude compared with the mode of increasing the output voltage by increasing the area of a single full-isolation MOS transistor.
In order to further improve the temperature recognition degree, the number of the fully isolated MOS transistors provided in each voltage detection circuit may also be set to other values, for example, 3 or more. However, it should be noted that the number of fully isolated MOS transistors in each voltage detection circuit cannot be set too much, if too many fully isolated MOS transistors are stacked, V tj The voltage detection circuit is high in voltage, so that a current source in the voltage detection circuit is pressed into a linear region, the current output by the current source is changed, the accuracy of a voltage signal output by the voltage detection circuit is affected, and the circuit area is increased due to the fact that the full isolation MOS tube is too many. Therefore, the number of the fully isolated MOS transistors in each voltage detection circuit is preferably set to 2-3.
In the embodiment of the application, a full-isolation MOS tube is selected, and taking the full-isolation NMOS tube as an example, the P-type substrate and the active region of the NMOS used by the circuit are required to be completely wrapped by an N-type doped isolation ring, so that the potential of the N-type isolation ring is connected with high potential, the P-type substrate and the active region are connected with low potential, PN junctions between the isolation ring and the sub are reversely biased, and the P-type substrate (sub) of the whole chip cannot be directly used as the substrate of the device. Therefore, the condition that the temperature detection circuit affects the well potential of other modules can be avoided, and the reliability of the chip is ensured. Similarly, when a fully isolated PMOS transistor is used, the N-type substrate and the active region of the fully isolated PMOS used in the circuit need to be completely wrapped by a P-type doped isolation ring, so that the potential of the P-type isolation ring is connected to a low potential, and the N-type substrate and the active region are connected to a high potential, thereby reversely biasing the PN junction between the isolation ring and the substrate.
The temperature rise threshold comparison circuit in the multipoint temperature detection circuit is shown in figure 2, and comprises comparators with the same number as the voltage detection circuit, wherein the positive input end of each comparator is connected with a common reference voltage V T_ref The reverse input end of each comparator is correspondingly connected with the output voltage V of each voltage detection circuit tj_n The output signal T of each comparator shut_n And the temperature detection module is used for judging whether the temperature of the corresponding area to be detected exceeds the allowable limit value.
Wherein V is tj_n Represents the output voltage value, T, of the nth voltage detection circuit shut_n Represents the output signal of the nth comparator, N is less than or equal to N.
When the output signal T of any comparator shut_n When the output is high level signal, the over-temperature protection circuit of the chip is triggered to act. The over-temperature protection circuit of the chip can disconnect the power supply of the whole chip or disconnect the power supply of the chip corresponding to the over-temperature area.
As shown in fig. 2, the temperature rise threshold comparison circuit of the present embodiment is provided on a chip and includes N outputs V of the voltage detection circuits of embodiment 1 tj_1 、V tj_2 、……V tj_n-1 、V tj_n ……V tj_N The circuit also comprises N comparators comp_1, comp_2, … … comp_n-1 and comp_n … … comp_N, wherein N is a positive integer not greater than N.
Wherein one input end of each comparator comp_n is connected with the output V of one corresponding voltage detection circuit tj_n Connected at the other end to a common reference voltage V T_ref . Outputs of the comparators comp_1, comp_2, … … comp_n-1, comp_nAre led out to form corresponding output signals respectively, which are marked as T respectively shut_1 、T shut_2 、……T shut_n-1 、T shut_n
Reference voltage V T_ref The selection of the temperature coefficient of the body diode of the fully-isolated MOS tube can be obtained by calculation and simulation, and by taking the over-temperature protection point as 160 ℃ as an example, the V at 160 ℃ can be obtained by carrying out temperature scanning on the current tj For example, 500mV, so that Vref can be preset to 500mV, when V in the application tj When the temperature is reduced to be equal to Vref, the temperature of the detection point of the chip is considered to be 160 ℃, and the over-temperature protection is triggered, so that the chip stops working. A uniform reference voltage V can be used for each comparator T_ref The reason is that the threshold value of the over-temperature protection of the chip is usually the same value, for example 160 ℃, which has the advantage that the Vref generating circuit does not need to generate multiple reference voltages, which is convenient for design. If the chip has application requirements, for example, the threshold value of over-temperature protection triggering of the power tube is 160 ℃ and the over-temperature protection threshold value of other modules is 150 ℃, different reference voltages can be adopted according to different threshold designs.
In a preferred embodiment of the present application, the number and spacing of the voltage detection circuits may be selected and set according to the actual situation of the chip circuit, and are typically set in local areas where rapid temperature rise risk may occur. By adding the temperature detection circuit to each local part of the chip, which is possibly at risk of rapid temperature rise, when any area of the chip is locally over-heated, namely any T shut_n (N is more than or equal to 1 and less than or equal to N) and is turned high, an over-temperature protection circuit of the chip is triggered, and accordingly the corresponding area is powered off. Meanwhile, the plurality of comparators are arranged in the embodiment, so that the temperature of each region can be detected, and the independent processing of the regions with abnormal temperature is facilitated.
Finally, it should be noted that the above embodiments are only for illustrating the technical solution of the present application and not for limiting the same, and although the present application has been described in detail with reference to the above embodiments, it should be understood by those skilled in the art that: modifications and equivalents may be made to the specific embodiments of the application without departing from the spirit and scope of the application, which is intended to be covered by the claims.

Claims (10)

1. A multi-point temperature detection circuit capable of covering an entire chip, the multi-point temperature detection circuit comprising:
n voltage detection circuits, N being an integer greater than 1, the voltage detection circuits being disposed in the chip region; the voltage detection circuit comprises a current source and a plurality of full-isolation MOS (metal oxide semiconductor) tubes, the current source and the full-isolation MOS tubes are sequentially connected in series between a power supply VDD and a ground potential GND, body diodes of the corresponding full-isolation MOS tubes are equivalently connected in parallel between the source electrode and the drain electrode of each full-isolation MOS tube, and potential at the connection point of the current source and the nearest full-isolation MOS tube is led out to serve as output voltage V of the voltage detection circuit tj
And the temperature rise threshold comparison circuit judges whether the temperature of the corresponding detection area exceeds an allowable limit value according to the output voltages of the N voltage detection circuits.
2. The multi-point temperature detection circuit capable of covering an entire chip as claimed in claim 1, wherein: the number of the fully-isolated MOS transistors included in the voltage detection circuit is 2-3.
3. The multi-point temperature detection circuit capable of covering an entire chip as claimed in claim 1, wherein:
when the plurality of fully-isolated MOS tubes are all fully-isolated NMOS tubes, the P-type substrate and the active region of the fully-isolated NMOS tubes need to be fully wrapped by the N-type doped isolating ring, so that PN junctions between the isolating ring and the P-type substrate are reversely biased.
4. A multi-point temperature detection circuit capable of covering an entire chip as claimed in claim 3, wherein:
in all the full-isolation NMOS tubes, the source electrode of the first full-isolation NMOS tube is connected with the output end of the zero-temperature current bias power supply, the drain electrode of the former full-isolation NMOS tube is connected with the source electrode of the adjacent latter full-isolation NMOS tube, and the grid electrodes of all the full-isolation NMOS tubes are connected with the drain electrode of the last full-isolation NMOS tube and then connected to the ground potential GND;
the positive electrode and the negative electrode of the body diode of each full-isolation NMOS tube are respectively and equivalently connected with the source electrode and the drain electrode of the corresponding full-isolation NMOS tube.
5. The multi-point temperature detection circuit capable of covering an entire chip as claimed in claim 1, wherein: when the plurality of fully-isolated MOS tubes are all fully-isolated PMOS tubes, the N-type substrate and the active region of the fully-isolated PMOS tubes need to be fully wrapped by the P-type doped isolating ring, so that PN junctions between the isolating ring and the N-type substrate are reversely biased.
6. The multi-point temperature detection circuit capable of covering an entire chip as claimed in claim 1, wherein:
the bias current Ibias provided by the current source is zero temperature current.
7. The multi-point temperature detection circuit capable of covering an entire chip as claimed in claim 1, wherein:
the temperature rise threshold comparison circuit comprises comparators with the same number as the voltage detection circuit, and the positive input end of each comparator is connected with a common reference voltage V T_ref The reverse input end of each comparator is correspondingly connected with the output voltage V of each voltage detection circuit tj_n The output signal T of each comparator shut_n The method is used for judging whether the temperature of the corresponding area to be detected exceeds an allowable limit value;
wherein V is tj_n Represents the output voltage value, T, of the nth voltage detection circuit shut_n Represents the output signal of the nth comparator, N is less than or equal to N.
8. The multipoint temperature detecting circuit capable of covering an entire chip according to any one of claims 1 to 7, wherein:
the multipoint temperature detection circuit further comprises an over-temperature protection circuit, and when the temperature of any area to be detected exceeds the allowable limit value, the temperature rise threshold comparison circuit outputs a control signal to trigger the over-temperature protection circuit to turn off the power supply of the chip.
9. The multi-point temperature detection circuit capable of covering an entire chip as claimed in claim 8, wherein:
when the output signal T of any comparator shut_n When the output is high level signal, the over-temperature protection circuit of the chip is triggered to act.
10. The multi-point temperature detection circuit capable of covering an entire chip as claimed in claim 9, wherein:
the over-temperature protection circuit of the chip can disconnect the power supply of the whole chip or disconnect the power supply of the chip corresponding to the over-temperature area.
CN202311035407.3A 2023-08-16 2023-08-16 Multi-point temperature detection circuit capable of covering whole chip Pending CN117146995A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311035407.3A CN117146995A (en) 2023-08-16 2023-08-16 Multi-point temperature detection circuit capable of covering whole chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311035407.3A CN117146995A (en) 2023-08-16 2023-08-16 Multi-point temperature detection circuit capable of covering whole chip

Publications (1)

Publication Number Publication Date
CN117146995A true CN117146995A (en) 2023-12-01

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