CN117135538A

CN117135538A - Speaker driving circuit and electronic device

Info

Publication number: CN117135538A
Application number: CN202310186772.8A
Authority: CN
Inventors: 邸英杰; 常智; 李志�
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2023-02-21
Filing date: 2023-02-21
Publication date: 2023-11-28
Anticipated expiration: 2043-02-21
Also published as: CN117135538B

Abstract

The application discloses a loudspeaker driving circuit and electronic equipment, and relates to the technical field of circuits. The loudspeaker driving circuit comprises a sampling module and a processing module. When the loudspeaker driving circuit works, on one hand, the processing module can output an audio signal to the loudspeaker so as to drive the loudspeaker to work. On the other hand, the processing module may detect the electrical signal in the target circuit through the sampling module. The electrical signal in the target circuit can generate an interference signal in the loudspeaker by the principle of electromagnetic induction. The processing module also generates a compensation signal according to the electrical signal in the target circuit and outputs the compensation signal to the speaker. The compensation signal and the interference signal cancel each other, so that no interference signal is generated in the loudspeaker, and the loudspeaker works normally under the action of the audio signal.

Description

Speaker driving circuit and electronic device

Technical Field

The present application relates to the field of circuit technologies, and in particular, to a speaker driving circuit and an electronic device.

Background

Power amplifiers and speakers are commonly included in electronic devices such as cell phones, tablet computers, notebook computers, and the like. When the power amplifier works, the current output by the battery can flow to the ground line through the power amplifier. In this process, the current flowing from the power amplifier into the ground line may generate an interfering magnetic field at the location of the speaker due to the positional relationship of the power amplifier and the speaker. Under the influence of the disturbing magnetic field, a disturbing signal is generated in the loudspeaker, which affects the normal operation of the loudspeaker.

In the related art, to avoid that the interference signal affects the normal operation of the speaker, a resistor is usually connected in series to the circuit where the speaker is located, so as to reduce the current of the interference signal. However, the series resistance across the circuit in which the speaker is located also reduces the current level of the audio signal that the speaker needs to input, which reduces the loudness at which the speaker plays audio.

Disclosure of Invention

The application provides a loudspeaker driving circuit and electronic equipment. When the loudspeaker driving circuit works, interference signals can not be generated in the loudspeaker, and the loudness of audio played by the loudspeaker can not be reduced. The technical scheme is as follows:

in a first aspect, a speaker driving circuit is provided. The loudspeaker driving circuit is applied to the electronic equipment and can be connected with a target circuit and a loudspeaker in the electronic equipment. Wherein the target circuit is operative to generate a first magnetic field at a location of the speaker. The first magnetic field is generated by an electrical signal in the target circuit. The first magnetic field is a disturbing magnetic field for the loudspeaker. That is, under the action of the first magnetic field, an interference signal is generated in the speaker, and the interference signal affects the normal operation of the speaker.

The loudspeaker driving circuit comprises a sampling module and a processing module. The first end of the sampling module is connected with the target circuit, and the second end of the sampling module is connected with the input end of the processing module. The output end of the processing module is used for being connected with a loudspeaker. In the present application, in a first aspect, the processing module is configured to output an audio signal to a speaker to drive the speaker to operate. In a second aspect, the processing module is further configured to perform the steps of: detecting an electrical signal in a target circuit by a sampling module; generating a compensation signal from the electrical signal in the target circuit; and outputting a compensation signal to the loudspeaker, wherein the second magnetic field generated by the compensation signal at the position of the loudspeaker is the same as the first magnetic field in intensity and opposite in direction. Therefore, the second magnetic field and the first magnetic field cancel each other, that is, the compensation signal and the interference signal cancel each other, so that no interference signal is generated in the loudspeaker, and the loudspeaker can work normally under the action of the audio signal. Meanwhile, the loudspeaker driving circuit does not need to be connected with a resistor in series on a circuit where the loudspeaker is located, so that the loudness of audio played by the loudspeaker is not reduced.

In some embodiments, the target circuit includes a plurality of voltage converters and a plurality of power amplifiers. The input end of each of the plurality of voltage converters is used for inputting a first electric signal. An output terminal of each of the plurality of voltage converters is connected to at least one of the plurality of power amplifiers to output a second electrical signal to the at least one power amplifier. Each power amplifier is connected to the output of only one voltage converter.

The operation of the processing module is described below in terms of four possible implementations.

In a first possible implementation, the electrical signal in the target circuit includes a first electrical signal and a second electrical signal, and the second electrical signal is voltage-converted from the first electrical signal. The second electrical signal is capable of generating a first magnetic field at the location of the speaker.

The processing module is used for: detecting a first electrical signal by a sampling module; obtaining a first ratio and a second ratio, wherein the first ratio is the ratio of the amplitude of the first electric signal to the amplitude of the second electric signal, and the second ratio is the ratio of the amplitude of the interference signal to the amplitude of the second electric signal; dividing the amplitude of the first electric signal by the first ratio and multiplying the first electric signal by the second ratio to obtain a target amplitude; a compensation signal having the same amplitude as the target amplitude and the same frequency as the first electrical signal is generated.

In a second possible implementation, the electrical signals in the target circuit include one first electrical signal and n second electrical signals, n being an integer greater than or equal to 2. The n second electric signals are obtained by voltage conversion of the first electric signals. The n second electrical signals are capable of generating a first magnetic field at the location of the speaker.

The processing module is used for: detecting a first electrical signal by a sampling module; obtaining n first ratios and n second ratios, wherein the ith first ratio in the n first ratios is the ratio of the amplitude of the first electric signal to the amplitude of the ith second electric signal in the n second electric signals, the ith second ratio in the n second ratios is the ratio of the amplitude of the interference signal to the amplitude of the ith second electric signal in the n second electric signals, and i is an integer greater than or equal to 1 and less than or equal to n; dividing the amplitude of the first electric signal by a first value and multiplying the first value by a second value to obtain a target amplitude, wherein the first value is the sum of n first ratios, and the second value is the sum of n second ratios; a compensation signal having the same amplitude as the target amplitude and the same frequency as the first electrical signal is generated.

In some embodiments, based on the first and second possible implementations described above, the first end of the sampling module is connected to an input of each of the plurality of voltage converters, so that the processing module can detect the first electrical signal through the sampling module.

In particular, the sampling module may include a capacitance and an analog-to-digital converter. The first polar plate of the capacitor is connected with the input end of each of the plurality of voltage converters, the second polar plate of the capacitor is connected with the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected with the input end of the processing module.

In some embodiments, based on the first and second possible implementations, the processing module is configured to: and acquiring a first ratio and a second ratio corresponding to each power amplifier in the working state in the plurality of power amplifiers from the stored ratio corresponding table.

In a third possible implementation manner, the electrical signal in the target circuit includes a first electrical signal and a second electrical signal, and the second electrical signal is obtained by voltage conversion of the first electrical signal. The second electrical signal is capable of generating a first magnetic field at the location of the speaker.

The processing module is used for: detecting a second electrical signal by a sampling module; obtaining a second ratio, wherein the second ratio is the ratio of the amplitude of the interference signal to the amplitude of the second electric signal; multiplying the amplitude of the second electric signal by a second ratio to obtain a target amplitude; a compensation signal having the same amplitude as the target amplitude and the same frequency as the second electrical signal is generated.

In a fourth possible implementation, the electrical signals in the target circuit include one first electrical signal and n second electrical signals, n being an integer greater than or equal to 2. The n second electric signals are obtained by voltage conversion of the first electric signals. The n second electrical signals are capable of generating a first magnetic field at the location of the speaker.

The processing module is used for: detecting n second electrical signals through a sampling module; obtaining n second ratios, wherein the ith second ratio in the n second ratios is the ratio of the amplitude of the interference signal to the amplitude of the ith second electric signal in the n second electric signals, and i is an integer which is greater than or equal to 1 and less than or equal to n; multiplying the amplitude of the ith second electric signal in the n second electric signals by the ith second ratio in the n second ratios to obtain n amplitude components; adding the n amplitude components to obtain a target amplitude; superposing the frequencies of the n second electric signals to obtain a target frequency; and generating a compensation signal with the same amplitude as the target amplitude and the same frequency as the target frequency.

In some embodiments, based on the third and fourth possible implementations described above, the first end of the sampling module is connected to an input of each of the plurality of power amplifiers, so that the processing module can detect the second electrical signal through the sampling module.

In particular, the sampling module may include a plurality of capacitors, a plurality of switching tubes, an analog-to-digital converter. The input of the analog-to-digital converter comprises a plurality of sub-ports. The capacitors, the switching tubes, the sub-ports of the analog-to-digital converter and the power amplifiers are in one-to-one correspondence. The first polar plate of each capacitor in the plurality of capacitors is connected with the input end of the corresponding power amplifier, and the second polar plate of each capacitor in the plurality of capacitors is connected with the first end of the corresponding switching tube. The second end of each switching tube of the plurality of switching tubes is connected with a corresponding sub-port in the analog-to-digital converter, and the output end of the analog-to-digital converter is connected with the input end of the processing module.

In this embodiment, the processing module is further to: when any one of the power amplifiers works, the switching tube corresponding to the power amplifier is controlled to be conducted.

In some embodiments, based on the third and fourth possible implementation manners, the processing module is configured to: and obtaining a second ratio corresponding to each power amplifier in the working state in the plurality of power amplifiers from the stored ratio corresponding table.

In some embodiments, the processing module is further to: under the condition that any one of the power amplifiers works, acquiring the amplitude of a first electric signal and acquiring the amplitude of a second electric signal input into the power amplifier; dividing the amplitude of the first electric signal by the amplitude of the second electric signal input into a power amplifier to obtain a first ratio corresponding to the power amplifier; and storing the first ratio corresponding to one power amplifier into a ratio corresponding table.

And under the condition that any one of the power amplifiers works and the processing module does not output the compensation signal, acquiring the amplitude of a second electric signal input into the power amplifier and acquiring the amplitude of an interference signal; dividing the amplitude of the interference signal by the amplitude of a second electric signal input into a power amplifier to obtain a second ratio corresponding to the power amplifier; and storing a second ratio corresponding to one power amplifier into a ratio corresponding table. Thus, a ratio correspondence table can be obtained.

In a second aspect, there is also provided an electronic device comprising a target circuit, a speaker, and a speaker driving circuit as in any one of the first aspects.

In some embodiments, the sampling module may include a capacitance and an analog-to-digital converter. The first polar plate of the capacitor is connected with the input end of each of the plurality of voltage converters, the second polar plate of the capacitor is connected with the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected with the input end of the processing module.

In some specific embodiments, the analog-to-digital converter is a codec. The second plate of the capacitor is connected to an input of the codec. The electronic device further comprises a microphone connected to the other input of the codec. That is, in this embodiment, the codec for connection with the microphone may be multiplexed as the analog-to-digital converter, and the other input terminal of the codec that is empty may be used as the input terminal of the analog-to-digital converter, so that the number of devices in the electronic apparatus may be reduced, which is advantageous for improving the integration level of the electronic apparatus.

The technical effects obtained by the second aspect are similar to the technical effects obtained by the corresponding technical means in the first aspect, and are not described in detail herein.

Drawings

Fig. 1 is an external schematic view of an electronic device according to an embodiment of the present application;

fig. 2 is a schematic diagram of an explosion structure of an electronic device according to an embodiment of the present application;

fig. 3 is a schematic view of an internal structure of a first electronic device in the related art;

fig. 4 is a schematic diagram of an internal structure of a second electronic device in the related art;

fig. 5 is a schematic view of an internal structure of a third electronic device in the related art;

fig. 6 is a schematic structural diagram of a first electronic device according to an embodiment of the present application;

fig. 7 is a schematic structural diagram of a second electronic device according to an embodiment of the present application;

fig. 8 is a schematic structural diagram of a third electronic device according to an embodiment of the present application;

FIG. 9 is a waveform diagram of a first electrical signal provided by an embodiment of the present application;

fig. 10 is a waveform diagram of a first electrical signal, a second electrical signal, and an interference signal according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of a fourth electronic device according to an embodiment of the present application;

fig. 12 is a waveform diagram of a first electric signal, an APT1 signal, an APT2 signal, and an interference signal according to an embodiment of the present application;

Fig. 13 is a schematic structural diagram of a fifth electronic device according to an embodiment of the present application;

fig. 14 is a schematic structural diagram of a sixth electronic device according to an embodiment of the present application;

fig. 15 is a schematic structural diagram of a seventh electronic device according to an embodiment of the present application;

fig. 16 is a schematic structural diagram of an eighth electronic device according to an embodiment of the present application;

fig. 17 is a schematic structural diagram of a ninth electronic device according to an embodiment of the present application;

FIG. 18 is a waveform diagram of an interference signal and a compensation signal according to an embodiment of the present application;

fig. 19 is a schematic structural diagram of a tenth electronic device according to an embodiment of the present application.

Wherein, the meanings represented by the reference numerals are respectively as follows:

the application comprises the following steps:

10. an electronic device;

110. a display screen;

120. a rear cover;

130. a middle frame;

131. a metal plate;

132. a top rim;

133. a bottom frame;

134. a left frame;

135. a right frame;

140. a circuit board;

150. a battery;

162. a front-facing camera;

164. a rear camera;

30. a speaker driving circuit;

310. a sampling module;

312. an analog-to-digital converter;

320. a processing module;

40. a target circuit;

410. a voltage converter;

412. a first voltage converter;

414. A second voltage converter;

420. a battery;

430. a charge and discharge management chip;

50. a speaker;

related technology:

20. an electronic device;

210. a battery;

220. a charge and discharge management chip;

230. a voltage converter;

240. a speaker;

250. and a compensation line.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. Wherein, in the description of the embodiments of the present application, unless otherwise indicated, "/" means or, for example, a/B may represent a or B; "and/or" herein is merely an association relationship describing an association object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In addition, in the description of the embodiments of the present application, "plurality" means two or more than two.

For the purpose of clarity in describing the technical solution of the present application, the words "first", "second", etc. are used to distinguish between identical items or similar items having substantially the same function and effect. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, and that the words "first," "second," and the like do not necessarily differ.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

Before explaining the speaker driving circuit provided by the embodiment of the application in detail, an application scenario of the speaker driving circuit is described.

The speaker driving circuit is applied to an electronic device. The electronic device of the embodiment of the application can comprise a handheld device, a vehicle-mounted device and the like with an image processing function. For example, some electronic devices are: a mobile phone, tablet, palm, notebook, mobile internet device (mobile internet device, MID), wearable device, virtual Reality (VR) device, augmented reality (augmented reality, AR) device, wireless terminal in industrial control (industrial control), wireless terminal in unmanned (self driving), wireless terminal in teleoperation (remote medical surgery), wireless terminal in smart grid (smart grid), wireless terminal in transportation security (transportation safety), wireless terminal in smart city (smart city), wireless terminal in smart home (smart home), cellular phone, cordless phone, session initiation protocol (session initiation protocol, SIP) phone, wireless local loop (wireless local loop, WLL) station, personal digital assistant (personal digital assistant, PDA), handheld device with wireless communication function, computing device or other processing device connected to wireless modem, vehicle-mounted device, terminal device in 5G network or terminal in future evolved land mobile network (public land mobile network), and the like, without limiting the application.

By way of example, and not limitation, in embodiments of the application, the electronic device may also be a wearable device. The wearable device can also be called as a wearable intelligent device, and is a generic name for intelligently designing daily wear by applying wearable technology and developing wearable devices, such as glasses, gloves, watches, clothes, shoes and the like. The wearable device is a portable device that is worn directly on the body or integrated into the clothing or accessories of the user. The wearable device is not only a hardware device, but also can realize a powerful function through software support, data interaction and cloud interaction. The generalized wearable intelligent device includes full functionality, large size, and may not rely on the smart phone to implement complete or partial functionality, such as: smart watches or smart glasses, etc., and focus on only certain types of application functions, and need to be used in combination with other devices, such as smart phones, for example, various smart bracelets, smart jewelry, etc. for physical sign monitoring.

In addition, in the embodiment of the application, the electronic equipment can also be terminal equipment in an internet of things (internet of things, ioT) system, and the IoT is an important component of the development of future information technology, and the main technical characteristics of the IoT are that the article is connected with a network through a communication technology, so that an intelligent network for man-machine interconnection and internet of things interconnection is realized.

The electronic device in the embodiment of the application may also be referred to as: a terminal device, a User Equipment (UE), a Mobile Station (MS), a Mobile Terminal (MT), an access terminal, a subscriber unit, a subscriber station, a mobile station, a remote terminal, a mobile device, a user terminal, a wireless communication device, a user agent, a user equipment, or the like.

In an embodiment of the application, an electronic device includes a hardware layer, an operating system layer running on top of the hardware layer, and an application layer running on top of the operating system layer. The hardware layer includes hardware such as a central processing unit (central processing unit, CPU), a memory management unit (memory management unit, MMU), and a memory (also referred to as a main memory). The operating system may be any one or more computer operating systems that implement business processes through processes (processes), such as a Linux operating system, a Unix operating system, an Android operating system, an iOS operating system, or a windows operating system. The application layer comprises applications such as a browser, an address book, word processing software, instant messaging software and the like.

Fig. 1 is a schematic view of an electronic device 10 according to an embodiment of the present application, and fig. 2 is a schematic view of an explosion structure of the electronic device 10 according to an embodiment of the present application. As shown in fig. 1 and 2, the electronic device 10 includes: a display screen 110, a rear cover 120, a middle frame 130, a circuit board 140, and a battery 150. Wherein, the middle frame 130, the circuit board 140 and the battery 150 are disposed between the display screen 110 and the rear cover 120. The circuit board 140 and the battery 150 may be disposed on the middle frame 130, for example, the circuit board 140 and the battery 150 are disposed on a side of the middle frame 130 facing the rear cover 120. In other embodiments, the circuit board 140 and the battery 150 may also be disposed on a side of the middle frame 130 facing the display 110.

The battery 150 may be connected to other devices through a charge and discharge management chip (not shown). The charge and discharge management chip may receive the power output from the battery 150 and supply power to a processor, an internal memory, an external memory, the display 110, a camera, a communication module, etc. in the electronic device 10. The charge and discharge management chip can also be used for monitoring parameters such as battery capacity, battery cycle times, battery health status (electric leakage, impedance) and the like. The charge and discharge management chip may also receive externally input power to charge the battery 150. In some embodiments, the charge and discharge management chip may be integrated in the wiring board 140.

The display 110 may be an organic light emitting diode (organic light emitting diode, OLED) display or a liquid crystal display (liquid crystal display, LCD). It should be appreciated that the display screen 110 may include a display for outputting display content to a user and a touch device for receiving touch events entered by the user on the display screen 110.

The rear cover 120 may be a metal rear cover, a glass rear cover, a plastic rear cover, or a ceramic rear cover, and in the embodiment of the present application, the material of the rear cover 120 is not limited.

The middle frame 130 may include a metal plate 131 and a rim. Wherein, the frame is enclosed at the outer edge of the metal plate 131. Generally, the bezel may be a square. For example, as shown in fig. 2, the rims may include a top rim 132 and a bottom rim 133 disposed opposite each other, and a left rim 134 and a right rim 135 disposed between the top rim 132 and the bottom rim 133 and disposed opposite each other. In this embodiment, the side surfaces of the middle frame 130 are the surfaces surrounded by the top frame 132, the bottom frame 133, the left frame 134 and the right frame 135. The metal plate 131 may be an aluminum plate, an aluminum alloy, or a magnesium alloy. Each frame can be a metal frame, a ceramic frame or a glass frame. The metal middle frame 130 and the frame may be welded, clamped or integrally formed, or the metal middle frame 130 and the frame may be injection-molded and connected by plastic parts.

The circuit board 140 is one of the important components of the terminal equipment, and is a carrier necessary for software implementation. The wiring board 140 includes: substrate, functional device mounted on the substrate, and other components mounted on the substrate. Functional devices include, but are not limited to: a voltage converter for converting a voltage, a Power Amplifier (PA) for amplifying a signal, a camera for photographing and shooting, a timing controller for controlling the display of the display screen 110, or a device for controlling other functions (e.g., a charging function, an image processing function, etc.) are also possible. The embodiment of the application is not limited to the specific functions of the functional device. Other components include, but are not limited to, resistors, capacitors, inductors, memory cards, sensors or shields, etc. The circuit board 140 may also include nuts, bolts, etc. for securing. The component may be mounted on the substrate by solder joints.

It will be appreciated that the circuit board 140 may have raised and/or recessed positions based on various components. The specific shape of the circuit board 140, the position and size of the components, etc. are related to the design layout of the terminal device, which is not particularly limited in the embodiment of the present application.

In some embodiments, as shown in FIG. 2, a camera and a flash (not shown) may also be included in the electronic device 10. The cameras may include a front camera 162 and a rear camera 164. Wherein, the rear camera 164 and the flash lamp may be disposed on a surface of the metal plate 131 facing the rear cover 120, and the rear cover 120 is provided with a mounting hole for mounting the flash lamp and the rear camera 164. The front camera 162 may be provided on a side of the metal plate 131 facing the display screen 110. In some embodiments, front-facing camera 162 disposed within electronic device 10 may include one or more cameras, and rear-facing camera 164 may also include one or more cameras.

The related art of the present application is described below.

Fig. 3 is a schematic diagram of an internal structure of an electronic device 20 in the related art. As shown in fig. 3, the electronic device 20 includes a battery 210, a charge-discharge management chip 220, a voltage converter 230, and a PA therein. When the electronic device 20 is in operation, the battery 210 outputs power to the charge/discharge management chip 220. The charge and discharge management chip 220 operates to output the first electrical signal VPH to the voltage converter 230. The voltage converter 230 may voltage-convert the first electrical signal VPH, thereby outputting the second electrical signal APT to the first power supply terminal of the PA. The second power supply terminal of PA is connected to ground GND. In this way, the current output from the battery 210 can flow into the ground GND via the PA, forming a current loop, thereby operating the PA in the current loop. When the PA works, the rf signal can be amplified.

Also included in the electronic device 20 are a System On Chip (SOC) and a speaker 240. The SOC includes a central processing unit (central processing unit, CPU), a graphics processor (graphics processing unit, GPU), baseband, and the like. The SOC is connected to the speaker 240 so that the SOC can output an audio signal to the speaker 240, which is used to drive the speaker 240 to operate.

However, due to the positional relationship of the PA and the speaker 240, the current flowing from the PA into the ground GND generates an interfering magnetic field at the position where the speaker 240 is located. Under the influence of the disturbing magnetic field, a disturbing signal is generated in the speaker 240, which affects the normal operation of the speaker 240.

Fig. 4 is a schematic diagram of an internal structure of another electronic device 20 in the related art. As shown in fig. 4, in the related art, in order to avoid that the interference signal affects the normal operation of the speaker 240, a resistor R1 is generally connected in series to the circuit where the speaker 240 is located, and a branch switch Q1 is connected in parallel to the resistor R1. When the speaker 240 is in the loud mode, i.e., the speaker 240 needs to operate at a higher power, the switch Q1 is closed and the resistor R1 is shorted, thereby enabling the volume of the speaker 240 to meet the requirement of the loud mode. When the speaker 240 is in the earpiece mode, i.e., the speaker 240 needs to operate at less power, the switch Q1 is turned off and the resistor R1 is connected in series with the circuit in which the speaker 240 is located. Thus, the current of the interference signal can be reduced, and noise caused by the interference signal is reduced. However, when the switch Q1 is turned off and the resistor R1 is connected in series to the circuit of the speaker 240, the current level of the audio signal input by the speaker 240 is reduced, which reduces the loudness of the audio played by the speaker 240.

Fig. 5 is a schematic diagram of the internal structure of still another electronic device 20 in the related art. As shown in fig. 5, in the related art, in order to avoid that the interference signal affects the normal operation of the speaker 240, a compensation line 250 is further provided beside the line capable of generating the interference signal. When the electronic device 20 is in operation, the interference signal generated by the line between the second power supply terminal of the PA and the ground GND is a current along the direction a, and the compensation line 250 has a compensation signal with a current direction of the direction B. Thus, the magnetic fields formed by the interference signal and the compensation signal cancel each other out, and the effect of suppressing the generation of the interference signal can be achieved. However, as the number of PAs in the electronic device 20 increases, the number of compensation wires 250 to be provided increases, which occupies a larger space and is disadvantageous for improving the integration level of the electronic device 20.

Therefore, the embodiment of the application provides a loudspeaker driving circuit and electronic equipment. When the loudspeaker driving circuit works, interference signals can not be generated in the loudspeaker, and the loudness of audio played by the loudspeaker can not be reduced. Meanwhile, the loudspeaker driving circuit does not need to be provided with a compensation line for each PA independently, which is beneficial to saving space and improving the integration level of the electronic equipment.

The speaker driving circuit provided by the embodiment of the application is explained in detail below. In the embodiment of the application, the connection between the two electronic devices or/and the electrical module is electrical connection, and the electrical connection refers to the transmission of the electrical signals between the two electronic devices or/and the electrical module through connection. In addition, the electrical connection between the two electronic devices or/and the electrical module can be direct connection through a wire or indirect connection through other electronic devices or/and the electrical module.

Fig. 6 is a schematic structural diagram of an electronic device 10 according to an embodiment of the present application. As shown in fig. 6, the speaker driving circuit 30 is applied to the electronic device 10, and can be connected to the target circuit 40 and the speaker 50 in the electronic device 10. Wherein the target circuit 40 is operative to generate a first magnetic field at the location of the speaker 50. The first magnetic field is generated by an electrical signal in the target circuit 40. The first magnetic field is a disturbing magnetic field for the loudspeaker 50. That is, under the action of the first magnetic field, an interference signal is generated in the speaker 50, and the interference signal affects the normal operation of the speaker 50. In an embodiment of the application, the speaker 50 includes not only an earpiece in the electronic device 10, but also a speaker in the electronic device 10. As shown in fig. 6, the speaker driving circuit 30 includes a sampling module 310 and a processing module 320.

The sampling module 310 may be an electronic device for converting an analog signal to a digital signal. For example, the sampling module 310 may be an analog-to-digital converter or a coder-decoder (CODEC) in the electronic device 10. The processing module 320 may be an electronic device having a signal processing function. For example, the processing module 320 may be a micro control unit (micro control unit, MCU) or an SOC in the electronic device 10. In an embodiment of the present application, the sampling module 310 has a first end and a second end, and the processing module 320 has an input end and an output end. A first end of the sampling module 310 is configured to be coupled to the target circuit 40, and a second end of the sampling module 310 is coupled to an input of the processing module 320. In this manner, when the speaker driving circuit 30 is operated, the processing module 320 may detect the electrical signal in the target circuit 40 through the sampling module 310. An output of the processing module 320 is for connection to a speaker 50. As such, the processing module 320 may be operative to output audio signals to the speaker 50. The audio signal is used to drive the speaker 50 to operate, thereby sounding the speaker 50.

In the embodiment of the present application, the processing module 320 is further configured to execute the following steps S100 to S300 when working.

S100, the processing module 320 detects the electrical signal in the target circuit 40 through the sampling module 310.

The target circuit 40 may be any circuit of the electronic device 10 that is operable to generate a first magnetic field at the location of the speaker 50. The first magnetic field is generated by an electrical signal in the target circuit 40 at the location of the speaker 50. Typically, the electrical signal in the target circuit 40 is an analog signal, and the processing module 320 is used to process the digital signal. Thus, the processing module 320 may detect the electrical signal in the target circuit 40 through the sampling module 310.

S200, the processing module 320 generates a compensation signal according to the electrical signal in the target circuit 40.

After the processing module 320 detects the electrical signal in the target circuit 40, a compensation signal may be generated according to the amplitude and frequency of the electrical signal in the target circuit 40. In general, the amplitude of the generated compensation signal needs to meet the following requirements: when the processing module 320 outputs the compensation signal to the speaker 50, the second magnetic field generated by the compensation signal at the location of the speaker 50 is the same as the first magnetic field.

In some embodiments of the present application, before the processing module 320 generates the compensation signal according to the electrical signal in the target circuit 40, the detected electrical signal in the target circuit 40 may be subjected to fourier transform, and then the compensation signal may be generated according to the signal after fourier transform.

S300, the processing module 320 outputs the compensation signal to the speaker 50.

When the processing module 320 outputs the compensation signal to the speaker 50, the compensation signal generates a second magnetic field at the location of the speaker 50. The second magnetic field has the same intensity and opposite direction to the first magnetic field. That is, when the first magnetic field is inward in a direction perpendicular to the paper surface, the second magnetic field is outward in a direction perpendicular to the paper surface; when the first magnetic field is directed outward in a direction perpendicular to the page, the second magnetic field is directed inward in a direction perpendicular to the page. In the embodiment of the present application, the compensation signal may flow from the processing module 320 to the speaker 50, or may flow from the speaker 50 to the processing module 320. The direction of the compensation signal may be preset according to the direction of the first magnetic field.

In an embodiment of the present application, when the target circuit 40 is operated, a first magnetic field that interferes with the operation of the speaker 50 can be generated at the location where the speaker 50 is located. While the speaker driving circuit 30 is operated, the processing module 320 may detect the electrical signal in the target circuit 40 through the sampling module 310, and the processing module 320 may generate a compensation signal according to the electrical signal in the target circuit 40 and output the compensation signal to the speaker 50. The compensation signal generates a second magnetic field at the location of the speaker 50 that is the same strength and opposite to the first magnetic field. Thus, the second magnetic field and the first magnetic field cancel each other, that is, the compensation signal and the interference signal cancel each other, so that no interference signal is generated in the speaker 50, and the speaker 50 works normally under the action of the audio signal. Meanwhile, the speaker driving circuit 30 does not need to have a resistor connected in series to the circuit where the speaker 50 is located, and thus the loudness of the audio played by the speaker 50 is not reduced. The speaker driving circuit 30 does not need to additionally provide a compensation line, which is advantageous in saving space, thereby facilitating improvement of the integration level of the electronic device 10.

It should be noted that, in the above embodiment, the target circuit 40 and the speaker 50 are introduced to describe the connection manner and the operation of the speaker driving circuit 30 according to the embodiment of the present application for the sake of understanding. In fact, the speaker driving circuit 30 provided by the embodiment of the present application does not include the target circuit 40 and the speaker 50. That is, the target circuit 40 and the speaker 50 are present as environmental elements with respect to the speaker driving circuit 30 provided by the embodiment of the present application, and should not be construed as limiting the speaker driving circuit 30 provided by the embodiment of the present application.

It will be appreciated that in the above embodiments, the compensation signal generates a second magnetic field at the location of the speaker 50 that is the same as the first magnetic field in the opposite direction. In other embodiments, the compensation signal may generate a second magnetic field at the location of the speaker 50 that is different from the first magnetic field, e.g., the second magnetic field may have a strength that is greater than the first magnetic field or the second magnetic field may have a strength that is less than the first magnetic field.

The circuit configuration of the target circuit 40 is explained below.

In some embodiments, as also shown in fig. 6, the target circuit 40 is a current loop in which the PA is located in the electronic device 10. In this case, the target circuit 40 may include one voltage converter 410 and one PA. The voltage converter 410 may be any one of a buck-boost (buck) circuit, a boost (boost) circuit, and a buck-boost (buck-boost) circuit. The voltage converter 410 has an input and an output. The input terminal of the voltage converter 410 is used for inputting the first electrical signal VPH. The output terminal of the voltage converter 410 is connected to the first power supply terminal of the PA to output the second electrical signal APT to the PA. The second electrical signal APT input to the PA is a supply signal suitable for the current operating state of the PA. The second power supply terminal of PA is connected to ground GND. In general, the second power supply terminal of PA may be connected to ground GND through the center frame of electronic device 10.

In this embodiment, the target circuit 40 may further include a battery 420 and a charge and discharge management chip 430. The first terminal of the charge and discharge management chip 430 is connected to the battery 420, and the second terminal of the charge and discharge management chip 430 is connected to the input terminal of the voltage converter 410. Thus, when the target circuit 40 operates, the battery 420 supplies power to the charge and discharge management chip 430. The second terminal of the charge/discharge management chip 430 outputs the first electrical signal VPH to the input terminal of the voltage converter 410 during operation. The voltage converter 410 may voltage-convert the first electrical signal VPH, thereby outputting the second electrical signals APT to PA. In this case, the current flowing from PA to ground GND generates a first magnetic field at the location of speaker 50. Since the waveforms of the electric signal flowing from the PA into the ground GND and the second electric signal APT flowing into the PA are identical, that is, the electric signal flowing from the PA into the ground GND and the second electric signal APT flowing into the PA are the same electric signal, it can be said that the second electric signal APT generates the first magnetic field at the position where the speaker 50 is located.

Fig. 7 is a schematic structural diagram of another electronic device 10 according to an embodiment of the present application. In the embodiment shown in fig. 7, the target circuit 40 is still the current loop in which the PA is located in the electronic device 10. In this embodiment, a plurality of voltage converters and a plurality of PAs are included in the target circuit 40. The input end of each of the plurality of voltage converters is used for inputting the first electric signal VPH. The output end of each of the plurality of voltage converters is connected with at least one PA of the plurality of PAs. Each voltage converter may output the second electrical signal APT to any one of the PAs to which its output is connected. In the embodiment of the application, each PA is connected with the output end of only one voltage converter.

Specifically, in the embodiment shown in fig. 7, the voltage converter shown includes a first voltage converter 412, a second voltage converter 414; the PA shown includes PA1, PA2, and PA3; the second electrical signal APT is shown to comprise APT1, APT2, APT3. The first terminal of the charge and discharge management chip 430 is connected to the battery 420. The input terminal of the first voltage converter 412 and the input terminal of the second voltage converter 414 are connected to the second terminal of the charge/discharge management chip 430, so as to input the first electrical signal VPH. An output terminal of the first voltage converter 412 is connected to a first power supply terminal of PA1. The first voltage converter 412 may output an APT1 signal to PA1 when operated. The output of the second voltage converter 414 is connected to the first power supply terminal of PA2 and the first power supply terminal of PA3. The second voltage converter 414 may be configured to output an APT2 signal to PA2 or an APT3 signal to PA3 when operated. In some possible embodiments, second voltage converter 414 is not operable to output the APT2 signal and APT3 signal simultaneously.

In this embodiment, too, the current flowing from PA (including PA1, PA2, PA 3) into ground GND will generate a first magnetic field at the location of speaker 50. Since the electric signal flowing from PA1 into ground GND and APT1 have the same waveforms, the electric signal flowing from PA2 into ground GND and APT2 have the same waveforms, and the electric signal flowing from PA3 into ground GND and APT3 have the same waveforms, that is, the electric signal flowing from PA into ground GND and the second electric signal APT (including APT1, APT2, APT 3) flowing into PA are the same electric signals, it can be said that the second electric signal APT generates the first magnetic field at the position where speaker 50 is located.

In other embodiments, the target circuit 40 may also be a current loop in which other devices in the electronic device 10 are located. Other devices herein may be, for example, a sensor, a display screen, a camera, a motor, etc., and will not be described herein.

The operation of the processing module 320 is explained in detail below with respect to four possible implementations taking the example that the target circuit 40 is a current loop in which the PA is located in the electronic device 10.

1. In a first possible implementation, the electrical signals in the target circuit 40 comprise a first electrical signal VPH and a second electrical signal APT. This possible implementation is described below in two cases.

1) The target circuit 40 comprises a plurality of voltage converters and a plurality of PAs, only one voltage converter outputting the second electrical signal APT to one PA at a time.

Specifically, fig. 8 is a schematic structural diagram of yet another electronic device 10 according to an embodiment of the present application. As shown in fig. 8, the target circuit 40 includes a first voltage converter 412, a second voltage converter 414, PA1, PA2, and PA3. At the same time, the first voltage converter 412 operates to output an APT1 signal to PA1, or the second voltage converter 414 operates to output an APT2 signal to PA2, or the second voltage converter 414 operates to output an APT3 signal to PA3. One of PA1, PA2, PA3 is in an operating state.

In this embodiment, a first terminal of the sampling module 310 is connected to an input terminal of each of the plurality of voltage converters, that is, a first terminal of the sampling module 310 is connected to an output terminal of the charge-discharge management chip 430, so that the processing module 320 can detect the first electrical signal VPH through the sampling module 310.

The processing module 320, when executing step S100, specifically includes: the processing module 320 detects the first electrical signal VPH through the sampling module 310. In this manner, the processing module 320 may obtain the magnitude of the first electrical signal VPH and the frequency of the first electrical signal VPH.

The processing module 320 may specifically perform the following steps S211 to S213 when performing step S200.

S211, the processing module 320 obtains a first ratio and a second ratio.

The first ratio is the ratio of the amplitude of the first electrical signal VPH to the amplitude of the second electrical signal APT when the target circuit 40 is in operation. The APT signal may be any one of APT1 signal, APT2 signal, and APT3 signal. The second ratio is the ratio of the amplitude of the interference signal and the amplitude of the second electrical signal APT when the target circuit 40 is in operation. The first ratio and the second ratio may be pre-stored in the processing module 320, so that the processing module 320 may obtain the first ratio and the second ratio when operating.

Fig. 9 is a waveform diagram of a first electrical signal VPH according to an embodiment of the present application, where waveforms of the first electrical signal VPH are shown in a case where none of the plurality of voltage converters is operating. As shown in fig. 9, in general, when none of the plurality of voltage converters is operated, the voltage level of the first electrical signal VPH remains unchanged. Fig. 10 is a waveform diagram of a first electrical signal VPH, a second electrical signal APT, and an interference signal according to an embodiment of the present application, where waveforms of the first electrical signal VPH, the second electrical signal APT, and the interference signal are shown when one of a plurality of voltage converters operates. As shown in fig. 10, when one voltage converter works and outputs the second electrical signal APT, if the second electrical signal APT is at a high level, the first electrical signal VPH is pulled low; if the second electrical signal APT is at a low level, the first electrical signal VPH is not pumped. When the voltage converter works, the voltage of the second electric signal APT can be controlled by controlling the duty ratio of a high-level signal in the second electric signal APT. The duty cycle of the high-level signal in the second electrical signal APT means that the duration of the high-level signal is a percentage of the total duration of a period formed by one high-level signal and one low-level signal in the second electrical signal APT. An interference signal is generated in the speaker 50 by the second electrical signal APT. In the embodiment of the present application, the amplitude of the first electrical signal VPH refers to the difference between the maximum value and the minimum value of the first electrical signal VPH, i.e., V1-V2; the amplitude of the second electrical signal APT refers to the difference between the maximum and minimum values of the second electrical signal APT, i.e. V3; the amplitude of the interference signal refers to the difference between the maximum and minimum values of the interference signal, i.e. V4.

In some embodiments, the processing module 320 has a ratio correspondence table stored therein. The ratio correspondence table is the correspondence between the PA identifier and the first ratio and the second ratio. In this case, when executing step S211, the processing module 320 may specifically be: the processing module 320 obtains, from the stored ratio mapping table, a first ratio and a second ratio corresponding to each PA in the working state in the plurality of PAs.

Specifically, for an interference circuit having a plurality of PAs, a PA in an operating state means that the PA inputs a second electrical signal APT, and a PA not in an operating state means that the PA does not input the second electrical signal APT. That is, only the PA in the operating state will input the second electrical signal APT and generate the first magnetic field at the location of the speaker 50. In the embodiment of the present application, the processing module 320 may be further connected to each PA (connection relationship is not shown in the figure) to obtain whether each PA is in an operating state, or/and the processing module 320 may be further connected to each voltage converter to obtain whether each PA is in an operating state.

The ratio correspondence table may be as shown in table 1 below.

TABLE 1

PA identification	First ratio value	Second ratio of
			PA1	0.22	0.5
PA2	0.24	0.4
			PA3	0.25	0.3

As can be seen from table 1, when the processing module 320 is in operation, if the PA1 is in an operating state, the processing module 320 obtains a first ratio of 0.22 and a second ratio of 0.5. If PA2 is in the working state, the processing module 320 obtains the first ratio of 0.24 and the second ratio of 0.4. If PA3 is in the working state, the processing module 320 obtains the first ratio of 0.25 and the second ratio of 0.3. In other embodiments, not shown, the second ratio corresponding to PA4 may be negative when speaker 50 is located between PA1 and PA 4. And will not be described in detail.

S212, the processing module 320 divides the amplitude of the first electrical signal VPH by the first ratio and multiplies the first electrical signal VPH by the second ratio to obtain a target amplitude.

That is, the target amplitude is:

wherein A is a target amplitude; a is that _VPH Is the amplitude of the first electrical signal VPH; m is a first ratio; k is the second ratio. At this time, the amplitude of the second electric signal APT can be obtained as +.>

S213, the processing module 320 generates a compensation signal having the same amplitude as the target amplitude and the same frequency as the first electrical signal VPH.

In the embodiment of the application, in order to perfectly cancel the interference signal, the amplitude of the compensation signal needs to be equal to the amplitude of the interference signal. As described above, the first ratio is the ratio of the amplitude of the first electrical signal VPH to the amplitude of the second electrical signal APT when the target circuit 40 is in operation, and the second ratio is the ratio of the amplitude of the interference signal to the amplitude of the second electrical signal APT when the target circuit 40 is in operation. It can be seen that the target amplitude obtained in step S212 is equal to the amplitude of the interference signal. Based on this, the processing module 320 may perform step S213, where the amplitude of the generated compensation signal may be equal to the target amplitude, and the frequency of the compensation signal is equal to the frequency of the first electrical signal VPH obtained in step S100.

2) The target circuit 40 comprises only one voltage converter 410 and one PA.

Specifically, fig. 11 is a schematic structural diagram of still another electronic device 10 according to an embodiment of the present application. As shown in fig. 11, the target circuit 40 includes a voltage converter 410 and a PA. In operation of target circuit 40, voltage converter 410 outputs an APT signal to the PA. In this embodiment, the first terminal of the sampling module 310 is connected to the input terminal of the voltage converter 410, that is, the first terminal of the sampling module 310 is connected to the output terminal of the charge-discharge management chip 430, so that the processing module 320 can detect the first electrical signal VPH through the sampling module 310.

The processing module 320 may specifically perform the following steps S221 to S223 when performing step S200.

S221, the processing module 320 obtains a first ratio and a second ratio.

The first ratio is the ratio of the amplitude of the first electrical signal VPH to the amplitude of the second electrical signal APT when the target circuit 40 is in operation. The second ratio is the ratio of the amplitude of the interference signal and the amplitude of the second electrical signal APT when the target circuit 40 is in operation. The first ratio and the second ratio may be pre-stored in the processing module 320, so that the processing module 320 may obtain the first ratio and the second ratio when operating. In this embodiment, since there is only one voltage converter 410 and one PA, the processing module 320 also only needs to store one first ratio and one second ratio, and no ratio correspondence table is needed.

S222, the processing module 320 divides the amplitude of the first electrical signal VPH by the first ratio and multiplies the first electrical signal VPH by the second ratio to obtain a target amplitude.

Step S222 is the same as step S212, and will not be described again.

S223, the processing module 320 generates a compensation signal having the same amplitude as the target amplitude and the same frequency as the first electrical signal VPH.

Step S223 is the same as step S213, and will not be described again.

2. In a second possible implementation, the electrical signals in the target circuit 40 include one first electrical signal VPH and n second electrical signals APT, n being an integer greater than or equal to 2.

Specifically, the target circuit 40 includes a plurality of voltage converters and a plurality of PAs, each of the n voltage converters outputting one second electrical signal to the connected PA at the same time. Taking n equal to 2 as an example, the structure of the speaker driving circuit 30 may be as shown in fig. 8. Unlike the "first possible implementation", in this embodiment, the first voltage converter 412 operates to output an APT1 signal to PA1, while the second voltage converter 414 operates to output an APT2 signal to PA2 or an APT3 signal to PA 3. That is, PA1 is in an operating state, and one of PA2 and PA3 is in an operating state.

The processing module 320 may specifically perform the following steps S231 to S233 when performing the step S200.

S231, the processing module 320 obtains n first ratios and n second ratios.

The i-th first ratio of the n first ratios is a ratio of the amplitude of the first electric signal VPH to the amplitude of the i-th second electric signal APT of the n second electric signals APT, the i-th second ratio of the n second ratios is a ratio of the amplitude of the interference signal to the amplitude of the i-th second electric signal APT of the n second electric signals APT, and i is an integer greater than or equal to 1 and less than or equal to n.

Fig. 12 is a waveform diagram of a first electrical signal VPH, an APT1 signal, an APT2 signal, and an interference signal according to an embodiment of the present application, where the waveforms of the first electrical signal VPH, the APT1 signal, the APT2 signal, and the interference signal are shown when the first voltage converter 412 outputs the APT1 signal to PA1 and the second voltage converter 414 outputs the APT3 signal to PA 3. Wherein, the APT1 signal is the 1 st second electrical signal APT, and APT3 is the 2 nd second electrical signal APT. As shown in fig. 12, when at least one of the APT1 signal and the APT2 signal is at a high level, the first electrical signal VPH is pulled low; when the APT1 signal and the APT2 signal are both at low level, the first electrical signal VPH is not pumped. An interference signal is generated in the speaker 50 by the APT1 signal and APT2 signal. In the embodiment of the present application, the amplitude of the first electrical signal VPH refers to the difference between the maximum value and the minimum value of the first electrical signal VPH, i.e., V1-V2; the amplitude of the APT1 signal refers to the difference between the maximum and minimum values of the APT1 signal, i.e., V3; the amplitude of the APT3 signal refers to the difference between the maximum and minimum values of the APT3 signal, i.e., V5; the amplitude of the interference signal refers to the difference between the maximum and minimum values of the interference signal, i.e. V4.

In operation of the circuit structure shown in fig. 8, when the first voltage converter 412 outputs the APT1 signal to PA1 and the second voltage converter 414 outputs the APT3 signal to PA3, the processing module 320 includes: the processing module 320 obtains 2 first ratios and 2 second ratios. The 1 st of the 2 first ratios is the ratio of the amplitude of the first electrical signal VPH to the amplitude of the APT1 signal. The 2 nd one of the 2 first ratios is a ratio of the amplitude of the first electrical signal VPH to the amplitude of the APT3 signal. The 1 st of the 2 second ratios is the ratio of the amplitude of the interfering signal to the amplitude of the APT1 signal. The 2 nd of the 2 second ratios is the ratio of the amplitude of the interfering signal to the amplitude of the APT3 signal.

In this embodiment, the processing module 320 may have a ratio correspondence table stored therein. The ratio correspondence table may be shown in table 1 above, and will not be described again. In this case, the processing module 320 may specifically be: the processing module 320 obtains, from the stored ratio mapping table, a first ratio and a second ratio corresponding to each PA in the working state in the plurality of PAs.

As can be seen from table 1, when the processing module 320 is in operation, if PA1 and PA3 are in operation, the two first ratios obtained by the processing module 320 are respectively 0.22 and 0.25, and the two second ratios obtained by the processing module 320 are respectively 0.5 and 0.3.

S232, the processing module 320 divides the amplitude of the first electrical signal VPH by the first value and multiplies the first value by the second value to obtain a target amplitude.

The first value is the sum of n first ratios, and the second value is the sum of n second ratios. That is, the target amplitude is:

X＝M1+M2+…+Mn

Y＝K1+K2+…+Kn

wherein A is a target amplitude; a is that _VPH Is the amplitude of the first electrical signal VPH; x is a first number; y is a second value; m1 is the 1 st first ratio; m2 is the 2 nd first ratio; mn is the nth first ratio; k1 is the 1 st second ratio; k2 is the second ratio of the 2 nd; kn is the nth second ratio.

S233, the processing module 320 generates a compensation signal having the same amplitude as the target amplitude and the same frequency as the first electrical signal VPH.

Step S233 is the same as step S213, and will not be described again.

Fig. 13 is a schematic structural diagram of still another electronic device 10 according to an embodiment of the present application. As shown in fig. 13, in some embodiments, the sampling module 310 may include a capacitor C and an analog-to-digital converter 312 based on the "first possible implementation" and the "second possible implementation" described above. The capacitor C is a blocking capacitor. A first plate of the capacitor C is connected to an input of each of the plurality of voltage converters, a second plate of the capacitor C is connected to an input of the analog-to-digital converter 312, and an output of the analog-to-digital converter 312 is connected to an input of the processing module 320.

3. In a third possible implementation, the electrical signals in the target circuit 40 include a first electrical signal VPH and a second electrical signal APT. This possible implementation is described below in two cases.

Specifically, fig. 14 is a schematic structural diagram of yet another electronic device 10 according to an embodiment of the present application. As shown in fig. 14, the target circuit 40 includes a first voltage converter 412, a second voltage converter 414, PA1, PA2, and PA3. At the same time, the first voltage converter 412 operates to output an APT1 signal to PA1, or the second voltage converter 414 operates to output an APT2 signal to PA2, or the second voltage converter 414 operates to output an APT3 signal to PA3. One of PA1, PA2, PA3 is in an operating state.

In this embodiment, a first terminal of the sampling module 310 is connected to an input terminal of each PA of the plurality of PAs, so that the processing module 320 can detect the second electrical signal APT through the sampling module 310. As shown in fig. 14, when the plurality of PAs includes PA1, PA2, PA3, the first end of the sampling module 310 may include sub-port a, sub-port b, and sub-port c. The sub-port a is connected with the input end of the PA1, the sub-port b is connected with the input end of the PA2, and the sub-port c is connected with the input end of the PA3. In other embodiments, the input of PA2 and the input of PA3 may also be connected to the same sub-port of the first end of sampling module 310, since PA2 and PA3 do not operate simultaneously.

The processing module 320, when executing step S100, specifically includes: the processing module 320 detects the second electrical signal APT by means of the sampling module 310. In this way, the processing module 320 may obtain the amplitude of the second electrical signal APT and the frequency of the second electrical signal APT. The second electrical signal APT here may be any one of APT1 signal, APT2 signal, APT3 signal.

The processing module 320 may specifically perform the following steps S241 to S243 when performing step S200.

S241, the processing module 320 obtains a second ratio.

The second ratio is the ratio of the amplitude of the interference signal and the amplitude of the second electrical signal APT when the target circuit 40 is in operation. The second ratio may be pre-stored within the processing module 320 such that the processing module 320 may be operated to obtain the second ratio.

In some embodiments, the processing module 320 has a ratio correspondence table stored therein. The ratio correspondence table is a correspondence between PA identities and a second ratio. In this case, when executing step S241, the processing module 320 may specifically be: the processing module 320 obtains, from the stored ratio mapping table, a second ratio corresponding to each PA in the plurality of PAs in the operating state.

The ratio correspondence table may be as shown in table 2 below.

TABLE 2

PA identification	Second ratio of
		PA1	0.5
PA2	0.4
		PA3	0.3

As can be seen from table 2, when the processing module 320 is operating, if the PA1 is in the operating state, the processing module 320 obtains the second ratio to be 0.5. If PA2 is in the working state, the processing module 320 obtains the second ratio to be 0.4. If PA3 is in the working state, the processing module 320 obtains the second ratio to be 0.3. In other embodiments, not shown, the second ratio corresponding to PA4 may be negative when speaker 50 is located between PA1 and PA 4. And will not be described in detail.

S242, the processing module 320 multiplies the amplitude of the second electrical signal APT by the second ratio to obtain a target amplitude.

That is, the target amplitude is:

A＝A _APT k. Wherein A is a target amplitude; a is that _APT Is the amplitude of the second electrical signal APT; k is the second ratio.

S243, the processing module 320 generates a compensation signal having the same amplitude as the target amplitude and the same frequency as the second electrical signal APT.

In the embodiment of the application, in order to perfectly cancel the interference signal, the amplitude of the compensation signal needs to be equal to the amplitude of the interference signal. As previously described, the second ratio is the ratio of the amplitude of the interference signal to the amplitude of the second electrical signal APT when the target circuit 40 is in operation. It can be seen that the target amplitude obtained in step S242 is equal to the amplitude of the interference signal. Based on this, when the processing module 320 performs step S243, the amplitude of the generated compensation signal may be equal to the target amplitude, and the frequency of the compensation signal is equal to the frequency of the second electrical signal APT obtained in step S100.

2) The target circuit 40 comprises only one voltage converter 410 and one PA.

Specifically, fig. 15 is a schematic structural diagram of still another electronic device 10 according to an embodiment of the present application. As shown in fig. 15, the target circuit 40 includes a voltage converter 410 and a PA. In operation of target circuit 40, voltage converter 410 outputs an APT signal to the PA. In this embodiment, a first terminal of the sampling module 310 is connected to an input terminal of the PA, so that the processing module 320 can detect the second electrical signal APT through the sampling module 310.

The processing module 320, when executing step S100, specifically includes: the processing module 320 detects the second electrical signal APT by means of the sampling module 310. In this way, the processing module 320 may obtain the amplitude of the second electrical signal APT and the frequency of the second electrical signal APT.

The processing module 320 may specifically perform the following steps S251 to S253 when performing step S200.

S251, the processing module 320 obtains a second ratio.

The second ratio is the ratio of the amplitude of the interference signal and the amplitude of the second electrical signal APT when the target circuit 40 is in operation. The second ratio may be pre-stored within the processing module 320 such that the processing module 320 may be operated to obtain the second ratio. In this embodiment, since there is only one voltage converter 410 and one PA, the processing module 320 also only needs to store one second ratio, and no ratio correspondence table is needed.

In S252, the processing module 320 multiplies the amplitude of the second electrical signal APT by the second ratio to obtain a target amplitude.

Step S252 is the same as step S242, and will not be described again.

S253, the processing module 320 generates a compensation signal having the same amplitude as the target amplitude and the same frequency as the second electrical signal APT.

Step S253 is the same as step S243, and will not be described again.

4. In four possible implementations, the electrical signals in the target circuit 40 include one first electrical signal VPH and n second electrical signals APT, n being an integer greater than or equal to 2.

Specifically, the target circuit 40 includes a plurality of voltage converters and a plurality of PAs, each of the n voltage converters outputting one second electrical signal APT to the connected PA at the same time. Taking n equal to 2 as an example, the structure of the speaker driving circuit 30 can be as shown in fig. 14. Unlike the third possible implementation, in this embodiment, the first voltage converter 412 operates to output an APT1 signal to PA1, while the second voltage converter 414 operates to output an APT2 signal to PA2 or an APT3 signal to PA 3. That is, PA1 is in an operating state, and one of PA2 and PA3 is in an operating state.

In this embodiment, a first terminal of the sampling module 310 is connected to an input terminal of each PA of the plurality of PAs, so that the processing module 320 can detect the second electrical signal APT through the sampling module 310. As shown in fig. 14, the sub-port a is connected to the input of PA1, the sub-port b is connected to the input of PA2, and the sub-port c is connected to the input of PA 3. In other embodiments, the input of PA2 and the input of PA3 may also be connected to the same sub-port of the first end of sampling module 310, since PA2 and PA3 do not operate simultaneously.

The processing module 320, when executing step S100, specifically includes: the processing module 320 detects n second electrical signals APT through the sampling module 310, respectively. In this way, the processing module 320 may obtain the amplitude and the frequency of each of the n second electrical signals APT. In operation of the circuit configuration shown in fig. 14, the first voltage converter 412 outputs an APT1 signal to PA1, and the second voltage converter 414 outputs an APT3 signal to PA3, for example, includes: the processing module 320 detects the APT1 signal and APT3 signal through the sampling module 310.

The processing module 320 may specifically perform the following steps S261 to S265 when performing step S200.

S261, the processing module 320 obtains n second ratios.

The i-th second ratio of the n second ratios is a ratio of the amplitude of the interference signal to the amplitude of the i-th second electric signal APT of the n second electric signals APT, i being an integer greater than or equal to 1 and less than or equal to n.

Still in operation with the circuit configuration shown in fig. 14, the first voltage converter 412 outputs an APT1 signal to PA1, and the second voltage converter 414 outputs an APT3 signal to PA3, for example, includes: 2 second ratios are obtained. The 1 st of the 2 second ratios is the ratio of the amplitude of the interfering signal to the amplitude of the APT1 signal. The 2 nd of the 2 second ratios is the ratio of the amplitude of the interfering signal to the amplitude of the APT3 signal.

In this embodiment, the processing module 320 may have a ratio correspondence table stored therein. The ratio correspondence table may be shown in the above table 2, and will not be described again. In this case, when executing step S261, the processing module 320 may specifically be: the processing module 320 obtains, from the stored ratio mapping table, a second ratio corresponding to each PA in the plurality of PAs in the operating state. As can be seen from table 2, when the processing module 320 is in operation, if PA1 and PA3 are in operation, the 2 second ratios obtained by the processing module 320 are respectively 0.5 and 0.3.

At S262, the processing module 320 multiplies the amplitude of the ith second electrical signal APT of the n second electrical signals APT by the ith second ratio of the n second ratios to obtain n amplitude components.

That is, the n amplitude components are respectively:

A1＝A _ＡPT1 ·K1

A2＝A _APT2 ·K2

An＝A _APTn ·Kn

wherein A1 is a first amplitude component; a2 is the second amplitude component; an is the nth amplitude component; a is that _APT1 Is the amplitude of the APT1 signal; a is that _APT2 Is the amplitude of the APT2 signal; a is that _APTn Is the amplitude of the APTn signal; k1 is the 1 st second ratio; k2 is the second ratio of the 2 nd; kn is the nth second ratio.

S263, the processing module 320 adds the n amplitude components to obtain the target amplitude.

The target amplitude is:

A＝A1+A2+…A _n . A is the target amplitude.

Still in operation with the circuit structure shown in fig. 14, the first voltage converter 412 outputs an APT1 signal to PA1, the second voltage converter 414 outputs an APT3 signal to PA3, and the ratio correspondence table is shown as an example in table 2, and there are: a=a _APT1 ×0.5+A _APT3 ×0.3。

In S264, the processing module 320 superimposes the frequencies of the n second electrical signals APT to obtain the target frequency.

The processing module 320 has obtained the frequency of each of the n second electrical signals APT when executing step S100. Here, the processing module 320 may superimpose the frequencies of the n second electrical signals APT to obtain the target frequency. In this embodiment, the frequency superposition of the n second electric signals APT does not refer to the addition of frequency values, but refers to the frequency resulting from the waveform superposition of the n second electric signals APT. In general, the target frequency obtained by frequency superposition of the n second electrical signals APT is the frequency of the first electrical signal VPH.

S265, the processing module 320 generates a compensation signal having the same amplitude as the target amplitude and the same frequency as the target frequency.

In some embodiments, based on the "third possible implementation" and the "fourth possible implementation" described above, the sampling module 310 may include a plurality of capacitors, a plurality of switching transistors, and an analog-to-digital converter 312. The input of the analog-to-digital converter 312 includes a plurality of sub-ports. The capacitors, the switching transistors, the sub-ports of the analog-to-digital converter 312, and the PAs are in one-to-one correspondence. The first polar plate of each capacitor in the plurality of capacitors is connected with the input end of the corresponding PA, and the second polar plate of each capacitor in the plurality of capacitors is connected with the first end of the corresponding switching tube. A second end of each of the plurality of switching tubes is connected to a corresponding sub-port in the analog-to-digital converter 312, and an output of the analog-to-digital converter 312 is connected to an input of the processing module 320.

Specifically, fig. 16 is a schematic structural diagram of still another electronic device 10 according to an embodiment of the present application. As shown in fig. 16, the sampling module 310 may include a capacitor C1, a capacitor C2, a capacitor C3, a switching tube Q1, a switching tube Q2, and a switching tube Q3. The input terminal of the analog-to-digital converter 312 includes a sub-port d, a sub-port e, a sub-port fo, a capacitor C1, a capacitor C2, and a capacitor C3, which are all blocking capacitors. The capacitor C1, the switching tube Q1, and the sub-ports d and PA1 of the analog-to-digital converter 312 correspond to each other. The first polar plate of the capacitor C1 is connected with the input end of the PA1, and the second polar plate of the capacitor C1 is connected with the first end of the switch tube Q1. A second terminal of the switching transistor Q1 is connected to the sub-port d of the analog-to-digital converter 312. Similarly, the capacitor C2, the switch Q2, and the sub-ports e and PA2 of the analog-to-digital converter 312 correspond to each other, and the capacitor C3, the switch Q3, and the sub-ports f and PA3 of the analog-to-digital converter 312 correspond to each other, so that the connection relationship is not repeated.

In this embodiment, the processing module 320 is further configured to: when any one of the PAs is operating, the processing module 320 controls the switching tube corresponding to the PA to be turned on. Thus, the processing module 320 can detect the second electrical signal APT input to the PA through the sampling module 310. Here, the processing module 320 may be further connected to the control terminal of the switching tube Q1, the control terminal of the switching tube Q2, and the control terminal of the switching tube Q3 to control on and off of each of the switching tube Q1, the switching tube Q2, and the switching tube Q3.

Fig. 17 is a schematic structural diagram of still another electronic device 10 according to an embodiment of the present application. In other embodiments, as shown in fig. 17, since PA2 and PA3 do not operate simultaneously, both switching tube Q2 and switching tube Q3 may be connected to sub-port e of the input of analog-to-digital converter 312.

In the four possible implementations described above, the processing module 320 may need to pre-store the second ratio, or pre-store the first ratio and the second ratio. The process of the processing module 320 storing the first ratio and the second ratio in advance will be described below.

1. The processing module 320 pre-stores the first ratio.

In some embodiments, the processing module 320 is further configured to perform the following steps S001a to S003a before performing the step S100.

S001a, in the case where any one of the plurality of power amplifiers is operated, the processing module 320 acquires the magnitude of the first electrical signal VPH and acquires the magnitude of the second electrical signal APT input to the one power amplifier.

S002a, the processing module 320 divides the amplitude of the first electrical signal VPH by the amplitude of the second electrical signal APT input to a power amplifier to obtain a first ratio corresponding to the power amplifier.

S003a, the processing module 320 stores the first ratio corresponding to one power amplifier in the ratio correspondence table.

Specifically, in the case where the structure of the electronic device 10 is as shown in fig. 8 or 13, the processing module 320 may control the first voltage converter 412 to operate to output the APT1 signal to the PA1, and the second voltage converter 414 to not operate. At this time, the processing module 320 detects the first electrical signal VPH through the sampling module 310, and obtains the amplitude of the first electrical signal VPH. At the same time, the processing module 320 also obtains the amplitude of the APT1 signal input to PA 1. The amplitude of the APT1 signal input to PA1 may be manually detected and input to the processing module 320. After obtaining the amplitude of the first signal and the amplitude of the APT1 signal, the processing module 320 divides the amplitude of the first electrical signal VPH by the amplitude of the APT1 signal, so as to obtain a first ratio corresponding to PA 1. At this time, the processing module 320 may store the first ratio corresponding to PA1 in the ratio correspondence table.

The steps are executed on the PA1, the PA2 and the PA3, and the first ratio corresponding to the PA1, the first ratio corresponding to the PA2 and the first ratio corresponding to the PA3 can be sequentially stored in a ratio corresponding table.

In the case where the structure of the electronic device 10 is as shown in fig. 14 or fig. 16, the processing module 320 may control the first voltage converter 412 to operate to output the APT1 signal to the PA1, and the second voltage converter 414 to not operate. At this time, the processing module 320 detects the APT1 signal input to the PA1 through the sampling module 310, and obtains the amplitude of the APT1 signal. At the same time, the processing module 320 also obtains the magnitude of the first electrical signal VPH. The magnitude of the first electrical signal VPH may be manually detected and input to the processing module 320. After obtaining the amplitude of the first signal and the amplitude of the APT1 signal, the processing module 320 divides the amplitude of the first electrical signal VPH by the amplitude of the APT1 signal, so as to obtain a first ratio corresponding to PA 1. At this time, the processing module 320 may store the first ratio corresponding to PA1 in the ratio correspondence table.

It will be appreciated that in the above description of steps S001a to S003a, the target circuit 40 includes a plurality of voltage converters and a plurality of PAs as an example. In other embodiments, when the target circuit 40 includes only one voltage converter and one PA, the process of the processing module 320 storing the first ratio in advance may also be steps S001a to S003a. In other embodiments, a plurality or one of the first ratios may also be manually input directly to the processing module 320 and stored by the processing module 320.

2. The processing module 320 pre-stores the second ratio.

In some embodiments, the processing module 320 is further configured to perform the following steps S001b to S003b before performing the step S100.

S001b, in the case where any one of the plurality of power amplifiers is operated and the processing module 320 does not output the compensation signal, the processing module 320 obtains the amplitude of the second electrical signal APT input to the one power amplifier and obtains the amplitude of the interference signal.

S002b, the processing module 320 divides the amplitude of the interference signal by the amplitude of the second electrical signal APT input to the power amplifier to obtain a second ratio corresponding to the power amplifier.

S003b, the processing module 320 stores a second ratio corresponding to one power amplifier in the ratio correspondence table.

Specifically, in the case where the structure of the electronic device 10 is as shown in fig. 8 or 13, the processing module 320 may control the first voltage converter 412 to operate to output the APT1 signal to the PA1, the second voltage converter 414 to be not operated, and the processing module 320 not to output the compensation signal to the speaker 50. At this time, the processing module 320 acquires the amplitude of the APT1 signal input to PA1 and the amplitude of the interference signal generated in the speaker 50. The amplitude of the APT1 signal input to PA1 and the amplitude of the interference signal generated in speaker 50 may be manually detected and input to processing module 320. Then, the processing module 320 divides the amplitude of the interference signal by the amplitude of the APT1 signal input to PA1, so as to obtain a second ratio corresponding to PA 1. At this time, the processing module 320 may store the second ratio corresponding to PA1 in the ratio correspondence table.

And (3) executing the steps on the PA1, the PA2 and the PA3, and sequentially storing the second ratio corresponding to the PA1, the second ratio corresponding to the PA2 and the second ratio corresponding to the PA3 into a ratio corresponding table.

In the case where the structure of the electronic device 10 is as shown in fig. 14 or 16, the processing module 320 may control the first voltage converter 412 to operate to output the APT1 signal to the PA1, the second voltage converter 414 to be not operated, and the processing module 320 not to output the compensation signal to the speaker 50. At this time, the processing module 320 detects the APT1 signal input to the PA1 through the sampling module 310, and obtains the amplitude of the APT1 signal. At the same time, the processing module 320 also obtains the amplitude of the interference signal generated in the speaker 50. The amplitude of the interfering signal may be manually detected and input to the processing module 320. Then, the processing module 320 divides the amplitude of the interference signal by the amplitude of the APT1 signal input to PA1, so as to obtain a second ratio corresponding to PA 1. At this time, the processing module 320 may store the second ratio corresponding to PA1 in the ratio correspondence table.

It will be appreciated that in the above description of steps S001b to S003b, the target circuit 40 includes a plurality of voltage converters and a plurality of PAs as an example. In other embodiments, when the target circuit 40 includes only one voltage converter and one PA, the process of the processing module 320 storing the second ratio in advance may also be steps S001b to S003b. In other embodiments, a plurality or a second ratio may also be manually input directly to the processing module 320 and stored by the processing module 320.

The speaker driving circuit 30 provided by the embodiment of the application has at least the following beneficial effects:

in an embodiment of the present application, when the target circuit 40 is operated, a first magnetic field that interferes with the operation of the speaker 50 can be generated at the location where the speaker 50 is located. While the speaker driving circuit 30 is operated, the processing module 320 may detect the electrical signal in the target circuit 40 through the sampling module 310, and the processing module 320 may generate a compensation signal according to the electrical signal in the target circuit 40 and output the compensation signal to the speaker 50. The compensation signal generates a second magnetic field at the location of the speaker 50 that is the same strength and opposite to the first magnetic field. In this way, the second magnetic field and the first magnetic field cancel each other, that is, the compensation signal and the interference signal cancel each other, as shown in fig. 18, so that no interference signal is generated in the speaker 50, and thus the speaker 50 operates normally under the effect of the audio signal. Meanwhile, the speaker driving circuit 30 does not need to have a resistor connected in series to the circuit where the speaker 50 is located, and thus the loudness of the audio played by the speaker 50 is not reduced. The speaker driving circuit 30 does not need to additionally provide a compensation line, which is advantageous in saving space, thereby facilitating improvement of the integration level of the electronic device 10.

The embodiment of the present application also provides an electronic device 10 comprising a target circuit 40, a speaker 50 and a speaker driving circuit 30 as in any of the embodiments described above.

Fig. 19 is a schematic structural diagram of still another electronic device 10 according to an embodiment of the present application. As shown in fig. 19, in some particular embodiments, the processing module 320 may be an SOC in the electronic device 10 and the analog-to-digital converter 312 may be a codec in the electronic device 10. The codec has inputs MIC1_ P, MIC2_ P, MIC3 _3_P and MIC4_P. Wherein, input MIC1_P is connected with microphone MIC1, MIC2_P is connected with microphone MIC2, MIC3_P is connected with microphone MIC3. The MIC4_ P detects the electrical signal in the target circuit 40 through the capacitor C. That is, in this embodiment, the codec for connection with the microphone can be multiplexed as the analog-to-digital converter 312, and the input terminal of the codec that is free can be used as the input terminal of the analog-to-digital converter 312, so that the number of devices in the electronic apparatus 10 can be reduced, which is advantageous for improving the integration level of the electronic apparatus 10.

It will be appreciated that in the embodiment shown in fig. 19, only an embodiment is shown in which the input terminal MIC4_p of the codec detects the first electrical signal VPH in the target circuit 40 through the capacitor C. In other embodiments, not shown, the input end MIC4_p of the codec may also detect the second embodiment of the target circuit 40 through the capacitor C, which is not described herein.

The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims

1. A loudspeaker driving circuit, which is used for being connected with a target circuit and a loudspeaker, wherein the target circuit generates a first magnetic field at the position of the loudspeaker when in operation; the speaker driving circuit is characterized by comprising: the sampling module and the processing module;

the first end of the sampling module is used for being connected with the target circuit, the second end of the sampling module is connected with the input end of the processing module, and the output end of the processing module is used for being connected with the loudspeaker;

the processing module is used for: outputting an audio signal to the speaker to drive the speaker to operate; and detecting, by the sampling module, an electrical signal in the target circuit; generating a compensation signal according to the electrical signal in the target circuit; and outputting the compensation signal to the loudspeaker, wherein the second magnetic field generated by the compensation signal at the position of the loudspeaker is the same as the first magnetic field in intensity and opposite in direction.

2. The loudspeaker drive circuit according to claim 1 wherein the electrical signal in the target circuit comprises a first electrical signal and a second electrical signal, the second electrical signal being voltage converted from the first electrical signal, the second electrical signal being capable of producing the first magnetic field at the location of the loudspeaker;

the processing module is used for: detecting the first electrical signal by the sampling module; obtaining a first ratio and a second ratio, wherein the first ratio is the ratio of the amplitude of the first electric signal to the amplitude of the second electric signal, the second ratio is the ratio of the amplitude of an interference signal to the amplitude of the second electric signal, and the interference signal is generated by the loudspeaker under the action of the first magnetic field; dividing the amplitude of the first electric signal by the first ratio and multiplying the first electric signal by the second ratio to obtain a target amplitude; and generating the compensation signal with the same amplitude as the target amplitude and the same frequency as the first electric signal.

3. The speaker driving circuit as recited in claim 1, wherein the electrical signal in the target circuit comprises a first electrical signal and n second electrical signals, n being an integer greater than or equal to 2, each of the n second electrical signals being voltage-converted from the first electrical signal, the n second electrical signals being capable of generating the first magnetic field at a location where the speaker is located;

The processing module is used for: detecting the first electrical signal by the sampling module; obtaining n first ratios and n second ratios, wherein the ith first ratio in the n first ratios is the ratio of the amplitude of the first electric signal to the amplitude of the ith second electric signal in the n second electric signals, the ith second ratio in the n second ratios is the ratio of the amplitude of an interference signal to the amplitude of the ith second electric signal in the n second electric signals, i is an integer greater than or equal to 1 and less than or equal to n, and the interference signal is generated by the loudspeaker under the action of the first magnetic field; dividing the amplitude of the first electric signal by a first value, and multiplying the first value by a second value to obtain a target amplitude, wherein the first value is the sum of the n first ratios, and the second value is the sum of the n second ratios; and generating the compensation signal with the same amplitude as the target amplitude and the same frequency as the first electric signal.

4. A loudspeaker drive circuit according to claim 2 or 3 wherein the target circuit comprises a plurality of voltage converters and a plurality of power amplifiers; the first end of the sampling module is connected with the input end of each of the plurality of voltage converters, the input end of each of the plurality of voltage converters is used for inputting the first electric signal, and the output end of each of the plurality of voltage converters is connected with at least one of the plurality of power amplifiers so as to output the second electric signal to the at least one power amplifier;

The processing module is used for: and acquiring the first ratio and the second ratio corresponding to each power amplifier in the working state in the plurality of power amplifiers from a stored ratio corresponding table.

5. The speaker drive circuit as recited in claim 4, wherein the sampling module comprises a capacitor and an analog-to-digital converter;

the first polar plate of the capacitor is connected with the input end of each of the plurality of voltage converters, the second polar plate of the capacitor is connected with the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected with the input end of the processing module.

6. The loudspeaker drive circuit according to claim 1 wherein the electrical signal in the target circuit comprises a first electrical signal and a second electrical signal, the second electrical signal being voltage converted from the first electrical signal, the second electrical signal being capable of producing the first magnetic field at the location of the loudspeaker;

the processing module is used for: detecting the second electrical signal by the sampling module; obtaining a second ratio, wherein the second ratio is the ratio of the amplitude of an interference signal to the amplitude of the second electric signal, and the interference signal is generated by the loudspeaker under the action of the first magnetic field; multiplying the amplitude of the second electric signal by the second ratio to obtain a target amplitude; generating a compensation signal having the same amplitude as the target amplitude and the same frequency as the second electrical signal.

7. The speaker driving circuit as recited in claim 1, wherein the electrical signal in the target circuit comprises a first electrical signal and n second electrical signals, n being an integer greater than or equal to 2, each of the n second electrical signals being voltage-converted from the first electrical signal, the n second electrical signals being capable of generating the first magnetic field at a location where the speaker is located;

the processing module is used for: detecting the n second electrical signals by the sampling module; obtaining n second ratios, wherein the ith second ratio in the n second ratios is the ratio of the amplitude of an interference signal to the amplitude of the ith second electric signal in the n second electric signals, i is an integer which is greater than or equal to 1 and less than or equal to n, and the interference signal is generated by the loudspeaker under the action of the first magnetic field; multiplying the amplitude of the ith second electric signal in the n second electric signals by the ith second ratio in the n second ratios to obtain n amplitude components; adding the n amplitude components to obtain a target amplitude; superposing the frequencies of the n second electric signals to obtain a target frequency; and generating the compensation signal with the same amplitude as the target amplitude and the same frequency as the target frequency.

8. The speaker drive circuit as recited in claim 6 or 7, wherein the target circuit comprises a plurality of voltage converters and a plurality of power amplifiers; the first end of the sampling module is connected with the input end of each power amplifier in the plurality of power amplifiers, the input end of each voltage converter in the plurality of voltage converters is used for inputting the first electric signal, and the output end of each voltage converter in the plurality of voltage converters is connected with at least one power amplifier in the plurality of power amplifiers so as to output the second electric signal to the at least one power amplifier;

the processing module is used for: and acquiring the second ratio corresponding to each power amplifier in the working state in the plurality of power amplifiers from a stored ratio corresponding table.

9. The speaker drive circuit as recited in claim 8, wherein the sampling module comprises a plurality of capacitors, a plurality of switching tubes, an analog-to-digital converter; the input end of the analog-to-digital converter comprises a plurality of sub-ports; the capacitors, the switching tubes, the sub-ports of the analog-to-digital converter and the power amplifiers are in one-to-one correspondence;

The first polar plate of each capacitor of the plurality of capacitors is connected with the input end of the corresponding power amplifier, the second polar plate of each capacitor of the plurality of capacitors is connected with the first end of the corresponding switching tube, the second end of each switching tube of the plurality of switching tubes is connected with the corresponding sub-port of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected with the input end of the processing module;

the processing module is further configured to: and when any one of the power amplifiers works, controlling the switching tube corresponding to the power amplifier to be conducted.

10. The speaker drive circuit as recited in claim 4 or 5, wherein the processing module is further to: acquiring the amplitude of the first electric signal and the amplitude of the second electric signal input into the power amplifier under the condition that any one of the power amplifiers works; dividing the amplitude of the first electric signal by the amplitude of the second electric signal input into the power amplifier to obtain the first ratio corresponding to the power amplifier; and storing the first ratio corresponding to the power amplifier into the ratio corresponding table.

11. The speaker driver circuit as recited in any of claims 4, 5, 8, 9, 10, wherein the processing module is further configured to: when any one of the plurality of power amplifiers works and the processing module does not output the compensation signal, acquiring the amplitude of the second electric signal input into the one power amplifier and acquiring the amplitude of the interference signal; dividing the amplitude of the interference signal by the amplitude of the second electric signal input into the power amplifier to obtain the second ratio corresponding to the power amplifier; and storing the second ratio corresponding to the power amplifier into the ratio corresponding table.

12. An electronic device comprising a target circuit, a speaker, and a speaker driving circuit according to any one of claims 1 to 11.

13. The electronic device of claim 12, wherein the target circuit comprises a plurality of voltage converters and a plurality of power amplifiers; the input end of each of the plurality of voltage converters is used for inputting a first electric signal, and the output end of each of the plurality of voltage converters is connected with at least one power amplifier of the plurality of power amplifiers so as to output a second electric signal to the at least one power amplifier.

14. The electronic device of claim 12 or 13, wherein the sampling module comprises a capacitor and an analog-to-digital converter, a first plate of the capacitor being for connection to a target circuit, a second plate of the capacitor being connected to an input of the analog-to-digital converter, an output of the analog-to-digital converter being connected to an input of the processing module.

15. The electronic device of claim 14, wherein the analog-to-digital converter is a codec; the second polar plate of the capacitor is connected with one input end of the coder-decoder;

the electronic device further comprises a microphone, which is connected to the other input of the codec.