CN117133339B - Method for establishing voltage of chip, method and device for executing command, chip and equipment - Google Patents

Method for establishing voltage of chip, method and device for executing command, chip and equipment Download PDF

Info

Publication number
CN117133339B
CN117133339B CN202311352776.5A CN202311352776A CN117133339B CN 117133339 B CN117133339 B CN 117133339B CN 202311352776 A CN202311352776 A CN 202311352776A CN 117133339 B CN117133339 B CN 117133339B
Authority
CN
China
Prior art keywords
next stage
operation command
command
charge pump
voltage required
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202311352776.5A
Other languages
Chinese (zh)
Other versions
CN117133339A (en
Inventor
李文菊
黎永健
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Xincuntianxia Electronic Technology Co ltd
Original Assignee
Shanghai Xincuntianxia Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Xincuntianxia Electronic Technology Co ltd filed Critical Shanghai Xincuntianxia Electronic Technology Co ltd
Priority to CN202311352776.5A priority Critical patent/CN117133339B/en
Publication of CN117133339A publication Critical patent/CN117133339A/en
Application granted granted Critical
Publication of CN117133339B publication Critical patent/CN117133339B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure

Abstract

The invention relates to the technical field of memory chips, and particularly discloses a voltage establishment method, a command execution method, a device, a chip and equipment of a chip, wherein the voltage establishment method of the chip comprises the following steps: when executing the current operation command, acquiring the operation command type of the next stage; calling the operation voltage required by the idle charge pump configuration for executing the operation command of the next stage according to the operation command type of the next stage; according to the voltage establishing method, the type of the operation command to be executed in the next stage is determined during the execution of the current operation command, and the idle charge pump is called to configure the related operation voltage by taking the type of the operation command as a reference, so that the configuration of the operation voltage of the operation command in the next stage can be finished in advance by the nor flash, the waiting time required for establishing the operation voltage in the nor flash operation time sequence is reduced, and the operation efficiency of the nor flash is effectively improved.

Description

Method for establishing voltage of chip, method and device for executing command, chip and equipment
Technical Field
The present invention relates to the field of memory chips, and in particular, to a method for establishing a voltage of a chip, a method, a device, a chip and equipment for executing a command.
Background
In the running process of the existing memory chip, various bottom-layer operation commands are required to be executed to complete operation algorithms with different requirements, for example, for an erasure algorithm of a nor flash, a plurality of erasure and verification stages related to different operation voltages are required to be passed in the execution process of the algorithm, and switching of various operation voltages is involved.
The existing nor flash generally executes corresponding operation commands by continuously charging and discharging the single-channel charge pump configured in the nor flash to sequentially establish operation voltages required by different operation commands, and the process comprises a large amount of waiting time required by establishing the operation voltages besides the time required by executing the operation commands, and the waiting time severely restricts the improvement of the operating efficiency of the nor flash.
In view of the above problems, no effective technical solution is currently available.
Disclosure of Invention
The purpose of the application is to provide a voltage establishment method, a command execution method, a device, a chip and equipment for a chip, so that the operating efficiency of a nor flash is improved.
In a first aspect, the present application provides a voltage establishing method of a chip, configured to configure a voltage required for a nor flash to perform an operation, where the nor flash has at least two charge pumps, the voltage establishing method includes the following steps:
when executing the current operation command, acquiring the operation command type of the next stage;
and calling the operation voltage required by the idle charge pump configuration to execute the operation command of the next stage according to the operation command type of the next stage.
According to the voltage establishing method of the chip, the type of the operation command to be executed in the next stage is determined during the execution of the current operation command, and the idle charge pump is called to configure the related operation voltage based on the type of the operation command, so that the configuration of the operation voltage of the operation command in the next stage can be finished in advance by the nor flash, the waiting time required for establishing the operation voltage in the operation time sequence of the nor flash is reduced, and the operation efficiency of the nor flash is effectively improved.
The method for establishing the voltage of the chip, wherein the step of calling the operation voltage required by the idle charge pump configuration to execute the next-stage operation command according to the next-stage operation command type comprises the following steps:
acquiring configuration information according to the operation command type of the next stage;
and calling an idle charge pump to configure the operation voltage required by executing the operation command of the next stage according to the configuration information.
In this example, the corresponding configuration information acquired based on the operation command type characterizes the relevant parameters of the operation voltage, so that the relevant operation voltage can be configured pertinently according to the configuration information.
The method for establishing the voltage of the chip, wherein the step of configuring the operation voltage required by executing the operation command of the next stage comprises the following steps:
if the idle charge pump is configured with the operation voltage required by the operation command of the next stage, controlling the charge pump to keep voltage output;
and if the idle charge pump is not configured with the operation voltage required by the operation command of the next stage, controlling an idle charge pump to establish the operation voltage required by the operation command of the next stage.
In this example, the idle charge pump is originally configured with the operation voltage configured in the previous stage, which determines the configuration mode by judging whether the operation voltage required by the operation command in the next stage is consistent with the operation voltage, and when the operation voltage is consistent, the voltage output can be kept to skip the reestablishing process of the operation voltage, and for the case that the establishment time of the operation voltage required by the operation command in the next stage is longer than the execution time of the current operation instruction, the waiting time consumed for the establishment of the operation voltage in the operating process of the nor flash can be further reduced, so that the operating efficiency of the nor flash is further improved.
The method for establishing the voltage of the chip, wherein the step of controlling an idle charge pump to establish the operation voltage required for executing the operation command of the next stage comprises the following steps:
obtaining the residual operation time information and the establishment time information of the current operation command, wherein the establishment time information is the duration of the operation voltage required by the execution of the operation command of the next stage;
and if the residual operation time information is larger than the establishment time information, controlling an idle charge pump to start establishing the operation voltage required by executing the operation command of the next stage when the residual operation time information is equal to the establishment time information.
The voltage establishing method of the chip is characterized in that the charge pump is connected based on a multiplexer.
In the method for establishing the voltage of the chip, two charge pumps are arranged.
In a second aspect, the present application further provides a command execution method of a chip, which is applied to a nor flash, where the nor flash has at least two charge pumps, and the command execution method includes the following steps:
when executing the current operation command, acquiring the operation command type of the next stage;
calling the operation voltage required by the idle charge pump configuration to execute the operation command of the next stage according to the operation command type of the next stage;
after the execution of the current operation command is finished and the configuration of the operation voltage required by the execution of the next stage operation command is finished, the charge pump is switched to perform voltage input so as to provide the operation voltage required by the execution of the next stage operation command to execute the next stage operation command.
According to the command execution method of the chip, the type of the operation command to be executed in the next stage is determined during the execution of the current operation command, and the idle charge pump is called to configure the related operation voltage based on the type of the operation command, so that the configuration of the operation voltage of the operation command in the next stage can be finished in advance by the nor flash, the waiting time required for establishing the operation voltage in the operation time sequence of the nor flash is reduced, and the operation efficiency of the nor flash for executing the continuous command is effectively improved.
In a third aspect, the present application further provides a voltage setting device for a chip, configured to configure a voltage required for a nor flash to perform an operation, where the nor flash has at least two charge pumps, the voltage setting device includes the following steps:
the acquisition module is used for acquiring the type of the operation command of the next stage when executing the current operation command;
and the configuration module is used for calling the operation voltage required by the idle charge pump configuration for executing the operation command of the next stage according to the operation command type of the next stage.
According to the voltage establishing device of the chip, the type of the operation command to be executed in the next stage is determined during the execution of the current operation command, and the idle charge pump is called to configure the related operation voltage by taking the type of the operation command as a reference, so that the configuration of the operation voltage of the operation command in the next stage can be finished in advance by the nor flash, the waiting time required for establishing the operation voltage in the nor flash operation time sequence is shortened, and the operation efficiency of the nor flash is effectively improved.
In a fourth aspect, the present application also provides a memory chip including a control circuit and a memory array, the memory chip running the voltage establishing method of the chip as provided in the first aspect or the command executing method of the chip as provided in the second aspect based on the control circuit.
In a fifth aspect, the present application also provides an electronic device comprising a memory chip as provided in the fourth aspect.
As can be seen from the foregoing, the present application provides a method for establishing a voltage of a chip, a method for executing a command, a device, a chip and a device for executing a command, where the method for establishing a voltage of a chip determines a type of an operation command to be executed in a next stage during execution of a current operation command, and uses the type of the operation command to invoke an idle charge pump to configure a related operation voltage, so that a nor flash can complete configuration of an operation voltage of the operation command in the next stage in advance, thereby reducing a waiting time required for establishing the operation voltage in a nor flash operation time sequence, and effectively improving operation efficiency of the nor flash.
Drawings
Fig. 1 is a flowchart of a method for establishing a voltage of a chip according to an embodiment of the present application.
FIG. 2 is a timing diagram of a program verify operation using a voltage set-up method for a chip according to an embodiment of the present application.
Fig. 3 is a flowchart of a method for executing commands of a chip according to an embodiment of the present application.
Fig. 4 is a schematic structural diagram of a voltage-building device of a chip according to an embodiment of the present application.
Reference numerals: 301. an acquisition module; 302. and (5) configuring a module.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to be within the scope of the present application.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
In a first aspect, referring to fig. 1, some embodiments of the present application provide a method for establishing a voltage of a chip, where the voltage is required for configuring a nor flash having at least two charge pumps, the method includes the following steps:
a1, acquiring the type of an operation command in the next stage when executing the current operation command;
a2, calling the operation voltage required by the idle charge pump configuration to execute the operation command of the next stage according to the operation command type of the next stage.
Specifically, in this embodiment of the present application, the current operation command is an operation command that is being executed by the nor flash, the next-stage operation command is an operation command that needs to be executed by the nor flash after the current operation command ends, different types of operation commands generally need to be configured with different operation voltages to execute, and both the current operation command and the next-stage operation command are bottom-stage operation commands in the nor flash, that is, bottom-stage commands that are independently completed based on the charge pump configuration related operation voltages set in the nor flash, for example, pre_program verify (ready to Program verify) in Program Strong (erase disturb repair command), PSrd0 (data 0 read), PSrd1 (data 1 read), ps_program repair), and other bottom-stage commands that are used as upper-stage commands, where each bottom-stage command needs to be independently configured with different operation voltages, for example, PSrd0 needs to be configured with corresponding operation voltages of data 0 read to determine whether threshold voltages of different memory cells are above the operation voltages to determine whether the memory data of the memory cells are data 0.
More specifically, in the embodiment of the present application, the nor flash has at least two charge pumps, which can perform voltage configuration (establishment, maintenance and output of operation voltages) independently and mutually non-interfering, and the nor flash only performs one type of operation command on the memory cell at the same time, that is, only one charge pump is used to provide the operation voltage, and the charge pump not used as the charge pump providing the operation voltage is regarded as an idle charge pump.
More specifically, the operation voltage required for executing the next-stage operation command in step A2 may be configured to start when the current operation command is executed, or may be configured to start when any stage of the current operation command is executed, so that the configuration of the operation voltage required for executing the next-stage operation command is started in advance in the process of executing the current operation command, so as to reduce the waiting time consumed for establishing the operation voltage in the process of operating the nor flash, thereby effectively improving the operating efficiency of the nor flash.
More specifically, for the complete upper-layer operation command, the operation voltage required by the first bottom-layer command cannot be established in advance, so the voltage establishment method of the chip in the embodiment of the application is mainly based on saving the waiting time required for establishing the operation voltage required by the whole of the plurality of bottom-layer commands continuously executed to improve the operation efficiency of the chip.
It should be noted that, in the embodiment of the present application, when the nor flash needs to execute the operation command of the next stage, the charge pump configured with the relevant operation voltage is selected as the operation voltage supply terminal through switching to execute the operation command.
According to the voltage establishing method of the chip, the type of the operation command to be executed in the next stage is determined during the execution of the current operation command, and the idle charge pump is called to configure the related operation voltage based on the type of the operation command to be executed in the next stage, so that the configuration of the operation voltage of the operation command in the next stage can be completed in advance by the nor flash, the waiting time required for establishing the operation voltage in the operation time sequence of the nor flash is reduced, and the operation efficiency of the nor flash is effectively improved.
In some preferred embodiments, the step of invoking the operating voltage required for the idle charge pump configuration to execute the next stage of operating command according to the next stage of operating command type comprises:
a21, acquiring configuration information according to the type of the operation command of the next stage;
a22, calling the operation voltage required by the idle charge pump configuration to execute the operation command of the next stage according to the configuration information.
Specifically, the magnitude of the operation voltage required by different operation commands of the nor flash is generally determined by configuration information obtained when the nor flash is powered on, so that corresponding configuration information obtained based on the type of the operation command characterizes related parameters of the operation voltage, and related operation voltages can be configured pertinently according to the configuration information.
After the current operation command is finished, the nor flash switching charge pump provides an operation voltage to complete a new stage operation command, the charge pump originally used for completing the current operation command is converted into an idle charge pump, the established operation voltage of the charge pump can be selectively released or maintained or changed, in the embodiment of the application, the established operation voltage of the charge pump preferably determines a configuration mode according to the type of a next stage operation command (i.e. a new next stage operation command) of the new stage operation command (i.e. a new current operation command), and the configuration mode can be to maintain voltage output or establish a new operation voltage; thus, in some preferred embodiments, the step of configuring the operating voltage required to execute the next stage of operating command comprises:
if the idle charge pump is configured with the operation voltage required by executing the operation command of the next stage, controlling the charge pump to keep outputting the voltage;
if there is no idle charge pump configured with the operation voltage required for executing the next stage operation command, controlling an idle charge pump to establish the operation voltage required for executing the next stage operation command.
Specifically, in this embodiment, the idle charge pump is originally configured with the operation voltage configured in the previous stage, which determines the configuration mode by determining whether the operation voltage required by the operation command in the next stage is consistent with the operation voltage, and when the operation voltage is consistent, the voltage output is maintained to skip the reestablishing process of the operation voltage, and for the case that the establishment duration of the operation voltage required by the operation command in the next stage is longer than the execution duration of the current operation command, the waiting time consumed for establishing the operation voltage in the operating process of the nor flash can be further reduced, so as to further improve the operating efficiency of the nor flash.
More specifically, as shown in fig. 2, in the Program Strong operation, it is required to alternately execute PSrd0 and PSrd1 operation commands, and during the execution, the two charge pumps maintain the output of the operation voltages required for executing PSrd0 and PSrd1, so that efficient alternate execution of PSrd0 and PSrd1 operation commands is realized through continuous charge pump input.
In some other embodiments, to avoid the problem of the charge pump maintaining output and increasing nor flash power consumption, the charge pump is switched to an idle charge pump release operating voltage, and the operating voltage required to execute the next stage of operating command is established.
In some preferred embodiments, the step of controlling an idle charge pump to establish the operating voltage required to execute the next stage of operating command comprises:
acquiring the residual operation time information and the establishment time information of the current operation command, wherein the establishment time information is the duration of the operation voltage required by the execution of the next-stage operation command;
if the remaining operation time information is greater than the setup time information, controlling an idle charge pump to start to establish the operation voltage required by executing the next stage operation command when the remaining operation time information is equal to the setup time information.
Specifically, the remaining operation time information is a remaining time required for completing the current operation command, and the voltage establishment method of the chip in the embodiment of the present application determines a start establishment timing of the operation voltage required for executing the next stage operation command by comparing the remaining operation time information with the magnitude of the establishment time information, so that when the overall time required for completing the current operation command is longer than the time required for establishing the operation voltage required for executing the next stage operation command, the establishment of the operation voltage is started at a proper timing, so as to reduce power consumption generated by maintaining output due to early completion of the establishment of the operation voltage, and enable the nor flash to directly switch the charge pump to execute the operation command of the next stage when completing the current operation command.
It should be noted that, if the remaining operation time information is less than or equal to the setup time information, the voltage setup method of the chip in the embodiment of the present application directly controls an idle charge pump to start to set up the operation voltage required for executing the operation command of the next stage.
In some other embodiments, if the remaining operation time information is greater than the setup time information, the voltage setup method of the chip of the embodiment of the present application may obtain delay start information according to the remaining operation time information and the setup time information, and control an idle charge pump to start to set up an operation voltage required for executing the operation command of the next stage according to the delay start information; in the embodiment, the idle charge pump is controlled to start to establish the operation voltage by setting the delay, and the magnitude relation between the residual operation time information and the establishment time information is not required to be continuously analyzed in real time.
In some preferred embodiments, the charge pump is based on a multiplexer connection.
Specifically, the multiplexer is a circuit device with a single output end and multiple input ends, and the output ends of each charge pump are respectively connected with one input end of the multiplexer, so that the nor flash can select the input source of the multiplexer according to the requirements to realize the switching function of the charge pump, and the multiplexer has the characteristics of simple structure and rapid switching response.
In some preferred embodiments, the charge pumps are two.
Specifically, based on the foregoing, it is known that the nor flash only executes one type of operation command on the memory cell at the same time, so that the two charge pumps can be switched to each other to meet the configuration requirements of the operation voltages of different operation commands.
In a second aspect, referring to fig. 3, some embodiments of the present application further provide a method for executing a command of a chip, which is applied to a nor flash for executing a continuous command, where the nor flash has at least two charge pumps, and the method for executing a command includes the following steps:
b1, acquiring the type of the operation command of the next stage when executing the current operation command;
b2, calling the operation voltage required by the idle charge pump configuration to execute the operation command of the next stage according to the operation command type of the next stage;
and B3, after the execution of the current operation command is finished and the operation voltage configuration required by the execution of the next stage operation command is finished, switching the charge pump to perform voltage input so as to provide the operation voltage required by the execution of the next stage operation command to execute the next stage operation command.
Specifically, the configuration duration of the operation voltage required for executing the next-stage operation command may be longer than the duration required for completing the current operation command, in this case, after completing the current operation command, the command execution method of the chip in the embodiment of the present application needs to wait until the operation voltage required for the next-stage operation command is configured, and then begin executing the next-stage operation command again; if the operation voltage required for executing the next stage operation command is already established in advance when the current operation command is completed, the command execution method of the chip in the embodiment of the application can directly start executing the next stage operation command.
According to the command execution method of the chip, the type of the operation command to be executed in the next stage is determined during the execution of the current operation command, and the idle charge pump is called to configure the related operation voltage based on the type of the operation command, so that the configuration of the operation voltage of the operation command in the next stage can be finished in advance by the nor flash, the waiting time required for establishing the operation voltage in the operation time sequence of the nor flash is reduced, and the operation efficiency of the nor flash for executing the continuous command is effectively improved.
More specifically, for a nor flash with only a single charge pump, after the nor flash executes some specific operation commands (such as ERASE), the charge pump still needs to Discharge (Discharge) and then reestablishes the operation voltage required for executing the next stage operation command.
In a third aspect, referring to fig. 4, some embodiments of the present application further provide a voltage establishment device of a chip, which is applied in a nor flash, for configuring a voltage required by the nor flash to perform an operation, where the nor flash has at least two charge pumps, and the voltage establishment device includes the following steps:
an obtaining module 301, configured to obtain a next stage operation command type when executing a current operation command;
a configuration module 302, configured to invoke an operation voltage required by the idle charge pump configuration to execute the next stage operation command according to the next stage operation command type.
According to the voltage establishing device of the chip, the type of the operation command to be executed in the next stage is determined during the execution of the current operation command, and the idle charge pump is called to configure the related operation voltage by taking the type of the operation command as a reference, so that the configuration of the operation voltage of the operation command in the next stage can be completed in advance by the nor flash, the waiting time required for establishing the operation voltage in the operation time sequence of the nor flash is reduced, and the operation efficiency of the nor flash is effectively improved.
In some preferred embodiments, the voltage establishing device of the chip of the embodiments of the present application is configured to perform the voltage establishing method of the chip provided in the first aspect.
In a fourth aspect, the present application also provides a memory chip including a control circuit and a memory array, the memory chip operating the voltage establishing method of the chip as provided in the first aspect or the command executing method of the chip as provided in the second aspect based on the control circuit.
In a fifth aspect, the present application also provides an electronic device comprising a memory chip as provided in the fourth aspect.
In summary, the embodiments of the present application provide a method, a device, a chip, and an apparatus for establishing a voltage of a chip, where the method for establishing a voltage of a chip determines a type of an operation command to be executed in a next stage during execution of a current operation command, and uses the type of the operation command as a reference to invoke an idle charge pump to configure a related operation voltage, so that a nor flash can complete configuration of an operation voltage of an operation command in the next stage in advance, thereby reducing a waiting time required for establishing the operation voltage in a nor flash operation time sequence, and effectively improving an operation efficiency of the nor flash.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
Further, the units described as separate units may or may not be physically separate, and units displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Furthermore, functional modules in various embodiments of the present application may be integrated together to form a single portion, or each module may exist alone, or two or more modules may be integrated to form a single portion.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The foregoing is merely exemplary embodiments of the present application and is not intended to limit the scope of the present application, and various modifications and variations may be suggested to one skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims (8)

1. A voltage establishment method for a chip for configuring a voltage required for a nor flash to perform an operation, the nor flash having at least two charge pumps, the voltage establishment method comprising the steps of:
when executing the current operation command, acquiring the operation command type of the next stage;
calling the operation voltage required by the idle charge pump configuration to execute the operation command of the next stage according to the operation command type of the next stage;
the step of configuring the operating voltage required for executing the next stage of operating command includes:
if the idle charge pump is configured with the operation voltage required by the operation command of the next stage, controlling the charge pump to keep voltage output;
if the idle charge pump is not configured with the operation voltage required by the operation command of the next stage, controlling an idle charge pump to establish the operation voltage required by the operation command of the next stage;
the step of controlling an idle charge pump to establish the operating voltage required to execute the next stage of operating command includes:
obtaining the residual operation time information and the establishment time information of the current operation command, wherein the establishment time information is the duration of the operation voltage required by the execution of the operation command of the next stage;
and if the residual operation time information is larger than the establishment time information, controlling an idle charge pump to start establishing the operation voltage required by executing the operation command of the next stage when the residual operation time information is equal to the establishment time information.
2. The method according to claim 1, wherein the step of calling an operation voltage required for an idle charge pump configuration to execute a next-stage operation command according to the next-stage operation command type comprises:
acquiring configuration information according to the operation command type of the next stage;
and calling an idle charge pump to configure the operation voltage required by executing the operation command of the next stage according to the configuration information.
3. The method of claim 1, wherein the charge pump is based on a multiplexer connection.
4. The method of claim 1, wherein the charge pumps are two.
5. The command execution method of the chip is applied to the nor flash, and is characterized in that the nor flash is provided with at least two charge pumps, and the command execution method comprises the following steps:
when executing the current operation command, acquiring the operation command type of the next stage;
calling the operation voltage required by the idle charge pump configuration to execute the operation command of the next stage according to the operation command type of the next stage;
after the execution of the current operation command is finished and the configuration of the operation voltage required by the execution of the next-stage operation command is finished, switching the charge pump to input the voltage so as to provide the operation voltage required by the execution of the next-stage operation command to execute the next-stage operation command;
the step of configuring the operating voltage required for executing the next stage of operating command includes:
if the idle charge pump is configured with the operation voltage required by the operation command of the next stage, controlling the charge pump to keep voltage output;
if the idle charge pump is not configured with the operation voltage required by the operation command of the next stage, controlling an idle charge pump to establish the operation voltage required by the operation command of the next stage;
the step of controlling an idle charge pump to establish the operating voltage required to execute the next stage of operating command includes:
obtaining the residual operation time information and the establishment time information of the current operation command, wherein the establishment time information is the duration of the operation voltage required by the execution of the operation command of the next stage;
and if the residual operation time information is larger than the establishment time information, controlling an idle charge pump to start establishing the operation voltage required by executing the operation command of the next stage when the residual operation time information is equal to the establishment time information.
6. A voltage establishing device of a chip for configuring a voltage required for a nor flash to perform an operation, the nor flash having at least two charge pumps, the voltage establishing device comprising the steps of:
the acquisition module is used for acquiring the type of the operation command of the next stage when executing the current operation command;
the configuration module is used for calling the operation voltage required by the idle charge pump configuration for executing the operation command of the next stage according to the operation command type of the next stage;
the step of configuring the operating voltage required for executing the next stage of operating command includes:
if the idle charge pump is configured with the operation voltage required by the operation command of the next stage, controlling the charge pump to keep voltage output;
if the idle charge pump is not configured with the operation voltage required by the operation command of the next stage, controlling an idle charge pump to establish the operation voltage required by the operation command of the next stage;
the step of controlling an idle charge pump to establish the operating voltage required to execute the next stage of operating command includes:
obtaining the residual operation time information and the establishment time information of the current operation command, wherein the establishment time information is the duration of the operation voltage required by the execution of the operation command of the next stage;
and if the residual operation time information is larger than the establishment time information, controlling an idle charge pump to start establishing the operation voltage required by executing the operation command of the next stage when the residual operation time information is equal to the establishment time information.
7. A memory chip comprising a control circuit and a memory array, the memory chip operating the voltage establishing method of the chip according to any one of claims 1 to 4 or the command executing method of the chip according to claim 5 based on the control circuit.
8. An electronic device comprising the memory chip of claim 7.
CN202311352776.5A 2023-10-19 2023-10-19 Method for establishing voltage of chip, method and device for executing command, chip and equipment Active CN117133339B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311352776.5A CN117133339B (en) 2023-10-19 2023-10-19 Method for establishing voltage of chip, method and device for executing command, chip and equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311352776.5A CN117133339B (en) 2023-10-19 2023-10-19 Method for establishing voltage of chip, method and device for executing command, chip and equipment

Publications (2)

Publication Number Publication Date
CN117133339A CN117133339A (en) 2023-11-28
CN117133339B true CN117133339B (en) 2024-02-20

Family

ID=88856678

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311352776.5A Active CN117133339B (en) 2023-10-19 2023-10-19 Method for establishing voltage of chip, method and device for executing command, chip and equipment

Country Status (1)

Country Link
CN (1) CN117133339B (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101159168A (en) * 2006-10-02 2008-04-09 三星电子株式会社 Semiconductor memory devices having control circuitry to avoid recovering a charge pump when executing consecutive sections of a continuous operation command and methods of operating the same
CN102834827A (en) * 2010-03-23 2012-12-19 高通股份有限公司 Method and apparatus to provide clock signal to charge pump
CN111402943A (en) * 2020-06-02 2020-07-10 深圳市芯天下技术有限公司 Method, system, storage medium and terminal for reducing area of read operation pump of non-flash memory
CN111598202A (en) * 2019-02-21 2020-08-28 华大半导体有限公司 Passive electronic tag chip and starting method of read charge pump of memory thereof
US11056155B1 (en) * 2018-06-20 2021-07-06 Adesto Technologies Corporation Nonvolatile memory devices, systems and methods with switching charge pump architectures
CN113364276A (en) * 2021-06-28 2021-09-07 芯天下技术股份有限公司 Charge pump discharging method, circuit, system, electronic equipment and storage medium

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002230985A (en) * 2001-02-06 2002-08-16 Sharp Corp Non-volatile semiconductor memory and its control method
DE10219783B4 (en) * 2002-05-03 2005-02-03 Infineon Technologies Ag Method for increasing the internal operating voltage for an integrated circuit and integrated circuit
US7613051B2 (en) * 2007-03-14 2009-11-03 Apple Inc. Interleaving charge pumps for programmable memories
TW201117536A (en) * 2009-11-03 2011-05-16 Ili Technology Corp Charge pump circuit and driving method thereof
US9281021B2 (en) * 2013-03-14 2016-03-08 Macronix International Co., Ltd. Method and apparatus for reduced read latency for consecutive read operations of memory of an integrated circuit
TWI551019B (en) * 2015-10-15 2016-09-21 瑞昱半導體股份有限公司 Charge-pump and dynamic charge-pump device including the same
KR102504615B1 (en) * 2016-09-09 2023-03-02 에스케이하이닉스 주식회사 Pump switching controller for reducing standby current and pumping apparatus using the same
JP6482690B1 (en) * 2018-01-11 2019-03-13 ウィンボンド エレクトロニクス コーポレーション Semiconductor memory device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101159168A (en) * 2006-10-02 2008-04-09 三星电子株式会社 Semiconductor memory devices having control circuitry to avoid recovering a charge pump when executing consecutive sections of a continuous operation command and methods of operating the same
CN102834827A (en) * 2010-03-23 2012-12-19 高通股份有限公司 Method and apparatus to provide clock signal to charge pump
US11056155B1 (en) * 2018-06-20 2021-07-06 Adesto Technologies Corporation Nonvolatile memory devices, systems and methods with switching charge pump architectures
CN111598202A (en) * 2019-02-21 2020-08-28 华大半导体有限公司 Passive electronic tag chip and starting method of read charge pump of memory thereof
CN111402943A (en) * 2020-06-02 2020-07-10 深圳市芯天下技术有限公司 Method, system, storage medium and terminal for reducing area of read operation pump of non-flash memory
CN113364276A (en) * 2021-06-28 2021-09-07 芯天下技术股份有限公司 Charge pump discharging method, circuit, system, electronic equipment and storage medium

Also Published As

Publication number Publication date
CN117133339A (en) 2023-11-28

Similar Documents

Publication Publication Date Title
US20040193990A1 (en) Test apparatus and test method
US20130024678A1 (en) Electronic device, configurable component and configuration information storage method thereof
CN109597733B (en) Multifunctional efficient dynamic chip verification simulation method and equipment
CN101488106A (en) System with at least two BIOS memory devices
CN101770373A (en) Self-starting serial boot program loading and reading system and method thereof
CN110162340B (en) ID configuration method of series circuit, series circuit and related equipment
CN111881637A (en) Method, system and storage medium for optimizing power consumption of digital circuit
CN109857471A (en) Method, apparatus, terminal and the storage medium of the tactful real-time synchronization of electricity under a kind of BIOS and BMC
CN110569158A (en) method and device for testing abnormal power failure in SSD random scene and computer equipment
CN101441592A (en) Test system and method of embedded system
CN108809683A (en) Dispose the method and device of cloud application system
CN117133339B (en) Method for establishing voltage of chip, method and device for executing command, chip and equipment
CN109002331A (en) Starting method, apparatus, computer equipment and the storage medium of touch screen
CN103049064B (en) The starting-up method of computing terminal, system and computing terminal
CN111103959B (en) Register resetting system and chip
CN116027226A (en) Component testing method and device, electronic equipment and storage medium
CN112631678B (en) Dynamic loading method based on zynq
CN107093408B (en) The control method and device of backlight lightening when smart machine is switched on
CN104834535A (en) SOC (System On Chip) chip system and power on method thereof
CN111147400B (en) Method and device for command line configuration synchronization and electronic equipment
CN109491903A (en) A kind of automatic test script splicing processing method, device, terminal and storage medium
CN112994902A (en) Intelligent network card and FPGA (field programmable Gate array) firmware updating management method of intelligent network card
CN103095278A (en) Integrated circuit and control method thereof
CN110113730A (en) Method for network access, device, Internet of Things module and storage medium
CN109324935A (en) A kind of system cold start-up test method, device, terminal and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant