CN117129029B - Chip detection method and system - Google Patents
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- 238000001514 detection method Methods 0.000 title claims abstract description 158
- 238000013507 mapping Methods 0.000 claims abstract description 67
- 238000000034 method Methods 0.000 claims abstract description 24
- 238000012937 correction Methods 0.000 claims description 41
- 239000007771 core particle Substances 0.000 claims description 19
- 238000006073 displacement reaction Methods 0.000 claims description 17
- 230000008569 process Effects 0.000 claims description 12
- 238000012545 processing Methods 0.000 claims description 11
- 238000004590 computer program Methods 0.000 claims description 9
- 238000010586 diagram Methods 0.000 claims description 7
- 238000012360 testing method Methods 0.000 claims description 6
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- 238000013523 data management Methods 0.000 description 1
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- G—PHYSICS
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- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D21/00—Measuring or testing not otherwise provided for
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
Abstract
The invention provides a chip detection method and a system, wherein the method comprises the following steps: when a chip to be detected is obtained, a detection template and a detection area which are matched with the chip to be detected are constructed through a low-power lens, and the detection template is arranged in the detection area; starting a high-power lens, and collecting high-power chip images of the chip to be detected in real time through the high-power lens; and constructing a mapping relation between the low-power lens and the high-power lens based on a preset rule, and mapping the high-power chip image into a detection template according to the mapping relation so as to correspondingly complete the detection of the chip to be detected. The invention can greatly save the computing resources and improve the use experience of the user.
Description
Technical Field
The present invention relates to the field of chip detection technologies, and in particular, to a chip detection method and system.
Background
With the progress of technology and the rapid development of productivity, chip technology has also been rapidly developed and has been widely applied in various industries, and has a wide development prospect.
The existing LED chip needs to be accurately detected before leaving the factory, specifically, in the actual detection process, when a certain chip needs to be detected in a high-power mode, the size of the chip is large, so that a camera view field cannot completely shoot down the whole chip, and most of the prior art adopts a jigsaw detection mode to finish the high-power detection of the chip.
However, in the prior art, during the process of performing the jigsaw detection, the problem that the chip size is large, so that a complete chip image cannot be loaded, more computing resources are occupied, the phenomenon of software algorithm breakdown may occur, and the working efficiency of staff is correspondingly reduced.
Disclosure of Invention
Based on the above, the invention aims to provide a chip detection method and a system, so as to solve the problem that the prior art occupies more computing resources in the detection process, and thus the software algorithm is likely to crash.
The first aspect of the embodiment of the invention provides:
a chip detection method, wherein the method comprises:
when a chip to be detected is obtained, a detection template and a detection area which are matched with the chip to be detected are constructed through a low-power lens, and the detection template is arranged in the detection area;
starting a high-power lens, and collecting high-power chip images of the chip to be detected in real time through the high-power lens;
and constructing a mapping relation between the low-power lens and the high-power lens based on a preset rule, and mapping the high-power chip image into the detection template according to the mapping relation so as to correspondingly complete the detection of the chip to be detected.
The beneficial effects of the invention are as follows: the detection template and the detection area of the low-power lens are obtained in real time, further, the high-power chip image collected through the high-power lens is obtained in real time, meanwhile, the mapping relation between the current low-power lens and the high-power lens is built based on the preset rule, so that the high-power chip image collected by the current high-power lens can be correspondingly mapped into the detection template of the current low-power lens, and the detection template exists in the detection area, so that high-precision detection of the low-power lens can be realized, a large amount of computing resources are saved, system breakdown is avoided, and the use experience of a user is improved.
Further, the step of constructing the mapping relationship between the low power lens and the high power lens based on the preset rule includes:
when the high-power chip image is acquired, carrying out low-power scanning on the high-power chip image through the low-power lens so as to generate a corresponding low-power scanning image;
and comprehensively detecting the low-power scanning image to construct a low-power positioning kernel matched with the low-power scanning image, and generating a corresponding low-power detection area by taking the low-power positioning kernel as a center so as to generate the mapping relation between the low-power lens and the high-power lens according to the low-power detection area.
Further, the step of generating the mapping relationship between the low power lens and the high power lens according to the low power detection area includes:
when the low-power detection area is acquired, detecting a low-power chip image corresponding to the low-power detection area in real time, and identifying a core particle distribution map corresponding to a plurality of core particles in the low-power chip image;
and generating a calibration anchor point matched with the low-power lens according to the core particle distribution diagram, and generating the mapping relation in real time based on the calibration anchor point.
Further, the step of generating the mapping relationship in real time based on the calibration anchor point includes:
when the calibration anchor point is obtained in real time, carrying out preliminary calibration on the low-power lens and the high-power lens through the calibration anchor point, and collecting offset generated by the high-power lens in the calibration process in real time;
searching a corresponding correction coefficient in a preset database according to the offset, and calculating a corresponding correction value according to the correction coefficient and the offset;
and constructing the mapping relation between the low-power lens and the high-power lens in real time through the correction value.
Further, the step of constructing the mapping relationship between the low power lens and the high power lens in real time through the correction value includes:
when the correction value is obtained in real time, the positions of the low-power lens and the high-power lens are respectively adjusted according to the correction value, so that the low-power lens and the shooting area of the high-power lens are completely corresponding and the mapping relation is generated;
extracting a target displacement parameter corresponding to the mapping relation, and storing the target displacement parameter in a preset controller in real time, wherein the target displacement parameter has uniqueness.
Further, the method further comprises:
when the detection of the chips to be detected is completed, generating detection reports corresponding to each chip to be detected in real time, and storing each detection report into a plurality of different primary databases in real time according to the types of the chips to be detected, wherein each primary database stores one chip to be detected respectively;
and simultaneously storing a plurality of primary databases into the same secondary database, uploading the secondary databases into a preset cloud platform, wherein each primary database has uniqueness.
Further, the method further comprises:
detecting storage nodes corresponding to each detection report in the primary database in real time, and generating corresponding storage data chains according to the storage nodes;
and generating a storage catalog corresponding to the primary database according to the storage data chain.
A second aspect of an embodiment of the present invention proposes:
a chip detection system, wherein the system comprises:
the detection module is used for constructing a detection template and a detection area which are matched with the chip to be detected through a low-power lens when the chip to be detected is acquired, and the detection template is arranged in the detection area;
the acquisition module is used for starting the high-power lens and acquiring the high-power chip image of the chip to be detected in real time through the high-power lens;
and the processing module is used for constructing a mapping relation between the low-power lens and the high-power lens based on a preset rule, and mapping the high-power chip image into the detection template according to the mapping relation so as to correspondingly complete the detection of the chip to be detected.
Further, the processing module is specifically configured to:
when the high-power chip image is acquired, carrying out low-power scanning on the high-power chip image through the low-power lens so as to generate a corresponding low-power scanning image;
and comprehensively detecting the low-power scanning image to construct a low-power positioning kernel matched with the low-power scanning image, and generating a corresponding low-power detection area by taking the low-power positioning kernel as a center so as to generate the mapping relation between the low-power lens and the high-power lens according to the low-power detection area.
Further, the processing module is specifically further configured to:
when the low-power detection area is acquired, detecting a low-power chip image corresponding to the low-power detection area in real time, and identifying a core particle distribution map corresponding to a plurality of core particles in the low-power chip image;
and generating a calibration anchor point matched with the low-power lens according to the core particle distribution diagram, and generating the mapping relation in real time based on the calibration anchor point.
Further, the processing module is specifically further configured to:
when the calibration anchor point is obtained in real time, carrying out preliminary calibration on the low-power lens and the high-power lens through the calibration anchor point, and collecting offset generated by the high-power lens in the calibration process in real time;
searching a corresponding correction coefficient in a preset database according to the offset, and calculating a corresponding correction value according to the correction coefficient and the offset;
and constructing the mapping relation between the low-power lens and the high-power lens in real time through the correction value.
Further, the processing module is specifically further configured to:
when the correction value is obtained in real time, the positions of the low-power lens and the high-power lens are respectively adjusted according to the correction value, so that the low-power lens and the shooting area of the high-power lens are completely corresponding and the mapping relation is generated;
extracting a target displacement parameter corresponding to the mapping relation, and storing the target displacement parameter in a preset controller in real time, wherein the target displacement parameter has uniqueness.
Further, the chip detection system further includes a storage module, where the storage module is specifically configured to:
when the detection of the chips to be detected is completed, generating detection reports corresponding to each chip to be detected in real time, and storing each detection report into a plurality of different primary databases in real time according to the types of the chips to be detected, wherein each primary database stores one chip to be detected respectively;
and simultaneously storing a plurality of primary databases into the same secondary database, uploading the secondary databases into a preset cloud platform, wherein each primary database has uniqueness.
Further, the chip detection system further includes an execution module, where the execution module is specifically configured to:
detecting storage nodes corresponding to each detection report in the primary database in real time, and generating corresponding storage data chains according to the storage nodes;
and generating a storage catalog corresponding to the primary database according to the storage data chain.
A third aspect of an embodiment of the present invention proposes:
a computer comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the chip detection method as described above when executing the computer program.
A fourth aspect of the embodiment of the present invention proposes:
a readable storage medium having stored thereon a computer program, wherein the program when executed by a processor implements the chip detection method as described above.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a flowchart of a chip testing method according to a first embodiment of the present invention;
fig. 2 is a block diagram of a chip detection system according to a sixth embodiment of the present invention.
The invention will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1, a chip detection method according to a first embodiment of the present invention is shown, where the chip detection method according to the present embodiment can implement high-precision detection of a low power mirror, so as to save a large amount of computing resources, avoid occurrence of system breakdown, and improve use experience of a user.
Specifically, the chip detection method provided in this embodiment specifically includes the following steps:
step S10, when a chip to be detected is obtained, a detection template and a detection area which are matched with the chip to be detected are constructed through a low-power lens, and the detection template is arranged in the detection area;
step S20, enabling a high-power lens, and collecting high-power chip images of the chip to be detected in real time through the high-power lens;
step S30, a mapping relation between the low-power lens and the high-power lens is constructed based on a preset rule, and the high-power chip image is mapped into the detection template according to the mapping relation so as to correspondingly complete the detection of the chip to be detected.
Specifically, in this embodiment, it is first to be described that the chip detection method is mainly used for detecting the LED chip in real time, and is used for guaranteeing the product yield of the LED chip. Based on this, when the chip to be detected is obtained in real time, in order to facilitate saving of subsequent computing resources, the embodiment firstly uses the low-power lens, further, in order to facilitate subsequent detection, a detection template and a detection area adapted to the current chip to be detected are further created through the current low-power lens, wherein the detection template is arranged in the detection area, and the detection of the chip to be detected is completed mainly through the detection template.
Furthermore, in order to collect high-definition images, so as to improve the subsequent detection accuracy, a high-power lens needs to be further started at the moment, and meanwhile, the image of the chip to be detected is collected in real time through the high-power lens, namely, the image of the high-power chip is collected in real time. Based on the above, in order to link the current low-power lens and the high-power lens together, namely, the high-power chip image acquired by the current high-power lens in real time is applied to the low-power lens, at this time, the mapping relation between the current low-power lens and the current high-power lens needs to be further constructed in real time according to a preset rule, and on the basis, the high-power chip image is mapped to the detection template of the low-power lens correspondingly according to the mapping relation, so that the chip detection can be completed through the low-power lens on the premise of not needing excessive computing resources.
Second embodiment
Specifically, in this embodiment, it should be noted that the step of constructing the mapping relationship between the low power lens and the high power lens based on the preset rule includes:
when the high-power chip image is acquired, carrying out low-power scanning on the high-power chip image through the low-power lens so as to generate a corresponding low-power scanning image;
and comprehensively detecting the low-power scanning image to construct a low-power positioning kernel matched with the low-power scanning image, and generating a corresponding low-power detection area by taking the low-power positioning kernel as a center so as to generate the mapping relation between the low-power lens and the high-power lens according to the low-power detection area.
Specifically, in this embodiment, it should be noted that, after the required high-power chip image is obtained through the above steps, in order to accurately construct the mapping relationship between the current low-power lens and the high-power lens, that is, the detection ranges of the low-power lens and the high-power lens are set together, at this time, the low-power scanning needs to be performed on the current high-power chip image through the low-power lens, and further, the required low-power scanned image can be scanned in a full disc.
Furthermore, since the images are composed of a plurality of pixel points, the current low-power scanning image needs to be further comprehensively detected to further construct a low-power positioning core matched with the current low-power scanning image, and the low-power positioning core is particularly used for playing a role in positioning in the subsequent adjustment process. Based on this, a corresponding low-power detection region can be further generated centering on the current low-power positioning kernel, and based on this, a mapping relationship between the low-power lens and the high-power lens can be further generated.
Specifically, in this embodiment, it should be further noted that the step of generating the mapping relationship between the low power lens and the high power lens according to the low power detection area includes:
when the low-power detection area is acquired, detecting a low-power chip image corresponding to the low-power detection area in real time, and identifying a core particle distribution map corresponding to a plurality of core particles in the low-power chip image;
and generating a calibration anchor point matched with the low-power lens according to the core particle distribution diagram, and generating the mapping relation in real time based on the calibration anchor point.
Specifically, in this embodiment, it should be further noted that, after the required low-power detection area is obtained through the above steps, a corresponding low-power chip image can be displayed in the low-power detection area, and specifically, the low-power chip image includes a plurality of core particles, and based on this, it is necessary to further identify the core particle distribution map included in the current low-power chip image. Furthermore, a calibration anchor point matched with the current low-power lens is set according to the core particle distribution condition in the current core particle distribution diagram, and the calibration anchor point is used for playing a role in positioning in the subsequent lens adjustment process. On the basis, the position of the high-power lens can be adjusted in real time according to the calibration anchor point so as to generate the mapping relation.
Third embodiment
In addition, in this embodiment, it should be noted that the step of generating the mapping relationship in real time based on the calibration anchor point includes:
when the calibration anchor point is obtained in real time, carrying out preliminary calibration on the low-power lens and the high-power lens through the calibration anchor point, and collecting offset generated by the high-power lens in the calibration process in real time;
searching a corresponding correction coefficient in a preset database according to the offset, and calculating a corresponding correction value according to the correction coefficient and the offset;
and constructing the mapping relation between the low-power lens and the high-power lens in real time through the correction value.
In addition, in this embodiment, it should be noted that, after the required calibration anchor point is obtained through the above steps, the current low-power lens and the high-power lens can be initially calibrated directly through the calibration anchor point, where the calibration anchor point is disposed on the low-power lens, so that the position of the high-power lens needs to be correspondingly adjusted at this time, and meanwhile, the offset generated in the adjustment process of the high-power lens is collected in real time.
Further, according to the offset, a required correction coefficient is correspondingly found in a preset repair database, and a corresponding correction value is immediately calculated in real time according to the correction coefficient and the current offset, preferably, the correction coefficient is 0-1, and represents a correction ratio between the low power lens and the high power lens, specifically, for convenience in operation, the low power lens and the high power lens have a corresponding correction value so as to construct the mapping relationship.
In addition, in this embodiment, it should be further noted that the step of constructing the mapping relationship between the low power lens and the high power lens in real time by using the correction value includes:
when the correction value is obtained in real time, the positions of the low-power lens and the high-power lens are respectively adjusted according to the correction value, so that the low-power lens and the shooting area of the high-power lens are completely corresponding and the mapping relation is generated;
extracting a target displacement parameter corresponding to the mapping relation, and storing the target displacement parameter in a preset controller in real time, wherein the target displacement parameter has uniqueness.
In addition, in the present embodiment, it is also noted that, by the above steps, correction values that are adapted to the low power lens and the high power lens can be calculated, and further, the positions of the low power lens and the high power lens are adjusted according to the magnitude of the correction values, so that the current photographing areas of the low power lens and the high power lens are completely corresponding, and at the same time, the above mapping relationship is generated. Further, in order to facilitate the detection of the subsequent chip, at this time, the target displacement parameter corresponding to the current mapping relationship may be further extracted, and meanwhile, the current target displacement parameter may be stored in the preset controller in real time, and in the subsequent detection process, the current controller may directly control the low power lens and the high power lens to enter the mapping relationship, so as to correspondingly improve the detection efficiency.
Fourth embodiment
In this embodiment, it should be noted that, the method further includes:
when the detection of the chips to be detected is completed, generating detection reports corresponding to each chip to be detected in real time, and storing each detection report into a plurality of different primary databases in real time according to the types of the chips to be detected, wherein each primary database stores one chip to be detected respectively;
and simultaneously storing a plurality of primary databases into the same secondary database, uploading the secondary databases into a preset cloud platform, wherein each primary database has uniqueness.
In this embodiment, it should be noted that, after the detection of the chips is completed, in order to clearly understand the detection condition of each chip, a detection report corresponding to each chip to be detected is correspondingly generated. Furthermore, in order to store the detection report generated in real time, a plurality of different primary databases can be further created according to the types of each chip to be detected, meanwhile, the detection report of each chip is respectively stored in one primary database, further, in order to facilitate data management, the current plurality of primary databases are further stored in the same secondary database, further, in order to facilitate data sharing, the current secondary database is further uploaded to a preset cloud platform immediately, so that each worker can acquire the required detection report from the cloud platform, and accordingly the working efficiency is improved.
Fifth embodiment
In this embodiment, it should be noted that, the method further includes:
detecting storage nodes corresponding to each detection report in the primary database in real time, and generating corresponding storage data chains according to the storage nodes;
and generating a storage catalog corresponding to the primary database according to the storage data chain.
In this embodiment, it should be noted that, in order to enable a worker to quickly find a required detection report, after the primary database is generated, storage nodes corresponding to each detection report in the current primary database are further detected in real time, and a required storage data chain is generated immediately according to the acquired storage nodes.
Further, for example, the "a detection report" is stored in the "C-th primary database" in the "B secondary database", so that the corresponding generated storage data chain may be "a-C-B", and based on this, the model of each chip is added at the end of each storage data chain, so that the above-mentioned storage catalog can be correspondingly generated.
Referring to fig. 2, a sixth embodiment of the present invention provides:
a chip detection system, wherein the system comprises:
the detection module is used for constructing a detection template and a detection area which are matched with the chip to be detected through a low-power lens when the chip to be detected is acquired, and the detection template is arranged in the detection area;
the acquisition module is used for starting the high-power lens and acquiring the high-power chip image of the chip to be detected in real time through the high-power lens;
and the processing module is used for constructing a mapping relation between the low-power lens and the high-power lens based on a preset rule, and mapping the high-power chip image into the detection template according to the mapping relation so as to correspondingly complete the detection of the chip to be detected.
In the above chip detection system, the processing module is specifically configured to:
when the high-power chip image is acquired, carrying out low-power scanning on the high-power chip image through the low-power lens so as to generate a corresponding low-power scanning image;
and comprehensively detecting the low-power scanning image to construct a low-power positioning kernel matched with the low-power scanning image, and generating a corresponding low-power detection area by taking the low-power positioning kernel as a center so as to generate the mapping relation between the low-power lens and the high-power lens according to the low-power detection area.
In the above chip detection system, the processing module is further specifically configured to:
when the low-power detection area is acquired, detecting a low-power chip image corresponding to the low-power detection area in real time, and identifying a core particle distribution map corresponding to a plurality of core particles in the low-power chip image;
and generating a calibration anchor point matched with the low-power lens according to the core particle distribution diagram, and generating the mapping relation in real time based on the calibration anchor point.
In the above chip detection system, the processing module is further specifically configured to:
when the calibration anchor point is obtained in real time, carrying out preliminary calibration on the low-power lens and the high-power lens through the calibration anchor point, and collecting offset generated by the high-power lens in the calibration process in real time;
searching a corresponding correction coefficient in a preset database according to the offset, and calculating a corresponding correction value according to the correction coefficient and the offset;
and constructing the mapping relation between the low-power lens and the high-power lens in real time through the correction value.
In the above chip detection system, the processing module is further specifically configured to:
when the correction value is obtained in real time, the positions of the low-power lens and the high-power lens are respectively adjusted according to the correction value, so that the low-power lens and the shooting area of the high-power lens are completely corresponding and the mapping relation is generated;
extracting a target displacement parameter corresponding to the mapping relation, and storing the target displacement parameter in a preset controller in real time, wherein the target displacement parameter has uniqueness.
In the above chip detection system, the chip detection system further includes a storage module, where the storage module is specifically configured to:
when the detection of the chips to be detected is completed, generating detection reports corresponding to each chip to be detected in real time, and storing each detection report into a plurality of different primary databases in real time according to the types of the chips to be detected, wherein each primary database stores one chip to be detected respectively;
and simultaneously storing a plurality of primary databases into the same secondary database, uploading the secondary databases into a preset cloud platform, wherein each primary database has uniqueness.
In the above-mentioned chip detection system, the chip detection system further includes an execution module, where the execution module is specifically configured to:
detecting storage nodes corresponding to each detection report in the primary database in real time, and generating corresponding storage data chains according to the storage nodes;
and generating a storage catalog corresponding to the primary database according to the storage data chain.
A seventh embodiment of the present invention provides a computer, including a memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor implements the chip detection method provided in the above embodiment when executing the computer program.
An eighth embodiment of the present invention provides a readable storage medium having stored thereon a computer program, wherein the program when executed by a processor implements the chip detection method provided in the above embodiment.
In summary, the chip detection method and system provided by the embodiment of the invention can realize high-precision detection of the low-power mirror, thereby omitting a large amount of computing resources, avoiding occurrence of system breakdown and improving the use experience of users.
The above-described respective modules may be functional modules or program modules, and may be implemented by software or hardware. For modules implemented in hardware, the various modules described above may be located in the same processor; or the above modules may be located in different processors in any combination.
Logic and/or steps represented in the flowcharts or otherwise described herein, e.g., a ordered listing of executable instructions for implementing logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It is to be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as is well known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (6)
1. A method for chip testing, the method comprising:
when a chip to be detected is obtained, a detection template and a detection area which are matched with the chip to be detected are constructed through a low-power lens, and the detection template is arranged in the detection area;
starting a high-power lens, and collecting high-power chip images of the chip to be detected in real time through the high-power lens;
constructing a mapping relation between the low-power lens and the high-power lens based on a preset rule, and mapping the high-power chip image into the detection template according to the mapping relation so as to correspondingly complete the detection of the chip to be detected;
the step of constructing the mapping relationship between the low power lens and the high power lens based on the preset rule comprises the following steps:
when the high-power chip image is acquired, carrying out low-power scanning on the high-power chip image through the low-power lens so as to generate a corresponding low-power scanning image;
comprehensively detecting the low-power scanning image to construct a low-power positioning kernel matched with the low-power scanning image, and generating a corresponding low-power detection area by taking the low-power positioning kernel as a center so as to generate the mapping relation between the low-power lens and the high-power lens according to the low-power detection area;
the step of generating the mapping relationship between the low power lens and the high power lens according to the low power detection area includes:
when the low-power detection area is acquired, detecting a low-power chip image corresponding to the low-power detection area in real time, and identifying a core particle distribution map corresponding to a plurality of core particles in the low-power chip image;
generating a calibration anchor point adapted to the low-power lens according to the core particle distribution diagram, and generating the mapping relation in real time based on the calibration anchor point;
the step of generating the mapping relation in real time based on the calibration anchor point comprises the following steps:
when the calibration anchor point is obtained in real time, carrying out preliminary calibration on the low-power lens and the high-power lens through the calibration anchor point, and collecting offset generated by the high-power lens in the calibration process in real time;
searching a corresponding correction coefficient in a preset database according to the offset, and calculating a corresponding correction value according to the correction coefficient and the offset;
the mapping relation between the low power lens and the high power lens is constructed in real time through the correction value;
the step of constructing the mapping relationship between the low power lens and the high power lens in real time through the correction value comprises the following steps:
when the correction value is obtained in real time, the positions of the low-power lens and the high-power lens are respectively adjusted according to the correction value, so that the low-power lens and the shooting area of the high-power lens are completely corresponding and the mapping relation is generated;
extracting a target displacement parameter corresponding to the mapping relation, and storing the target displacement parameter in a preset controller in real time, wherein the target displacement parameter has uniqueness.
2. The chip testing method according to claim 1, wherein: the method further comprises the steps of:
when the detection of the chips to be detected is completed, generating detection reports corresponding to each chip to be detected in real time, and storing each detection report into a plurality of different primary databases in real time according to the types of the chips to be detected, wherein each primary database stores one chip to be detected respectively;
and simultaneously storing a plurality of primary databases into the same secondary database, uploading the secondary databases into a preset cloud platform, wherein each primary database has uniqueness.
3. The chip testing method according to claim 2, wherein: the method further comprises the steps of:
detecting storage nodes corresponding to each detection report in the primary database in real time, and generating corresponding storage data chains according to the storage nodes;
and generating a storage catalog corresponding to the primary database according to the storage data chain.
4. A chip testing system for implementing the chip testing method of any one of claims 1 to 3, the system comprising:
the detection module is used for constructing a detection template and a detection area which are matched with the chip to be detected through a low-power lens when the chip to be detected is acquired, and the detection template is arranged in the detection area;
the acquisition module is used for starting the high-power lens and acquiring the high-power chip image of the chip to be detected in real time through the high-power lens;
and the processing module is used for constructing a mapping relation between the low-power lens and the high-power lens based on a preset rule, and mapping the high-power chip image into the detection template according to the mapping relation so as to correspondingly complete the detection of the chip to be detected.
5. A computer comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the chip detection method according to any one of claims 1 to 3 when executing the computer program.
6. A readable storage medium having stored thereon a computer program, which when executed by a processor implements the chip detection method according to any one of claims 1 to 3.
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