CN117093514A

CN117093514A - System, method, device and equipment for identifying uplink board card connected with hard disk backboard

Info

Publication number: CN117093514A
Application number: CN202311105571.7A
Authority: CN
Inventors: 张敏
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2023-08-30
Filing date: 2023-08-30
Publication date: 2023-11-21

Abstract

The application relates to an identification system of an uplink board card connected with a hard disk backboard, which comprises a current uplink board card and the hard disk backboard, wherein the current uplink board card is connected with the hard disk backboard, the hard disk backboard is provided with a programmable logic device, the programmable logic device is connected with the current uplink board card through an I2C bus, wherein the programmable logic device is used for detecting the I2C signal state of each pin connected with the I2C bus, when the I2C signal state of a target pin is detected to be effective, the type of the current uplink board card is determined according to the type of the uplink board card configured for the target pin in advance, so that the I2C signal sent by the current uplink board card is analyzed according to the type of the current uplink board card, and the hard disk state on the hard disk backboard is monitored according to the analysis result. The system can improve the efficiency of identifying the current uplink board card connected with the hard disk backboard.

Description

System, method, device and equipment for identifying uplink board card connected with hard disk backboard

Technical Field

The present application relates to the field of server technologies, and in particular, to a system, a method, an apparatus, and a device for identifying an uplink board card connected to a hard disk back board.

Background

In a server system, the hard disk backboard can be connected with different types of boards in a time sharing manner so as to realize different functions. When the hard disk backboard is connected with different boards, the type of the board card connected with the hard disk backboard needs to be identified so as to realize corresponding functions.

In the conventional technical solution, please refer to fig. 1, configuration distinction is generally performed through a dial switch, the dial switch sets a hardware level to send the hardware level to a programmable logic device, the programmable logic device determines an uplink host connected currently, when configuration change occurs, the dial needs to be manually modified, and each time the programmable logic device is started, the programmable logic device re-reads the dial to confirm the current configuration, wherein a first connector in fig. 1 is a slimlinx 4 connector 0, a second connector is a slimlinx 4 connector 1, a third connector is an SFF 8639 connector 0, a fourth connector is an SFF 8639 connector 1, a fifth connector is a 4pin VPP 12c connector, and a sixth connector is a 4pin 12c connector.

Then the traditional mode has complex operation, the correct dialing is required to be noted under different configurations, special node dialing and checking are required in production, otherwise, the system functions are affected, and the efficiency is low.

Disclosure of Invention

Based on the foregoing, it is necessary to provide a system, a method, a device and equipment for identifying an uplink board card connected to a hard disk back plate.

An identification system of an uplink board card connected with a hard disk backboard, the system comprises a current uplink board card and the hard disk backboard, the current uplink board card is connected with the hard disk backboard, the hard disk backboard is provided with a programmable logic device, the programmable logic device is connected with the current uplink board card through an I2C bus, wherein,

the programmable logic device is used for detecting the I2C signal state of each pin connected with the I2C bus, when the I2C signal state of the target pin is detected to be effective, determining the type of the current uplink board card according to the type of the uplink board card configured for the target pin in advance, analyzing the I2C signal sent by the current uplink board card according to the type of the current uplink board card, and monitoring the hard disk state on the hard disk back plate according to the analysis result.

In one embodiment, the current uplink board card is a motherboard, the I2C interface of the motherboard is connected with a first pin of the programmable logic device through an I2C bus, the type of the uplink board card configured corresponding to the first pin is the motherboard, wherein,

The programmable logic device is configured to detect an I2C signal state of a first pin, and determine, when detecting that the I2C signal state of the first pin is valid, that the first pin is a target pin, and determine, according to a type of an uplink board corresponding to the first pin as a motherboard, that the type of the current uplink board is the motherboard.

In one embodiment, the current uplink board card includes a motherboard and a control card, the control card is a Retimer card, the motherboard is connected with the Retimer card, an I2C interface of the motherboard is connected with a second pin of the programmable logic device through an I2C bus, the type of the uplink board card configured corresponding to the second pin is the Retimer card,

the programmable logic device is configured to detect an I2C signal state of the second pin, and determine that the type of the current uplink board card is a Retimer card according to the type of the uplink board card configured corresponding to the second pin being the Retimer card when detecting that the I2C signal state of the second pin is valid.

In one embodiment, the current uplink board card includes a motherboard and a control card, the motherboard is connected with the control card, an I2C interface of the control card is connected with an I2C interface of a hard disk back plate through an I2C bus, the I2C interface of the hard disk back plate is connected with a programmable logic device through the I2C bus, the control card is a PCIe Switch card or a Tri-mode card, and the PCIe Switch card is consistent with an I2C protocol used by the Tri-mode card.

In one embodiment, the control card is a PCIe Switch card, the I2C interface of the control card is connected to the second I2C interface of the hard disk back plate through an I2C bus, the second I2C interface of the hard disk back plate is connected to a third pin of the programmable logic device through the I2C bus, a type of an uplink board card configured corresponding to the third pin is a PCIe Switch card, where,

the programmable logic device is configured to detect an I2C signal state of a third pin, and determine that the type of the current uplink board card is a PCIe Switch card according to the type of the uplink board card configured corresponding to the third pin being the PCIe Switch card when detecting that the I2C signal state of the third pin is valid.

In one embodiment, the control card is a Tri-mode card, the I2C interface of the control card is connected to the second I2C interface of the hard disk back plate through an I2C bus, the second I2C interface of the hard disk back plate is connected to a fourth pin of the programmable logic device through an I2C bus, the type of the uplink board card configured corresponding to the fourth pin is a Tri-mode card, wherein,

the programmable logic device is configured to detect an I2C signal state of the fourth pin, and determine that the type of the current uplink board card is a Tri-mode card according to the type of the uplink board card configured correspondingly by the fourth pin being the Tri-mode card when detecting that the I2C signal state of the fourth pin is valid.

In one embodiment, when the current uplink board card is a motherboard, the programmable logic device is connected to the motherboard through an I2C bus, the VPP address interface of the motherboard is connected to the VPP address interface of the hard disk backplane, and when the current uplink board card includes a motherboard and a Retimer card, the motherboard is connected to the Retimer card, the programmable logic device is connected to the Retimer card through the I2C bus, the VPP address interface of the Retimer card is connected to the VPP address interface of the hard disk backplane, and the setting rules of the Retimer card and the VPP address signal of the motherboard are consistent.

The method is applied to a programmable logic device, the programmable logic device is arranged on the hard disk backboard, the hard disk backboard is connected with the current uplink board card, and the programmable logic device is connected with the current uplink board card through an I2C bus, and the method comprises the following steps:

detecting the I2C signal state of each pin connected with the I2C bus;

when the I2C signal state of the target pin is detected to be effective, the type of the current uplink board card is determined according to the type of the uplink board card configured for the target pin in advance, so that the I2C signal sent by the current uplink board card is analyzed according to the type of the current uplink board card, and the state of the hard disk on the hard disk backboard is monitored according to the analysis result.

In one embodiment, the current uplink board card includes a motherboard and a control card, and the current uplink board card is connected to the programmable logic device through an I2C bus, and includes:

the control card is connected with the programmable logic device through an I2C bus, or the main board is connected with the programmable logic device through the I2C bus;

the method further comprises the following steps:

determining I2C types corresponding to target pins according to the pre-established mapping relation between the pins connected with the I2C buses and the I2C types;

determining the type of the control card configured for the target pin in advance according to the mapping relation between each I2C type and each uplink board type and the I2C type corresponding to the target pin, and obtaining the type of the uplink board configured for the target pin in advance;

the determining the type of the current uplink board card according to the type of the uplink board card configured for the target pin in advance comprises the following steps:

and determining the type of the control card configured for the target pin in advance as the type of the current uplink board card.

In one embodiment, the method further comprises:

receiving a writing request of information of a newly added control card;

extracting the type of the newly added control card, the type of I2C corresponding to the newly added control card and the pin information of the corresponding connection of the newly added control card from the writing request;

Storing the type of the newly added control card and the type of the I2C type relevance corresponding to the newly added control card into the mapping relation between each I2C type and each type of the control card;

and storing the association of the I2C type corresponding to the newly added control card and the pin information corresponding to the newly added control card into the mapping relation between each pin and each I2C type.

In one embodiment, the method further comprises:

acquiring an I2C signal analysis scheme matched with the type of the current uplink board card;

analyzing an I2C signal sent by the current uplink board card according to the acquired I2C signal analysis scheme;

and monitoring the state of the hard disk on the hard disk backboard according to the analysis result.

In one embodiment, the above-mentioned I2C signal parsing scheme for obtaining a type match with a current upstream board card includes:

when the type of the current uplink board card is determined to be the main board or the Retimer card, an I2C signal analysis scheme matched with the main board is obtained.

The utility model provides a current up-going integrated circuit board's recognition device that hard disk backplate connects, above-mentioned device is applied to programmable logic device, and above-mentioned programmable logic device locates hard disk backplate, and current up-going integrated circuit board is connected to above-mentioned hard disk backplate, and current up-going integrated circuit board passes through I2C bus connection programmable logic device, and above-mentioned device includes:

The detection module is used for detecting the I2C signal state of each pin connected with the I2C bus;

and the identification module is used for determining the type of the current uplink board card according to the type of the uplink board card configured for the target pin in advance when the I2C signal state of the target pin is detected to be effective, so as to analyze the I2C signal sent by the current uplink board card according to the type of the current uplink board card and monitor the hard disk state on the hard disk backboard according to the analysis result.

A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:

detecting the I2C signal state of each pin connected with the I2C bus;

A computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of:

Detecting the I2C signal state of each pin connected with the I2C bus;

The identification system of the uplink board card connected with the hard disk backboard comprises a current uplink board card and the hard disk backboard, wherein the current uplink board card is connected with the hard disk backboard, the hard disk backboard is provided with a programmable logic device, and the programmable logic device is connected with the current uplink board card through an I2C bus. The system detects the I2C signal state of each pin connected with the I2C bus through a programmable logic device arranged on the hard disk backboard; when the I2C signal state of the target pin is detected to be effective, the type of the current uplink board card is determined according to the type of the uplink board card configured for the target pin in advance, so that the I2C signal sent by the current uplink board card is analyzed according to the type of the current uplink board card, and the state of the hard disk on the hard disk backboard is monitored according to the analysis result. The application can identify the type of the current uplink board card without setting a dial switch, has simple operation and improves the identification efficiency.

Drawings

FIG. 1 is a schematic diagram of a conventional technology for identifying an uplink board card by a dial switch;

FIG. 2 is a block diagram of an identification system for a current upstream card connected to a hard disk backplane in one embodiment;

FIG. 3 is a schematic circuit diagram of a CPU directly connected to a hard disk backplane in one embodiment;

FIG. 4 is a schematic circuit diagram of a Retimer card connected to a hard disk back plate in one embodiment;

FIG. 5 is a circuit schematic of a PCIe Switch card in one embodiment coupled to a hard disk backplane;

FIG. 6 is a circuit schematic of a Tri-mode card coupled to a hard disk backplane in one embodiment;

fig. 7 is a schematic block diagram of the identification of an upstream board card by a UFM scheme in the prior art;

FIG. 8 is a flowchart illustrating a method for identifying a current upstream card connected to a hard disk backplane in one embodiment;

FIG. 9 is a schematic diagram of a circuit of a same hard disk backplane time-sharing compatible with different upstream cards in one embodiment;

FIG. 10 is a block diagram illustrating an exemplary embodiment of an apparatus for identifying a current upstream card connected to a hard disk backplane;

FIG. 11 is an internal block diagram of a computer device in one embodiment.

Detailed Description

The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.

In one embodiment, as shown in fig. 2, there is provided an identification system for an uplink board connected to a hard disk back plate, the system including a current uplink board and a hard disk back plate, the current uplink board and the hard disk back plate being connected, the hard disk back plate being provided with a programmable logic device, the programmable logic device being connected to the current uplink board through an I2C bus, wherein,

the programmable logic device is used for detecting the I2C signal state of each pin connected with the I2C bus, when the I2C signal state of the target pin is detected to be effective, the type of the current uplink board card is determined according to the type of the uplink board card configured for the target pin in advance, so that the I2C signal sent by the current uplink board card is analyzed according to the type of the current uplink board card, and the state of the hard disk on the hard disk backboard is monitored according to the analysis result.

The programmable logic device may be a CPLD (Complex Programmable Logic Device ). The hard disk backboard can be connected with different current uplink boards in a time sharing way. The current uplink board card can be a single main board or a control card added to the main board. Under different application scenes, different functions are needed to be realized, so that the current uplink board card connected with the hard disk backboard is different. The application scenario here, such as CPU direct connection, tri-mode building NVMe raid (Non-Volatile Memory express raid, nonvolatile memory array), PCIe (Peripheral Component Interface Express, bus and interface standard) Switch extension, and re-timer reinforcement, may be one application scenario.

Specifically, when the hard disk backboard is connected with different current uplink boards, the corresponding programmable logic device is connected with the different current uplink boards through the I2C bus. Specifically, in different application scenarios, the programmable logic device is connected to the I2C buses of different current upstream boards through different pins.

For example, when the hard disk backboard at the moment of M1 is connected to the current uplink board 1, the programmable logic device is connected to the I2C bus of the current uplink board 1 through pin a. And the hard disk backboard at the moment M2 is connected with the current uplink board card 2, and the programmable logic device is connected with the I2C bus of the current uplink board card 2 through the pin B. And the hard disk backboard at the moment M3 is connected with the current uplink board card 3, and the programmable logic device is connected with the I2C bus of the current uplink board card 3 through the pin C.

The above-mentioned I2C signal state refers to the validity state of the I2C signal. Specifically, the programmable logic device sequentially detects the validity of the I2C signal state of each pin connected to the I2C bus.

In one embodiment, the current uplink board card is a motherboard, an I2C interface of the motherboard is connected with a first pin of the programmable logic device through an I2C bus, a type of the uplink board card configured corresponding to the first pin is the motherboard, wherein,

The programmable logic device is used for detecting the I2C signal state of the first pin, when the I2C signal state of the first pin is detected to be effective, the first pin is a target pin, and the type of the current uplink board card is determined to be the main board according to the type of the uplink board card correspondingly configured by the first pin.

In the application, the programmable logic device is connected with the I2C interface of the current uplink board card through different pins in different application scenes. The application can preset each application scene and the uplink board card used by each application scene, and pre-configures which pins of the CPLD are correspondingly connected with which uplink board card. The CPLD will then detect the I2C signal state of the set of pins (i.e., the set of pins that connect the I2C interfaces of the respective upstream boards). The target pin is one of the group of pins. The first pin is also one of the set of pins.

Referring to fig. 3, fig. 3 is a schematic circuit diagram of a CPU directly connected to a hard disk back plate in an embodiment.

In fig. 3, the current uplink board is a motherboard, and the motherboard is directly connected with the hard disk back board through an I2C bus, that is, the I2C interface of the motherboard in fig. 3 is connected to the first I2C interface on the hard disk back board. A first I2C interface on the hard disk backplane is connected to a first pin of the CPLD. The method comprises the steps that a VPP address of a main board is connected with a VPP address of a hard disk backboard, PCIE of the main board is connected with PCIE of the hard disk backboard, a programmable logic device is used for detecting an I2C signal state of a first pin, if the first pin is in an effective state, determining that the first pin is the target pin, further determining that a current uplink board card is the main board according to the type of the uplink board card configured for the first pin in advance, further obtaining an I2C signal analysis scheme corresponding to the main board, analyzing the I2C signal sent by the main board, and monitoring the hard disk state according to analysis results.

By adopting the embodiment, the type of the current connected uplink board card can be identified as the main board through the I2C signal state of the pin, a dial switch is not required to be manually stirred, and the identification efficiency is improved.

In one embodiment, the current uplink board card includes a motherboard and a control card, the control card is a Retimer card, the motherboard is connected with the Retimer card, an I2C interface of the motherboard is connected with a second pin of the programmable logic device through an I2C bus, the type of the uplink board card configured corresponding to the second pin is the Retimer card, wherein,

the programmable logic device is used for detecting the I2C signal state of the second pin, when the I2C signal state of the second pin is detected to be effective, the second pin is a target pin, and the type of the current uplink board card is determined to be a re card according to the type of the uplink board card correspondingly configured by the second pin as the re card.

In the present application, the second pin is also one of a group of pins connected to the I2C bus in the CPLD. When the control card is a re-timer card, the type of the uplink board card correspondingly configured by the second pin is correspondingly configured as the re-timer card in advance. The application configures the corresponding type of the uplink board card for the group of pins in advance. And subsequently detecting the I2C signal state of the group of pins, and determining the type of the current uplink board card according to the type of the uplink board card configured for the pins in advance when the I2C signal state at which pin is detected to be in an effective state.

In the application, if the current uplink board card is the main board itself, the programmable logic device is connected with the current uplink board card through the I2C bus, specifically, the main board is connected with the CPLD through the I2C bus. When the current uplink board card is a main board and a re card is added, the programmable logic device is connected with the current uplink board card through an I2C bus, and particularly, the main board is also connected with the CPLD through the I2C bus. And the Retimer card is connected with the CPLD through a PCIE bus.

Referring to fig. 4, fig. 4 is a schematic circuit diagram of a hard disk back plate connected to a re-timer card according to an embodiment. In fig. 4, the current upstream card includes a main board and a re card (control card). The main board is connected with the hard disk backboard through an I2C bus, and particularly, an I2C interface on the main board in fig. 4 is connected with a first I2C interface on the hard disk backboard through the I2C bus. A first I2C interface on the hard disk backboard is connected with a second pin of the CPLD through an I2C bus. One PCIE interface of the Retimer card is connected with the PCIE interface on the mainboard. The other PCIE interface of the Retimer card is connected with the PCIE interface on the hard disk backboard. The VPP address of the remamer card is connected with the VPP address on the hard disk back plate. And the programmable logic device determines the second pin as the target pin through the I2C signal state at the second pin, and further determines the type of the current uplink board card as the re-timer card according to the type of the uplink board card which is configured for the second pin in advance and corresponds to the re-timer card when the second pin is in an effective state.

By adopting the embodiment, the type of the current uplink board card is the Retimer card by detecting the I2C signal state of the pin connected with the I2C of the CPLD, and the problem that the identification efficiency is affected due to the fact that a dial switch is required to be arranged in the traditional technology is solved. In the application, because the application scene of the Retimer card is that the main board is connected with the second pin of the CPLD through the I2C bus, the I2C signal can be analyzed by subsequently acquiring an I2C analysis scheme matched with the main board, and the state of the hard disk is monitored according to the analysis result.

In one embodiment, the current uplink board card includes a motherboard and a control card, the motherboard is connected with the control card, an I2C interface of the control card is connected with an I2C interface of the hard disk backboard through an I2C bus, the I2C interface of the hard disk backboard is connected with the programmable logic device through the I2C bus, the control card is a PCIe Switch card or a Tri-mode card, and an I2C protocol used by the PCIe Switch card and the Tri-mode card is consistent.

In the application, the programmable logic device is connected with the current uplink board card through the I2C bus, and particularly, the control card in the current uplink board card is connected with the programmable logic device through the I2C bus.

Specifically, a first I2C interface and a second I2C interface are arranged on the hard disk backboard. When the current uplink board card type is a main board or a Retimer card, the VPP I2C interface of the main board provides an I2C bus to be connected with the first I2C interface on the hard disk back board. When the current uplink board card type is a PCIe Switch card and a Tri-mode card, both an I2C interface of the PCIe Switch card and an I2C interface of the Tri-mode card are connected with a second I2C interface of the hard disk backboard, wherein the I2C protocol used by the PCIe Switch card and the Tri-mode card needs to be ensured to be consistent.

Specifically, for application scenarios of PCIe Switch cards and Tri-mode cards, the management scheme of the hard disk backplane follows a two-wire I2C protocol, where the command formats use a format defined by the VPP protocol, and the command formats of the PCIe Switch cards and Tri-mode cards in the two modes need to be consistent according to the protocol settings. According to the embodiment of the application, the interface of the hard disk backboard end can be reused in the application scene of the PCIe Switch card and the Tri-mode card, so that redundant design is avoided.

In one embodiment, the control card is a PCIe Switch card, the control card is connected to a third pin of the programmable logic device through an I2C bus, a type of an uplink board card configured corresponding to the third pin is a PCIe Switch card, where,

the programmable logic device is used for detecting the I2C signal state of the third pin, when the I2C signal state of the third pin is detected to be effective, the third pin is a target pin, and the type of the current uplink board card is determined to be the PCIe Switch card according to the type of the uplink board card correspondingly configured by the third pin being the PCIe Switch card.

The third pin is one of a group of pins connected with the current uplink board card through the I2C bus in the CPLD. The I2C interfaces of different current uplink boards are different, so pins used for connecting different I2C interfaces on the CPLD are also different, different types of the uplink boards are configured for different pins correspondingly, the third pin is connected with the I2C interface of the PCIe Switch card, and the type of the uplink board configured for the third pin in advance is the PCIe Switch card.

Referring to fig. 5, fig. 5 is a schematic circuit diagram of a PCIe Switch card connected to a hard disk backplane in one embodiment. In fig. 5, the current upstream board card includes a motherboard and a PCIe Switch card (control card). The PCIE interface of the motherboard is connected to one of PCIE interfaces of the PCIE Switch card. The other PCIe interface of the PCIe Switch card is connected to a PCIe interface on the hard disk backplane. The I2C interface of the PCIe Switch card is connected with a second I2C interface on the hard disk backboard, the second I2C interface on the hard disk backboard is connected with a third pin of the CPLD, and the CPLD determines that the type of the current uplink board card is the PCIe Switch card according to the type of the uplink board card configured for the third pin in advance as the PCIe Switch card when the I2C interface is in an effective state by detecting the I2C signal state of the third pin.

By adopting the embodiment, the type of the current uplink board card can be identified by detecting the I2C signal state of the pin of the CPLD, a dial switch is not required to be arranged, and configuration information in the CPLD is required to be refreshed each time an application scene is not required to be switched (the uplink board card is replaced), so that the identification efficiency is improved.

In one embodiment, the control card is a Tri-mode card, the control card is connected to a fourth pin of the programmable logic device through an I2C bus, and a type of an uplink board card configured corresponding to the fourth pin is a Tri-mode card, where,

The programmable logic device is used for detecting the I2C signal state of the fourth pin, when the I2C signal state of the fourth pin is detected to be effective, the fourth pin is the target pin, and the current type of the uplink board card is determined to be the Tri-mode card according to the type of the uplink board card correspondingly configured by the fourth pin being the Tri-mode card.

Referring to fig. 6, fig. 6 is a schematic circuit diagram of a Tri-mode card connected to a hard disk back plate in one embodiment. In fig. 6, the current upstream board includes a main board and a Tri-mode card. The PCIE interface of the motherboard is connected with one PCIE interface of the Tri-mode card. The other PCIE interface of the Tri-mode card is connected with the PCIE interface on the hard disk backboard. The I2C interface of the Tri-mode card is connected with a second I2C interface on the hard disk backboard, the second I2C interface on the hard disk backboard is connected with a third pin of the CPLD through an I2C bus, the CPLD detects the I2C signal state of a fourth pin, and when the CPLD is in an effective state, the current type of the uplink card is determined to be the Tri-mode card according to the type of the uplink card configured for the fourth pin in advance.

By adopting the embodiment, the type of the current uplink board card is identified as the Tri-mode card by detecting the I2C signal state of the pin of the CPLD, a dial switch is not required to be arranged, and configuration information in the CPLD is required to be refreshed each time an application scene is not required to be switched (the uplink board card is replaced), so that the identification efficiency is improved.

In one embodiment, when the current uplink board card is a main board, the programmable logic device is connected with the main board through an I2C bus, a VPP address interface of the main board is connected with a VPP address interface of the hard disk backboard, when the current uplink board card comprises the main board and a Retimer card, the main board is connected with the Retimer card, the programmable logic device is connected with the Retimer card through the I2C bus, the VPP address interface of the Retimer card is connected with a VPP address interface of the hard disk backboard, and setting rules of VPP address signals of the Retimer card and the main board are consistent.

The current uplink board card is a main board, namely a scene that the main board is directly connected with the hard disk backboard. For the application scenario of CPU direct connection and the Retimer card, the management scheme of the hard disk backboard follows the three-wire system VPP I2C signal of intel and the VPP Address (VPP Address) corresponding to the VPP port, and the VPP Address setting rules of the main board and the Retimer card are required to be consistent under the two modes. Therefore, the VPP address interface of the hard disk backboard can be shared under the two application scenes of directly connecting the hard disk backboard and the Retimer card of the main board, so that the interfaces of the hard disk backboard end can be reused under different application scenes, and redundant design is avoided.

In one embodiment, as shown in fig. 7, there is provided a method for identifying an uplink board connected to a hard disk back board, where the method is applied to a programmable logic device, the programmable logic device is disposed on the hard disk back board, the hard disk back board is connected to a current uplink board, and the current uplink board is connected to the programmable logic device through an I2C bus, and the method includes:

S11, detecting the I2C signal state of each pin connected with the I2C bus.

In the present application, the I2C signal state refers to the validity state of the I2C signal. Specifically, the I2C signal state of each hardware pin may include active (active), or inactive (inactive). The programmable logic device in turn detects the validity of the I2C signal state of each pin connected to the I2C bus. Specifically, the CPLD sequentially detects the I2C signal states at the pins connected to the current upstream board through the I2C bus, and when detecting that the I2C signal state of a certain pin is an active state, determines that the pin is a target pin.

And S12, when the I2C signal state of the target pin is detected to be effective, determining the type of the current uplink board card according to the type of the uplink board card configured for the target pin in advance, so as to analyze the I2C signal sent by the current uplink board card according to the type of the current uplink board card, and monitoring the hard disk state on the hard disk backboard according to the analysis result.

In the present application, the target pin is a pin for detecting that the I2C signal state is valid. Pins herein refer to pins of a programmable logic device. Specifically, in different application scenarios, the current uplink board card connected to the programmable logic device is different. The pins of the I2C bus connection to the programmable logic device are also different for different current upstream cards. The I2C used for the hard disk state management of the backboard is used independently, the current uplink board card connected with the hard disk backboard is sent to the programmable logic device, and no other equipment interference exists on the link. When the I2C bus of a current uplink board card is connected to a certain hardware pin of the programmable logic device, the I2C signal state of the hardware pin is active (valid), otherwise, the I2C signal state of the hardware pin is inactive (invalid). Therefore, the application can judge the target pin currently connected to the current uplink board card by detecting the active/inactive state of the I2C link, and further determine the type of the current uplink board card corresponding to the target pin according to preset configuration information.

The type of the current uplink board card is used for representing what card the current uplink board card is. Because the application has different current uplink boards connected with the hard disk backboard under different application scenes, the realized functions are different, and the scheme of analyzing signals adopted by the programmable logic device is also different. Therefore, after the type of the current uplink board card is obtained, the analysis scheme matched with the current uplink board card can be obtained, the I2C signal sent by the current uplink board card can be further analyzed, and the state of the hard disk can be monitored based on the I2C signal.

In the application, pins connected with the I2C bus of the current uplink board card are configured in advance, the types of the current uplink board card connected with the pins are specifically configured, after the subsequent programmable logic device detects the pins, configuration information is read, and the types of the current uplink board card are determined based on the configuration information and the pin detection result.

Referring to fig. 8, fig. 8 is a schematic diagram of identifying the type of the upstream card by UFM (user flash memory, user flash) in the conventional technology. In fig. 8, configuration information of the whole machine is written into a UFM area of the CPLD through the BMC (Baseboard Management Controller, substrate controller), data in the area is not lost when power is lost, the CPLD determines the connection condition of the whole machine by reading the configuration information in the UFM, and a corresponding management scheme is selected. According to the scheme, when uplink connection is changed each time, configuration information is required to be rewritten into the UFM area of the CPLD, and the steps are complicated.

Compared with the prior art, the application does not need to write configuration information into the CPLD every time the uplink connection is changed, the same hard disk backboard can be compatible with a plurality of uplink boards, the type of the uplink board can be identified by detecting the I2C signal state of the pin through the CPLD, and the identification efficiency of the type of the uplink board is improved.

In one embodiment, the method further comprises:

Specifically, the I2C interfaces of different upstream boards in the present application are different, and pins of the I2C interfaces of each upstream board connected to the programmable logic device are also different, so in the present application, the pins of the CPLD used for connecting the I2C interfaces of different upstream boards form a group of pins to be detected. In the group of pins, a one-to-one mapping relationship exists between each pin and the I2C interface of each uplink board card, and a one-to-one mapping relationship also exists between the I2C interface of each uplink board card and the type of each uplink board card. Therefore, the application can determine the type of the uplink board card corresponding to the target pin according to the two one-to-one mapping relations.

Specifically, the application configures the corresponding type of the uplink board card for each pin in advance. Specifically, by configuring the type of I2C corresponding to each pin, the type of the upstream board card corresponding to each I2C type. The I2C type may be the type of the I2C interface of a different upstream board.

In the application, the current uplink board card can be the main board itself or the main board plus the control card. When the current uplink board card is a motherboard plus a control card, the control card may be a PCIe Switch card, a Tri-mode card, or a re-timer card. When the current uplink board card can be the main board, the corresponding type of the uplink board card is the main board, and when the current uplink board card is the main board plus the PCIe Switch card, the corresponding type of the uplink board card is the PCIe Switch card. Correspondingly, when the current uplink board card is a main board plus a Tri-mode card, the corresponding type of the uplink board card is a Tri-mode card. When the current uplink board card is a motherboard and a Retimer card is added, the corresponding type of the uplink board card is the Retimer card. Aiming at the 4 types, the application configures the corresponding type of the uplink board card for each pin.

Specifically, the association relation between the hardware pins and the types of the uplink board card is configured in advance. In one possible design, the application specifically configures the first mapping relation and the second mapping relation when configuring the association relation between the hardware pins and the type of the uplink board card. The first mapping relationship here corresponds to the mapping relationship between each pin connected to the I2C bus and each I2C type. The second mapping relationship corresponds to the mapping relationship between each I2C type and each upstream board type. When the current upstream board is the motherboard, the I2C type may be VPP I2C. When the current upstream card is a PCIe Switch card, the I2C class here may be TWI I2C. When the current upstream card is a Tri-mode card, the I2C category here may be Tri I2C. When the current upstream board card is a Retimer card, the I2C type here may be VPP I2C, and because in this case, the Retimer card itself is not connected to the CPLD through the I2C bus, but is connected to the CPLD through the I2C bus by the motherboard, the I2C interface connected to the CPLD is a VPP I2C interface on the motherboard.

The application can detect the I2C signal state of the group of pins connected with the I2C bus by the programmable logic device based on the first mapping relation and the second mapping relation, thereby judging the type of the I2C connected with the uplink, and judging the type of the control card.

In another possible design, the present application may just create a mapping relationship between each hardware pin and the type of the upstream card, and determine the type of the current upstream card based on the mapping relationship, where each pin refers to a pin of the CPLD connected to the I2C bus. By the method, only one type of mapping relation can be created, and efficiency is improved.

According to the application, the type of the current uplink board card can be flexibly identified through the programmable logic device, and the dial setting is not required to be manually modified.

In the application, the programmable logic device detects a group of pins connected with the I2C bus, sequentially detects the I2C bus state at the group of pins, and acquires the type of the current uplink board card corresponding to the target pin until the I2C bus state at the target pin is detected to be in an effective state.

Specifically, the application comprises various application scenes, wherein the application scenes comprise application scenes in which a main board is directly connected with a hard disk backboard and application scenes in which the main board is not directly connected with the hard disk backboard. In an application scenario in which the main board is directly connected with the hard disk back board, the main board is connected with the programmable logic device through an I2C bus. The application scenario that the main board is not directly connected with the hard disk backboard further comprises: tri-mode builds NVMe raid, PCIe Switch extension or Retimer to strengthen 3 application scenarios. Under the Retimer reinforcing scene, the control card is a Retimer card, the Retimer card is not connected with the programmable logic device through an I2C bus, but the main board is connected with the programmable logic device through the I2C bus. And when the control card is a Tri-mode card or a PCIe Switch card, the control card is connected with the programmable logic device through an I2C bus.

Referring to fig. 9, fig. 9 is a schematic circuit diagram of a same hard disk back plate with time-sharing compatibility with different uplink boards in an embodiment. In FIG. 9, hardware connection relations corresponding to 4 application scenarios including CPU direct connection, tri-mode construction NVMe raid, PCIe Switch extension and Retimer reinforcement are illustrated. The application scene of the CPU direct connection comprises a main board and a hard disk backboard. The Tri-mode building NVMe raid application scene comprises a second control card, a main board and a hard disk backboard, wherein the second control card is a Tri-mode card. The application scene of the PCIe Switch extension comprises a main board, a first control card and a hard disk backboard, wherein the first control card is the PCIe Switch card. The application scene of the Retimer reinforcement comprises a main board, a third control card and a hard disk backboard, wherein the third control card is a Retimer card. The third I2C is VPP I2C, the fourth I2C is TWI I2C, and the fifth I2C is TRI I2C. The first I2C on the hard disk backplane may be VPP I2C and the second I2C may be TWI I2C. As can be seen from fig. 6, by adopting the scheme of the present application, the same hard disk backboard can be compatible with different types of uplink boards.

Further, after the type of the current uplink board card is determined by the hard disk backboard, a scheme for analyzing the I2C signal is determined based on the type of the current uplink board card, the corresponding I2C signal is analyzed based on the determined analysis scheme, and the state of the hard disk is monitored based on the analysis result. In the application, in the scenes of direct connection of the CPU and reinforcement of the re-timer, the I2C signals of the main board are connected to the back plate end of the hard disk, so that the analysis schemes under the two scenes are consistent. That is, when it is determined that the current uplink board card is the motherboard (i.e. the scenario of direct connection of the CPU) or the Retimer card (i.e. the scenario of enhanced Retimer), the scheme adopted by the programmable logic device for resolving the I2C signal is consistent, because the I2C signals received by the programmable logic device are VPP I2C signals.

According to the embodiment of the application, the purpose of identifying the type of the current uplink board card can be achieved by detecting the I2C signal state of the pin of the programmable logic device, and compared with the prior art, the identification method and the device have the advantages that the configuration distinction is carried out through the dial switch, the operation is simple, and the identification efficiency is improved.

In one embodiment, when the type of the current uplink board card is a motherboard or a Retimer card, the setting rules of the VPP address signals of the motherboard and the Retimer card are identical.

The current uplink board card is a main board, namely a scene that the CPU is directly connected with the hard disk backboard. For the application scenario of CPU direct connection and the Retimer card, the management scheme of the hard disk backboard follows the three-wire system VPP I2C signal of intel and the VPP Address (VPP Address) corresponding to the VPP port, and the VPP Address setting rules of the main board and the Retimer card are required to be consistent under the two modes.

According to the embodiment of the application, the application scenes of the CPU direct connection and the Retimer card can share the hardware interface, the interface of the hard disk backboard end can be multiplexed in multiple modes, and redundant design is avoided.

In one embodiment, the method may further include:

receiving a writing request of information of a newly added control card;

In the present application, the newly added control card refers to a control card in the current configuration that needs to be newly added to the programmable logic device. The application can maintain and update the configuration information in the programmable logic device through the implementation mode, and realize the expansion of the scheme.

In one embodiment, the method further comprises:

In the application, a scheme of analyzing the I2C signal configured for the type of the current uplink board card in advance is obtained, and the I2C signal sent by the current uplink board card is analyzed based on the scheme of analyzing the I2C signal.

The monitoring of the hard disk state on the hard disk backboard according to the analysis result may include controlling the hard disk indicator lamp according to the analysis result. In the present application, the different states of the hard disk may be indicated by lighting, where the different states of the hard disk may include states of the hard disk such as bit state, locate, error, rebuild, and the like. Specifically, different hard disk states can be indicated by lighting hard disk lamps with different colors or with different flashing frequencies, and alarm prompt can be performed when the hard disk error is monitored.

According to the embodiment, no matter what type the current uplink board card is, the scheme of analyzing the I2C signal matched with the type of the current uplink board card can be obtained by identifying the type of the current uplink board card, the I2C signal sent by the current uplink board card is analyzed, and the state of the hard disk is monitored according to the analysis result, so that compatibility of different uplink board cards and the state monitoring scheme of the hard disk is realized, and the same hard disk backboard can be compatible with different uplink board cards.

In one embodiment, the above-mentioned I2C signal parsing scheme for obtaining a type match with a current upstream board card may include:

In the application, when the type of the current uplink board card is determined to be the PCIe Switch card, an I2C signal analysis scheme matched with the PCIe Switch card is acquired. And when the type of the current uplink board card is determined to be the Tri-mode card, acquiring an I2C signal analysis scheme matched with the Tri-mode card. And when the type of the current uplink board card is determined to be the main board, acquiring an I2C signal analysis scheme matched with the main board. When the type of the current uplink board card is determined to be the Retimer card, an I2C signal analysis scheme matched with the main board is obtained.

With continued reference to fig. 9, in a possible implementation manner, the method for identifying a current uplink board card connected to a hard disk backplane according to the present application may include the following steps:

1) The board card design in the storage system is carried out according to the scheme, and comprises a main board, a PCIe Switch card, a Tri-mode card, a Retimer card, a hard disk backboard and the like, wherein the built architecture is different under different application scenes;

2) For an application scene of CPU direct connection, the connection combination of the example is connected with 1/2/3 of a connecting wire, wherein VPP I2C is a three-wire system and comprises VPP Alert supporting hot plug;

3) For the application scene of the PCIe Switch card, the connection combination of the example is connected with the connection line 4/5/6, wherein the PCIe Switch card mainly realizes PCIe expansion, 4 is an uplink port, 5 is a downlink port, and the number of the normally 5 lanes is far more than 4; in addition, TWI 2C contains in-place and lighting information of a hard disk supporting hot plug, and CPLD acquires the state of the hard disk by analyzing TWI 2C to monitor and instruct;

4) For the application scene of the Tri-mode card, the connection combination of the examples is that the connection lines 7/8/9,7 are uplink ports, and 8 is a downlink port;

5) For the application scenario of the Retimer card, the connection combination of the example is that the connection line 10/11/12, 10 is an uplink port, 11 is a downlink port, and the 12-VPP address (VPP address) needs to be defined by referring to the 10-uplink port.

According to the scheme, flexible compatibility of the board card, the FW (firmware) and the configuration file under various NVMe (Non-Volatile Memory express, nonvolatile memory array) storage architectures can be realized, differential design caused by various application scenes is avoided, the design multiplexing rate is improved, the design cost is saved, and waste of design resources such as manpower, materials and the like is avoided.

In one embodiment, as shown in fig. 10, there is provided an apparatus for identifying a current uplink board connected to a hard disk back board, where the apparatus is applied to a programmable logic device, the programmable logic device is disposed on the hard disk back board, the hard disk back board is connected to the current uplink board, and the programmable logic device is connected to the current uplink board through an I2C bus, the apparatus includes:

A detection module 11, configured to detect an I2C signal state of each pin connected to the I2C bus;

and the identification module 12 is configured to determine a type of a current uplink board card according to a type of an uplink board card configured for the target pin in advance when the I2C signal state of the target pin is detected to be valid, so as to analyze an I2C signal sent by the current uplink board card according to the type of the current uplink board card, and monitor a hard disk state on the hard disk back plate according to an analysis result.

In one embodiment, the identification module 12 may determine the type of the control card configured for the target pin according to the mapping relationship between each pin connected to the I2C bus and each I2C type, which are created in advance, and the type of the control card configured for the target pin, and the type of the I2C type, which is created in advance, according to the mapping relationship between each I2C type and each type of the uplink board card, and the type of the I2C type, which is created in advance, corresponding to the target pin, so as to obtain the type of the uplink board card configured for the target pin in advance, and the identification module 12 may also determine the type of the control card configured for the target pin in advance as the type of the current uplink board card.

In one embodiment, the above-mentioned identification module 12 may further receive a write request of information of the newly added control card, extract a type of the newly added control card, an I2C type corresponding to the newly added control card, and pin information corresponding to the newly added control card in the write request, store the association of the type of the newly added control card and the I2C type corresponding to the newly added control card in mapping relations between each I2C type and each control card type, and store the association of the I2C type corresponding to the newly added control card and the pin information corresponding to the newly added control card in mapping relations between each pin and each I2C type.

In one embodiment, the above-mentioned identification module 12 may further obtain an I2C signal analysis scheme matched with the type of the current uplink board card, analyze the I2C signal sent by the current uplink board card according to the obtained I2C signal analysis scheme, and monitor the state of the hard disk on the hard disk back plate according to the analysis result.

In one embodiment, the above-mentioned identification module 12 may further obtain an I2C signal parsing scheme matched with the motherboard when determining that the type of the current uplink board card is the motherboard or the repeater card.

In one embodiment, a computer device is provided, which may be a server, and the internal structure of which may be as shown in fig. 11. The computer device includes a processor, a memory, a network interface, and a database connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database of the computer equipment is used for storing data such as operation data of the intelligent household equipment. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program, when executed by the processor, implements a method for identifying a current upstream board card connected to the hard disk back plate.

In one embodiment, a computer device is provided comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the steps of when executing the computer program: detecting the I2C signal state of each pin connected with the I2C bus; when the I2C signal state of the target pin is detected to be effective, the type of the current uplink board card is determined according to the type of the uplink board card configured for the target pin in advance, so that the I2C signal sent by the current uplink board card is analyzed according to the type of the current uplink board card, and the state of the hard disk on the hard disk backboard is monitored according to the analysis result.

In one embodiment, the processor, when executing the computer program, specifically further implements the steps of:

When the processor executes the computer program to realize the step of determining the type of the current uplink board card according to the type of the uplink board card configured for the target pin in advance, the following steps are specifically realized:

receiving a writing request of information of a newly added control card;

In one embodiment, when the processor executes the computer program to implement the step of acquiring the I2C signal parsing scheme matched with the type of the current upstream board card, the following steps are specifically implemented:

In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of: detecting the I2C signal state of each pin connected with the I2C bus; when the I2C signal state of the target pin is detected to be effective, the type of the current uplink board card is determined according to the type of the uplink board card configured for the target pin in advance, so that the I2C signal sent by the current uplink board card is analyzed according to the type of the current uplink board card, and the state of the hard disk on the hard disk backboard is monitored according to the analysis result.

In one embodiment, the computer program when executed by the processor, specifically further performs the steps of:

when the computer program is executed by the processor to realize the step of determining the type of the current uplink board card according to the type of the uplink board card configured for the target pin in advance, the following steps are specifically realized:

receiving a writing request of information of a newly added control card;

In one embodiment, when the computer program is executed by the processor to implement the step of obtaining the I2C signal parsing scheme matched with the type of the current upstream board card, the following steps are specifically implemented:

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), memory bus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims

1. The identification system of the uplink board card connected with the hard disk backboard is characterized by comprising a current uplink board card and the hard disk backboard, wherein the current uplink board card is connected with the hard disk backboard, the hard disk backboard is provided with a programmable logic device which is connected with the current uplink board card through an I2C bus, wherein,

the programmable logic device is used for detecting the I2C signal state of each pin connected with the I2C bus, when the I2C signal state of a target pin is detected to be effective, determining the type of the current uplink board card according to the type of the uplink board card configured for the target pin in advance, analyzing the I2C signal sent by the current uplink board card according to the type of the current uplink board card, and monitoring the hard disk state on the hard disk backboard according to the analysis result.

2. The system of claim 1, wherein the current upstream board is a motherboard, an I2C interface of the motherboard is connected to a first pin of the programmable logic device through the I2C bus, a type of the upstream board configured correspondingly to the first pin is the motherboard, the programmable logic device is configured to detect an I2C signal state of each pin connected to the I2C bus, and when detecting that an I2C signal state of a target pin is valid, determine the type of the current upstream board according to the type of the upstream board configured in advance for the target pin, including:

the programmable logic device is configured to detect an I2C signal state of the first pin, and determine that the type of the current uplink board card is a motherboard according to the type of the uplink board card configured corresponding to the first pin as the motherboard when detecting that the I2C signal state of the first pin is valid.

3. The system of claim 1, wherein the current upstream board card includes a motherboard and a control card, the control card is a re-timer card, the motherboard is connected with the re-timer card, an I2C interface of the motherboard is connected with a second pin of the programmable logic device through the I2C bus, a type of the upstream board card configured correspondingly by the second pin is the re-timer card, the programmable logic device is configured to detect an I2C signal state of each pin connected with the I2C bus, and when detecting that the I2C signal state of a target pin is valid, determining the type of the current upstream board card according to the type of the upstream board card configured for the target pin in advance includes:

The programmable logic device is configured to detect an I2C signal state of the second pin, and determine that the type of the current uplink board card is a Retimer card according to the type of the uplink board card configured corresponding to the second pin being the Retimer card when detecting that the I2C signal state of the second pin is valid, where the second pin is the target pin.

4. The system of claim 1, wherein the current upstream card comprises a motherboard and a control card, the motherboard is connected with the control card, an I2C interface of the control card is connected with an I2C interface of the hard disk back plate through the I2C bus, an I2C interface of the hard disk back plate is connected with the programmable logic device through the I2C bus, and the control card is a PCIe Switch card or a Tri-mode card, and an I2C protocol used by the PCIe Switch card and the Tri-mode card is consistent.

5. The system of claim 4, wherein the control card is a PCIe Switch card, the control card is connected to a third pin of the programmable logic device through the I2C bus, a type of an upstream board card configured corresponding to the third pin is a PCIe Switch card, the programmable logic device is configured to detect an I2C signal state of each pin connected to the I2C bus, and when detecting that an I2C signal state of a target pin is valid, determine a type of the current upstream board card according to a type of an upstream board card configured for the target pin in advance, including:

The programmable logic device is configured to detect an I2C signal state of the third pin, and determine that the type of the current uplink board card is a PCIe Switch card according to the type of the uplink board card configured corresponding to the third pin being the PCIe Switch card when detecting that the I2C signal state of the third pin is valid, where the third pin is the target pin.

6. The system of claim 4, wherein the control card is a Tri-mode card, the control card is connected to a fourth pin of the programmable logic device through the I2C bus, a type of an upstream board card configured correspondingly by the fourth pin is a Tri-mode card, the programmable logic device is configured to detect an I2C signal state of each pin connected to the I2C bus, and when detecting that an I2C signal state of a target pin is valid, determining the type of the current upstream board card according to the type of the upstream board card configured for the target pin in advance, including:

7. The system of claim 1, wherein when the current upstream board is a motherboard, the programmable logic device is connected to the motherboard through an I2C bus, a VPP address interface of the motherboard is connected to a VPP address interface of the hard disk backplane, when the current upstream board includes a motherboard and a Retimer card, the motherboard is connected to the Retimer card, the programmable logic device is connected to the Retimer card through an I2C bus, a VPP address interface of the Retimer card is connected to a VPP address interface of the hard disk backplane, and setting rules of VPP address signals of the Retimer card and the motherboard are identical.

8. The method is characterized by being applied to a programmable logic device, wherein the programmable logic device is arranged on the hard disk backboard, the hard disk backboard is connected with a current uplink board, and the current uplink board is connected with the programmable logic device through an I2C bus, and the method comprises the following steps:

detecting the I2C signal state of each pin connected with the I2C bus;

when the I2C signal state of the target pin is detected to be effective, determining the type of the current uplink board card according to the type of the uplink board card configured for the target pin in advance, analyzing the I2C signal sent by the current uplink board card according to the type of the current uplink board card, and monitoring the hard disk state on the hard disk backboard according to the analysis result.

9. The method of claim 8, wherein the method further comprises:

determining the I2C type corresponding to the target pin according to the pre-established mapping relation between each pin connected with the I2C bus and each I2C type;

determining the type of the control card configured for the target pin in advance according to the mapping relation between each I2C type and each uplink board type which are created in advance and the I2C type corresponding to the target pin, and obtaining the type of the uplink board configured for the target pin in advance;

10. The method according to claim 9, wherein the method further comprises:

receiving a writing request of information of a newly added control card;

extracting the type of a new control card, the type of I2C corresponding to the new control card and the pin information of the connection corresponding to the new control card from the writing request;

11. The method of claim 8, wherein the method further comprises:

analyzing the I2C signal sent by the current uplink board card according to the acquired I2C signal analysis scheme;

12. The method of claim 11, wherein the obtaining an I2C signal parsing scheme that matches the type of the current upstream card comprises:

and when the type of the current uplink board card is determined to be a main board or a re-timer card, acquiring an I2C signal analysis scheme matched with the main board.

13. The utility model provides an identification means of hard disk backplate connection's ascending integrated circuit board, its characterized in that, the device is applied to programmable logic device, programmable logic device locates hard disk backplate, hard disk backplate connects current ascending integrated circuit board, current ascending integrated circuit board passes through I2C bus connection programmable logic device, the device includes:

14. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 8 to 12 when the computer program is executed by the processor.

15. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 8 to 12.