CN117080196A - Power packaging module - Google Patents

Power packaging module Download PDF

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Publication number
CN117080196A
CN117080196A CN202210505760.2A CN202210505760A CN117080196A CN 117080196 A CN117080196 A CN 117080196A CN 202210505760 A CN202210505760 A CN 202210505760A CN 117080196 A CN117080196 A CN 117080196A
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CN
China
Prior art keywords
power
pin
power element
package module
pins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210505760.2A
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Chinese (zh)
Inventor
杨惠强
冷中明
谢智正
王暐纶
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niko Semiconductor Co Ltd
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Niko Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Niko Semiconductor Co Ltd filed Critical Niko Semiconductor Co Ltd
Priority to CN202210505760.2A priority Critical patent/CN117080196A/en
Publication of CN117080196A publication Critical patent/CN117080196A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3672Foil-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting

Abstract

The invention discloses a power packaging module. The power package module includes an electronic assembly, a first pin assembly, and a second pin assembly. The electronic component at least comprises a carrier plate. The first pin assembly includes a first power element pin and the second pin assembly includes a second power element pin. The first power element pins and the second power element pins extend from different surfaces of the carrier respectively and have height differences. The first power element pin includes a first contact section and a first non-contact section. The first contact section is directly connected with the carrier plate, and the first non-contact section is not contacted with the carrier plate. The carrier plate protrudes from the first contact section and extends below the first non-contact section.

Description

Power packaging module
Technical Field
The present disclosure relates to power packaging modules, and particularly to a power packaging module with high voltage resistance.
Background
The power module may be used in household variable frequency systems, electric vehicles, and industrial control systems (industrial control system) to convert electrical energy or control circuitry. In some circuits, such as: the voltage conversion circuit, the power module may need to operate under high power conditions such as high voltage or high current. Therefore, the power module is required to have characteristics of high withstand voltage and high current operation.
The conventional power module generally has a plurality of pins for electrically connecting to an external circuit. Some of the pins are used for electrically connecting with a high voltage power supply terminal or a heavy current load. For a power module operating at high voltage or high current, a creepage distance (creepage distance) and an electrical interval (clearance) between two adjacent pins for connecting a high voltage power supply terminal or a high current load are required to meet specific requirements, so as to avoid leakage between the two adjacent pins and reduce product reliability.
Disclosure of Invention
The invention aims to solve the technical problem of providing a power packaging module aiming at the defects of the prior art so as to reduce electric leakage and improve the reliability of products.
In order to solve the above technical problems, another technical solution adopted by the present invention is to provide a power packaging module. The power package module includes an electronic assembly, a first pin assembly, and a second pin assembly. The electronic component at least comprises a carrier plate. The first pin assembly includes at least one first power element pin, and the second pin assembly includes at least one second power element pin. The first power element pins and the second power element pins extend from different surfaces of the carrier plate respectively and have height differences. The first power element pin includes a first contact section and a first non-contact section that are connected to each other. The first contact section contacts the carrier plate, and the first non-contact section does not contact the carrier plate. The carrier plate protrudes from the first contact section in the extending direction of the first power element pins and extends to the lower part of the first non-contact section.
The power packaging module provided by the invention has the beneficial effects that the power packaging module can have smaller volume and can increase the creepage distance between the adjacent power element pins through the technical scheme that the carrier plate protrudes out of the first contact section in the extending direction of the first power element pins and extends to the lower part of the first non-contact section, so that the reliability is improved.
For a further understanding of the nature and the technical aspects of the present invention, reference should be made to the following detailed description of the invention and the accompanying drawings, which are provided for purposes of reference only and are not intended to limit the invention.
Drawings
Fig. 1 is a schematic perspective view of a power package module according to a first embodiment of the invention.
Fig. 2 is an exploded perspective view of a power package module according to a first embodiment of the invention, wherein a package layer is omitted.
Fig. 3 is another exploded perspective view of the power package module according to the first embodiment of the present invention, wherein the package layer is omitted.
Fig. 4 is a schematic top view of the power package module according to the first embodiment of the invention, wherein the package layer and the heat sink are omitted.
Fig. 5 is a schematic bottom view of a power package module according to a first embodiment of the invention, wherein a package layer and a heat sink are omitted.
Fig. 6 is a schematic top view of a power package module according to a first embodiment of the invention.
Fig. 7 is a schematic cross-sectional view taken along line VII-VII in fig. 6.
Fig. 8 is a schematic partial cross-sectional view of a power package module according to a second embodiment of the invention.
Fig. 9 is a schematic partial cross-sectional view of a power package module according to a third embodiment of the invention.
Fig. 10 is a schematic partial cross-sectional view of a power package module according to a fourth embodiment of the invention.
Fig. 11 is a schematic partial cross-sectional view of a power package module according to a fifth embodiment of the invention.
Fig. 12 is a schematic partial cross-sectional view of a power package module according to a sixth embodiment of the invention.
Fig. 13 is a schematic perspective view of a power package module according to a seventh embodiment of the invention, wherein a package layer is omitted.
Fig. 14 is another schematic perspective view of a power package module according to a seventh embodiment of the invention, in which a package layer is omitted.
Fig. 15 is a schematic top view of a power package module according to a seventh embodiment of the invention, wherein a package layer is omitted.
The reference numerals are as follows:
M1-M7: power packaging module
1: electronic assembly
10: carrier plate
100: insulating board
100a: a first surface
100b: a second surface
101: first circuit pattern layer
101S: first grounding welding pad
101G: first grid electrode welding pad
101P: first switching voltage pad
101D: first power input welding pad
101A: first positive electrode pad
101B: first negative electrode pad
102: second circuit pattern layer
102S: second grounding welding pad
102G: second grid electrode welding pad
102P: second switching voltage pad
102D: second power input welding pad
102A: second positive electrode pad
102B: second negative electrode welding pad
103: extension part
11: first power element group
11a,11b: first power element
11s: first source electrode pad
11d: first drain electrode pad
11g: first grid electrode pad
110: first power chip
111: first conductive connecting piece
111t: first pin part
12: second power element group
12a,12b: second power element
12s: second source electrode pad
12d: second drain electrode pad
12g: second grid electrode pad
120: second power chip
121: second conductive connecting piece
121t: second pin part
13a,13b: temperature sensor
2: first pin assembly
20: first power element pin
201: a first contact section
202,202': a first non-contact section
20S: first grounding pin
20G: first gate pin
20P: first switching voltage pin
20D: first power input pin
3: second pin assembly
30: second power element pin
301: second contact section
302,302': second non-contact section
30S: second grounding pin
30G: second gate pin
30P: second switching voltage pin
30D: second power input pin
21,31: temperature sensing pin set
21A: first positive electrode pin
21B: first negative electrode pin
31A: second positive electrode pin
31B: second negative electrode pin
4a,4b: heat dissipation piece
41: a first conductive layer
42: second conductive layer
43: insulating heat conductor
5: encapsulation layer
5s: side surfaces
5H: recessed region
51: projection part
5h: an opening
E1, E2: side edges
H1, H2, H3: height difference
D1: first direction
D2: second direction
L1: length of
L2: projection length
GA: electrical isolation part
6,6a,6b: heat sink
Detailed Description
The following specific embodiments are provided to illustrate the embodiments of the present invention related to a "power package module", and those skilled in the art will be able to understand the advantages and effects of the present invention from the disclosure herein. The invention is capable of other and different embodiments and its several details are capable of modifications and various other uses and applications, all of which are obvious from the description, without departing from the spirit of the invention. The drawings of the present invention are merely schematic illustrations, and are not intended to be drawn to actual dimensions. The following embodiments will further illustrate the related art content of the present invention in detail, but the disclosure is not intended to limit the scope of the present invention.
It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements or signals, these elements or signals should not be limited by these terms. These terms are used primarily to distinguish one element from another element or signal from another signal. In addition, the term "or" as used herein shall include any one or combination of more of the associated listed items as the case may be.
First embodiment
Referring to fig. 1 to 3, fig. 1 is a schematic perspective view of a power package module according to a first embodiment of the invention, and fig. 2 and 3 are schematic perspective exploded views of the power package module at different angles respectively. The power package module M1 of the present embodiment can be applied to a circuit design of an electronic product, and is suitable for operating under high voltage and high current. In the present embodiment, the power package module M1 includes an electronic component 1, a first lead component 2, a second lead component 3, heat sinks 4a,4b, and a package layer 5.
As shown in fig. 2 and 3, the electronic component 1 of the present embodiment includes a carrier 10, a first power device group 11 and a second power device group 12. The carrier 10 is used for carrying the first power device set 11 and the second power device set 12, and also can establish electrical connection between a plurality of power devices in the first power device set 11 or the second power device set 12. In this embodiment, a detailed structure of the carrier 10 and an electrical connection relationship among the carrier 10, the first power device group 11 and the second power device group 12 are described by taking a part of circuits forming a voltage conversion system circuit as an example.
Referring to fig. 2 and 3, the carrier 10 includes an insulating plate 100, a first circuit pattern layer 101 and a second circuit pattern layer 102. The material of the insulating plate 100 may be ceramic, polymer or composite material, wherein the ceramic may be alumina, aluminum nitride or silicon nitride. The insulating plate 100 has an opposite first surface 100a and second surface 100b.
As shown in fig. 2, the first line pattern layer 101 is disposed on the first surface 100a of the insulating plate 100. The first circuit pattern layer 101 may include a plurality of first pads according to actual requirements. Further, the first circuit pattern layer 101 may be used to construct a current transmission path of the plurality of first power devices 11a,11b in the first power device group 11. Accordingly, the shape, number and configuration of the plurality of first pads can be adjusted according to the number of the first power elements 11a,11b in the first power element group 11 and the soldering positions thereof.
As shown in fig. 2, the first circuit pattern layer 101 of the present embodiment may include a first ground pad 101S, two first gate pads 101G, a first switching voltage pad 101P and a first power input pad 101D, but the invention is not limited thereto. It should be noted that, in the present embodiment, each of the first ground pad 101S, the first gate pad 101G, the first switching voltage pad 101P, and the first power input pad 101D extends toward the same side edge E1 of the insulating board 100 (or the carrier 10) so that the end portion thereof is adjacent to the side edge E1 of the insulating board 100, but the invention is not limited thereto.
When the power package module M1 is operated, the first ground pad 101S, the first switching voltage pad 101P, and the first power input pad 101D should be able to allow a larger current to pass. Therefore, the area of any one of the first ground pad 101S, the first switching voltage pad 101P, and the first power input pad 101D may be larger than the area of each of the first gate pads 101G.
Referring to fig. 2, in the present embodiment, the first switching voltage pad 101P has an L-shape in a top view, and has a first connection portion (not numbered) extending along a first direction D1 and a second connection portion (not numbered) extending along a second direction D2. The first connection portion is adjacent to the first power input pad 101D and one of the first gate pads 101G. However, the separation distance between the first connection portion and the first power input pad 101D is greater than the separation distance between the first connection portion and the first gate pad 101G. In this way, arcing between the first switching voltage pad 101P and the first power input pad 101D can be prevented from occurring, thereby damaging the device.
The second connection portion of the first switching voltage pad 101P extends from one end of the first connection portion to a position close to the first ground pad 101S. However, the separation distance between the second connection portion of the first switching voltage pad 101P and the first ground pad 101S is also greater than the separation distance between the first ground pad 101S and the other first gate pad 101G, so as to avoid arcing between the first switching voltage pad 101P and the first ground pad 101S.
Referring to fig. 3, in the present embodiment, the second circuit pattern layer 102 is disposed on the second surface 100b of the insulating plate 100. That is, the first circuit pattern layer 101 and the second circuit pattern layer 102 are respectively located at two opposite sides of the insulating board 100. Similarly, the second line pattern layer 102 may be used to construct current transmission paths for a plurality of power elements in the second power element group 12. Accordingly, the second circuit pattern layer 102 may include a plurality of second pads according to actual requirements, and the shape, number and configuration of the plurality of second pads may be adjusted according to the number of power elements in the second power element group 12 and the soldering positions thereof.
In detail, the second circuit pattern layer 102 may include a second ground pad 102S, two second gate pads 102G, a second switching voltage pad 102P and a second power input pad 102D, but the invention is not limited thereto.
In the present embodiment, the power package module M1 is an in-line power package module. Therefore, similar to the first circuit pattern layer 101, the second ground pad 102S, the second gate pad 102G, the second switching voltage pad 102P, and the second power input pad 102D of the second circuit pattern layer 102 also have a portion extending toward the side edge E1 of the insulating board 100 (or the carrier 10) so that the end portions thereof are located adjacent to the side edge E1.
In addition, when the power package module M1 is operated, the second ground pad 102S, the second switching voltage pad 102P, and the second power input pad 102D should be able to allow a larger current to pass. Therefore, the area of any one of the second ground pad 102S, the second switching voltage pad 102P, and the second power input pad 102D may be larger than the area of each of the second gate pads 102G.
Referring to fig. 3, similar to the first switching voltage pad 101P, the second switching voltage pad 102P has a substantially L-shaped bottom view and has a first connection portion (not numbered) extending along the first direction D1 and a second connection portion (not numbered) extending along the second direction D2. The first connection portion is adjacent to the second power input pad 102D and one of the second gate pads 102G. However, the separation distance between the second connection portion and the second power input pad 102D is greater than the separation distance between the second connection portion and the second gate pad 102G. In this way, arcing between the second switching voltage pad 102P and the second power input pad 102D can be avoided, and the device is prevented from being damaged.
The second connection portion of the second switching voltage pad 102P extends from the first connection portion to a position close to the second ground pad 102S. However, the separation distance between the second connection portion of the second switching voltage pad 102P and the second ground pad 102S is also greater than the separation distance between the second ground pad 102S and the other second gate pad 102G, so as to avoid arcing between the second switching voltage pad 102P and the second ground pad 102S.
In this embodiment, the material constituting the first wiring pattern layer 101 or the second wiring pattern layer 102 may be selected to have a high conductivity, such as: copper or alloys thereof to reduce parasitic resistance. Thus, the first circuit pattern layer 101 and the second circuit pattern layer 102 can allow a larger current to pass through, so that the power package module M1 can operate under the conditions of a large voltage and a large current.
Referring to fig. 2 to 4, the first power device set 11 and the second power device set 12 are disposed on the carrier 10 and are respectively located on two opposite sides of the carrier 10, but the invention is not limited thereto. The first power device group 11 and the second power device group 12 may include one or more power devices (two are shown in fig. 2 and 3 as an example). The power element is, for example, an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT), a Metal-Oxide-semiconductor field effect transistor (MOSFET), or any combination thereof. The material of the power element is, for example, silicon carbide, silicon or gallium nitride.
In one embodiment, the first power device group 11 may include a plurality of first power devices 11a,11b (two are shown in fig. 2 as an example), and the plurality of first power devices 11a,11b are electrically connected to each other through the first line pattern layer 101 to form a part of a normalization circuit (e.g., a voltage conversion circuit). The second power device group 12 may include a plurality of second power devices 12a,12b (two are shown in fig. 3 as an example), and the plurality of second power devices 12a,12b may be electrically connected to each other through the second line pattern layer 102, or may form another part of a normalization circuit (e.g., a voltage conversion circuit). In the present embodiment, the first power devices 11a,11b are not electrically connected to the second power devices 12a,12 b. However, when the power package module M1 is electrically connected to an external circuit, the first power devices 11a,11b may also be electrically connected to the second power devices 12a,12b through the external circuit, but the invention is not limited thereto.
In another embodiment, the first circuit pattern layer 101 is electrically connected to the second circuit pattern layer 102 through one or more conductive holes (not shown) formed in the insulating board 100, so that the first power device 11A (11B) is connected in parallel with the second power device 12A (12B), thereby increasing the power density (power density) of the power package module M1.
Referring to fig. 4, first power devices 11a and 11b of the first power device group 11 are taken as an example for illustration. Each of the first power devices 11a,11b may include a first source pad 11s, a first drain pad 11d, and a first gate pad 11g. It should be noted that the first power devices 11a and 11b of the present embodiment are primarily packaged devices, and the first drain pad 11d, the first gate pad 11g and the first source pad 11s are all located on the same side of the first power devices 11a and 11 b. Therefore, the first power devices 11a and 11b of the present embodiment can be directly disposed on the carrier 10 by the surface bonding technology without using bonding wires, so that the overall size of the power package module M1 can be reduced.
In detail, each of the first power devices 11a,11b may include a first power chip 110 and a first conductive connection 111 connected to the first power chip 110. The first source pad 11s and the first gate pad 11g are located on the active surface of the first power chip 110. The first conductive connection 111 is disposed on the back surface of the first power chip 110 and has a first pin portion 111t. The first drain pad 11d is disposed at the end of the first leg 111t.
As shown in fig. 4, in the present embodiment, the two first power elements 11a,11b are arranged differently. Further, one of the first power devices 11A is disposed with a side of the first power chip 110 facing the side edge E1 of the carrier 10. The other first power element 11B is disposed with the side of the first power chip 110 facing the first power element 11A. That is, the first pin portion 111t of the first power device 11B is disposed toward the other side edge E2 of the carrier 10.
As shown in fig. 4, two first power devices 11a,11b may be connected in series through the first circuit pattern layer 101. In detail, when the first power devices 11a,11b are disposed on the first circuit pattern layer 101, the two first gate pads 11G of the two first power devices 11a,11b may be connected to the two first gate pads 101G, respectively. The first source pad 11S of one of the first power devices 11A is electrically connected to the first ground pad 101S, and the first drain pad 11d is electrically connected to the first switching voltage pad 101P. The first source pad 11s of the other first power device 11B is electrically connected to the first switching voltage pad 101P, and the first drain pad 11D is electrically connected to the first power input pad 101D.
Referring to fig. 3 and 5, in the present embodiment, each of the second power devices 12a,12b may include a second source pad 12s, a second drain pad 12d, and a second gate pad 12g. Each of the second power elements 12a,12b may include a second power chip 120 and a second conductive connection 121 connected to the second power chip 120. The second source pad 12s and the second gate pad 12g are located on the active surface of the second power chip 120. The second conductive connection member 121 is disposed on the back surface of the second power chip 120 and has a second pin portion 121t. The second drain pad 12d is disposed at the end of the second pin portion 121t.
Referring to fig. 4 and fig. 5 in combination, in the present embodiment, the patterns of the first circuit pattern layer 101 and the second circuit pattern layer 102 are mirror-symmetrical with respect to the insulating board 100, but the invention is not limited thereto. The configuration of the second power elements 12a,12b is similar to that of the first power elements 11a,11 b. One of the second power devices 12A is disposed with a side of the second power chip 120 facing the side edge E1 of the carrier 10. The other second power element 12B is disposed with the side of the second power chip 120 facing the second power element 12A.
In addition, the two second power elements 12a,12b may be connected in series with each other through the second wiring pattern layer 102. In detail, when the second power devices 12a,12b are disposed on the second circuit pattern layer 102, the two second gate pads 12G of the two second power devices 12a,12b may be connected to the two second gate pads 102G, respectively. The second source pad 12S of one of the second power devices 12A is electrically connected to the second ground pad 102S, and the second drain pad 12d is electrically connected to the second switching voltage pad 102P. The second source pad 12s of the other second power device 12B is electrically connected to the second switching voltage pad 102P, and the second drain pad 12D is electrically connected to the second power input pad 102D.
Referring to fig. 4 again, the electronic component 1 of the present embodiment further includes at least one temperature sensor 13A. In addition, the first circuit pattern layer 101 further includes a first positive electrode pad 101A and a first negative electrode pad 101B. The two electrodes of the temperature sensor 13A may be electrically connected to the first positive electrode pad 101A and the first negative electrode pad 101B, respectively. In the present embodiment, when the first power device group 11 is operating, the temperature sensor 13A can be used to detect the temperature inside the power package module M1, so as to avoid the damage of the first power devices 11a,11b due to overheating.
As shown in fig. 5, the electronic component 1 may further include another temperature sensor 13B disposed on the second circuit pattern layer 102 to monitor the ambient temperature during operation of the second power device 12A. Accordingly, the second circuit pattern layer 102 may also have a second positive electrode pad 102A and a second negative electrode pad 102B for electrically connecting the temperature sensor 13B, but the invention is not limited thereto.
Referring to fig. 4, the first lead assembly 2 is disposed on the carrier 10 and connected to the first circuit pattern layer 101, so that the temperature sensor 13A and the plurality of first power devices 11a,11b can be electrically connected to another external circuit. Further, the first pin assembly 2 may include a plurality of first power element pins 20. Each first power device pin 20 may be electrically connected to a corresponding first power device 11a,11b through the first circuit pattern layer 101.
A plurality of first power element pins 20 may be defined for receiving or outputting a plurality of different signals. For example, the plurality of first power device pins 20 may include at least a first ground pin 20S, two first gate pins 20G, a first switching voltage pin 20P, and a first power input pin 20D, but the invention is not limited thereto.
As shown in fig. 4, the first ground pin 20S is electrically connected to the first ground pad 101S. The two first gate pins 20G are connected to the two first gate pads 101G, respectively. In addition, the first switching voltage pin 20P and the first power input pin 20D are connected to the first switching voltage pad 101P and the first power input pad 101D, respectively. It should be noted that, the cross-sectional areas of the first ground pin 20S, the first switching voltage pin 20P, and the first power input pin 20D are larger to allow a larger current to pass.
In addition, the first lead assembly 2 of the present embodiment may further include a temperature sensing lead set 21 electrically connected to the temperature sensor 13A through the first circuit pattern layer 101. As shown in fig. 4, the temperature sensing pin group 21 may include a first positive electrode pin 21A and a first negative electrode pin 21B connected to the first positive electrode pad 101A and the first negative electrode pad 101B, respectively.
Referring to fig. 5, the second lead assembly 3 is disposed on the carrier 10 and connected to the second circuit pattern layer 102, so that the temperature sensor 13A and the plurality of second power devices 12a,12b can be electrically connected to another external circuit. That is, the second lead assembly 3 and the first lead assembly 2 are respectively located on opposite surfaces of the carrier 10.
The second pin assembly 3 may include a plurality of second power element pins 30. Each second power element pin 30 may be electrically connected to a corresponding second power element 12a,12b through the second circuit pattern layer 102. The plurality of second power device pins 30 may include at least a second ground pin 30S, two second gate pins 30G, a second switching voltage pin 30P, and a second power input pin 30D, but the invention is not limited thereto.
As shown in fig. 5, the second ground pin 30S is electrically connected to the second ground pad 102S. The two second gate pins 30G are connected to the two second gate pads 102G, respectively. In addition, the second switching voltage pin 30P and the second power input pin 30D are connected to the second switching voltage pad 102P and the second power input pad 102D, respectively. It should be noted that, the cross-sectional areas of the second ground pin 30S, the second switching voltage pin 30P, and the second power input pin 30D are larger to allow a larger current to pass.
In addition, the second lead assembly 3 of the present embodiment may further include another temperature sensing lead set 31 electrically connected to the temperature sensor 13B through the second circuit pattern layer 102. As shown in fig. 5, the temperature sensing pin set 31 may include a second positive pin 31A and a second negative pin 31B connected to the second positive pad 102A and the second negative pad 102B, respectively.
Fig. 6 and fig. 7 are schematic top view and schematic partial cross-section of a power package module according to a first embodiment of the invention. As shown in fig. 7, the power package module M1 of the first embodiment further includes two heat dissipation elements 4a,4b, and the two heat dissipation elements 4a,4b are respectively located on opposite sides of the electronic component 1. The two heat dissipation elements 4a,4b are respectively disposed on the first power element 11A and the second power element 12A, and are configured to dissipate heat generated during operation of the first power element 11A and the second power element 12A. That is, the first power element 11A and the second power element 12A are disposed between the heat sinks 4a,4b and the carrier 10. In one embodiment, the heat sinks 4a,4b are, for example, copper-clad ceramic substrates (Direct Bonded Copper, DBC) or directly electroplated copper ceramic substrates (Direct Plated Copper, DPC), but the invention is not limited thereto.
As shown in fig. 7, each heat sink 4a,4b may include a first conductive layer 41, a second conductive layer 42, and an insulating thermal conductor 43 between the first conductive layer 41 and the second conductive layer 42. The first conductive layer 41 has two pads (not numbered) separated from each other, and is disposed on the two first power elements 11a,11b (or the two second power elements 12a,12 b), respectively. The insulating heat conductor 43 is, for example, a ceramic plate or an insulating adhesive material with a high thermal conductivity, and the present invention is not limited thereto. The second conductive layer 42 is disposed on the insulating heat conductor 43 and has a larger area than the first conductive layer 41.
In addition, the power package module M1 further includes a package layer 5, and the package layer 5 at least encapsulates the electronic component 1. Since the power package module M1 of the present embodiment is an in-line power package module, a portion of each of the first power element pins 20 and the second power element pins 30 protrudes from one side surface 5s of the package layer 5 and is exposed outside the package layer 5. In addition, the heat sinks 4a,4b are partially exposed outside the encapsulation layer 5. As shown in fig. 7, the second conductive layers 42 of the heat dissipation elements 4a,4b are exposed outside the package layer 5, so that the heat generated during the operation of the power package module M1 is more effectively dissipated to the outside.
When the power package module M1 is applied to another system circuit (not shown), the first pin assembly 2 and the second pin assembly 3 of the power package module M1 are correspondingly connected to specific voltage terminals, so that the first power devices 11a,11b, the second power devices 12a,12b and other electronic devices (such as temperature sensors 13a,13 b) in the power package module M1 can be electrically connected to the system circuit.
Referring to fig. 6 again, in the present embodiment, the side surface 5s of the encapsulation layer 5 further has at least one recess region 5H (2 are shown as an example in fig. 6). The at least one recess region 5H may be located between two first power element pins 20 (e.g., the first switching voltage pin 20P and the first power input pin 20D) adjacent to each other, which need to pass a large current, in a top view, to increase a creepage distance (creepage distance) between the first switching voltage pin 20P and the first power input pin 20D. Referring to fig. 1 and fig. 6, it should be noted that the recess region 5H of the present embodiment extends from the top surface to the bottom surface of the package layer 5 and is located between the second switching voltage pin 30P and the second power input pin 30D to increase the creepage distance between the adjacent second switching voltage pin 30P and the second power input pin 30D. Thus, leakage between two adjacent first power element pins 20 or two adjacent second power element pins 30 can be avoided, and product reliability is reduced.
Referring to fig. 6 and 7, in the present embodiment, any one of the first power element pins 20 (e.g., the first ground pin 20S) and the corresponding second power element pin 30 (e.g., the second ground pin 30S) are aligned with each other in the thickness direction of the carrier 10. Referring to fig. 7, in the present embodiment, any one of the first power element pins 20 (e.g., the first ground pin 20S) and the corresponding second power element pin 30 (e.g., the second ground pin 30S) has a height difference H1 along the thickness direction of the carrier 10.
In the present embodiment, each of the first power element pins 20 and each of the second power element pins 30 are bent pins. As shown in fig. 7, each of the first power element pins 20 includes a first contact section 201 and a first non-contact section 202 connected to each other. Similarly, each of the second power element pins 30 includes a second contact section 301 and a second non-contact section 302 connected to each other. The first contact section 201 and the second contact section 301 are directly connected to the carrier 10, and the first non-contact section 202 and the second non-contact section 302 are not in contact with the carrier 10.
It should be noted that the carrier plate 10 protrudes from the first contact section 201 in the first direction D1 and extends below the first non-contact section 202. As shown in fig. 7, the side edge E1 of the carrier 10 protrudes from the first contact section 201 and the second contact section 301 in the first direction D1, and the carrier 10 extends between the first non-contact section 202 and the second non-contact section 302. The first contact section 201 (or the second contact section 301) has a length L1 in the first direction D1. In addition, the perpendicular projection of the first non-contact segment 202 (or the second non-contact segment 302) on the carrier 10 has a projection length L2 in the first direction D1.
In the present embodiment, the first non-contact segment 202 and the second non-contact segment 302 extend in different directions, and then bend to extend in the same direction (i.e. the first direction D1). Accordingly, each of the first non-contact section 202 and the second non-contact section 302 has a bending portion. The bending portion can increase the height difference H1 between the first non-contact section 202 and the second non-contact section 302, so that the power package module M1 has a larger operating voltage, but the invention is not limited thereto.
It should be noted that, the height difference H1 between the first non-contact section 202 and the second non-contact section 302 is an electrical gap between the first power element pin 20 and the second power element pin 30. The higher the operating voltage of the power packaging module M1, the greater the height difference H1 between the first non-contact section 202 and the second non-contact section 302 is to avoid arcing.
In the present embodiment, the vertical projection position of the bending portion of the first non-contact section 202 or the second non-contact section 302 on the carrier 10 falls within the carrier 10. In other words, the carrier plate 10 extends beyond the bending portion of the first non-contact section 202 (or the second non-contact section 302) in the first direction D1. Further, the carrier 10 of the present embodiment further includes an extension portion 103, and the extension portion 103 extends beyond the bending portion of the first non-contact section 202 (or the second non-contact section 302).
In this way, the creepage distance between the first power element pin (first ground pin 20S) and the second power element pin (second ground pin 30S) can also be increased. In an embodiment, the extension portion 103 is integrally formed with the insulating plate 100 and is made of the same material, but the invention is not limited thereto.
Second embodiment
Fig. 8 is a schematic partial cross-sectional view of a power package module according to a second embodiment of the invention. Elements of the present embodiment that are the same as those of the embodiment of fig. 7 have the same or similar reference numerals, and will not be described again. In the power package module M2 of the present embodiment, the encapsulation layer 5 does not completely encapsulate the carrier 10. Compared with the first embodiment, the side edge E1 of the carrier 10 of the present embodiment is exposed outside the encapsulation layer 5.
In detail, the extension portion 103 of the carrier 10 protrudes from the side surface 5s of the encapsulation layer 5 through the encapsulation layer 5 to form an electrical isolation portion GA for increasing the creepage distance between the first non-contact section 202 and the second non-contact section 302. Therefore, the electric leakage can be avoided and the product reliability can be reduced under the condition that the whole volume of the power packaging module M2 is not greatly increased. In addition, in one embodiment, the extension portion 103 (or the electrical isolation portion GA) extends in the second direction D2 and is located between the first lead assembly 2 and the second lead assembly 3.
Third embodiment
Referring to fig. 9, fig. 9 is a schematic partial cross-sectional view of a power package module according to a third embodiment of the invention. Elements of this embodiment that are the same as those of the embodiment of fig. 8 have the same or similar reference numerals and are not described again. In the power package module M3 of the present embodiment, the package layer 5 conformally encapsulates the extension portion 103 of the carrier 10, and the protrusion 51 is formed on the side surface 5s of the package layer 5.
Accordingly, in the present embodiment, the extension portion 103 protrudes from the side surface 5s of the encapsulation layer 5, but the protrusion 51 conformally covers the extension portion 103 to form the electrical isolation portion GA between the first power device pin 20 and the second power device pin 30. Therefore, the creepage distance between the first non-contact section 202 and the second non-contact section 302 can be increased as well, and the product reliability can be reduced without greatly increasing the overall volume of the power packaging module M3.
Fourth embodiment
Fig. 10 is a schematic partial cross-sectional view illustrating a power package module according to a fourth embodiment of the invention, in which a package layer is omitted. The components of the power packaging module M4 of the present embodiment that are the same as those of the power packaging module M1 of the first embodiment have the same or similar reference numerals, and will not be described again. In the present embodiment, the side surface 5s of the encapsulation layer 5 has one or more openings 5h. The opening 5h is recessed from the side surface 5s of the encapsulation layer 5 and extends into the encapsulation layer 5 to form an electrical isolation portion GA, thereby increasing the creepage distance between the first non-contact section 202 and the second non-contact section 302.
In an embodiment, the opening 5h may extend along the second direction D2 to increase the creepage distance between each first power element pin 20 and the corresponding second power element pin 30. That is, the extending direction of the opening 5H and the extending direction of the recess 5H shown in fig. 6 are staggered with each other. Further, the opening 5h may cross the entire side surface 5s in the second direction D2, but the invention is not limited thereto.
In another embodiment, the width of the at least one opening 5h in the second direction D2 is smaller than the length of the encapsulation layer 5 in the second direction D2, and may be formed only between one set of the first power element pins 20 and the second power element pins 30, which need to pass a large current and are aligned up and down. For example, at least one opening 5h may be formed between the first ground pin 20S and the second ground pin 30S, between the first switching voltage pin 20P and the second switching voltage pin, or between the first power input pin 20D and the second power input pin 30D.
Fifth embodiment
Fig. 11 is a schematic partial cross-sectional view illustrating a power package module omitting a package layer according to a fifth embodiment of the invention. The components of the power packaging module M5 of the present embodiment that are the same as those of the power packaging module M2 of the second embodiment have the same or similar reference numerals, and will not be described again.
In the present embodiment, the first power element pins 20 are straight pins, and the second power element pins 30 are bent pins. That is, the first non-contact section 202' does not have a bent portion, but the present invention is not limited thereto. In another embodiment, the first power element pins 20 may also be bent pins, and the second power element pins 30 are straight pins.
In addition, in the present embodiment, the height difference H2 between the first non-contact segment 202' and the second non-contact segment 302 can be reduced, and the volume of the power package module M5 can be reduced. The operating voltage of the power package module M5 of the present embodiment is relatively lower than that of the previous embodiment. However, by forming the electrical isolation portion GA between the first power element pin 20 and the second power element pin 30, leakage and lowering of product reliability can be avoided as well.
In addition, the power package module M5 further includes a heat sink 6, and the heat sink 6 may be disposed on the outer surface of the package layer 5 to enhance the heat dissipation effect. In this embodiment, the heat sink 6 is disposed on the top surface of the package layer 5, and is closer to the first power device pins 20 and further from the second power device pins 30. That is, the heat sink 6 is disposed above the heat spreader 4A and directly contacts the second conductive layer 42 and a portion of the top surface of the encapsulation layer 5.
Sixth embodiment
Fig. 12 is a schematic partial cross-sectional view illustrating a power package module according to a sixth embodiment of the invention, in which a package layer is omitted. The components of the power packaging module M6 of the present embodiment that are the same as those of the power packaging module M5 of the fifth embodiment have the same or similar reference numerals, and will not be described again.
In the present embodiment, each of the first power element pins 20 and each of the second power element pins 30 are linear pins. Accordingly, the height difference H3 between the first non-contact segment 202 'and the second non-contact segment 302' is smaller, and the size of the power package module M6 can be further reduced. However, the operating voltage of the power package module M6 of the present embodiment is relatively lower than that of the previous embodiment.
In addition, the power package module M6 may further include two heat sinks 6a,6b, and the two heat sinks 6a,6b may be disposed on the top surface and the bottom surface of the package layer 5, respectively, so as to enhance the heat dissipation effect. That is, one of the heat sinks 6A is disposed above the heat sink 4A and directly contacts the second conductive layer 42 and a portion of the top surface of the encapsulation layer 5. The other heat sink 6B is a portion of the bottom surface of the second conductive layer 42 and the encapsulation layer 5 that directly contacts the heat sink 4B.
Seventh embodiment
Fig. 13 to 15 are perspective exploded views of a power package module according to a seventh embodiment of the invention, wherein a package layer and a heat sink are omitted. The components of the power packaging module M7 of the present embodiment that are the same as those of the power packaging module M1 of the first embodiment have the same or similar reference numerals, and will not be described again.
In the power packaging module M7 of the present embodiment, at least one first power element pin 20 (e.g., the first switching voltage pin 20P) and a corresponding second power element pin 30 (e.g., the second switching voltage pin 30P) are disposed in a staggered manner. Thus, the shortest distance between the first switching voltage pin 20P and the second switching voltage pin 30P can be greatly increased, so as to avoid arc discharge and further improve the reliability of the product. In the present embodiment, the positions of the corresponding first gate pins 20G and the second gate pins 30G are also staggered, but the present invention is not limited thereto.
It should be noted that, in the seventh embodiment shown in fig. 13 to 15, the first power element pins 20 and the second power element pins 30 are bent pins, but the invention is not limited thereto. Further, the first power element pins 20 and the corresponding second power element pins 30, which are disposed offset from each other, may be linear pins. In addition, since a portion of the first power element pins 20 (e.g., the first switching voltage pins 20P) and the corresponding second power element pins 30 are disposed offset from each other, the power package module M7 of the present embodiment can still operate at a relatively high voltage even if the height difference between each of the first power element pins 20 and each of the second power element pins 30 is reduced. That is, the operating voltage of the power package module M7 of the present embodiment is relatively higher than that of the sixth embodiment.
The power package module M7 of the present embodiment has a larger size than the power package modules M1-M6 of the first to sixth embodiments. However, the power package module M7 of the embodiment of the present invention does not have a smaller size than the conventional power module packaged by wire bonding.
As shown in fig. 13 and 14, the shape and position of the first pads of the first circuit pattern layer 101 and the shape and position of the second pads of the second circuit pattern layer 102 are different from those of the first embodiment. For example, in the present embodiment, the second power input pad 102D has a larger area than the first power input pad 101D. Accordingly, in the present embodiment, the first circuit pattern layer 101 and the second circuit pattern layer 102 are not mirror-symmetrical with respect to the carrier 10.
Advantageous effects of the embodiment
The power packaging module and the manufacturing method thereof have the advantages that the power packaging module can extend to the lower part of the first non-contact section 202 by the first contact section 201 protruding from the carrier plate 10, so that the power packaging modules M1-M7 have smaller volumes, and the creepage distance between adjacent power element pins can be increased, so that the reliability is improved.
In addition, by the technical solution that the electrical isolation portion GA is located on the side surface 5s of the encapsulation layer 5 and between the first power element pin 20 and the second power element pin 30, a larger creepage distance between the first power element pin 20 and the second power element pin 30 corresponding thereto for transmitting a large current can be further used. Thus, leakage can be avoided and the reliability and voltage withstanding capability of the power package modules M1-M7 can be improved.
In addition, the power packaging modules M1-M7 provided by the embodiment of the invention do not have routing, but have smaller volume. Furthermore, in the carrier 10 of the embodiment of the present invention, the first circuit pattern layer 101 and the second circuit pattern layer 102 are utilized as the current transmission paths of the plurality of first power devices 11a,11b and the plurality of second power devices 12A, and the power package modules M1-M7 of the embodiment of the present invention can form a part of the normalization circuit, so that the power package modules M1-M7 can be applied to different circuit systems.
In an embodiment, by disposing the first circuit pattern layer 101 and the second circuit pattern layer 102 on two opposite sides of the insulating board 100, the number of power devices can be increased without increasing the area of the insulating board 100, so as to increase the power density (power density) of the power package modules M1-M7.
On the other hand, according to the actual requirement, temperature sensors 13a,13b for detecting temperature may be disposed on the carrier 10, and when the first power device group 11 (or the second power device group) is operated, the temperature sensors 13a,13b may be used to detect the temperature inside the power package module M1, so as to avoid damage to the first power devices 11a,11b (or the second power devices 12a,12 b) due to overheating.
The above disclosure is only a preferred embodiment of the present invention and is not intended to limit the claims of the present invention, so that all equivalent technical changes made by the application of the specification and the drawings of the present invention are included in the claims of the present invention.

Claims (14)

1. A power package module, the power package module comprising:
an electronic assembly at least comprises a carrier plate:
a first pin assembly including at least a first power element pin; and
the second pin assembly comprises at least one second power element pin, wherein at least one first power element pin and at least one second power element pin extend from different surfaces of the carrier plate respectively and have a height difference;
the first power element pin comprises a first contact section and a first non-contact section, the first contact section is directly connected with the carrier plate, the first non-contact section does not contact the carrier plate, and the carrier plate protrudes out of the first contact section and extends to the lower part of the first non-contact section.
2. The power package module of claim 1, further comprising:
the packaging layer is used for coating the electronic component, wherein at least one first power element pin and at least one second power element pin are respectively provided with a part protruding out of one side surface of the packaging layer and are exposed outside the packaging layer; and
an electrical isolation part is positioned on the side surface of the packaging layer and is positioned between at least one first power element pin and at least one second power element pin.
3. The power package module of claim 2, wherein an extension of the carrier plate protrudes through the encapsulation layer and beyond the side surface to form the electrical isolation.
4. The power package module of claim 2 wherein the carrier includes an extension portion protruding from the side surface, the package layer further including a protrusion conformally surrounding the extension portion to form the electrical isolation portion.
5. The power package module of claim 2 wherein the side surface of the encapsulation layer has an opening recessed from the side surface of the encapsulation layer into the interior of the encapsulation layer to form the electrical isolation.
6. The power package module of claim 2 wherein the first pin assembly includes a plurality of the first power element pins, the side surface of the package layer has a recessed area, and the recessed area is located between two adjacent first power element pins.
7. The power package module of claim 1, wherein at least one of the first power element pins and at least one of the second power element pins are aligned with each other in a thickness direction of the carrier.
8. The power package module of claim 1, wherein at least one of the first power element pins and at least one of the second power element pins are bent pins.
9. The power package module of claim 8, wherein the bent pin has a bent portion, and the carrier extends beyond the bent portion.
10. The power package module of claim 1, wherein the power package module further comprises: the electronic component comprises an encapsulation layer and a radiating fin, wherein the encapsulation layer encapsulates the electronic component, at least one first power element pin is a linear pin, at least one second power element pin is a bent pin, the radiating fin is arranged on the outer surface of the encapsulation layer, and the radiating fin is closer to at least one first power element pin and further away from at least one second power element pin.
11. The power package module of claim 1, wherein at least one of the first power element pins and at least one of the second power element pins are linear pins.
12. The power package module of claim 1, wherein at least one of the first power element pins and at least one of the second power element pins are offset from each other.
13. The power package module of claim 1, wherein the carrier plate further comprises:
an insulating plate having a first surface and a second surface opposite to each other, wherein the insulating plate has a side edge extending along a second direction;
a first circuit pattern layer disposed on the first surface of the insulating board, wherein the first lead assembly is connected to the first circuit pattern layer; a kind of electronic device with high-pressure air-conditioning system
And the second circuit pattern layer is arranged on the second surface of the insulating plate, wherein the second pin assembly is connected with the second circuit pattern layer.
14. The power package module of claim 1, wherein the electronic assembly further comprises a temperature sensor disposed on the carrier, and the first pin assembly further comprises a temperature sensing pin set electrically connected to the temperature sensor.
CN202210505760.2A 2022-05-10 2022-05-10 Power packaging module Pending CN117080196A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210505760.2A CN117080196A (en) 2022-05-10 2022-05-10 Power packaging module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210505760.2A CN117080196A (en) 2022-05-10 2022-05-10 Power packaging module

Publications (1)

Publication Number Publication Date
CN117080196A true CN117080196A (en) 2023-11-17

Family

ID=88713996

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210505760.2A Pending CN117080196A (en) 2022-05-10 2022-05-10 Power packaging module

Country Status (1)

Country Link
CN (1) CN117080196A (en)

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