CN117074987A - Power supply monitoring circuit - Google Patents

Power supply monitoring circuit Download PDF

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Publication number
CN117074987A
CN117074987A CN202310989891.7A CN202310989891A CN117074987A CN 117074987 A CN117074987 A CN 117074987A CN 202310989891 A CN202310989891 A CN 202310989891A CN 117074987 A CN117074987 A CN 117074987A
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China
Prior art keywords
circuit
resistor
power supply
power
threshold
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CN202310989891.7A
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Chinese (zh)
Inventor
黎毅辉
谭震宇
谢正权
刘志勇
潘念龙
田丰
王�锋
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Willfar Information Technology Co Ltd
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Willfar Information Technology Co Ltd
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Priority to CN202310989891.7A priority Critical patent/CN117074987A/en
Publication of CN117074987A publication Critical patent/CN117074987A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/40Testing power supplies

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Control Of Voltage And Current In General (AREA)

Abstract

The invention discloses a power supply monitoring circuit, wherein the power supply monitoring circuit comprises: a detection circuit and a power conversion circuit; the detection circuit is connected with the power supply conversion circuit; the detection circuit comprises a first threshold circuit, a second threshold circuit and a third threshold circuit; the second threshold circuit is respectively connected with the first threshold circuit and the third threshold circuit; the detection circuit is used for setting a power-on threshold value and a power-off threshold value through the first threshold circuit, the second threshold circuit and the third threshold circuit and filtering fluctuation of power supply voltage; the power supply conversion circuit is used for converting the first power supply voltage input by the detection circuit into the second power supply voltage. The invention solves the technical problems that the existing detection circuit cannot realize power-down logic level delay and unstable voltage.

Description

Power supply monitoring circuit
Technical Field
The present disclosure relates to electronic circuits, and particularly to a power supply monitoring circuit.
Background
At present, the function of a standby power supply of a terminal of the power distribution Internet of things is commonly built in equipment with a standard function, and the design of the standby power supply is commonly realized by using materials such as batteries, super capacitors and the like, and a booster chip and the like are matched to be used as a standby system design; the prior power distribution terminal with the standby power supply generally has the problems that when the discharge of the standby power supply is near the end, the operation of a booster chip is stopped suddenly, the voltage caused by the instantaneous loss of a load is unstable, namely, the voltage of a super capacitor or a battery is increased suddenly, the booster chip begins to work again, but the booster chip is insufficient to meet the continuous operation of a system, so that the phenomena of repeated restarting of the system, continuous flickering of an indicator lamp, frequent shaking of a key voltage signal of the system and the like are caused, the power failure of the terminal is not thorough, and meanwhile, the voltage of a power grid is unstable, and the voltage of the power distribution terminal is unstable. The existing power distribution terminals all have the function of power failure detection, when the main system power supply is lower than a set threshold value, a low-level signal is output and used for metering and managing write-protection operation before power failure of an MCU or a main control MCU, the power failure detection signals are powered on based on a power failure detection chip and the like, a time delay function is not provided, when the voltage shakes, the corresponding output has high-low level difference, and logic fixing of the voltage in fluctuation time cannot be realized. Therefore, a power supply monitoring circuit is needed to solve the technical problems that the existing detection circuit cannot realize the delay of the power-down logic level and the unstable voltage.
Disclosure of Invention
The invention mainly aims to provide a power supply monitoring circuit, which aims to solve the technical problems that the existing detection circuit cannot realize power-down logic level delay and unstable voltage.
To achieve the above object, the present invention provides a power supply monitoring circuit, wherein the power supply monitoring circuit includes:
a detection circuit and a power conversion circuit; the detection circuit is connected with the power supply conversion circuit;
the detection circuit comprises a first threshold circuit, a second threshold circuit and a third threshold circuit; the second threshold circuit is respectively connected with the first threshold circuit and the third threshold circuit;
the detection circuit is used for setting a power-on threshold value and a power-off threshold value through the first threshold circuit, the second threshold circuit and the third threshold circuit and filtering fluctuation of power supply voltage;
the power supply conversion circuit is used for converting the first power supply voltage input by the detection circuit into the second power supply voltage.
In one preferred embodiment, the first threshold circuit includes a zener diode V9 and a resistor R174; one end of the voltage stabilizing diode V9 is connected with a power supply end, the other end of the voltage stabilizing diode V9 is connected with a resistor R174, and the other end of the resistor R174 is respectively connected with a third threshold circuit and a power supply conversion circuit.
In one of the preferred schemes, the second threshold circuit comprises a first voltage dividing circuit, a voltage reference detection chip D25, a triode V55 and a current limiting circuit; one end of the first voltage dividing circuit is connected with the power end, the other end of the first voltage dividing circuit is connected with the voltage reference detection chip D25, the other end of the voltage reference detection chip D25 is connected with the current limiting circuit, the other end of the current limiting circuit is connected with the base electrode of the triode V55, the collector electrode of the triode V55 is connected with the third threshold circuit, and the emitter electrode of the triode V55, the first voltage dividing circuit and the other end of the voltage reference detection chip D25 are grounded.
In one of the preferred embodiments, the first voltage dividing circuit includes a resistor R160 and a resistor R161; one end of the resistor R160 is connected with a power supply end, the other end of the resistor R160 is respectively connected with the voltage reference detection chip D25 and the resistor R161, and the other end of the resistor R161 is grounded.
In one of the preferred schemes, the current limiting circuit comprises a resistor R162 and a resistor R164; one end of the resistor R162 is connected with the power end, the other end of the resistor R162 is respectively connected with the resistor R164 and the voltage reference detection chip D25, and the other end of the resistor R164 is connected with the base electrode of the triode V55.
In one preferred embodiment, the third threshold circuit includes a second voltage dividing circuit, a diode V58, a triode V56, a capacitor C115, a resistor R170, and a triode V57; the base electrode of the triode V56 is respectively connected with a second voltage dividing circuit and a diode V58, and the other end of the second voltage dividing circuit is respectively connected with a second threshold circuit and a ground end; the emitter of the triode V56 is respectively connected with the capacitor C115 and the other end of the diode V58, the collector of the triode V56 is connected with the resistor R170, the other end of the resistor R170 is connected with the base of the triode V57, and the collector of the triode V57 is respectively connected with the first threshold circuit and the power supply conversion circuit; the emitter of the triode V57 and the other end of the capacitor C115 are grounded.
In one of the preferred embodiments, the second voltage dividing circuit includes a resistor R163, a resistor R168, and a resistor R171; one end of the resistor R163 is connected with a power supply end, the other end of the resistor R163 is respectively connected with a second threshold circuit and the resistor R168, the other end of the resistor R168 is respectively connected with a resistor R171 and a base electrode of the triode V56, and the other end of the resistor R171 is grounded.
In one of the preferred schemes, the said power conversion circuit includes the power chip U7;
the 1 pin of the power chip U7 is connected with the capacitor C379, the other end of the capacitor C379 is respectively connected with the inductor L27 and the 3 pin of the power chip U7, and the other end of the inductor L27 is respectively connected with the output regulating circuit, the first filter circuit and the external module;
pins 2, 8 and 6 of the power chip U7 are connected with a second filter circuit;
the pins 4 and 9 of the power chip U7 are grounded;
the 5 pin of the power chip U7 is connected with the output adjusting circuit;
and the 7 pins of the power chip U7 are respectively connected with the first threshold circuit and the third threshold circuit.
In one of the preferred embodiments, the second filter circuit includes a capacitor C376, a capacitor C381, a capacitor C382, and a capacitor C380;
one end of the capacitor C376 and one end of the capacitor C381 are connected with the 2 pins of the power chip U7;
one end of the capacitor C382 is connected with the 8 pin of the power chip U7;
one end of the capacitor C380 is connected with the 6 pin of the power chip U7;
the other ends of the capacitor C376, the capacitor C381, the capacitor C382 and the capacitor C380 are grounded.
In one of the preferred embodiments, the output adjusting circuit includes a resistor R574 and a resistor R575; one end of the resistor R574 is connected with the inductor L27 and the external module respectively, the other end of the resistor R574 is connected with the resistor R575 and the 5 pins of the power chip U7 respectively, and the other end of the resistor R575 is grounded.
In the above technical scheme of the invention, the power supply monitoring circuit comprises a detection circuit and a power supply conversion circuit; the detection circuit is connected with the power supply conversion circuit; the detection circuit comprises a first threshold circuit, a second threshold circuit and a third threshold circuit; the second threshold circuit is respectively connected with the first threshold circuit and the third threshold circuit; the detection circuit is used for setting a power-on threshold value and a power-off threshold value through the first threshold circuit, the second threshold circuit and the third threshold circuit and filtering fluctuation of power supply voltage; the power supply conversion circuit is used for converting the first power supply voltage input by the detection circuit into the second power supply voltage. The invention solves the technical problems that the existing detection circuit cannot realize power-down logic level delay and unstable voltage.
In the invention, the power-on threshold value is set through the first threshold circuit, so that the fluctuation of the power supply voltage is filtered before the level does not reach the power-on threshold value, and when the system is powered on, the system power supply chip can be enabled only when the system power supply reaches the power-on threshold value, so that the reliable conversion of the level is realized.
In the invention, the power-down detection and the power-down delay function can be realized through the second threshold circuit and the third threshold circuit, and the logic stability when the voltage fluctuation occurs to the system due to external reasons is realized through setting the power-down threshold value, so that the problem that the power-down is not thorough when the power supply of the whole system is unstable is avoided.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the invention, and that other drawings may be obtained from the structures shown in these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a power monitoring circuit according to an embodiment of the invention;
FIG. 2 is a circuit diagram of a power monitoring circuit according to an embodiment of the invention;
fig. 3 is a circuit diagram of a detection circuit according to an embodiment of the present invention.
Reference numerals illustrate:
1. a detection circuit; 11. a first threshold circuit; 12. a second threshold circuit; 13. a third threshold circuit; 2. and a power supply conversion circuit.
The achievement of the object, functional features and advantages of the present invention will be further described with reference to the drawings in connection with the embodiments.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, based on the embodiments of the invention, which are apparent to those of ordinary skill in the art without inventive faculty, are intended to be within the scope of the invention.
It should be noted that all directional indicators (such as upper and lower … …) in the embodiments of the present invention are merely used to explain the relative positional relationship, movement conditions, etc. between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
Furthermore, descriptions such as those referred to as "first," "second," and the like, are provided for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implying an order of magnitude of the indicated technical features in the present disclosure. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature.
Moreover, the technical solutions of the embodiments of the present invention may be combined with each other, but it is necessary to be based on the fact that those skilled in the art can implement the embodiments, and when the technical solutions are contradictory or cannot be implemented, it should be considered that the combination of the technical solutions does not exist, and is not within the scope of protection claimed by the present invention.
Referring to fig. 1-3, according to an aspect of the present invention, there is provided a power supply monitoring circuit, wherein the power supply monitoring circuit includes:
a detection circuit 1 and a power conversion circuit 2; the detection circuit 1 is connected with the power supply conversion circuit 2;
the detection circuit 1 includes a first threshold circuit 11, a second threshold circuit 12, and a third threshold circuit 13; the second threshold circuit 12 is respectively connected with the first threshold circuit 11 and the third threshold circuit 13;
the detection circuit 1 is used for filtering the fluctuation of the power supply voltage by setting a power-on threshold value and a power-off threshold value through the first threshold circuit 11, the second threshold circuit 12 and the third threshold circuit 13;
the power conversion circuit 2 is configured to convert a first power voltage input from the detection circuit 1 into a second power voltage.
Specifically, in the present embodiment, the first threshold circuit 11 includes a zener diode V9 and a resistor R174; one end of the zener diode V9 is connected with a power supply end, the other end of the zener diode V9 is connected with a resistor R174, and the other end of the resistor R174 is respectively connected with the third threshold circuit 13 and the power supply conversion circuit 2; when the voltage stabilizing threshold value VTH1 of the power supply end V12P0 is less than or equal to V9, namely the power supply end V12P0 is less than or equal to the first threshold value VTH1, outputting a logic low level, wherein the external voltage fluctuation does not cause the level change of the EN end; when V12P0 reaches a first threshold value VTH1, enabling an EN terminal, and performing power voltage conversion by the power conversion circuit 2; by adding a determination mechanism of a first threshold value VTH1, when the main power supply of the system is lower than VTH1, the power supply conversion chip cannot be enabled, wherein the first threshold value can be different according to different component type selection parameters, and the first threshold value is the power-on threshold value.
Specifically, in the present embodiment, the second threshold circuit 12 includes a first voltage dividing circuit, a voltage reference detecting chip D25, a transistor V55, and a current limiting circuit; one end of the first voltage dividing circuit is connected with the power end, the other end of the first voltage dividing circuit is connected with the voltage reference detection chip D25, the other end of the voltage reference detection chip D25 is connected with the current limiting circuit, the other end of the current limiting circuit is connected with the base electrode of the triode V55, the collector electrode of the triode V55 is connected with the third threshold circuit 13, and the emitter electrode of the triode V55, the first voltage dividing circuit and the other end of the voltage reference detection chip D25 are grounded.
Specifically, in the present embodiment, the first voltage dividing circuit includes a resistor R160 and a resistor R161; one end of the resistor R160 is connected with a power supply end, the other end of the resistor R160 is respectively connected with the voltage reference detection chip D25 and the resistor R161, and the other end of the resistor R161 is grounded.
Specifically, in the present embodiment, the current limiting circuit includes a resistor R162 and a resistor R164; one end of the resistor R162 is connected with a power supply end, the other end of the resistor R162 is respectively connected with the resistor R164 and the voltage reference detection chip D25, and the other end of the resistor R164 is connected with the base electrode of the triode V55; the resistor R162 and the resistor R164 have the current limiting function, meanwhile, the resistor R162 also has the pull-up function, the level of the voltage reference detection chip D25 before reaching the threshold voltage is determined by the pull-up of the resistor R162, and the voltage reference detection chip D can act to pull down after reaching the threshold voltage; the resistance value of the resistor R164 needs to be set to kΩ, and when the transistor V55 operates, the voltage between the voltage reference detecting chip D25 and the resistor R162 is prevented from being clamped to 0.7V.
Specifically, in this embodiment, the second threshold circuit 12 is provided with a second threshold VTH2, where the second threshold VTH2 is a threshold voltage obtained by matching the voltage reference detecting chip D25 with resistors in the first voltage dividing circuit and the current limiting circuit; when the power supply terminal V12P0 is lower than the set second threshold VTH2, the voltage reference detecting chip D25 is turned off, the transistor V55 is turned on, and the capacitor C115 cannot be charged; when the power supply end V12P0 is higher than a set second threshold value VTH2, the voltage reference detection chip D25 is turned on, the triode V55 is turned off, the capacitor C115 starts to charge, the final charge cut-off level is obtained by subtracting the diode 0.7V voltage drop of the diode V58 from the level of the resistor R171 after the voltage of the V12P0 is divided by the second voltage dividing circuit, and the voltage at the two ends of the capacitor C115 is a set third threshold value; when the power is on, when VTH1 is less than or equal to V12P0 and less than or equal to VTH2, the EN terminal is enabled, but the capacitor C115 is not charged, so that the overload of the power supply which is incorporated into the load capacitor under the condition of unstable power supply of V12P0 can be avoided; when VTH2 is less than or equal to V12P0, the enable EN terminal starts to charge the capacitor C115, and charges to a third threshold value VTH3 after V12P0 is stable; by setting the second threshold value as the power-on threshold value.
Specifically, in this embodiment, the third threshold circuit 13 includes a second voltage dividing circuit, a diode V58, a transistor V56, a capacitor C115, a resistor R170, and a transistor V57; the base electrode of the triode V56 is respectively connected with a second voltage dividing circuit and a diode V58, and the other end of the second voltage dividing circuit is respectively connected with the second threshold circuit 12 and the ground terminal; the emitter of the triode V56 is respectively connected with the capacitor C115 and the other end of the diode V58, the collector of the triode V56 is connected with the resistor R170, the other end of the resistor R170 is connected with the base of the triode V57, and the collector of the triode V57 is respectively connected with the first threshold circuit 11 and the power supply conversion circuit 2; the emitter of the triode V57 and the other end of the capacitor C115 are grounded; the capacitor C115 is a delay electrolytic capacitor, and can be replaced by a mode of parallel combination of a plurality of patch capacitors, tantalum capacitors, super capacitors or a plurality of small-capacity capacitors with other similar properties; the transistor V57 may be replaced by an NMOS transistor, which is not particularly limited in the present invention.
Specifically, in the present embodiment, the second voltage dividing circuit includes a resistor R163, a resistor R168, and a resistor R171; one end of the resistor R163 is connected with a power supply end, the other end of the resistor R163 is respectively connected with the second threshold circuit 12 and the resistor R168, the other end of the resistor R168 is respectively connected with a resistor R171 and a base electrode of the triode V56, and the other end of the resistor R171 is grounded.
Specifically, in the present embodiment, the third threshold circuit 13 is provided with a third threshold value and a fourth threshold value, the third threshold value VTH3 is the voltage across the capacitor C115, and the fourth threshold value VTH4 is (r163+r168+r171) (VTH 3-0.7)/R171; when power is lost, enabling an EN terminal when V12P0 is more than or equal to VTH4, at the moment, discharging a capacitor C115 without outwards, when VTH2 is less than or equal to V12P0 and is less than or equal to VTH4, discharging the capacitor C115 outwards, discharging a power supply terminal V12P0 through a triode V56, a resistor R168 and a resistor R163 according to the characteristic of the triode serving as a current control device, simultaneously discharging a ground terminal through a triode V56, a resistor R170 and a triode V57, and when discharging the ground terminal through the triode V56, the resistor R170 and the triode V57, conducting the triode V57, and pulling the EN terminal low; when V12P0 is less than or equal to VTH2, the voltage reference detection chip D25 is turned off, the triode V55 is turned on, the capacitor C115 discharges to the ground through the triode V56, the resistor R168 and the triode V55, meanwhile, the capacitor C115 discharges to the ground through the triode V56, the resistor R170 and the triode V57, and meanwhile, the EN terminal is at a low level; by adjusting the parameters of the capacitor C115, the R163 of the second voltage divider circuit, the resistor R163, and the resistor R170, the power-down process can be implemented, and the EN is maintained at a low level for a period of time, and the fourth threshold is a power-down threshold.
Specifically, when the main power supply of the system is lower than VTH2, the power-down delay function is disabled, and when the main power supply of the system is powered down to be lower than VTH1, the logic low is judged; when the system main power supply is higher than VTH2, the charging function of the delay electrolytic capacitor C115 is started, and when the system main power supply is stable, the delay electrolytic capacitor is charged to VTH3; once the power supply of the main system is lower than VTH4, the delay electrolytic capacitor discharges outwards, the delay function is started, and the jitter of the external system power supply at the moment of power failure in the discharge time of the delay electrolytic capacitor is only smaller than or equal to VHT4, so that the EN terminal can be maintained to be at logic low level; the delay time may be set by the capacitor C115 and the resistor in the discharge path.
Specifically, in the present embodiment, the power conversion circuit 2 includes a power chip U7; the power supply chip can adopt a TPS54339 chip, the invention is not particularly limited, and the power supply chip can be particularly set according to the needs; the power supply chip U7 is used for converting the first power supply voltage input by the detection circuit 1 into the second power supply voltage, wherein the first power supply voltage is 12V, and the second power supply voltage is 5V;
the 1 pin of the power chip U7 is connected with the capacitor C379, the other end of the capacitor C379 is respectively connected with the inductor L27 and the 3 pin of the power chip U7, and the other end of the inductor L27 is respectively connected with the output regulating circuit, the first filter circuit and the external module;
pins 2, 8 and 6 of the power chip U7 are connected with a second filter circuit;
the pins 4 and 9 of the power chip U7 are grounded;
the 5 pin of the power chip U7 is connected with the output adjusting circuit;
and the pin 7 of the power chip U7 is respectively connected with the first threshold circuit 11 and the third threshold circuit 13.
Specifically, in the present embodiment, the second filter circuit includes a capacitor C376, a capacitor C381, a capacitor C382, and a capacitor C380; the capacitor C376, the capacitor C381 and the capacitor C380 are filter capacitors, and the capacitor C382 is a soft start capacitor;
one end of the capacitor C376 and one end of the capacitor C381 are connected with the 2 pins of the power chip U7;
one end of the capacitor C382 is connected with the 8 pin of the power chip U7;
one end of the capacitor C380 is connected with the 6 pin of the power chip U7;
the other ends of the capacitor C376, the capacitor C381, the capacitor C382 and the capacitor C380 are grounded.
Specifically, in the present embodiment, the output adjustment circuit includes a resistor R574 and a resistor R575; one end of the resistor R574 is connected with the inductor L27 and the external module respectively, the other end of the resistor R574 is connected with the resistor R575 and the 5 pins of the power chip U7 respectively, and the other end of the resistor R575 is grounded.
Specifically, in this embodiment, when V12P0 is lower than VTH1 during power-up, the EN terminal of the power chip U7 is at a low level, and at this time, the power chip U7 does not perform power voltage conversion and does not output 5V voltage; when V12P0 is higher than VTH1 and lower than VTH2, the capacitor C115 is forbidden to charge, and the EN terminal outputs a high level, at this time, the power chip U7 starts to output 5V voltage, when V12P0 is higher than VTH2, the capacitor C115 is started to charge, at this time, the EN terminal continuously enables the high level, and the power chip U7 continuously outputs 5V voltage; when power is off, when V12P0 is lower than VTH4, capacitor C115 begins to discharge, triode V56 and triode V57 are conducted, EN end is pulled down, at the moment, power supply chip U7 stops working, and output is closed; through carrying out parameter configuration to resistance R163, resistance R168, resistance R170 and electric capacity C115, can satisfy the threshold setting of falling power and fall power delay time setting, realize that the power supply falls the filtering of power supply voltage fluctuation in the twinkling of an eye, the liquid crystal display goes on and off and the system restarts the not thorough problem of falling power such as system repeatedly of avoiding the terminal pilot lamp.
Specifically, in this embodiment, by increasing the power-on threshold value and the power-off threshold value, the power conversion circuit 2 enables signal control, so as to ensure that the power-on of the main system 12V reaches a certain threshold value to start enabling the power chip U7, thereby improving the stability of power supply, and meanwhile, by the power-off delay protection function, the logic stability of the main system when voltage fluctuation occurs due to external reasons is also realized, so that the problems of flicker of the indication lamp, on-off of the liquid crystal screen, repeated restarting of the system and the like, which are caused by the instability of the power supply, are not thoroughly solved.
The foregoing description of the preferred embodiments of the present invention should not be construed as limiting the scope of the invention, but rather as utilizing equivalent structural changes made in the description of the present invention and the accompanying drawings or directly/indirectly applied to other related technical fields under the inventive concept of the present invention.

Claims (10)

1. A power supply monitoring circuit, the power supply monitoring circuit comprising:
a detection circuit and a power conversion circuit; the detection circuit is connected with the power supply conversion circuit;
the detection circuit comprises a first threshold circuit, a second threshold circuit and a third threshold circuit; the second threshold circuit is respectively connected with the first threshold circuit and the third threshold circuit;
the detection circuit is used for setting a power-on threshold value and a power-off threshold value through the first threshold circuit, the second threshold circuit and the third threshold circuit and filtering fluctuation of power supply voltage;
the power supply conversion circuit is used for converting the first power supply voltage input by the detection circuit into the second power supply voltage.
2. The power supply monitoring circuit of claim 1, wherein the first threshold circuit comprises a zener diode V9 and a resistor R174; one end of the voltage stabilizing diode V9 is connected with a power supply end, the other end of the voltage stabilizing diode V9 is connected with a resistor R174, and the other end of the resistor R174 is respectively connected with a third threshold circuit and a power supply conversion circuit.
3. A power supply monitoring circuit according to any one of claims 1-2, wherein the second threshold circuit comprises a first voltage dividing circuit, a voltage reference detection chip D25, a transistor V55 and a current limiting circuit; one end of the first voltage dividing circuit is connected with the power end, the other end of the first voltage dividing circuit is connected with the voltage reference detection chip D25, the other end of the voltage reference detection chip D25 is connected with the current limiting circuit, the other end of the current limiting circuit is connected with the base electrode of the triode V55, the collector electrode of the triode V55 is connected with the third threshold circuit, and the emitter electrode of the triode V55, the first voltage dividing circuit and the other end of the voltage reference detection chip D25 are grounded.
4. A power supply monitoring circuit according to claim 3, wherein the first voltage divider circuit comprises a resistor R160 and a resistor R161; one end of the resistor R160 is connected with a power supply end, the other end of the resistor R160 is respectively connected with the voltage reference detection chip D25 and the resistor R161, and the other end of the resistor R161 is grounded.
5. A power supply monitoring circuit according to claim 3, wherein the current limiting circuit comprises a resistor R162 and a resistor R164; one end of the resistor R162 is connected with the power end, the other end of the resistor R162 is respectively connected with the resistor R164 and the voltage reference detection chip D25, and the other end of the resistor R164 is connected with the base electrode of the triode V55.
6. A power supply monitoring circuit according to any one of claims 1-2, wherein the third threshold circuit comprises a second voltage divider circuit, a diode V58, a transistor V56, a capacitor C115, a resistor R170 and a transistor V57; the base electrode of the triode V56 is respectively connected with a second voltage dividing circuit and a diode V58, and the other end of the second voltage dividing circuit is respectively connected with a second threshold circuit and a ground end; the emitter of the triode V56 is respectively connected with the capacitor C115 and the other end of the diode V58, the collector of the triode V56 is connected with the resistor R170, the other end of the resistor R170 is connected with the base of the triode V57, and the collector of the triode V57 is respectively connected with the first threshold circuit and the power supply conversion circuit; the emitter of the triode V57 and the other end of the capacitor C115 are grounded.
7. The power supply monitoring circuit of claim 6, wherein the second voltage divider circuit comprises a resistor R163, a resistor R168, and a resistor R171; one end of the resistor R163 is connected with a power supply end, the other end of the resistor R163 is respectively connected with a second threshold circuit and the resistor R168, the other end of the resistor R168 is respectively connected with a resistor R171 and a base electrode of the triode V56, and the other end of the resistor R171 is grounded.
8. A power supply monitoring circuit according to any one of claims 1-2, wherein the power supply conversion circuit comprises a power supply chip U7;
the 1 pin of the power chip U7 is connected with the capacitor C379, the other end of the capacitor C379 is respectively connected with the inductor L27 and the 3 pin of the power chip U7, and the other end of the inductor L27 is respectively connected with the output regulating circuit, the first filter circuit and the external module;
pins 2, 8 and 6 of the power chip U7 are connected with a second filter circuit;
the pins 4 and 9 of the power chip U7 are grounded;
the 5 pin of the power chip U7 is connected with the output adjusting circuit;
and the 7 pins of the power chip U7 are respectively connected with the first threshold circuit and the third threshold circuit.
9. The power supply monitoring circuit of claim 8, wherein the second filter circuit comprises a capacitor C376, a capacitor C381, a capacitor C382, and a capacitor C380;
one end of the capacitor C376 and one end of the capacitor C381 are connected with the 2 pins of the power chip U7;
one end of the capacitor C382 is connected with the 8 pin of the power chip U7;
one end of the capacitor C380 is connected with the 6 pin of the power chip U7;
the other ends of the capacitor C376, the capacitor C381, the capacitor C382 and the capacitor C380 are grounded.
10. The power supply monitoring circuit of claim 8, wherein the output regulation circuit comprises a resistor R574 and a resistor R575; one end of the resistor R574 is connected with the inductor L27 and the external module respectively, the other end of the resistor R574 is connected with the resistor R575 and the 5 pins of the power chip U7 respectively, and the other end of the resistor R575 is grounded.
CN202310989891.7A 2023-08-08 2023-08-08 Power supply monitoring circuit Pending CN117074987A (en)

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CN202310989891.7A CN117074987A (en) 2023-08-08 2023-08-08 Power supply monitoring circuit

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CN202310989891.7A CN117074987A (en) 2023-08-08 2023-08-08 Power supply monitoring circuit

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CN117074987A true CN117074987A (en) 2023-11-17

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