CN219758374U

CN219758374U - Power-on detection circuit and electronic equipment

Info

Publication number: CN219758374U
Application number: CN202320750153.2U
Authority: CN
Inventors: 李瑞祥; 杨辉; 吴昂瑾
Original assignee: Huichuan New Energy Automotive Technology Changzhou Co ltd
Current assignee: Huichuan New Energy Automotive Technology Changzhou Co ltd
Priority date: 2023-04-06
Filing date: 2023-04-06
Publication date: 2023-09-26
Anticipated expiration: 2033-04-06

Abstract

The utility model discloses a power-on detection circuit and electronic equipment, wherein the power-on detection circuit comprises a voltage detection output circuit, and the voltage detection output circuit is used for outputting a power-on detection signal when a detection end of the voltage detection output circuit detects power-on voltage; the output end of the delay circuit is connected with the input end of the voltage detection output circuit, and the delay circuit is used for controlling the voltage detection output circuit to maintain and output the power-on detection signal within preset time when the voltage detection output circuit outputs the power-on detection signal; the technical scheme of the utility model aims to effectively detect the power-on voltage with shorter existing time, thereby indicating the equipment to execute the wake-up operation.

Description

Power-on detection circuit and electronic equipment

Technical Field

The utility model relates to the technical field of power-on detection circuits, in particular to a power-on detection circuit and electronic equipment.

Background

Currently, in many application scenarios, it is required to detect a voltage and instruct a device to perform a corresponding operation through a voltage detection result.

Taking an application scenario of equipment wake-up as an example, the equipment is generally provided with a power-on detection circuit for detecting whether the equipment has an access power-on voltage or not, so that an MCU control system can enter a sleep mode when the power-on voltage is not accessed, and the wake-up system can be controlled by the MCU when the power-on voltage is accessed to the equipment, so that the power loss of the system when the system does not work is reduced. However, when the circuit fails due to abnormal power-up of the device, for example, the circuit is open or short-circuited after the voltage is powered up, the power-up voltage has a short time, and the MCU may not be able to effectively detect a short power-up process of the power-up voltage, so that the device cannot be awakened, and the circuit of the device is always in a failure state.

Disclosure of Invention

The utility model mainly aims to provide a power-on detection circuit and electronic equipment, which aim to effectively detect power-on voltage with shorter existing time so as to instruct the equipment to execute wake-up operation.

In order to achieve the above object, the power-on detection circuit provided by the present utility model includes:

the voltage detection output circuit is used for outputting a power-on detection signal when the detection end of the voltage detection output circuit detects power-on voltage;

the output end of the delay circuit is connected with the input end of the voltage detection output circuit, and the delay circuit is used for controlling the voltage detection output circuit to maintain and output the power-on detection signal in a preset time when the voltage detection output circuit outputs the power-on detection signal.

Optionally, the delay circuit includes:

the first reference voltage output circuit is connected with the first input end of the voltage detection output circuit, and is used for outputting a first reference voltage to the first input end of the voltage detection output circuit when the voltage detection output circuit is converted from a working state in which the power-on voltage is detected to a working state in which the power-on voltage is not detected;

The second reference voltage output circuit is connected with the second input end of the voltage detection output circuit and is used for outputting a second reference voltage to the second input end of the voltage detection output circuit when the voltage detection output circuit outputs the power-on detection signal;

the voltage detection output circuit is further used for maintaining and outputting the power-on detection signal according to the relation between the first reference voltage and the second reference voltage.

Optionally, the first reference voltage output circuit includes a clamping diode, an anode of the clamping diode is connected to a first input end of the voltage detection output circuit, a cathode of the clamping diode is connected to an output end of the voltage detection output circuit, and the first reference voltage is a clamping voltage of the clamping diode.

Optionally, the second reference voltage output circuit includes an energy storage capacitor, a fifth resistor and a sixth resistor, where a first end of the energy storage capacitor and a first end of the fifth resistor are respectively connected to a second input end of the voltage detection output circuit, a second end of the energy storage capacitor and a second end of the fifth resistor are grounded, a first end of the sixth resistor is connected to a second input end of the voltage detection output circuit, a second end of the sixth resistor is connected to a connection node between an output end of the voltage detection output circuit and a power supply voltage, and when the voltage detection output circuit outputs the power-on detection signal, the energy storage capacitor discharges, and the second reference voltage is a discharge voltage of the energy storage capacitor.

Optionally, the voltage detection output circuit includes:

the detection end of the voltage trigger circuit is used for detecting the power-on voltage, and the voltage trigger circuit is used for outputting a power-on detection trigger signal when detecting that the preset condition is met between the power-on voltage and the threshold voltage;

and the first input end of the detection output circuit is connected with the output end of the voltage trigger circuit, and the detection output circuit is used for being triggered when receiving the power-on detection trigger signal and outputting the power-on detection signal.

Optionally, the voltage trigger circuit includes:

the input end of the first voltage dividing circuit is used for accessing the power-on voltage, and the first voltage dividing circuit is used for outputting the accessed power-on voltage after voltage dividing treatment;

and the input end of the threshold setting circuit is connected with the output end of the first voltage dividing circuit and is used for outputting the power-on detection trigger signal to the detection output circuit when the voltage obtained after the power-on voltage is detected to be subjected to voltage dividing treatment reaches the threshold voltage.

Optionally, the threshold setting circuit includes a photo coupler, and the photo coupler includes a light emitting diode and a phototransistor;

The anode of the light-emitting diode is connected with the output end of the first voltage dividing circuit, and the cathode of the light-emitting diode is grounded; the collector of the phototriode is connected with the first input end of the detection output circuit, and the emitter of the phototriode is grounded.

Optionally, the threshold setting circuit further comprises a voltage regulator tube;

the cathode of the voltage stabilizing tube is connected with the output end of the first voltage dividing circuit, and the anode of the voltage stabilizing tube is connected with the anode of the light emitting diode.

Optionally, the first voltage dividing circuit includes a first resistor and a second resistor;

the first end of the first resistor is used for being connected with the power-on voltage, the second end of the first resistor is connected with the cathode of the voltage stabilizing tube, the first end of the second resistor is connected to a connecting node between the second end of the first resistor and the cathode of the voltage stabilizing tube, and the second end of the second resistor is grounded.

Optionally, the detection output circuit includes a comparator;

the first input end of the comparator is connected with the output end of the voltage trigger circuit, the delay circuit is respectively connected with the input end of the comparator and the output end of the comparator, and the comparator is used for outputting the power-on detection signal when receiving the power-on detection trigger signal and maintaining to output the power-on detection signal within the preset time according to the delay signal input by the delay circuit.

Optionally, the detection output circuit further includes a second voltage dividing circuit, where the second voltage dividing circuit includes a third resistor and a fourth resistor;

the first end of the third resistor is connected with the power supply voltage, the second end of the third resistor is connected with the first input end of the comparator, the first end of the fourth resistor is connected to a connection node between the second end of the third resistor and the first input end of the comparator, and the second end of the fourth resistor is grounded.

The utility model also provides electronic equipment, which comprises a controller and the power-on detection circuit; the input end of the controller is connected with the output end of the power-on detection circuit, and the controller is used for detecting a power-on detection signal and waking up the electronic equipment according to the power-on detection signal.

According to the technical scheme, the delay circuit is arranged, and is used for delaying the action of the voltage detection output circuit for outputting the power-on detection signal by accessing the power-on voltage to the voltage detection output circuit, so that the time of the voltage detection output circuit for continuously outputting the power-on detection signal can be prolonged, the power-on detection signal can be continuously received by the controller in a delay period, and therefore, the power-on detection signal output by the voltage detection output circuit can be scanned when the controller scans again after finishing one scanning period even if the controller is in the interval time of two scanning, the controller can effectively detect the power-on voltage with short existing time, and accordingly the controller can instruct the equipment to execute the wake-up operation according to the power-on detection signal, namely, the controller wakes up the equipment according to the power-on detection signal, the problem that the power-on voltage has short existing time and cannot be detected by the controller due to equipment abnormality is solved, and the reliability of the equipment is improved.

Drawings

In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic block diagram of a power-up detection circuit according to an embodiment of the present utility model;

FIG. 2 is a schematic block diagram of a power-up detection circuit according to another embodiment of the present utility model;

FIG. 3 is a schematic block diagram of a power-up detection circuit according to another embodiment of the present utility model;

FIG. 4 is a schematic block diagram of a power-up detection circuit according to another embodiment of the present utility model;

fig. 5 is a circuit configuration diagram of an embodiment of a power-up detection circuit of the present utility model.

Reference numerals illustrate:

the achievement of the objects, functional features and advantages of the present utility model will be further described with reference to the accompanying drawings, in conjunction with the embodiments.

Detailed Description

The following description of the embodiments of the present utility model will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

Furthermore, descriptions such as those referred to as "first," "second," and the like, are provided for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implying an order of magnitude of the indicated technical features in the present disclosure. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present utility model.

The utility model provides a power-on detection circuit.

In addition, the prior art generally adopts an operational amplifier chip to detect the power-on voltage, so that the MCU is used for sampling the voltage all the time, the working state is kept incapable of being dormant, the power consumption of the MCU is increased, an additional power supply is needed for supplying power to the operational amplifier chip, and the circuit is complex and the cost is high.

Referring to fig. 1, in one embodiment, a power-up detection circuit includes:

the voltage detection output circuit 100, the voltage detection output circuit 100 is configured to output a power-on detection signal when the detection end of the voltage detection output circuit 100 detects a power-on voltage;

the delay circuit 200, the output end of the delay circuit 200 is connected with the input end of the voltage detection output circuit 100, and the delay circuit 200 is used for controlling the voltage detection output circuit 100 to maintain outputting the power-on detection signal within a preset time when the voltage detection output circuit 100 outputs the power-on detection signal.

It should be noted that the power-on detection circuit provided by the utility model can be applied to high-voltage equipment as well as low-voltage equipment, and in general, an input port of the high-voltage equipment is provided with a circuit such as a filter network, when the circuit of the input port is abnormal, the input port can be short-circuited or open-circuited to ground when the power-on high voltage is input, for example, an energy storage capacitor in the filter network is in a high-temperature environment for a long time, and when the energy storage capacitor is impacted by the high voltage, the energy storage capacitor can be broken down and short-circuited to ground.

The state of the voltage detection output circuit 100 may be represented by the level of the output, for example, when the power-on voltage is connected, the output terminal of the voltage detection output circuit 100 is at a low level, and when the power-on voltage is not connected, the output terminal of the voltage detection output circuit 100 is at a high level, so that the operating state of the voltage detection output circuit 100 may be detected according to the level of the detection voltage. At this time, the low level or the high level output from the voltage detection output circuit 100 may be used as a power-on detection signal, so that the controller may wake up the device according to the detected power-on detection signal.

In this embodiment, the voltage detection output circuit 100 may be a detection circuit formed by a resistor, an overvoltage switch, a comparator, and the like; the delay circuit 200 may be an RC delay circuit composed of a resistor and a storage capacitor. When the voltage detection output circuit 100 detects the power-on voltage, an overvoltage switch in the voltage detection output circuit 100 is turned on, or the magnitude relation between the terminal voltage of the positive input end and the terminal voltage of the negative input end of the comparator is changed, so that an internal current loop of the voltage detection output circuit 100 is turned on, a corresponding electric signal is output to the controller, that is, the voltage detection output circuit 100 outputs the power-on detection signal to a subsequent controller, and the controller can determine that the electronic equipment receives the power-on voltage according to the received power-on detection signal, thereby waking up the electronic equipment.

In the case of powering up the high voltage device, when the high voltage power is connected to the device, the voltage detection output circuit 100 is required to detect whether the input port of the high voltage device is connected to the high voltage power, so as to output a corresponding power-up detection signal to the controller, so that the controller controls the load to operate. However, when the controller receives the signal, the controller may take the periods of 2 seconds, 3 seconds, and the like as the scanning period, that is, the controller scans once every 2 seconds, 3 seconds, if the duration of the power-on detection signal output by the voltage detection output circuit 100 is too short when the high voltage device is in a short circuit or open circuit condition after the input port is powered on, the controller may fail to recognize the power-on detection signal, so that the high voltage device cannot output the corresponding power-on information, and therefore, a tester may misunderstand that the high voltage device is not always connected to the high voltage, and the fault of the input port of the high voltage device is always present and not examined.

Therefore, the embodiment starts to work when the voltage detection output circuit 100 outputs the power-on detection signal through the input end of the delay circuit 200, outputs the delay signal to the voltage detection output circuit 100, delays the power-on detection signal output by the voltage detection output circuit 100, namely, prolongs the time for which the power-on detection signal is continuously output by the voltage detection output circuit 100, so that the controller can continuously receive the power-on detection signal within a preset time, and can set the preset time to be larger than the scanning period of the controller, therefore, the controller can still scan the power-on detection signal output by the voltage detection output circuit 100 even in the interval time of two scans after finishing one scanning period, even if the power-on detection signal is short because of the fact that the input port of the device has a fault and the like, the controller can effectively recognize the power-on detection signal, and solves the problem that the power-on detection signal cannot be output for a long time because of the input port of the delay circuit 200 has a fault and the like, and the power-on detection signal cannot be input to the power-on device because of the input port of the device is always connected to the power-on detector or the power-off device has a fault, and the power-on fault is not detected by the input device, and the user is not input by the fault controller.

Specifically, taking the example of powering up the high voltage device, when the input port of the high voltage device is connected to the high voltage, the voltage detection output circuit 100 is triggered to output a power-up detection signal. The delay circuit 200 may start to operate when the voltage detection output circuit 100 outputs the power-on detection signal, and continuously output the delay signal to the voltage detection output circuit 100, so that the voltage detection output circuit 100 maintains outputting the power-on detection signal to a preset time under the control of the delay signal, where the preset time is set by a designer according to a scan period of a controller used by the high voltage device during production, for example, when the scan period of the controller is 2 seconds, the preset time may be 3 seconds, 4 seconds, and other time that enables the signal to be identified by the controller. Therefore, after the voltage detection output circuit 100 delays the operation of outputting the power-on detection signal, the output of the power-on detection signal can be maintained, so that the controller can recognize the power-on detection information of the high-voltage device when scanning again, and thus output the corresponding power-on information.

Because the action of outputting the power-on detection signal is delayed by the delay circuit 200 for a shorter time, unlike the situation that the high-voltage device can receive the power-on detection signal for a long time when the high-voltage device is powered on normally, the normal power-on time can be preset in the controller of the high-voltage device, so that when the time of outputting the power-on detection signal by the voltage detection output circuit 100 does not reach the normal power-on time, the high-voltage device can output corresponding fault power-on information through the interaction device such as the display screen, and the like, the input port of the high-voltage device is prompted to have faults, so that the user is prompted that the input port is connected with the excessive high voltage power, but faults such as short circuit or open circuit to the ground occur after the input port is powered on at high voltage, so that the high-voltage power-on time is shorter. The fault power-on time can be set according to preset time, and when the preset time is 3s, the fault power-on time period can be 4s.

The utility model sets the delay circuit 200, and utilizes the delay circuit 200 to start working when the voltage detection output circuit 100 outputs the power-on detection signal, and has the function of delaying the action of the voltage detection output circuit 100 for outputting the power-on detection signal, namely, the function of prolonging the time of the voltage detection output circuit 100 for outputting the power-on detection signal, so that the controller can continuously receive the power-on detection signal within the preset time, and the preset time can be set to be longer than the scanning period of the controller, therefore, the controller can still scan the power-on detection signal output by the voltage detection output circuit 100 when scanning is performed again after finishing one scanning period even if the controller is in the interval time of two scanning, and the controller can effectively detect the power-on voltage information with shorter existing time, thereby indicating the equipment to execute the awakening operation according to the power-on detection signal. Therefore, when the equipment has faults such as short circuit or circuit break after the input port is electrified, the corresponding electrifying voltage information cannot be output because the output time of the electrifying detection signal does not reach the scanning period of the controller, so that a tester mistakenly considers that the equipment is not always connected with the electrifying voltage, and the faults of the input port of the equipment are always existed and are not checked. Meanwhile, compared with the mode of detecting the power-on voltage through the operational amplifier chip, the power-on detection circuit provided by the utility model can not only effectively detect the power-on detection signal and solve the problem that the power-on voltage with shorter time cannot be detected by the controller, but also is simple in circuit, few in used components, free from providing additional power supply for power supply, and low in power consumption and cost.

Referring to fig. 2, in one embodiment, the delay circuit 200 includes:

the first reference voltage output circuit 210, where the first reference voltage output circuit 210 is connected to the first input end of the voltage detection output circuit 100, and the first reference voltage output circuit 210 is configured to output the first reference voltage to the first input end of the voltage detection output circuit 100 when the voltage detection output circuit 100 transitions from an operating state in which the power-on voltage is detected to an operating state in which the power-on voltage is not detected;

the second reference voltage output circuit 220, the second reference voltage output circuit 220 is connected to the second input terminal of the voltage detection output circuit 100, and the second reference voltage output circuit 220 is configured to output the second reference voltage to the second input terminal of the voltage detection output circuit 100 when the voltage detection output circuit 100 outputs the power-on detection signal;

the voltage detection output circuit 100 is further configured to maintain and output a power-on detection signal according to a relationship between the first reference voltage and the second reference voltage.

In this embodiment, the second reference voltage output circuit 220 may be an RC delay circuit formed by an energy storage capacitor and a resistor, and is configured to discharge when the voltage detection output circuit 100 outputs the power-on detection signal according to the charge-discharge property of the energy storage capacitor, and output the discharge voltage continuously decreasing in the discharge process of the energy storage capacitor as the second reference voltage to the second input end of the voltage detection output circuit 100; the first reference voltage output circuit 210 may be a clamping tube, and is configured to clamp the first reference voltage to a fixed value when the voltage detection output circuit 100 is switched from an operating state in which the power-up voltage is detected to an operating state in which the power-up voltage is not detected, that is, the first reference voltage may be a clamping voltage of the clamping tube, which is used as a cut-off reference voltage value of the second reference voltage output circuit 220 in a discharging process. The voltage detection output circuit 100 has two operating states, i.e., an operating state in which a power-on voltage is detected and an operating state in which a power-on voltage is not detected, and when the operating state of the voltage detection output circuit 100 is changed from the operating state in which the power-on voltage is detected to the operating state in which the power-on voltage is not detected, the first reference voltage output circuit 210 outputs the first reference voltage to the first input terminal of the voltage detection output circuit 100.

Specifically, when the input port of the device is not connected to the power-on voltage, the power supply end of the second reference voltage output circuit 220 is connected to the power supply voltage Vs, at this time, the second reference voltage output circuit 220 divides the connected power supply voltage Vs by a resistor, stores the divided power supply voltage Vs as electric energy through a storage capacitor, and when the voltage detection output circuit 100 detects the power-on voltage, that is, when the input port of the device is connected to the power-on voltage, the voltage detection output circuit 100 outputs a power-on detection signal, for example, a low level, and disconnects the connection between the second reference voltage output circuit 220 and the power supply voltage Vs, and the second reference voltage output circuit 220 discharges the electric energy due to a voltage difference between the stored electric energy and the ground, thereby continuously changing discharge voltage is used as the second reference voltage.

If the input port fails, the voltage detection output circuit 100 switches from the operating state in which the power-on voltage is detected to the operating state in which the power-on voltage is not detected, the first reference voltage output circuit 210 outputs the first reference voltage to the first input terminal of the voltage detection output circuit 100, the second reference voltage output circuit 220 outputs the second reference voltage to the second input terminal of the voltage detection output circuit 100, and the voltage detection output circuit 100 continues to output the power-on detection signal according to the relationship between the first reference voltage and the second reference voltage. For example, the second reference voltage output circuit 220 may be an RC delay circuit, the second reference voltage may be a discharge voltage during the discharging of the energy storage capacitor, the initial discharge voltage may be set to be greater than the first reference voltage, the discharge voltage continuously decreases, and the voltage detection output circuit 100 maintains to output the power-on detection signal, i.e., the low level, under the action of the delay circuit 200 during a period in which the discharge voltage is greater than the first reference voltage. The preset time is a period from when the energy storage capacitor starts to discharge until the discharge voltage is less than the first reference voltage.

By adjusting the first reference voltage output by the first reference voltage output circuit 210, the divided voltage of the second reference voltage output circuit 220, and/or the discharging speed of the electric energy, the voltage detection output circuit 100 can be adjusted to maintain outputting the power-on detection signal for a time, i.e. the preset time can be adjusted, so that the delay circuit 200 can be suitable for controllers with different scanning periods.

Optionally, the first reference voltage output circuit 210 includes a clamping diode D3, an anode of the clamping diode D3 is connected to the first input terminal of the voltage detection output circuit 100, a cathode of the clamping diode D3 is connected to the output terminal of the voltage detection output circuit 100, and the first reference voltage is a clamping voltage of the clamping diode D3.

In this embodiment, when the voltage detection output circuit 100 detects the power-on voltage, a power-on detection signal, such as a low level, is output, and when the voltage detection output circuit 100 is switched from an operating state in which the power-on voltage is detected to an operating state in which the power-on voltage is not detected, the output terminal of the voltage detection output circuit 100 is still at the low level, and the clamp diode D3 is turned on, then the first reference voltage connected to the first input terminal of the voltage detection output circuit 100 is the clamp voltage of the clamp diode D3. Since the clamp voltage is a constant value, the second reference voltage may be set to a voltage whose voltage value varies with time, and the voltage detection output circuit 100 continues to maintain outputting the power-on detection signal according to the magnitude relation between the clamp voltage and the second reference voltage. For example, the voltage value of the second reference voltage may gradually decrease with time, and the voltage detection output circuit 100 maintains to output the power-on detection signal during a period in which the second reference voltage is greater than the clamp voltage. Since the second reference voltage is started to be connected when the voltage detection output circuit 100 starts to output the power-on detection signal, and the clamp voltage is not started to be connected at this time, the voltage detection output circuit 100 still outputs the power-on detection signal, so that the voltage detection output circuit 100 is connected from the second reference voltage until the second reference voltage is less than the clamp voltage, which is the preset time for the delay circuit 200 to control the voltage detection output circuit 100 to maintain outputting the power-on detection signal.

Optionally, the second reference voltage output circuit 220 includes an energy storage capacitor C1, a fifth resistor R5, and a sixth resistor R6, where a first end of the energy storage capacitor C1 and a first end of the fifth resistor R5 are respectively connected to a second input end of the voltage detection output circuit 100, a second end of the energy storage capacitor C1 and a second end of the fifth resistor are grounded, a first end of the sixth resistor R6 is connected to a second input end of the voltage detection output circuit 100, a second end of the sixth resistor R6 is connected to a connection node between an output end of the voltage detection output circuit 100 and a power supply voltage Vs, the energy storage capacitor C1 discharges when the voltage detection output circuit 100 outputs a power-on detection signal, and the second reference voltage is a discharge voltage of the energy storage capacitor C1.

In this embodiment, when the voltage detection output circuit 100 does not detect the power-on voltage, the second reference voltage output circuit 220 and the power supply voltage Vs form a loop, and the power supply voltage Vs is divided by the fifth resistor R5 and the sixth resistor R6 to charge the energy storage capacitor C1; when the voltage detection output circuit 100 detects the power-on voltage, a power-on detection signal, such as a low level, is output, the second reference voltage output circuit 220 is disconnected from the power supply voltage Vs, the energy storage capacitor C1 discharges through the fifth resistor R5 and the sixth resistor R6, and at this time, the second reference voltage is the discharge voltage of the energy storage capacitor C1. When the voltage detection output circuit 100 is switched from the operating state in which the power-on voltage is detected to the operating state in which the power-on voltage is not detected, the first input terminal of the voltage detection output circuit 100 is connected to the first reference voltage, the first reference voltage can be set to a constant value, the energy storage capacitor C1 is still discharged at this time, and the voltage detection output circuit 100 continues to maintain outputting the power-on detection signal in a period in which the discharge voltage is greater than the first reference voltage. Therefore, the time period from the start of discharging the energy storage capacitor C1 until the discharge voltage is less than the first reference voltage is the preset time for the delay circuit 200 to control the voltage detection output circuit 100 to maintain outputting the power-on detection signal.

In some embodiments, the first reference voltage output circuit 210 includes a clamping diode D3, the second reference voltage output circuit 220 includes an energy storage capacitor C1, a fifth resistor R5 and a sixth resistor R6, the first input voltage is a clamping voltage of the clamping diode D3, the second input voltage is a discharging voltage of the energy storage capacitor C1, the initial discharging voltage of the energy storage capacitor C1 may be set to be greater than the clamping voltage, when the voltage detection output circuit 100 outputs the power-up detection signal, the energy storage capacitor C1 starts to discharge, the discharging voltage continuously drops, and when the voltage detection output circuit 100 transitions from an operating state in which the power-up voltage is detected to an operating state in which the power-up voltage is not detected, the clamping voltage is accessed, and the voltage detection output circuit 100 continues to maintain outputting the power-up detection signal during a period in which the discharging voltage is greater than the clamping voltage. The time period from the start of discharging the energy storage capacitor C1 until the discharge voltage is less than the clamp voltage is the preset time for the delay circuit 200 to control the voltage detection output circuit 100 to maintain outputting the power-on detection signal.

Referring to fig. 2, in one embodiment, the voltage detection output circuit 100 includes:

the voltage trigger circuit 110, the detection end of the voltage trigger circuit 110 is used for detecting the power-on voltage, and the voltage trigger circuit 110 is used for outputting a power-on detection trigger signal when the power-on voltage and the threshold voltage are detected to meet the preset condition;

The first input end of the detection output circuit 120 is connected to the output end of the voltage trigger circuit 110, and the detection output circuit 120 is configured to be triggered when receiving a power-on detection trigger signal, and output a power-on detection signal.

In the present embodiment, in order to prevent the voltage detection output circuit 100 from erroneously recognizing an interference signal as a power-on voltage and erroneously outputting the power-on detection signal, the voltage trigger circuit 110 internally presets a threshold voltage set by a designer according to the lowest operating voltage of the applied device, for example, when the lowest operating voltage of the high-voltage device is 200V, the threshold voltage is set to 200V.

When the input port of the device is connected to the power-on voltage, if the voltage trigger circuit 110 detects that a preset condition is satisfied between the voltage value of the power-on voltage and the threshold voltage, for example, the voltage value of the power-on voltage reaches the threshold voltage or the voltage value of the power-on voltage reaches the threshold voltage after voltage division processing, the voltage trigger circuit 110 outputs a power-on detection trigger signal to the detection output circuit 120, so that the detection output circuit 120 is triggered and outputs a power-on detection signal to the controller, and at this time, the voltage detection output circuit 100 can be considered to detect the power-on voltage.

If the input port of the device is not connected to the power-on voltage, or the voltage trigger circuit 110 detects that the voltage value of the power-on voltage and the threshold voltage do not meet the preset condition, the voltage trigger circuit 110 will not output the power-on detection trigger signal, so that the detection output circuit 120 will not output the power-on detection signal to the controller because the power-on detection trigger signal is not received, at this time, it can be considered that the voltage detection output circuit 100 does not detect the power-on voltage, so that the controller will not output the corresponding trigger information, thereby avoiding false triggering of the controller caused by the interference signal in the circuit.

Referring to fig. 3 and 5, in one embodiment, the voltage trigger circuit 110 includes:

the input end of the first voltage dividing circuit 111 is used for accessing the power-on voltage, and the first voltage dividing circuit 111 is used for outputting the accessed power-on voltage after voltage dividing treatment;

and a threshold setting circuit 112, wherein an input end of the threshold setting circuit 112 is connected to an output end of the first voltage dividing circuit 111, and is configured to output a power-on detection trigger signal to the detection output circuit 120 when the voltage obtained by dividing the power-on voltage is detected to reach the threshold voltage.

In this embodiment, in order to prevent the impact of the power-on voltage on the power-on detection circuit, especially when the power-on voltage is a high voltage, the power-on voltage may be first connected to the first voltage dividing circuit, and then the divided voltage is detected, where the first voltage dividing circuit 111 may be a circuit formed by a plurality of resistors; the threshold setting circuit 112 may be a circuit formed by a clamp or a comparator. The threshold setting circuit 112 may conduct the internal current loop by switching in the mode that the divided power-up voltage of the comparator is greater than the threshold voltage, or breakdown the clamp tube by the divided power-up voltage, so that the detection output circuit 120 receives a corresponding electrical signal (i.e. a power-up detection trigger signal) to output a power-up detection signal.

It can be understood that the voltage of the power-on voltage on the voltage dividing resistor can be detected by detecting the voltages at two ends of the voltage dividing resistor in the first voltage dividing circuit 111, so that when the input port of the device is connected with the power-on voltage, the voltage of the power-on voltage can be obtained according to the voltage signal output by the first voltage dividing circuit 111 and the voltage dividing principle of the first voltage dividing circuit 111.

The threshold voltage is used to measure the voltage component of the first voltage dividing circuit 111 after dividing the power-up voltage, and in the voltage dividing circuit with the constant resistance of the voltage dividing resistor, the voltage proportion occupied by the same voltage dividing resistor is constant no matter what voltage is applied to the power-up voltage, so that the required voltage value is reduced according to the proportion of the voltage dividing resistor to be used as the threshold voltage, and when the voltages at the two ends of the voltage dividing resistor reach the threshold voltage, the applied power-up voltage also reaches the voltage value required by the device.

Therefore, taking the electric field scene of the high voltage device as an example, when the input port of the high voltage device is connected to the power-on voltage, the first voltage dividing circuit 111 divides the power-on voltage and outputs a corresponding voltage signal to the threshold setting circuit 112, and when detecting that the voltage value of the voltage signal reaches the threshold voltage, the threshold setting circuit 112 presets the threshold voltage, and characterizes that the power-on voltage connected at this time reaches the lowest working voltage of the high voltage device, so as to output a power-on detection trigger signal to the detection output circuit 120, so as to drive the detection output circuit 120 to output a power-on detection signal. When the input port of the high-voltage equipment is not connected with the power-on voltage or the voltage value of the voltage signal is detected to be not up to the threshold voltage, the power-on voltage connected at the moment is lower than the lowest working voltage of the high-voltage equipment, so that a power-on detection trigger signal cannot be output, and the power-on voltage is not detected at the moment, so that the system is prevented from being awakened by the low-voltage interference signal accidentally.

Optionally, the threshold setting circuit 112 includes a photo coupler U1, where the photo coupler U1 includes a light emitting diode D2 and a phototransistor Q1;

the anode of the light emitting diode D2 is connected with the output end of the first voltage dividing circuit 111, and the cathode of the light emitting diode D2 is grounded; the collector of the phototransistor Q1 is connected to a first input of the detection output circuit 120 and the emitter of the phototransistor Q1 is grounded.

In this embodiment, taking the high-voltage device as an example, the photo coupler U1 is configured to isolate the ground terminal of the high-voltage side circuit and the ground terminal of the low-voltage side circuit in the high-voltage device, and if the high-voltage side circuit and the low-voltage side circuit are not isolated, a current loop is formed by passing through the ground, so that a strong electric signal of the high-voltage side circuit causes interference to a weak electric signal of the low-voltage side circuit through the ground.

Therefore, by setting the photoelectric coupler U1, the strong electric signal of the input port of the photoelectric coupler U will not interfere with the weak electric signal of the detection output circuit 120 in the actual working process of the high-voltage device, so that the weak electric signal received by the controller is more accurate, and the attenuation, oscillation and interference of the weak electric signal are reduced, thereby improving the accuracy of the controller in executing the relevant control process.

When the voltage after the voltage division process of the power-on voltage through the first voltage division circuit 111 reaches the conducting voltage of the light emitting diode D2, the light emitting diode D2 starts to emit light and makes the phototriode Q1 photosensitive on, at this time, the input end of the detection output circuit 120 receives a conducting signal, which is a power-on detection trigger signal, and the detection output circuit 120 starts to output a power-on detection signal to the controller.

Optionally, the threshold setting circuit 112 further includes a regulator tube D1;

the cathode of the voltage stabilizing tube D1 is connected to the output end of the first voltage dividing circuit 111, and the anode of the voltage stabilizing tube D1 is connected to the anode of the light emitting diode D2.

In this embodiment, in order to maintain the stability of the threshold voltage, the voltage regulator D1 may be added to the threshold setting circuit 112, and the threshold voltage Vth may be determined by the breakdown voltage VF1 of the voltage regulator D1 and the on-voltage VF2 of the light emitting diode D2.

When the voltage after the power-on voltage is divided by the first voltage dividing circuit 111 is smaller than the threshold voltage, the voltage stabilizing tube D1 or the light emitting diode D2 is in a cut-off state, and the threshold setting circuit 112 is not turned on; when the voltage after the power-on voltage is divided by the first voltage dividing circuit 111 is not less than the threshold voltage, the voltage stabilizing tube D1 is in a breakdown state, the light emitting diode D2 is in a conducting state, the phototransistor Q1 is sensitized and turned on, a current loop is formed in the threshold setting circuit 112, and a corresponding power-on detection trigger signal is output.

Optionally, the first voltage dividing circuit 111 includes a first resistor R1 and a second resistor R2;

the first end of the first resistor R1 is used for being connected with a power-on voltage, the second end of the first resistor R1 is connected with the cathode of the voltage stabilizing tube D1, the first end of the second resistor R2 is connected to a connecting node between the second end of the first resistor R1 and the cathode of the voltage stabilizing tube D1, and the second end of the second resistor R2 is grounded.

In the present embodiment, the threshold voltage Vth is commonly set by the regulator D1 and the light emitting diode D2. The threshold voltage Vth is determined by the breakdown voltage VF1 of the regulator D1 and the on voltage VF2 of the light emitting diode D2, and when the voltage obtained by dividing the power-on voltage reaches the threshold voltage Vth, the threshold setting circuit 112 outputs a power-on detection trigger signal, which may be expressed as:

wherein Vx is a power-on voltage, vth is a threshold voltage, VF1 is a breakdown voltage of the voltage-stabilizing tube D1, VF2 is a turn-on voltage of the light-emitting diode D2, R1 is a resistance value of the first resistor, and R2 is a resistance value of the second resistor.

The first resistor R1 and the second resistor R2 divide the power-on voltage according to the resistance values, and if the voltage at two ends of the second resistor R2 is smaller than the threshold voltage Vth at this time, the voltage stabilizing tube D1 is in an off state, and the light emitting diode D2 is not turned on.

If the voltage across the second resistor R2 reaches the threshold voltage Vth at this time, the voltage regulator D1 is in a breakdown state, and the light emitting diode D2 is turned on and emits light, so that the phototransistor Q1 is turned on by light sensing, and the threshold setting circuit 112 outputs a corresponding power-on detection trigger signal.

It should be noted that, because the collector of the phototransistor Q1 is connected to the input terminal of the detection output circuit 120, the emitter of the phototransistor Q1 is grounded, and when the phototransistor Q1 is sensitized on, the first input terminal of the detection output circuit 120 is grounded, and at this time, the detection output circuit 120 starts to output the power-on detection signal.

Referring to fig. 2 and 5, in one embodiment, the detection output circuit 120 includes a comparator U2;

the first input end of the comparator U2 is connected to the output end of the voltage trigger circuit 110, the delay circuit 200 is respectively connected to the input end of the comparator U2 and the output end of the comparator U2, and the comparator U2 is configured to output a power-on detection signal when receiving the power-on detection trigger signal, and maintain to output the power-on detection signal for a preset time according to the delay signal input by the delay circuit 200.

In this embodiment, the first input terminal of the comparator U2 may be a positive input terminal, the second input terminal is an inverted input terminal, the voltage of the power-on detection trigger signal output by the voltage trigger circuit 110 may be set to be smaller than the reference signal accessed by the inverted input terminal of the comparator U2, the delay circuit 200 may input a delay signal to the input terminal of the comparator U2, and the comparator U2 may maintain to output the power-on detection signal for a preset time according to the delay signal. Specifically, when the power-on detection trigger signal is received, the comparator U2 outputs a power-on detection signal, i.e., a low level, the delay circuit 200 starts to output a first delay signal to the inverting input terminal of the comparator U2, where the first delay signal and the power-on detection trigger signal are voltage signals, the first delay signal is a voltage signal whose voltage value changes with time, for example, the voltage value gradually decreases with time, and the initial voltage value of the first delay signal is greater than the power-on detection trigger signal, and the comparator U2 maintains to output the low level; when the comparator U2 stops receiving the power-on detection trigger signal, that is, the voltage detection output circuit 100 converts from the working state of detecting the power-on voltage to the working state of not detecting the power-on voltage, the delay circuit 200 outputs a second delay signal to the non-inverting input terminal of the comparator U2, the second delay signal may be a voltage signal and be a fixed value, the initial voltage value of the first delay signal is greater than the second delay signal, and the comparator U2 maintains to output a low level in a time when the voltage value of the first delay signal is greater than the second delay signal. The preset time is a time period from when the delay circuit 200 starts to output the first delay signal to the comparator U2 until the voltage value of the first delay signal is smaller than that of the second delay signal.

In some embodiments, the output end of the first reference voltage output circuit 210 is connected to the non-inverting input end of the comparator U2, the output end of the second reference voltage output circuit 220 is connected to the inverting input end of the comparator U2, when the comparator U2 receives the power-on detection trigger signal, the inverting input end of the comparator U2 is connected to the second reference voltage, and the comparator U2 continues to output the power-on detection signal, i.e. the low level; when the comparator U2 stops receiving the power-on detection trigger signal, the non-inverting input end of the comparator U2 is connected with a first reference voltage, the second reference voltage is a voltage signal with the voltage value gradually decreasing along with time, and the comparator U2 continuously maintains to output a low level in the time when the second reference voltage is larger than the first reference voltage. The preset time is a time period from the start of switching in the second reference voltage until the second reference voltage is smaller than the first reference voltage.

Specifically, the first end of the energy storage capacitor C1, the first end of the fifth resistor R5 and the first end of the sixth resistor R6 of the second reference voltage output circuit 220 are all connected to the inverting input end of the comparator U2, the second ends of the energy storage capacitor C1 and the fifth resistor R5 are grounded, the second end of the sixth resistor R6 is connected to the output end of the comparator U2, when the comparator U2 receives the power-on detection trigger signal, the low level is output, the second reference voltage output circuit 220 is disconnected from the power supply voltage Vs, the energy storage capacitor C1 begins to discharge through the fifth resistor R5 and the sixth resistor R6, the inverting input end of the comparator U2 is connected to the discharge voltage of the energy storage capacitor C1, and the comparator U2 maintains to output the low level because the discharge voltage is greater than the voltage value of the power-on detection trigger signal; the clamping diode D3 of the first reference voltage output circuit is connected between the non-inverting input terminal of the comparator U2 and the output terminal of the comparator U2, and when the comparator U2 stops receiving the power-on detection trigger signal, the non-inverting input terminal of the comparator U2 is clamped to be the clamping voltage of the clamping diode D3, the initial discharge voltage is set to be greater than the clamping voltage, and the comparator U2 continues to maintain outputting the low level in a time when the discharge voltage is greater than the clamping voltage. Therefore, the comparator U2 always maintains a low level output from the start of the discharge voltage being accessed from the inverting input terminal of the comparator U2 until the discharge voltage gradually decreases until it is smaller than the clamp voltage, thereby realizing continuous output of the power-on detection signal. The time elapsed in this process is the preset time.

Optionally, in order to prevent the comparator U2 from damaging the supply voltage Vs connected to the output terminal of the comparator U2 when outputting a low level, a seventh resistor R7 is connected in series between the supply voltage Vs and the output terminal of the comparator U2, that is, the first terminal of the seventh resistor R7 is connected to the supply voltage Vs, and the second terminal is connected to the output terminal of the comparator U2.

In this embodiment, when the power-on voltage is not detected or the voltage after the voltage division treatment of the power-on voltage is less than the threshold voltage Vth, the phototransistor Q1 is in a cut-off state, the voltage accessed by the inverting input terminal of the comparator U2 is the voltage obtained by dividing the power supply voltage Vs by the fifth resistor R5, the sixth resistor R6 and the seventh resistor R7, that is, the voltages at the two ends of the fifth resistor R5, the resistance values of the fifth resistor R5, the sixth resistor R6 and the seventh resistor R7 are reasonably set, so that the voltage at the non-inverting input terminal a of the comparator U2 is greater than the voltage at the inverting input terminal b and less than the voltage at the output terminal c, and the output of the comparator U2 is the high level.

The voltage at point b can now be expressed as:

the voltage at point c is:

wherein Vs is the supply voltage of the detection output circuit 120. Since the pins of the controller are typically provided with a threshold voltage, the controller recognizes the signal as high when the voltage of the incoming signal is higher than the threshold voltage, and recognizes the signal as low when the voltage of the incoming signal is lower than the threshold voltage. Therefore, by adjusting the resistances of the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7, setting the c-point voltage Uc when the power-up voltage is not connected to the input port or the power-up voltage does not meet the requirement to a voltage higher than the high-level threshold of the controller, the voltage detection output circuit 100 can output a high-level signal to the controller when the power-up voltage is not detected or the power-up voltage does not meet the requirement.

When the voltage value of the power-on voltage after the voltage division process reaches the set threshold voltage Vth, the phototransistor Q1 is turned on, the point a of the positive input end of the comparator U2 is grounded, the corresponding point a voltage is 0V, the voltage is smaller than the voltage of the point b of the negative input end of the comparator U2, and the output of the comparator U2 is low level, namely, the point c is low level. At this time, the second reference voltage output circuit 220 is disconnected from the supply voltage Vs, that is, the second end of the sixth resistor R6 is at a low level, the energy storage capacitor C1 begins to discharge through the fifth resistor R5 and the sixth resistor R6, and the voltage at the point b of the inverting input terminal of the comparator is the discharge voltage of the energy storage capacitor C1.

When the power-on voltage is detected, the voltage detection output circuit 100 outputs a power-on detection signal, i.e., a low level, i.e., the point C is a low level, and at this time, the energy storage capacitor C1 starts to discharge. When the input port is connected with the power-on voltage and then has faults such as short circuit or open circuit to the ground, so that the power-on voltage exists for a short time, or if the power-on voltage is similar to a pulse signal, when the pulse signal changes from high to low, namely, the voltage detection output circuit 100 converts from a working state in which the power-on voltage is detected to a working state in which the power-on voltage is not detected, the phototransistor Q1 is cut off, the point a is not grounded any more, and because the point c is a low level, the point a voltage is clamped to the conduction voltage drop VF3 of the clamping diode D3 through the clamping diode D3, namely, the clamping voltage. Because the point C is at the low level, the energy storage capacitor C1 still discharges through the fifth resistor R5 and the sixth resistor R6, and when the voltage at the point b of the inverting input end of the comparator U2 is smaller than the conduction voltage drop VF3 of the clamp diode D3, the output end of the comparator U2 returns to the high-resistance state, and the energy storage capacitor C1 stops discharging. The discharging time of the energy storage capacitor C1 is the holding time t of the low level output by the voltage detection output circuit 100, which is a preset time, and its value is:

Wherein Vs is the supply voltage of the detection output circuit 120. The circuit can be controlled to maintain the output of the power-on detection signal for a while by setting the values of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, and the storage capacitor C1. According to the analysis, when the input port is connected with the power-on voltage and the voltage of the power-on voltage is larger than the threshold voltage Vth, the level of the point c is changed from high level to low level, and the output of the point c is kept for a period of time after the power-on voltage is stopped, so that a signal of the point c is connected with the controller, the access port of the controller is set to be low-level awakening or falling edge awakening, the controller is only awakened when the power-on detection signal is low-level or falling edge, at the moment, the controller starts to detect the power-on detection signal and controls equipment to be awakened, the power-on detection circuit not only can realize the delay function of the power-on voltage detection, so that the controller can effectively detect the voltage with shorter time, corresponding operation is performed according to the detection result, the stability of the device is improved, but also the controller does not need to be in a working state of detecting the power-on detection signal at the moment, the controller is only detected to be awakened when the power-on voltage is not connected, the controller is enabled to be dormant when the power-on detection signal is not connected with the power-on voltage, meanwhile, the power-on detection circuit is simple, and the power-on detection circuit is low in power consumption and power consumption is easy.

Referring to fig. 2 and 5, in an embodiment, the detection output circuit 120 further includes a second voltage dividing circuit 122, and the second voltage dividing circuit 122 includes a third resistor R3 and a fourth resistor R4;

the first end of the third resistor R3 is connected with the power supply voltage, the second end of the third resistor R3 is connected with the first input end of the comparator U2, the first end of the fourth resistor R4 is connected with a connecting node between the second end of the third resistor R3 and the first input end of the comparator U2, and the second end of the fourth resistor R4 is grounded.

In this embodiment, when the power-up voltage is not connected or the voltage after the voltage division process is less than the threshold voltage Vth, the phototransistor Q1 is in the off state, and the voltage Ua at the point a of the non-inverting input terminal of the comparator U2 depends on the supply voltage Vs, the third resistor R3, and the fourth resistor R4, which can be expressed as:

here, ua is the voltage at the point a of the non-inverting input terminal of the comparator U2, vs is the supply voltage of the detection output circuit 120, R3 is the resistance of the third resistor R3, and R4 is the resistance of the fourth resistor R4. Therefore, when the power-on voltage is not accessed or the voltage after the voltage division processing of the power-on voltage is smaller than the threshold voltage Vth, the voltage Ua at the point a can be set to be larger than the voltage Ub at the point b and smaller than the voltage Uc at the point c, so that the comparator U2 outputs a high level to the controller, and the controller can control the system to enter the sleep mode according to the received high level, thereby reducing the power consumption of the device.

When the voltage after the voltage division of the power-on voltage reaches the set threshold voltage Vth, the phototransistor Q1 is turned on, the point a of the non-inverting input terminal of the comparator U2 is grounded, the corresponding point a voltage is 0V, and at this time, the power supply voltage Vs accessed by the second voltage division circuit 122 is all applied to two ends of the third resistor R3.

When the input port is connected with the power-on voltage and then has faults such as short circuit or open circuit to the ground, so that the power-on voltage exists for a short time, or the power-on voltage is approximately a pulse signal, when the pulse signal is changed from high to low, the phototriode Q1 is cut off, because the point C is low level, the point a voltage cannot be immediately restored to the partial voltage of the fourth resistor R4 at the moment, and the point a voltage can be restored to the partial voltage of the fourth resistor R4 only after the discharge voltage of the energy storage capacitor C1 is smaller than the conduction voltage drop VF3 of the clamp diode D3.

The utility model also provides electronic equipment, which comprises a controller and the power-on detection circuit; the input end of the controller is connected with the output end of the power-on detection circuit, and the controller is used for detecting a power-on detection signal and waking up the electronic equipment according to the power-on detection signal. The specific structure of the power-on detection circuit refers to the above embodiments, and because the high-voltage device adopts all the technical solutions of all the embodiments, the power-on detection circuit has at least all the beneficial effects brought by the technical solutions of the embodiments, and is not described in detail herein.

In this embodiment, the electronic device may be an industrial personal computer, various instruments and meters, and a control device in the fields of vehicle-mounted chargers, automobiles, and industrial control; notebook computers, tablet computers (ipad), desktop computers, servers, displays, and various peripherals in the computer field are also included; mobile phones, telephones and other various terminals and local side devices in the network communication field can also be included; and the intelligent wearable equipment in the consumer electronics field, traditional black and white household appliances, various digital products and the like can be also included.

Taking the power-on of high-voltage equipment such as a vehicle-mounted charger and a transformer as an example, the high-voltage equipment is usually connected with a bidirectional charging power supply or other electric equipment such as household appliances in parallel to be connected with a high-voltage cable when in application. When the high-voltage cable is not electrified, the high-voltage equipment is not connected with the high-voltage power, but other electric equipment faults possibly exist at the moment, so that the low-voltage power flows into the high-voltage cable in a countercurrent mode, or the adjacent high-voltage cable causes interference to the high-voltage cable where the high-voltage equipment is located due to the fact that the high-voltage power is connected, and the high-voltage equipment is connected with a high-voltage power signal. At this time, because the threshold voltage is preset in the power-on detection circuit, when the low-voltage electric signal does not reach the threshold voltage, the low-voltage electric signal does not trigger the high-voltage equipment to output power-on electricity, so that the error power-on of the high-voltage equipment is avoided.

When the high-voltage equipment is connected to high-voltage power, the input port is in an unstable state due to the fact that the input port is in a high-temperature environment for a long time, and the device inside the input port circuit is possibly short-circuited or broken to the ground once the input port is powered on, so that the controller can effectively detect the power-on voltage with short existing time by prolonging the time of outputting the power-on detection signal by the power-on detection circuit, and the equipment is awakened.

The foregoing description is only of the optional embodiments of the present utility model, and is not intended to limit the scope of the utility model, and all the equivalent structural changes made by the description of the present utility model and the accompanying drawings or the direct/indirect application in other related technical fields are included in the scope of the utility model.

Claims

1. A power-on detection circuit, comprising:

2. The power up detection circuit of claim 1, wherein the delay circuit comprises:

3. The power-on detection circuit of claim 2, wherein the first reference voltage output circuit comprises a clamp diode, an anode of the clamp diode is connected to a first input terminal of the voltage detection output circuit, a cathode of the clamp diode is connected to an output terminal of the voltage detection output circuit, and the first reference voltage is a clamp voltage of the clamp diode.

4. The power-on detection circuit according to claim 2, wherein the second reference voltage output circuit comprises an energy storage capacitor, a fifth resistor and a sixth resistor, the first end of the energy storage capacitor and the first end of the fifth resistor are respectively connected with the second input end of the voltage detection output circuit, the second end of the energy storage capacitor and the second end of the fifth resistor are grounded, the first end of the sixth resistor is connected with the second input end of the voltage detection output circuit, the second end of the sixth resistor is connected with a connection node between the output end of the voltage detection output circuit and a power supply voltage, when the voltage detection output circuit outputs the power-on detection signal, the energy storage capacitor discharges, and the second reference voltage is a discharge voltage of the energy storage capacitor.

5. The power-on detection circuit according to any one of claims 1 to 4, wherein the voltage detection output circuit includes:

6. The power up detection circuit of claim 5, wherein the voltage trigger circuit comprises:

7. The power-on detection circuit of claim 6, wherein the threshold setting circuit comprises a photo-coupler comprising a light emitting diode and a phototransistor;

8. The power-up detection circuit of claim 7, wherein the threshold setting circuit further comprises a regulator tube;

9. The power up detection circuit of claim 8, wherein the first voltage divider circuit comprises a first resistor and a second resistor;

10. The power-on detection circuit of claim 5, wherein the detection output circuit comprises a comparator;

11. The power-on detection circuit of claim 10, wherein the detection output circuit further comprises a second voltage divider circuit comprising a third resistor and a fourth resistor;

12. An electronic device comprising a controller and a power-on detection circuit as claimed in any one of claims 1 to 11; the input end of the controller is connected with the output end of the power-on detection circuit, and the controller is used for detecting a power-on detection signal and waking up the electronic equipment according to the power-on detection signal.