CN117062519A - High-performance integrated passive device integrated with phase change switch and preparation method thereof - Google Patents
High-performance integrated passive device integrated with phase change switch and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N79/00—Integrated devices, or assemblies of multiple devices, comprising at least one solid-state element covered by group H10N70/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
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Abstract
The invention provides a high-performance integrated passive device integrated with a phase change switch and a preparation method thereof, belonging to the technical field of semiconductor devices. The integrated passive device comprises a substrate and an insulating layer positioned on the upper surface of the substrate; a window is formed on the insulating layer, and a thin film resistor layer, an isolation layer and a phase change layer are sequentially deposited from the bottom to the top of the window; the top end of the isolation layer is level with the upper surface of the insulation layer; a first metal layer, a second metal layer and a dielectric layer are deposited on the upper surface of the insulating layer; the first metal layer comprises a radio frequency electrode, an interconnection metal electrode and a capacitor lower electrode; the interconnecting metal electrode is connected with the dielectric layer at the top end of the capacitor lower electrode through the second metal layer. The integrated passive device has high integration level, small transmission loss and large transmission bandwidth.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to the technical field of integrated passive devices, and in particular relates to a high-performance integrated passive device of an integrated phase change switch and a preparation method thereof.
Background
In 5G radio frequency communications, many active chips and passive chips are included, including common resistors, capacitors and inductors; there are also various functional devices such as power splitters, couplers, circulators, filters, antennas, etc. The integrated passive device (Integrated Passive Devices, IPD) has the following advantages over conventional passive devices: the volume is obviously reduced, the device is lighter and thinner, the performance is high and the consistency is better. These characteristics make the IPD technology an effective scheme for meeting the high integration requirement of the mobile phone radio frequency front end.
With the strong communication systems, more and more passive components are used. These passive components are almost all surface mount devices (Surface Mounted Devices, SMD) that occupy 90% more system components, 80% more system circuit board area, and more than 70% of the system cost. If these passive components can be miniaturized from the current millimeter thick film technology to the micron thin film technology, the area of the passive system is reduced by 1000 times, and the cost is also greatly reduced. Meanwhile, in order to realize rapid switching of different frequencies, different communication standards and different functional devices, higher requirements are put on a reconfigurable module or system. In reconfigurable systems, however, the rf switch plays an important role as a core device.
The field effect transistor (Field Effect Transistor, FET) devices are widely used in radio frequency switching circuits to achieve higher operating frequencies, lower noise, etc. When the FET is used as a three-port Radio Frequency switching device, the source and drain ports thereof form a conduction path or channel for a Radio Frequency signal (RF), and the gate port is applied with a dc voltage to control the channel opening and closing. Most switching FETs use depletion mode, that is, when no voltage is applied, the channel is typically in its low resistance state, while the drain and source are applied with negative voltages, the channel is in a high resistance state. At present, a passive device module in a radio frequency module is connected with an FET radio frequency switch chip to realize a receiving and transmitting function in radio frequency application, wherein a traditional three-terminal device or a diode such as a field effect transistor, a high electron mobility transistor (High electron mobility transistor, HEMT), a PIN diode and the like is adopted as a switch device, so that the switch loss is large, the isolation degree is poor and the cost is high in actual work, and the switch device is limited in application. Thus, the non-ideal characteristics of the FET can severely impact switching performance; in the low impedance state, the on-resistance between the source and drain of the FET is not zero, so that energy loss occurs when a signal passes through the FET, which is reflected in the index as a large insertion loss.
Electrostatic actuation is commonly used in radio frequency microelectromechanical system (Microelectro Mechanical Systems, MEMS) switch designs due to the low power consumption, small size characteristics. MEMS switches may also use inertial, electromagnetic, electrothermal, or piezoelectric forces to control opening or closing. Rf mems switches have several advantages over the prior art, including low resistance when closed and high resistance when open. In addition, the device has the advantages of small volume, low power requirement, low signal loss, high off-state isolation, circuit scale integration capability and the like. However, when the conventional IPD is connected to the MEMS radio frequency switch, although the MEMS radio frequency switch has low insertion loss and on-resistance, the MEMS switch has problems of slow switching speed and poor reliability, and has a short lifetime in practical applications.
Disclosure of Invention
In order to solve the problems, the invention provides a high-performance integrated passive device integrated with a phase change switch and a preparation method thereof. The basic phase-change radio frequency unit can be expanded into a switch matrix by integrating the radio frequency switch and the passive device on the same chip, and supplementing an air bridge process and realizing back hole capability; finally, the high-performance integrated passive device with high integration level, small transmission loss and large transmission bandwidth is obtained.
Specifically, in order to achieve the above purpose, the present invention adopts the following technical scheme:
the high-performance integrated passive device of the integrated phase change switch comprises a substrate and an insulating layer, wherein the insulating layer is positioned on the upper surface of the substrate; a window is formed in the insulating layer, and a thin film resistor layer, an isolation layer and a phase change layer are sequentially deposited from the bottom to the top of the window; the top end of the isolation layer is flush with the upper surface of the insulation layer; a first metal electrode A1, a first metal electrode A2, a first metal electrode A3, a first metal electrode A4 and a first metal electrode A5 are deposited on the upper surface of the insulating layer; the first metal electrode A1 and the first metal electrode A2 are respectively contacted with the phase change layer and serve as radio frequency electrodes of the phase change layer; the first metal electrode A2 is connected with the first metal electrode A3 through a second metal electrode B1; dielectric layers are deposited around and at the top end of the first metal electrode A4; the first metal electrode A3 is connected with the dielectric layer at the top end of the first metal electrode A4 through a second metal electrode B2; the top end of the first metal electrode A5 is deposited with a second metal electrode B3.
In a preferred embodiment, the substrate is a silicon substrate, a sapphire substrate, a GaAs substrate, an InP substrate, a GaN substrate, a SiC substrate, ga 2 O 3 One of the substrates.
In a preferred embodiment, the insulating layer is a first SiO 2 A layer.
In a preferred embodiment, the depth of the window is greater than the thickness of the phase change layer and less than the thickness of the insulating layer.
In a preferred embodiment, the thin film resistor layer has a thickness of 45 to 55nm and a sheet resistance of 50Ω.
In a preferred embodiment, the isolation layer is a silicon nitride layer or an aluminum nitride layer.
In a preferred embodiment, the phase change layer is a GeTe layer or Ge x Sb 1-x Te layer, wherein 0.1 < x < 0.6.
In a preferred embodiment, the thickness of the isolation layer is 100 to 200nm.
In a preferred embodiment, the phase change layer has a thickness of 100 to 200nm.
In a preferred embodiment, the dielectric layer has a thickness of 850nm.
In a preferred embodiment, the dielectric layer is a second SiO 2 A layer.
In a preferred embodiment, the first metal electrode A1, the first metal electrode A2, the first metal electrode A3, the first metal electrode A4 and the first metal electrode A5 are all titanium-gold laminated metal layers, wherein the thickness of the titanium layer is 20nm, and the thickness of the gold layer is 1000nm.
In a preferred embodiment, the second metal electrode B1, the second metal electrode B2 and the second metal electrode B3 are all titanium-gold laminated metal layers, wherein the thickness of the titanium layer is 20nm and the thickness of the gold layer is 3000nm.
The invention also provides a preparation method of the high-performance integrated passive device of the integrated phase change switch, which comprises the following steps:
s1, depositing an insulating layer on a substrate;
s2, manufacturing a window on the insulating layer, then depositing a thin film resistor material on the device, stripping the thin film resistor material in the area outside the window, and reserving the thin film resistor material in the window area to obtain a thin film resistor layer;
s3, depositing a blocking material on the structure obtained in the step S2, retaining the blocking material on the upper surface of the thin film resistor layer, and etching the blocking material in other areas to obtain an isolation layer;
s4, depositing a phase-change material on the structure obtained in the step S3, reserving the phase-change material on the upper surface of the isolation layer, and stripping the phase-change material in other areas to obtain a phase-change layer;
s5, depositing a first metal layer on the structure obtained in the step S4, and dividing the first metal layer into a first metal electrode A1, a first metal electrode A2, a first metal electrode A3, a first metal electrode A4 and a first metal electrode A5 through photoetching and stripping processes;
s6, depositing an insulating material on the structure obtained in the step S5, manufacturing a capacitor pattern through a photoetching process, and etching away the insulating material in other areas to obtain a dielectric layer of the capacitor;
s7, manufacturing an air bridge on the structure obtained in the step S6; and depositing a second metal layer on the obtained structure, and separating the second metal layer into a second metal electrode B1, a second metal electrode B2 and a second metal electrode B3 through photoetching and stripping processes to obtain the high-performance integrated passive device of the integrated phase change switch.
In a preferred embodiment, the depth of the window is greater than the thickness of the phase change layer and less than the thickness of the insulating layer.
In a preferred embodiment, the linerThe substrate is silicon substrate, sapphire substrate, gaAs substrate, inP substrate, gaN substrate, siC substrate, ga 2 O 3 Any one of the substrates.
In a preferred embodiment, the insulating layer is a first SiO 2 A layer.
In a preferred embodiment, the thin film resistor layer has a thickness of 45 to 55nm and a sheet resistance of 50Ω.
In a preferred embodiment, the isolation layer is a silicon nitride layer or/and an aluminum nitride layer.
In a preferred embodiment, the phase change layer is a GeTe layer or Ge x Sb 1-x Te layer, wherein 0.1 < x < 0.6.
In a preferred embodiment, the thickness of the isolation layer is 100 to 200nm.
In a preferred embodiment, the phase change layer has a thickness of 100 to 200nm.
In a preferred embodiment, the dielectric layer is a second SiO 2 A layer.
In a preferred embodiment, the dielectric layer has a thickness of 850nm.
In a preferred embodiment, the first metal layer is a titanium gold stack, wherein titanium is deposited to a thickness of 20nm and gold is deposited to a thickness of 1000nm.
In a preferred embodiment, the second metal layer is a titanium gold stack, wherein titanium is deposited to a thickness of 20nm and gold is deposited to a thickness of 3000nm.
In a preferred embodiment, step S3 includes a step of subjecting the isolation layer to a chemical mechanical polishing process. The surface evenness of the device subjected to the chemical mechanical polishing treatment is better, and the reliability of the device can be improved.
In a preferred embodiment, the insulating material is deposited in step S6 by Plasma Enhanced Chemical Vapor Deposition (PECVD) at a temperature of 300-400 ℃.
Compared with the prior art, the invention has the beneficial effects that: the invention realizes the integration of simultaneously preparing the phase-change radio frequency switch and the passive device on the same substrate, and greatly reduces the chip area compared with the traditional discrete chip. The integrated passive device has the advantages of large transmission bandwidth, short connection distance and small radio frequency loss.
Drawings
Fig. 1 is a schematic view of the device structure obtained in step S1 of example 2;
fig. 2 is a schematic diagram of opening a window on the insulating layer in step S2 of embodiment 2;
fig. 3 is a schematic view of the device structure obtained in step S2 of example 2;
fig. 4 is a schematic view of the device structure after depositing the thin film resistor layer in step S3 of example 2;
FIG. 5 is a schematic view showing the structure of a device obtained by performing chemical mechanical polishing on a thin film resistor layer in step S3 of example 2;
FIG. 6 is a schematic view of the device structure after the phase change layer is deposited in step S4 of example 2;
fig. 7 is a schematic view of the device structure after depositing the first metal electrode A1, the first metal electrode A2, the first metal electrode A3, the first metal electrode A4 and the first metal electrode A5 in step S5 of embodiment 2;
fig. 8 is a schematic view of the device structure after the dielectric layer is deposited in step S6 of embodiment 2;
fig. 9 is a schematic diagram of a device structure obtained after the air bridge manufacturing process in step S7 of embodiment 2 is completed;
fig. 10 is a schematic diagram of a high performance integrated passive device of the integrated phase change switch prepared in example 2.
In the figure: 1. a substrate; 2. an insulating layer; 3. a thin film resistor layer; 4. an isolation layer; 5. a phase change layer; 61. a first metal electrode A1; 62. a first metal electrode A2; 63. a first metal electrode A3; 64. a first metal electrode A4; 65. a first metal electrode A5; 7. a dielectric layer; 8. a photoresist layer; 91. a second metal electrode B1; 92. a second metal electrode B2; 93. and a second metal electrode B3.
Detailed Description
The following description sets forth a clear and complete description of the present invention, in connection with embodiments, so that those skilled in the art will fully understand the present invention. It will be apparent that the described embodiments are only some, but not all, of the preferred embodiments of the present invention. Any equivalent alterations or substitutions for the following embodiments without any inventive effort by those of ordinary skill in the art are intended to be within the scope of the present invention.
The methods not described in detail in the examples below are all conventional methods well known to those skilled in the art. The terms "first," "second," "A1," "A2," "B1," "B2," and the like are used herein for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated.
Example 1
As shown in fig. 10, the high-performance integrated passive device of the integrated phase change switch provided in this embodiment includes a substrate 1 and an insulating layer 2, where the insulating layer 2 is located on the upper surface of the substrate 1. A window is formed at one end of the insulating layer 2, and a thin film resistor layer 3, an isolating layer 4 and a phase change layer 5 are sequentially deposited from the bottom to the top of the window. The top end of the isolation layer 4 is flush with the upper surface of the insulation layer 2. A first metal layer is deposited on the upper surface of the insulating layer 2; the first metal layer includes a first metal electrode a161, a first metal electrode A262, a first metal electrode A363, a first metal electrode A4 64, and a first metal electrode A5 65. The first metal electrode A1 and the first metal electrode A2 61 and the first metal electrode a 62 are respectively in contact with the phase-change layer 5 and serve as radio-frequency electrodes of the phase-change switching device. The first metal electrode a262 and the first metal electrode A363 are connected by a second metal electrode B1, the first metal electrode A363 serves as an interconnection metal electrode, and the second metal electrode B1 91 serves as an air bridge. Dielectric layers 7 are respectively deposited around and on top of the first metal electrode A4. The dielectric layer 7 at the top end of the first metal electrode A363 is connected with the dielectric layer 7 at the top end of the first metal electrode A4 through the second metal electrode B2 92; the second metal electrode B292 functions as an air bridge while functioning as an upper electrode of the capacitor. A second metal electrode B3 93 is deposited on top of the first metal electrode A5 65.
Example 2
The embodiment provides a preparation method of a high-performance integrated passive device of an integrated phase change switch, which comprises the following steps:
s1, depositing an insulating layer on a substrate
After the silicon substrate 1 is cleaned, a photoetching alignment mark is manufactured on the surface of the silicon substrate for photoetching and mask plate alignment.
In an oxygen atmosphere with silane and N 2 O is used as a raw material, and a first SiO is deposited on the surface of the silicon substrate by adopting a method of plasma enhanced chemical vapor deposition (Plasma enhanced chemical vapor deposition, PECVD) 2 The layer serves as an insulating layer 2 (fig. 1). An insulating layer is deposited between the substrate and the device, so that the influence on the performance of the device caused by electric leakage and heat conduction of the substrate in the working process of the device can be avoided.
S2, manufacturing a thin film resistor layer
Dry etching method is adopted on the first SiO 2 Patterning windows (fig. 2) on the layer (insulating layer 2), etching depth being greater than thickness of phase change material (Phase Change Material, PCM) and less than the whole first SiO 2 Thickness of the layer.
Before manufacturing the thin film resistor layer, the window area is treated with oxygen plasma for 5min, and hydrochloric acid (HCl: H) is used 2 O=1:10) for 1min to remove surface oxide; then adopting photoetching process to make pattern, then making said pattern on the first SiO 2 Sputtering a thin film resistor material with the thickness of 50nm on the surface of the layer;
after the sputtering is completed, a wet stripping process is adopted to reserve the thin film resistor material in the window area to obtain a thin film resistor layer 3 (figure 3) with the sheet resistance of 50 omega, and acetone, stripping liquid, isopropanol and ultrapure water are adopted to clean the thin film resistor layer in sequence.
S3, manufacturing an isolation layer
Depositing 150nm thick silicon nitride blocking material on the structure of figure 3, selecting photoresist with etching resistance as mask, protecting the selected region by photoetching technology, retaining the silicon nitride blocking material of the device region, removing the silicon nitride blocking material of other regions by dry etching, cleaning to obtain the structure shown in figure 4,an isolation layer 4 (or barrier layer) is located above the thin film resistor layer 3. Due to the thicker first SiO layer 2 And (3) a layer, wherein excessive etching can be properly performed to ensure that other areas are completely removed.
To ensure the flatness of the surface, the isolation layer is subjected to a Chemical Mechanical Polishing (CMP) process, resulting in the structure shown in fig. 5.
Thicker isolation layers can reduce parasitic capacitance, increase isolation, and the high thermal conductivity of the isolation layers can reduce the reduction in thermal coupling efficiency. The isolating layer can ensure the heating effect and avoid the problem of short circuit.
S4, manufacturing a phase change layer
The phase change material GeTe with the thickness of 150nm is sputtered on the structure of fig. 5, and the phase change material in other areas except the device area is removed through a conventional stripping process after the sputtering is finished, so that the structure shown in fig. 6 is obtained, and the phase change layer 5 is positioned above the isolation layer 4.
S5, manufacturing a first metal layer
Ti/au=20 nm/1000nm was deposited on the structure of fig. 6 to obtain a first metal layer, and the structure shown in fig. 7 was obtained through photolithography and wet lift-off processes, and the first metal layer was divided into a first metal electrode a161, a first metal electrode A262, a first metal electrode A363, a first metal electrode A4 64, and a first metal electrode A5 65. The first metal layer is thicker, and the metal is distributed to cover the steps on the periphery of the device, so that after evaporation, adhesion between the electrode metal and the metal on the photoresist is easy to occur, and the risk of difficult stripping exists. In order to avoid the risk, the evaporated metal is conveniently stripped, double-layer thick glue is used as a mask in the photoetching process, an obvious undercut structure (undercut) is formed on the lower glue, and stripping liquid is conveniently contacted with the photoresist to react, so that the integrity of the appearance of the metal electrode is ensured. The wet stripping process adopts acetone, stripping liquid, isopropanol and ultrapure water to clean in sequence. The first metal layer is used as an electrode of the phase change switch and is directly contacted with the thin film resistor layer 3.
S6, manufacturing a dielectric layer
By plasma-enhanced chemical vapor depositionDepositing 850nm thick second SiO on the structure of FIG. 7 at 350 DEG C 2 Patterning metal-insulator-metal (MIM) capacitor by lithography, and removing second SiO in other regions by dry etching 2 A layer for retaining only the second SiO of the MIM capacitor region 2 The dielectric layer 7 of the MIM capacitor is obtained, and the structure is shown in fig. 8, where the dielectric layer 7 surrounds the first metal electrode A4 64 and is located on top of the first metal electrode A4.
The key to this step is to ensure that the SiO deposited in other areas 2 Etching away, only retaining MIM capacitor part, and making no thermally oxidized SiO before etching 2 The influence is generated, and the insulation property is ensured.
S7, manufacturing an air bridge and a second metal layer
The structure shown in fig. 8 is spun on a layer of photoresist, pattern photoetching of the pier sacrificial layer is completed, then the wafer is baked at a temperature higher than the pre-photoetching baking temperature, so that the pier sacrificial layer is heated and arched into an arc shape, larger space separation between connecting lines of a grid electrode and a source electrode is realized, and meanwhile, the mechanical stability of an air bridge is improved;
using a magnetron sputtering Ti/Au laminated metal as an electroplating layer of an air bridge;
the photoresist is spun to finish the graphic photoetching of the bridge deck of the air bridge and the connecting electrode of the whole device, after the bottom film is processed for 5min, the electroplating thickened area of the bridge deck is ensured to have no organic residue, the condition of uneven electroplating thickness of the bridge deck is avoided, and then the electroplating Au is about 3 mu m thick, so that the bridge deck of the air bridge and the connecting electrode of the whole device are thickened;
removing photoresist outside the electroplating area, and removing an electroplating layer of the air bridge through wet etching, wherein Au is corroded by a KI solution, and Ti is corroded by a diluted BOE solution (buffer oxide etching solution);
and removing photoresist on the pier sacrificial layer of the air bridge by using acetone to obtain a structure shown in fig. 9, wherein the photoresist 8 is reserved between the first metal electrode A262 and the first metal electrode A363, and the photoresist 8 is reserved between the first metal electrode A363 and the dielectric layer 7.
Depositing Ti/Au=20 nm/3000nm on the structure shown in fig. 9 to form a second metal layer, and then dividing the second metal layer into a second metal electrode B1 91, a second metal electrode B292 and a second metal electrode B3 93 through photoetching and stripping processes, wherein the structure is shown in fig. 10, so that a high-performance integrated passive device of a complete integrated phase change switch is obtained. The connection mode between the radio frequency switch and the IPD device adopts an air bridge to replace the traditional lead connection so as to reduce the parasitic effect.
Example 3
The method for manufacturing the high-performance integrated passive device of the integrated phase change switch in this embodiment is basically the same as embodiment 2, except that:
the substrate 1 in step S1 is a sapphire substrate;
in the step S2, the thickness of the thin film resistor layer 3 is 45nm, and the sheet resistance is 50Ω;
depositing 100nm thick aluminum nitride barrier material as an isolation layer 4 in the step S3;
the phase change material used in step S4 is Ge x Sb 1-x Te (0.1 < x < 0.6), and the thickness of the phase change layer 5 is 100nm;
the deposition temperature in step S6 was 300 ℃.
Example 4
The method for manufacturing the high-performance integrated passive device of the integrated phase change switch in this embodiment is basically the same as embodiment 2, except that:
the substrate 1 in the step S1 is a GaN substrate;
in the step S2, the thickness of the thin film resistor layer 3 is 55nm, and the sheet resistance is 50Ω;
depositing 200nm thick silicon nitride barrier material as an isolation layer 4 in step S3;
the thickness of the phase-change layer 5 in the step S4 is 200nm;
the deposition temperature in step S6 was 400 ℃.
The foregoing description is only of the preferred embodiments of the invention and is not intended to limit the scope of the invention. Various modifications and alterations of this invention will occur to those skilled in the art. Any and all such simple and equivalent variations and modifications are intended to be included within the scope of this invention.
Claims (10)
1. The high-performance integrated passive device of the integrated phase change switch is characterized by comprising a substrate and an insulating layer, wherein the insulating layer is positioned on the upper surface of the substrate; a window is formed in the insulating layer, and a thin film resistor layer, an isolation layer and a phase change layer are sequentially deposited from the bottom to the top of the window; the top end of the isolation layer is flush with the upper surface of the insulation layer; a first metal electrode A1, a first metal electrode A2, a first metal electrode A3, a first metal electrode A4 and a first metal electrode A5 are deposited on the upper surface of the insulating layer; the first metal electrode A1 and the first metal electrode A2 are respectively contacted with the phase change layer and serve as radio frequency electrodes of the phase change layer; the first metal electrode A2 is connected with the first metal electrode A3 through a second metal electrode B1; dielectric layers are deposited around and at the top end of the first metal electrode A4; the first metal electrode A3 is connected with the dielectric layer at the top end of the first metal electrode A4 through a second metal electrode B2; the top end of the first metal electrode A5 is deposited with a second metal electrode B3.
2. The integrated phase change switch of claim 1, wherein the substrate is a silicon substrate, a sapphire substrate, a GaAs substrate, an InP substrate, a GaN substrate, a SiC substrate, a Ga 2 O 3 One of the substrates; or/and the insulating layer is a first SiO 2 A layer.
3. The integrated phase change switch of claim 1, wherein the depth of the window is greater than the thickness of the phase change layer and less than the thickness of the insulating layer.
4. The high performance integrated passive device of integrated phase change switch of claim 1, wherein the thin film resistive layer has a thickness of 45-55 nm and a sheet resistance of 50Ω.
5. The integrated phase change switch of claim 1, wherein the isolation layer is a silicon nitride layer or/and an aluminum nitride layer; or/and the phase change layer is a GeTe layer or Ge x Sb 1-x Te layer, wherein 0.1 < x < 0.6.
6. The high performance integrated passive device of integrated phase change switch of claim 1, wherein the thickness of the isolation layer is 100-200 nm; or/and the thickness of the phase change layer is 100-200 nm.
7. The integrated phase change switch of claim 1, wherein the dielectric layer is a second SiO 2 A layer; or/and the thickness of the dielectric layer is 850nm.
8. The high performance integrated passive device of integrated phase change switch of claim 1, wherein the first metal electrode A1, the first metal electrode A2, the first metal electrode A3, the first metal electrode A4 and the first metal electrode A5 are all titanium-gold laminated metal layers, wherein the thickness of the titanium layer is 20nm, and the thickness of the gold layer is 1000nm; or/and the second metal electrode B1, the second metal electrode B2 and the second metal electrode B3 are titanium-gold laminated metal layers, wherein the thickness of the titanium layer is 20nm, and the thickness of the gold layer is 3000nm.
9. The method for manufacturing a high-performance integrated passive device of an integrated phase change switch as claimed in any one of claims 1 to 8, comprising the steps of:
s1, depositing an insulating layer on a substrate;
s2, manufacturing a window on the insulating layer, then depositing a thin film resistor material on the device, stripping the thin film resistor material in the area outside the window, and reserving the thin film resistor material in the window area to obtain a thin film resistor layer;
s3, depositing a blocking material on the structure obtained in the step S2, retaining the blocking material on the upper surface of the thin film resistor layer, and etching the blocking material in other areas to obtain an isolation layer;
s4, depositing a phase-change material on the structure obtained in the step S3, reserving the phase-change material on the upper surface of the isolation layer, and stripping the phase-change material in other areas to obtain a phase-change layer;
s5, depositing a first metal layer on the structure obtained in the step S4, and dividing the first metal layer into a first metal electrode A1, a first metal electrode A2, a first metal electrode A3, a first metal electrode A4 and a first metal electrode A5 through photoetching and stripping processes;
s6, depositing an insulating material on the structure obtained in the step S5, manufacturing a capacitor pattern through a photoetching process, and etching away the insulating material in other areas to obtain a dielectric layer of the capacitor;
s7, manufacturing an air bridge on the structure obtained in the step S6; and depositing a second metal layer on the obtained structure, and separating the second metal layer into a second metal electrode B1, a second metal electrode B2 and a second metal electrode B3 through photoetching and stripping processes to obtain the high-performance integrated passive device of the integrated phase change switch.
10. The method of claim 9, wherein step S3 includes a step of performing a chemical mechanical polishing process on the isolation layer; or/and in the step S6, the insulating material is deposited by adopting a plasma enhanced chemical vapor deposition method, and the deposition temperature is 300-400 ℃.
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