CN117038428A - Pretreatment method for improving resistivity performance of silicon wafer - Google Patents

Pretreatment method for improving resistivity performance of silicon wafer Download PDF

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Publication number
CN117038428A
CN117038428A CN202310724899.0A CN202310724899A CN117038428A CN 117038428 A CN117038428 A CN 117038428A CN 202310724899 A CN202310724899 A CN 202310724899A CN 117038428 A CN117038428 A CN 117038428A
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CN
China
Prior art keywords
silicon wafer
resistivity
washing
pretreatment method
silicon
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CN202310724899.0A
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Chinese (zh)
Inventor
王若男
芮阳
祁海滨
徐佳美
冉泽平
徐慶晧
王黎光
曹启刚
王忠保
赵泽慧
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Ningxia Zhongxin Wafer Semiconductor Technology Co ltd
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Ningxia Zhongxin Wafer Semiconductor Technology Co ltd
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Priority to CN202310724899.0A priority Critical patent/CN117038428A/en
Publication of CN117038428A publication Critical patent/CN117038428A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02013Grinding, lapping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

A pretreatment method for improving resistivity performance of a silicon wafer comprises the following steps: polishing the surface of the silicon wafer by using a grinder to level the surface of the silicon wafer; step 2: immersing the polished silicon wafer in a prepared alkaline etching solution for alkaline washing; step 3: immersing the silicon wafer subjected to alkali washing in a pre-prepared mixed acid solution for first acid washing; step 4: carrying out oxidation heat treatment and rapid cooling on the pickled silicon wafer so as to remove heat donors in the silicon wafer; step 5: and (3) carrying out second acid washing on the cooled silicon wafer through the mixed acid solution to obtain the silicon wafer for carrying out resistivity performance test. According to the scheme, the resistivity stability of the silicon wafer can be improved, the real resistivity of the silicon wafer can be reduced in a heat-removing donor mode, and the accuracy of the resistivity detection of the silicon wafer is improved.

Description

Pretreatment method for improving resistivity performance of silicon wafer
Technical Field
The invention relates to the technical field of semiconductor materials, in particular to a pretreatment method for improving resistivity performance of a silicon wafer.
Background
The resistivity of silicon single crystals has a close relationship with semiconductor devices, especially the stability of resistivity. When the fluctuation of the resistivity of the silicon single crystal is large, the breakdown voltage of the device is reduced in severe cases, so that the yield of the device is reduced, and the design and manufacture of the device are affected.
Before the resistivity of the single crystal is conventionally detected, the silicon wafer is subjected to annealing and sand blasting, wherein the annealing is caused by introducing thermal donors in the low-temperature heat treatment at 450-550 ℃ in the crystal pulling process, so that the resistivity of the lightly doped sample deviates from a target value, and the resistivity accuracy is lower. In order to eliminate the thermal donor and restore the true resistivity, the silicon wafer needs to be subjected to heat treatment at 650 ℃. Because the silicon wafer is subjected to a thermal oxidation process, the surface of the silicon wafer is covered with a dense oxide film, and the surface oxide layer needs to be removed by sand blasting or grinding. However, although the oxide layer can be removed to a certain extent by the sand blasting or grinding mode, the surface state of the sample wafer used for the early evaluation of the resistivity is poor and saw-tooth traces, dirt, metal impurities and the like exist on the cut silicon wafer, so that the measured resistivity is still influenced by the surface state of the silicon wafer, the resistivity test fluctuation is large, the stability is poor and the accuracy is low, and the device manufacturing is greatly limited.
Disclosure of Invention
In view of the above, there is a need to propose a pretreatment method for improving resistivity performance of silicon wafers to improve resistivity stability and accuracy of the silicon wafers.
The embodiment of the invention provides a pretreatment method for improving resistivity performance of a silicon wafer, which comprises the following steps:
step 1: polishing the surface of the silicon wafer by using a grinder to level the surface of the silicon wafer;
step 2: immersing the polished silicon wafer in a prepared alkaline etching solution for alkaline washing;
step 3: immersing the silicon wafer subjected to alkali washing in a pre-prepared mixed acid solution for first acid washing;
step 4: carrying out oxidation heat treatment and rapid cooling on the pickled silicon wafer so as to remove heat donors in the silicon wafer;
step 5: and (3) carrying out second acid washing on the cooled silicon wafer through the mixed acid solution to obtain the silicon wafer for carrying out resistivity performance test.
Preferably, in the step 1, polishing the silicon wafer with the polishing liquid under the high-speed rotation of the turntable; wherein, the grinding fluid is a mixed solution composed of 1500 mesh grinding sand, alumina suspension and water, and the mixing proportion is 1500 mesh grinding sand: alumina suspension: water = 5-10 kg: 2-5L: 10-15L.
Preferably, in the step 1, the silicon wafer is polished in the grinder by using a silicon carbide grinding head.
Preferably, in the step 1, the polishing removal amount of the silicon wafer by the polishing machine is 100-300 μm.
Preferably, the step 2 specifically includes: and putting the polished silicon wafer into the alkaline etching solution for ultrasonic treatment for 5-10 min.
Preferably, the alkaline corrosive liquid is prepared from 49% by mass of sodium hydroxide, deionized water and a surfactant according to a volume ratio of 35-40: 221:0.1 to 0.5.
Preferably, the pickling conditions of the first pickling in the step 3 and the second pickling in the step 5 are: the silicon wafer is completely immersed in the mixed acid solution to react for 2-3min.
Preferably, the mixed acid solution is prepared from 49% by mass of hydrofluoric acid, 70% by mass of nitric acid, 99% by mass of acetic acid and deionized water according to a volume ratio of 1: 3-4: 2 to 5: 5-8.
Preferably, the step 4 specifically includes:
preheating an oxidation annealing furnace for 20min at a preheating temperature of 600-800 ℃ before oxidation;
placing the silicon wafer subjected to the first acid washing in a quartz boat, and transferring the quartz boat into the oxidation annealing furnace for oxidation annealing for 30-120 min;
and taking out the quartz boat after annealing, rapidly cooling the silicon wafer by using a fan, and closing the fan after cooling for 30-50 min.
Preferably, after the silicon wafer is subjected to acid washing or alkali washing, the overflowed deionized water is used for washing the silicon wafer.
According to the technical scheme, the pretreatment method for improving the resistivity performance of the silicon wafer provided by the embodiment of the invention comprises the treatment processes of grinding, alkali washing, first acid washing, heat treatment, second acid washing and the like. The grinding mode can enable the surface of the silicon wafer to be smooth, the alkali washing can remove grease dirt on the surface of the silicon wafer, the mixed acid removes metal impurities and a damaged layer, so that the internal stress of the silicon wafer is released, the surface of the silicon wafer can reach a more ideal state, and the influence of the surface state of the silicon wafer on the resistivity is reduced. Further, by heat treatment and removing the oxide layer again with a mixed acid, the thermal donor can be eliminated and the true resistivity restored. Therefore, the detection accuracy of the silicon wafer can be improved through the scheme, and the influence of the surface state of the silicon wafer on the resistivity stability is reduced, so that the resistivity stability can be greatly improved.
Drawings
FIG. 1 is a flowchart of a pretreatment method for improving resistivity performance of a silicon wafer according to an embodiment of the present invention.
Fig. 2 is a surface view of a silicon wafer prior to polishing.
FIG. 3 is a surface view of a polished silicon wafer.
Detailed Description
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Referring to fig. 1, an embodiment of the present invention provides a pretreatment method for improving resistivity performance of a silicon wafer, including the following steps:
step 1: polishing the surface of the silicon wafer by using a grinder to level the surface of the silicon wafer;
step 2: immersing the polished silicon wafer in a prepared alkaline etching solution for alkaline washing;
step 3: immersing the silicon wafer subjected to alkali washing in a pre-prepared mixed acid solution for first acid washing;
step 4: carrying out oxidation heat treatment and rapid cooling on the pickled silicon wafer so as to remove heat donors in the silicon wafer;
step 5: and (3) carrying out second acid washing on the cooled silicon wafer through the mixed acid solution to obtain the silicon wafer for carrying out resistivity performance test.
The invention aims to solve the problems of unstable resistivity test, low accuracy, uneven radial resistivity distribution and the like, and compared with the conventional pretreatment method for detecting resistivity by using heat treatment and sand blasting, the pretreatment method used by the patent comprises five steps of grinding, alkali washing, mixed acid polishing, heat treatment, mixed acid polishing and the like. In order to stabilize the resistivity test of the sample wafer and not affected by the surface state, the embodiment uses grinding to flatten the surface of the sample, then removes surface grease dirt through alkaline washing, removes metal impurities and damaged layers through mixed acid, enables the surface of the sample wafer to reach a more ideal state through multiple steps such as stress release in a silicon wafer body, finally reduces the real resistivity through heat treatment, and removes the oxidized layers through mixed acid, thereby obtaining a stable resistivity value.
In one embodiment, the polishing of the silicon wafer in step 1 can be performed in two ways:
mode one: polishing the silicon wafer by using the polishing liquid under the high-speed running of the turntable; wherein, the grinding fluid is a mixed solution composed of 1500 mesh grinding sand, alumina suspension and water, and the mixing proportion is 1500 mesh grinding sand: alumina suspension: water = 5-10 kg: 2-5L: 10-15L.
Mode two: silicon wafers were polished in a grinder using a carborundum head.
In the embodiment, the first mode adopts grinding liquid to grind the silicon wafer, and the second mode adopts a silicon carbide grinding head to grind the silicon wafer. The first mode can polish a plurality of silicon wafers simultaneously, has higher polishing efficiency, and therefore has more advantages in actual mass production. And a small amount of silicon wafers used for testing can be polished in a second mode, and the second mode does not use grinding liquid, so that the polishing requirement of a small amount of tested silicon wafers can be met, and the cost formed by the grinding liquid can be saved.
In addition, since the silicon wafer has a poor surface state after cutting, exhibits a high-low unevenness, and has a phase difference of 100-300 μm, it is considered that the amount of removal by the grinder for grinding the silicon wafer is controlled to be 100-300 μm according to the specific surface state of the silicon wafer.
As shown in fig. 2 and 3, in the scheme, the silicon wafer surface polished by the silicon carbide grinding head is remarkably improved in flatness. And the thickness deviation of the front and back centers of the silicon wafer measured twice before polishing is 4.5%, and the thickness deviation of the front and back centers of the silicon wafer measured twice after polishing is 0.06%.
Further, in one embodiment, in the step 2, the polished silicon wafer may be put into an alkaline etching solution for ultrasonic treatment for 5-10min during the alkaline washing. Wherein the alkaline corrosive liquid comprises sodium hydroxide, deionized water and a surfactant with the mass percentage of 49 percent according to the volume ratio of 35-40: 221:0.1 to 0.5.
In this embodiment, the ground silicon wafer is completely immersed in an alkaline etching solution, so as to remove grease and other impurity particles on the surface, wherein the alkaline etching solution is a mixed solution composed of sodium hydroxide, a surfactant TSC-1 and deionized water, and the volume ratio of the mixed solution is NaOH (49%): TSC-1: h2o=35 to 40:221: and (5) carrying out ultrasonic alkaline washing for 5-10min and taking out the product after 0.1-0.5.
It is easy to understand that the overflow deionized water is used for cleaning the silicon wafer after ultrasonic alkaline cleaning so as to remove the residual alkali liquor on the surface of the silicon wafer.
Further, in one embodiment, the pickling conditions for the first pickling in step 3 and the second pickling in step 5 are: the silicon wafer is completely immersed in the mixed acid solution to react for 2-3min. Wherein the mixed acid solution comprises 49% of hydrofluoric acid, 70% of nitric acid, 99% of acetic acid and deionized water according to the volume ratio of 1: 3-4: 2 to 5: 5-8.
In the embodiment, overflowed deionized water cleans the silicon wafer, and after removing the alkali liquor remained on the surface of the silicon wafer, the silicon wafer is placed into a mixed acid solution for full reaction for 2-3min, wherein the mixed acid solution is a mixed solution composed of hydrofluoric acid, nitric acid, acetic acid and deionized water, and the volume ratio is HF (49%): HNO3 (70%): CH3COOH (99%): h2o=1: 3-4: 2 to 5: 5-8, wherein nitric acid has an oxidation effect and can perform an oxidation reaction with the silicon wafer, hydrofluoric acid can remove oxides, and the silicon wafer is subjected to repeated corrosion reaction to remove a damaged layer and metal impurities so as to achieve the aim of polishing. Wherein, the reaction equation of the acid washing is as follows: si+4hno3+6hf=h2sif6+4no2+4h2o, and after the reaction, the residual chemical solution on the surface is rinsed off with overflowed deionized water.
In one embodiment, step 4 may be implemented in the following manner when removing the thermal donor in the silicon wafer:
preheating an oxidation annealing furnace for 20min at a preheating temperature of 600-800 ℃ before oxidation;
placing the silicon wafer subjected to the first acid washing in a quartz boat, and transferring the quartz boat into an oxidation annealing furnace for oxidation annealing for 30-120 min;
and taking out the quartz boat after annealing, rapidly cooling the silicon wafer by using a fan, and closing the fan after cooling for 30-50 min.
In this embodiment, in order to remove thermal donors in the silicon wafer and reduce the true resistivity, it is necessary to perform an oxidative heat treatment on the silicon wafer and rapidly cool the silicon wafer through a temperature range of 450-550 ℃. Before oxidation, preheating an oxidation annealing furnace at 600-800 ℃, keeping the temperature in the furnace stable after preheating for 20min, transferring a quartz boat with a silicon wafer into the annealing furnace, oxidizing and annealing for 30-120 min, rapidly taking out the quartz boat after annealing, rapidly cooling the silicon wafer by a fan, and turning off the fan after cooling for 30-50 min. Because the thermal donor is introduced during the low-temperature heat treatment at 450-550 ℃ in the crystal pulling process, the silicon wafer quickly passes through the temperature range at 450-550 ℃ through the embodiment, so that the thermal donor disappears, and the real resistivity of the silicon wafer is reduced.
In the above embodiment, the quartz boat is made of high temperature resistant polytetrafluoroethylene material.
And finally, immersing the cooled silicon wafer into the mixed acid solution again for carrying out second acid washing, wherein the mixed acid solution is consistent with the mixed acid solution, removing an oxide layer on the surface of the silicon wafer by using the mixed acid, and cleaning and drying the silicon wafer by using overflowed deionized water. Before testing, the silicon wafer is placed in an environment of 20-25 ℃ for 120-180 min, so that the resistivity of the silicon wafer tends to be stable, the thickness of the silicon wafer is measured by using a thickness meter, and then the resistivity value of the center of the silicon wafer is measured by using a four-probe resistivity tester.
The following is a description of specific comparative tests.
Scheme one: alkaline washing, strong acid washing, heat donor removal and grinding;
scheme II: alkali washing, strong acid washing, heat donor removal and sand blasting;
scheme III: alkaline washing-CP-removing heat donor-grinding;
scheme IV: grinding, alkali washing, CP, removing heat donor and sand blasting;
scheme five: grinding, alkali washing, CP, heat donor removal and CP;
wherein, CP in each scheme is the acid washing process provided by the embodiment of the invention, and grinding, alkali washing and heat donor removal are the corresponding processes provided by the invention; the strong acid washing process is consistent with the CP process, the proportion of the acid washing liquid in the strong acid washing process is different, the acid washing liquid in the strong acid washing process is mixed liquid of 49% of HF,70% of HNO3, 99% of CH3COOH and water, wherein the volume fraction of the HF in the mixed liquid is 10-20%, the HNO3 is 30-40%, the CH3COOH is 15-25%, and the water is 25-35%. The sand blasting process comprises the following steps: the method comprises the steps of spraying white corundum powder on the surface of a silicon wafer under the pressure of compressed air by using a sand blasting machine, removing uneven places on the surface of the silicon wafer in an impact manner, and performing sand blasting in a crisscross manner, wherein the main component of the white corundum powder is aluminum oxide, and the size of the white corundum powder is about 200 meshes.
3 silicon wafers are obtained through the schemes respectively, and the central resistivity of the 3 silicon wafers is measured on the day, the seventh day and the fourteenth day respectively, and the measured results are as follows:
as can be seen from the experimental results, the test deviation of different time points of schemes 1, 2 and 4 is larger, so that the method is not adopted; although the current test value is stable, in the scheme 3, a treatment flow of complaints of customers appears in the practical application that the resistivity is lower, and the resistivity is obviously reduced after one month, so that the scheme is not adopted; the test results of scheme 5 are stable and meet laboratory test values. It follows that the embodiment of scheme 5 provided by the present invention is a preferred scheme.
In summary, the silicon wafer obtained through the processes of grinding, alkaline washing, acid washing, athermal donor, acid washing again and the like provided by the scheme can obviously improve the resistivity stability of the silicon wafer. Moreover, the resistivity detection value of the silicon wafer can be more accurate through the athermal donor treatment.
The modules or units in the device of the embodiment of the invention can be combined, divided and deleted according to actual needs. The foregoing disclosure is illustrative of the preferred embodiments of the present invention, and is not to be construed as limiting the scope of the invention, as it is understood by those skilled in the art that all or part of the above-described embodiments may be practiced with equivalents thereof, which fall within the scope of the invention as defined by the appended claims.

Claims (10)

1. The pretreatment method for improving the resistivity performance of the silicon wafer is characterized by comprising the following steps of:
step 1: polishing the surface of the silicon wafer by using a grinder to level the surface of the silicon wafer;
step 2: immersing the polished silicon wafer in a prepared alkaline etching solution for alkaline washing;
step 3: immersing the silicon wafer subjected to alkali washing in a pre-prepared mixed acid solution for first acid washing;
step 4: carrying out oxidation heat treatment and rapid cooling on the pickled silicon wafer so as to remove heat donors in the silicon wafer;
step 5: and (3) carrying out second acid washing on the cooled silicon wafer through the mixed acid solution to obtain the silicon wafer for carrying out resistivity performance test.
2. The pretreatment method for improving resistivity performance of silicon wafer as claimed in claim 1, wherein in step 1, the silicon wafer is polished by using a polishing liquid under high-speed rotation of a turntable; wherein, the grinding fluid is a mixed solution composed of 1500 mesh grinding sand, alumina suspension and water, and the mixing proportion is 1500 mesh grinding sand: alumina suspension: water = 5-10 kg: 2-5L: 10-15L.
3. The method of claim 1, wherein in step 1, the silicon wafer is polished by using a silicon carbide polishing head in the polishing machine.
4. The pretreatment method for improving resistivity properties of silicon wafers as claimed in claim 2 or 3, wherein in said step 1, the amount of abrasion removal of the silicon wafer by the abrasion machine is 100 to 300. Mu.m.
5. The pretreatment method for improving resistivity performance of silicon wafer as claimed in claim 1, wherein the step 2 specifically comprises: and putting the polished silicon wafer into the alkaline etching solution for ultrasonic treatment for 5-10 min.
6. The pretreatment method for improving resistivity performance of silicon wafers according to claim 5, wherein the alkaline etching solution comprises, by mass, 49% sodium hydroxide, deionized water and a surfactant in a volume ratio of 35-40: 221:0.1 to 0.5.
7. The pretreatment method for improving resistivity properties of silicon wafers as claimed in claim 1, wherein the pickling conditions of the first pickling in the step 3 and the second pickling in the step 5 are: the silicon wafer is completely immersed in the mixed acid solution to react for 2-3min.
8. The pretreatment method for improving resistivity performance of silicon wafers according to claim 7, wherein the mixed acid solution comprises 49% hydrofluoric acid, 70% nitric acid, 99% acetic acid and deionized water in a volume ratio of 1: 3-4: 2 to 5: 5-8.
9. The pretreatment method for improving resistivity performance of silicon wafer as claimed in claim 1, wherein the step 4 specifically comprises:
preheating an oxidation annealing furnace for 20min at a preheating temperature of 600-800 ℃ before oxidation;
placing the silicon wafer subjected to the first acid washing in a quartz boat, and transferring the quartz boat into the oxidation annealing furnace for oxidation annealing for 30-120 min;
and taking out the quartz boat after annealing, rapidly cooling the silicon wafer by using a fan, and closing the fan after cooling for 30-50 min.
10. The method of claim 1, wherein the wafer is rinsed with overflow deionized water after the wafer is subjected to acid or alkali washing.
CN202310724899.0A 2023-06-19 2023-06-19 Pretreatment method for improving resistivity performance of silicon wafer Pending CN117038428A (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002076080A (en) * 2000-08-31 2002-03-15 Shin Etsu Handotai Co Ltd Resistivity measuring method of semiconductor silicon substrate, conductivity type determining method of semiconductor silicon substrate, and manufacturing method of semiconductor silicon substrate
US20220146444A1 (en) * 2019-03-06 2022-05-12 Shin-Etsu Handotai Co., Ltd. Method for measuring resistivity of silicon single crystal
JP2022099564A (en) * 2020-12-23 2022-07-05 株式会社Sumco Method for measuring resistivity of silicon wafer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002076080A (en) * 2000-08-31 2002-03-15 Shin Etsu Handotai Co Ltd Resistivity measuring method of semiconductor silicon substrate, conductivity type determining method of semiconductor silicon substrate, and manufacturing method of semiconductor silicon substrate
US20220146444A1 (en) * 2019-03-06 2022-05-12 Shin-Etsu Handotai Co., Ltd. Method for measuring resistivity of silicon single crystal
JP2022099564A (en) * 2020-12-23 2022-07-05 株式会社Sumco Method for measuring resistivity of silicon wafer

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