CN117008843A - Control page linked list construction device and electronic equipment - Google Patents

Control page linked list construction device and electronic equipment Download PDF

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Publication number
CN117008843A
CN117008843A CN202311252706.2A CN202311252706A CN117008843A CN 117008843 A CN117008843 A CN 117008843A CN 202311252706 A CN202311252706 A CN 202311252706A CN 117008843 A CN117008843 A CN 117008843A
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correction
control page
corrected
template
address
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CN202311252706.2A
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CN117008843B (en
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李大鹏
王江
宁前
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Suzhou Metabrain Intelligent Technology Co Ltd
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Suzhou Metabrain Intelligent Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/0644—Management of space entities, e.g. partitions, extents, pools
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658—Controller construction arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

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  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

The embodiment of the application provides a control page linked list construction device and electronic equipment, wherein the device comprises: the register configuration unit is used for receiving a starting command of the control page linked list sent by the host, and the starting command is at least used for inquiring an offset address of the construction information; the reading unit is in communication connection with the register configuration unit and is used for calculating the access address of each construction information according to the offset address of each construction information, reading each construction information according to the access address of each construction information and storing each construction information into the storage space of the register; the correction template unit is in communication connection with the register and is used for reading the correction value, the correction position and the control page template in the register, determining a field to be corrected in the control page template according to the correction position, and modifying the field to be corrected into the correction value to obtain a modified control page template until all correction positions in the control page linked list are corrected, so that the problem of poor IO read-write performance caused by the fact that the CPU is occupied by firmware to complete the creation of the control page linked list is solved.

Description

Control page linked list construction device and electronic equipment
Technical Field
The embodiment of the application relates to the field of computers, in particular to a control page linked list construction device and electronic equipment.
Background
With the rising of computing storage technology in recent years, computing storage architecture reduces the moving operation of corresponding data by offloading data computation from a host CPU to a data processing acceleration unit near a storage unit, thereby freeing system performance as much as possible.
The general purpose computing acceleration architecture (UAA) is a newly defined computing storage architecture, and the core idea is that the micro architecture is innovated, and an optimized soft and hard interface division is completed by adopting a microcode driving mode, and the high flexibility and the expandability of software programming are maintained on the premise of considering the high performance of hardware execution. In the architecture of the UAA, a Control Page (CP) and a control Command Block (CB) are defined. The CB represents the execution command of different engines, the CP size can be 512 bytes, 1024 bytes or 2048 bytes, and the rest space is used for storing the CB except the CP header, the data cache and the original host IO instruction backup. All CPs are placed in one continuous memory space, thereby forming one CP's resource pool. In addition, in order to facilitate the management of the CP resource pool, CP granularity in a single resource pool needs to be kept consistent, i.e. only one CP size can be selected. In the UAA architecture, a control page Chain table (CP Chain) is adopted to realize IO operation, wherein the maximum of the CP Chain is 4096 bytes, and the maximum of the CP pages is 8.
In the system operation, particularly when data operations of Raid50, raid60 and the like are involved, CP Chain needs to be created multiple times. In the traditional scheme, the firmware independently completes the creation of the CP chain, the occupancy rate of the CPU is higher, and the read-write performance of IO is affected. Therefore, how to reduce the participation of firmware, liberate CPU, complete the creation of CP Chain by hardware unit, improve the read-write performance of IO, is the technical problem that the present technicians in the field need to solve urgently.
Disclosure of Invention
The embodiment of the application provides a control page linked list construction device and electronic equipment, which at least solve the problem that IO read-write performance is poor due to the fact that a CPU is occupied by firmware to finish the creation of a control page linked list in the related art.
According to an embodiment of the present application, there is provided a control page linked list construction apparatus including: the register configuration unit is used for receiving a starting command of a control page linked list sent by a host, wherein the starting command is at least used for inquiring an offset address of construction information, the construction information comprises a correction value, a correction position and a control page template of the control page linked list, and the correction value corresponds to the correction position one by one; a reading unit, which is in communication connection with the register configuration unit, and is used for calculating the access address of each construction information according to the offset address of each construction information, reading each construction information according to the access address of each construction information, and storing each construction information into the storage space of the register; and the correction template unit is in communication connection with the register and is used for reading the correction value, the correction position and the control page template in the register, determining a field to be corrected in the control page template according to the correction position, correcting the field to be corrected into the correction value, obtaining the corrected control page template until all correction positions in the control page linked list are corrected, and completing the construction of the control page linked list.
In an exemplary embodiment, the register configuration unit is configured to partition a descriptor storage space for storing a descriptor corresponding to the start command, a correction value storage space for storing the correction value, a correction location storage space for storing the correction location, a template access space for storing the control page template, and a write memory access space for storing the modified control page template, and allocate a corresponding base address in the storage space of the register.
In an exemplary embodiment, the control page linked list construction apparatus further includes: the read descriptor unit is in communication connection with the register configuration unit, and is used for reading the descriptor corresponding to the starting command through a fourth interface, calculating an access address of the descriptor according to the offset address of the descriptor carried by the starting command and the base address of the descriptor storage space, and storing the descriptor into the descriptor storage space according to the access address of the descriptor, wherein the descriptor comprises the number of control pages in the control page linked list, the offset address of the correction value, the offset address of the correction position, the offset address of the control page template, the number of fields to be corrected of each control page template and the offset address of the modified control page template.
In an exemplary embodiment, the descriptor includes a plurality of fields arranged in sequence, and the reading unit is further configured to read a first field, a second field, and a fourth field of the descriptor according to an access address of the descriptor, where the first field includes an offset address of the corrected location, the second field includes an offset address of the control page template, and the fourth field includes an offset address of the corrected value.
In an exemplary embodiment, the reading unit further includes: the correction value reading unit is in communication connection with the register and is used for reading the correction value through a first interface, calculating an access address of the correction value according to a base address of the correction value storage space and an offset address of the correction value, and storing the correction value into the correction value storage space according to the access address of the correction value; the read correction position unit is in communication connection with the register and is used for reading the correction position through a second interface, calculating an access address of the correction position according to a base address of the correction position storage space and an offset address of the correction position, and storing the correction position into the correction position storage space according to the access address of the correction position; and the template reading unit is in communication connection with the register and is used for reading the control page template through a third interface, calculating the access address of the control page template according to the base address of the template access space and the offset address of the control page template, and storing the control page template into the template access space according to the access address of the control page template.
In an exemplary embodiment, the descriptor includes a plurality of fields sequentially arranged, the correction template unit is further configured to read a first field of the descriptor and a plurality of third fields according to an access address of the descriptor, the first field includes a number of control pages in the control page linked list, the third field includes a number of fields to be corrected of the control page template, and the third fields are in one-to-one correspondence with the control page template.
In an exemplary embodiment, the correction template unit includes: a correction preparation unit configured to detect whether data exists in both the correction value storage space and the correction position storage space; and the correction execution unit is in communication connection with the correction preparation unit, and is used for entering a correction proceeding state when data exist in the correction value storage space and the correction position storage space, entering a correction preparation state when data do not exist in the correction value storage space and the correction position storage space, detecting whether all the control page templates are corrected in the correction preparation state, and ending the correction when all the control page templates are corrected, wherein the correction proceeding state is a state of correcting the control page templates, and the correction preparation state is a state of stopping correcting the control page templates.
In an exemplary embodiment, when the correction execution unit enters the correction proceeding state, the correction execution unit concurrently corrects a plurality of the control page templates.
In an exemplary embodiment, when the correction execution unit enters the correction performing state, the correction execution unit is configured to read the correction position in the correction position storage space and the correction value corresponding to the correction value storage space, where the correction position includes a bit width, a start bit offset, a word offset, and a CP index, where the bit width is a bit width of correction data in the field to be corrected, the start bit offset is used to determine a start position of the correction data in the field to be corrected, the word offset is used to determine position information of the field to be corrected, and the CP index is a sequence number of the control page template where the field to be corrected is located.
In an exemplary embodiment, when the correction execution unit enters the correction execution state, the correction execution unit is further configured to calculate a product of the CP index and the size of the control page template, obtain a first address, shift the first address by four bits to the right, obtain a first address of the control page template in the template access space, shift the word by two bits to the right, obtain an offset address of the field to be corrected, calculate a sum of the first address and the offset address of the field to be corrected, obtain an access address of the field to be corrected, and write the correction value corresponding to the field to be corrected into the access address of the field to be corrected, so as to replace the correction data in the field to be corrected.
In an exemplary embodiment, the correction execution unit is further configured to shift the current clock cycle by five bits to obtain an initial position, calculate a sum of the initial position and the initial bit offset, obtain a start position of the correction data, and determine an end position of the correction data according to the start position and the bit width of the correction data, so that bit enable of a position between the start position and the end position of the correction data is valid, and bit enable of a remaining position in the field to be corrected is invalid.
In an exemplary embodiment, the correction execution unit is further configured to read the number of fields to be corrected of the control page template, obtain a target number, and start a counter of the target number, where the counter is decremented by one so that the correction execution unit corrects one of the fields to be corrected until the number is reduced to 0.
In an exemplary embodiment, the counter is decremented by one in one clock cycle, such that the correction execution unit corrects one of the fields to be corrected in one of the clock cycles.
In an exemplary embodiment, the correction execution unit is further configured to compare the number of modified fields to be corrected with the number of fields to be corrected of the control page template, and determine that the control page template correction is completed if the number of modified fields to be corrected is equal to the number of fields to be corrected of the control page template.
In an exemplary embodiment, the control page linked list construction apparatus further includes: and the write memory unit is in communication connection with the register and is used for reading all the modified control page templates in the template access space and storing the modified control page templates in the template access space into the write memory access space to obtain the control page linked list after construction is completed.
In an exemplary embodiment, the descriptor includes a plurality of fields arranged in sequence, and the write memory unit is further configured to read a fifth field of the descriptor according to an access address of the descriptor, where the fifth field includes an offset address of the modified control page template.
In one exemplary embodiment, the write memory unit includes: a write memory preparation unit, which is in communication connection with the register and is used for detecting whether the control page template is corrected; and the write memory executing unit is in communication connection with the write memory preparing unit and is used for calculating the access address of the modified control page template according to the offset address of the modified control page template and writing the modified control page template into the write memory access space according to the access address of the modified control page template under the condition that the modification of the control page template is completed.
In an exemplary embodiment, the control page linked list construction apparatus further includes: the detection unit is in communication connection with the register and is used for detecting whether the register has bus read-write operation or not, and stopping building the control page linked list and reporting the building interrupt under the condition that the bus read-write operation exists.
In an exemplary embodiment, when there are a plurality of start commands, the correction template unit is configured to sequentially complete construction of the control page linked list corresponding to the plurality of start commands, where the start commands are in one-to-one correspondence with the control page linked list.
According to another embodiment of the present application, there is also provided an electronic device including a host and any one of the control page linked list construction apparatuses described in the present application.
According to the application, the control page linked list constructing device is a piece of hardware, and each unit in the control page linked list constructing device can realize the function of firmware, so that the control page linked list constructing device constructs the control page linked list according to the starting command issued by the CPU, the CPU is not required to be occupied by the firmware to complete the creation of the control page linked list, the CPU occupancy rate is reduced, the influence on IO read-write performance is reduced, and the problem of poor IO read-write performance caused by the fact that the CPU is occupied by the firmware to complete the creation of the control page linked list in the prior art is solved.
Drawings
FIG. 1 is a schematic diagram of a control page linked list construction apparatus according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a workflow of a control page linked list construction apparatus according to an embodiment of the present application;
FIG. 3 is a schematic diagram of descriptor definitions in accordance with an embodiment of the present application;
FIG. 4 is a schematic illustration of a corrected location definition according to an embodiment of the application;
FIG. 5 is a flow chart of a modified template unit workflow according to an embodiment of the application.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
In this embodiment, a control page linked list construction device is provided, fig. 1 is a schematic structural diagram of a control page linked list construction device according to an embodiment of the present application, as shown in fig. 1, where the device includes:
the register configuration unit is used for receiving a starting command of a control page linked list sent by a host, wherein the starting command is at least used for inquiring an offset address of construction information, the construction information comprises a correction value, a correction position and a control page template of the control page linked list, and the correction value corresponds to the correction position one by one;
Specifically, the host CPU organizes the start command and issues the start command to the constructing device, and the constructing device automatically executes the CP chain constructing process, that is, the control page list constructing process, without any participation of the host.
A reading unit, which is in communication connection with the register configuration unit, and is used for calculating the access address of each construction information according to the offset address of each construction information, reading each construction information according to the access address of each construction information, and storing each construction information into the storage space of the register;
specifically, the reading unit queries the offset address of the construction information according to the start command, so as to calculate the access address according to the offset address of the construction information, and write the read construction information into the storage space of the register for use.
And the correction template unit is in communication connection with the register and is used for reading the correction value, the correction position and the control page template in the register, determining a field to be corrected in the control page template according to the correction position, correcting the field to be corrected into the correction value, obtaining the corrected control page template until all correction positions in the control page linked list are corrected, and completing the construction of the control page linked list.
Specifically, the correction template unit reads the construction information, namely the correction value, the correction position and the control page template, and determines the field to be corrected in the control page template according to the correction position, so that the field to be corrected is corrected to the correction value, and the correction of all the fields to be corrected of all the control page templates is completed, so that the construction of the control page linked list can be completed.
The control page chain table constructing device is a piece of hardware, and each unit in the control page chain table constructing device can realize the function of firmware, so that the control page chain table constructing device constructs the control page chain table according to the starting command issued by the CPU, the CPU is not required to be occupied by the firmware to complete the creation of the control page chain table, the CPU occupancy rate is reduced, the influence on IO read-write performance is reduced, and the problem that IO read-write performance is poor due to the fact that the CPU is occupied by the firmware to complete the creation of the control page chain table in the prior art is solved.
In an exemplary embodiment, the register configuration unit is configured to partition a descriptor storage space for storing a descriptor corresponding to the start command, a correction value storage space for storing the correction value, a correction location storage space for storing the correction location, a template access space for storing the control page template, and a write memory access space for storing the modified control page template, and allocate a corresponding base address in the storage space of the register.
In the above embodiment, in the device, five memory spaces are required to be accessed, which are respectively: descriptor storage space, correction value storage space, correction position storage space, template access space, and write memory access space. The host computer needs to write data into the corresponding access space in advance, and the descriptors and the correction values are stored in the Cache and read through the ACP interface in consideration of the frequent access times of the host computer. The corrected location and template are placed in the LMU and read through the AXI interface. And writing the corrected CP into the LMU through an AXI interface. And all accesses are aligned at 16B for access efficiency.
In an exemplary embodiment, as shown in fig. 1, the control page linked list construction apparatus further includes:
the read descriptor unit is in communication connection with the register configuration unit, and is used for reading the descriptor corresponding to the starting command through a fourth interface, calculating an access address of the descriptor according to the offset address of the descriptor carried by the starting command and the base address of the descriptor storage space, and storing the descriptor into the descriptor storage space according to the access address of the descriptor, wherein the descriptor comprises the number of control pages in the control page linked list, the offset address of the correction value, the offset address of the correction position, the offset address of the control page template, the number of fields to be corrected of each control page template and the offset address of the modified control page template.
In the above embodiment, each building command includes an offset address for storing the current descriptor, a read descriptor, and according to the descriptor offset base in the building command, the ACP read access address is calculated in combination with the descriptor base address configured by the host, and the descriptor information of 48B is read from the Cache, where the descriptor includes information such as the CP number, the correction position offset, and the like, so as to configure the storage address and the correction number of the building information.
In an exemplary embodiment, as shown in fig. 2, the descriptor includes a plurality of fields arranged in sequence, and the reading unit is further configured to read a first field, a second field, and a fourth field of the descriptor according to an access address of the descriptor, where the first field includes an offset address of the correction location, the second field includes an offset address of the control page template, and the fourth field includes an offset address of the correction value.
In the above embodiment, the descriptor includes a plurality of fields sequentially arranged, for example, as shown in fig. 2, the descriptor includes 11 fields sequentially arranged, a first field is Word0, which indicates the number of CPs in the current CP chain and the offset address of the correction position, a second field is Word1, which indicates the read offset address of the CP template in the current CP chain, and a fourth field is Word6, which indicates the read offset address of the correction value, that is, the offset address of each build information can be obtained by reading the descriptor.
In an exemplary embodiment, as shown in fig. 1, the reading unit further includes:
the correction value reading unit is in communication connection with the register and is used for reading the correction value through a first interface, calculating an access address of the correction value according to a base address of the correction value storage space and an offset address of the correction value, and storing the correction value into the correction value storage space according to the access address of the correction value;
the read correction position unit is in communication connection with the register and is used for reading the correction position through a second interface, calculating an access address of the correction position according to a base address of the correction position storage space and an offset address of the correction position, and storing the correction position into the correction position storage space according to the access address of the correction position;
and the template reading unit is in communication connection with the register and is used for reading the control page template through a third interface, calculating the access address of the control page template according to the base address of the template access space and the offset address of the control page template, and storing the control page template into the template access space according to the access address of the control page template.
In the above embodiment, the correction value is read, the correction value access address and size are calculated according to the configuration, the correction value is read from the Cache, and the correction value is stored in the correction value storage space. And when the correction value is read, the CP template is read concurrently, the template access address and the size are calculated, the template is read from the LMU and written into the template access space, the correction position information is read, when the CP template is completely read, the correction position is read, the access address and the size are calculated according to the correction position, and the correction position is read from the LMU and written into the correction position storage space for use.
In an exemplary embodiment, as shown in fig. 2, the descriptor includes a plurality of fields sequentially arranged, the correction template unit is further configured to read, according to an access address of the descriptor, a first field and a plurality of third fields of the descriptor, where the first field includes a number of control pages in the control page linked list, the third field includes a number of fields to be corrected of the control page template, and the third field corresponds to the control page template one by one.
In the above embodiment, the descriptor includes a plurality of fields sequentially arranged, for example, as shown in fig. 2, the descriptor includes 11 fields sequentially arranged, a first field is Word0, which indicates the number of CPs of the current CP chain and an offset address of the correction position, a third field is Word 2-Word 5, which indicates the number of words required to be modified in each CP in the current CP chain, that is, the number of fields to be corrected, the sum of the number of words to be modified in all CPs cannot be zero, and the CP DMA obtains the correction value and the size of the correction position through the sum of the number of words, that is, the number of CPs and the number of fields to be corrected of each CP can be obtained, that is, the number of fields to be corrected, that is, the number of correction times.
In an exemplary embodiment, the correction template unit includes:
a correction preparation unit configured to detect whether data exists in both the correction value storage space and the correction position storage space;
and the correction execution unit is in communication connection with the correction preparation unit, and is used for entering a correction proceeding state when data exist in the correction value storage space and the correction position storage space, entering a correction preparation state when data do not exist in the correction value storage space and the correction position storage space, detecting whether all the control page templates are corrected in the correction preparation state, and ending the correction when all the control page templates are corrected, wherein the correction proceeding state is a state of correcting the control page templates, and the correction preparation state is a state of stopping correcting the control page templates.
In the above embodiment, the correction template unit is idle, the correction preparation unit detects whether the correction value buffer and the correction position buffer have data, if so, enters a correction preparation state, detects whether all CPs are corrected, and if so, ends the operation. If not, detecting whether the correction value buffer area and the correction position buffer area have data, if so, entering a correction proceeding state, otherwise, waiting in a correction preparation state; and the correction execution unit is used for detecting whether all CPs are corrected and finishing the operation if the CPs are corrected. If not, detecting whether the correction value buffer area and the correction position buffer area have data, if so, continuing to execute the correction proceeding state, otherwise, jumping to the correction preparation state; and (5) automatically jumping back to the idle state.
In an exemplary embodiment, when the correction execution unit enters the correction proceeding state, the correction execution unit concurrently corrects a plurality of the control page templates.
In the above embodiment, the template correction process does not need to wait for the correction position and correction value of one control page template to be completely read, and only the correction position and correction value of the other control page template exist for concurrent execution, so that the construction efficiency is improved.
In an exemplary embodiment, as shown in fig. 3, when the correction execution unit enters the correction performing state, the correction execution unit is configured to read the correction position in the correction position storage space and the correction value corresponding to the correction value storage space, where the correction position includes a bit width, a start bit offset, a word offset, and a CP index, where the bit width is a bit width of correction data in the field to be corrected, the start bit offset is used to determine a start position of the correction data in the field to be corrected, the word offset is used to determine position information of the field to be corrected, and the CP index is a sequence number of the control page template where the field to be corrected is located.
In the above embodiment, in the correction position definition: a. the bit width indicates the bit width of the correction data in the current word; b. the initial bit offset indicates the initial position of the correction data in the current word; c. the word offset indicates the position information of the word in the corrected CP; the CP index indicates what CP in the CP chain needs to be corrected.
In an exemplary embodiment, as shown in fig. 4, when the correction execution unit enters the correction performing state, the correction execution unit is further configured to calculate a product of the CP index and the size of the control page template, obtain a first address, right shift the first address by four bits, obtain a first address of the control page template in the template access space, right shift the word by two bits, obtain an offset address of the field to be corrected, calculate a sum of the first address and the offset address of the field to be corrected, obtain an access address of the field to be corrected, and write the correction value corresponding to the field to be corrected into the access address of the field to be corrected, so as to replace the correction data in the field to be corrected.
In the above embodiment, the address calculation rule: the CP index is multiplied by the CP size, then the CP index is shifted right by four bits, and the head address of the current CP in the buffer area is calculated; word offset right shift two bits, calculate the offset address of the Word in the CP; and adding an offset address to the head address, namely, writing the address into the access space of the template, and replacing the correction data in the field to be corrected.
In an exemplary embodiment, as shown in fig. 4, the correction execution unit is further configured to shift the current clock cycle by five bits to obtain an initial position, calculate a sum of the initial position and the initial bit offset, obtain the initial position of the correction data, determine the final position of the correction data according to the initial position and the bit width of the correction data, and enable bits of a position between the initial position and the final position of the correction data to be valid, and disable bits of remaining positions in the field to be corrected.
In the above embodiment, before writing the correction value corresponding to the field to be corrected into the access address of the field to be corrected, the start bit and the end position of the correction data are calculated. Shifting the current clock period by five bits leftwards, and adding bit offset to obtain a corrected data starting position, wherein the starting position is added with a bit ending position which is the length of the upper bit; between the calculation start bit and the end bit, bit enable is valid and other bit enable is invalid, i.e., modified data misalignment can be avoided.
In an exemplary embodiment, as shown in fig. 4, the correction execution unit is further configured to read the number of fields to be corrected of the control page template, obtain a target number, start a counter of the target number, and decrease the counter by one so that the correction execution unit corrects one of the fields to be corrected until the counter is reduced to 0.
In the above embodiment, the correction execution unit needs to read the correction value and the correction position, and the two data are stored according to 128 bits, and the correction is performed by using word as a unit for modification, so that a 4-bit counter is started internally to ensure that all correction positions are corrected.
In an exemplary embodiment, the counter is decremented by one in one clock cycle, such that the correction execution unit corrects one of the fields to be corrected in one of the clock cycles.
In the above embodiment, the single thermal coding is adopted to realize the control of 4 clock cycles (clock cycles 0-3), and only one word is modified in each cycle, so as to prevent the cross correction error.
In an exemplary embodiment, as shown in fig. 4, the correction execution unit is further configured to compare the number of modified fields to be corrected with the number of fields to be corrected of the control page template, and determine that the control page template correction is completed if the number of modified fields to be corrected is equal to the number of fields to be corrected of the control page template.
In the above embodiment, in the correction unit, whether the CP is corrected is calculated, and whether the current CP template is corrected is judged according to the number of words that the CP needs to correct and the number of words that have been corrected, so as to ensure that the field to be corrected of the CP template is not omitted.
In an exemplary embodiment, the control page linked list construction apparatus further includes:
and the write memory unit is in communication connection with the register and is used for reading all the modified control page templates in the template access space and storing the modified control page templates in the template access space into the write memory access space to obtain the control page linked list after construction is completed.
In the above embodiment, as a core component in the linked list construction device, the correction template unit is responsible for locating the position of the word to be corrected in the CP template by using the read correction position, and writing back into the template access space by using the corresponding correction value as the new value of the corrected field.
In an exemplary embodiment, the descriptor includes a plurality of fields arranged in sequence, and the write memory unit is further configured to read a fifth field of the descriptor according to an access address of the descriptor, where the fifth field includes an offset address of the modified control page template.
In the above embodiment, the descriptor includes a plurality of fields sequentially arranged, for example, as shown in fig. 2, the descriptor includes 11 fields sequentially arranged, and a plurality of fifth fields, namely Word7 to Word10, represent offset addresses of each corrected CP write LMU, that is, offset addresses of write control page access space.
In one exemplary embodiment, the write memory unit includes:
a write memory preparation unit, which is in communication connection with the register and is used for detecting whether the control page template is corrected;
and the write memory executing unit is in communication connection with the write memory preparing unit and is used for calculating the access address of the modified control page template according to the offset address of the modified control page template and writing the modified control page template into the write memory access space according to the access address of the modified control page template under the condition that the modification of the control page template is completed.
In the above embodiment, it is detected whether the CP correction has been completed, and if so, the CP is read from the template buffer and written to the LMU via AXI until all CPs have been written. The LMU writing process can be performed concurrently by only one CP correction without the complete correction of the template, namely, writing the access space of the write control page, so that the CP chain is convenient to use.
In an exemplary embodiment, the control page linked list construction apparatus further includes:
the detection unit is in communication connection with the register and is used for detecting whether the register has bus read-write operation or not, and stopping building the control page linked list and reporting the building interrupt under the condition that the bus read-write operation exists.
In the above embodiment, if errors such as bus read-write occur during the working process, the current construction is stopped, an interrupt is reported, and the next construction is started, so as to prevent occupying the CPU.
In an exemplary embodiment, when there are a plurality of start commands, the correction template unit is configured to sequentially complete construction of the control page linked list corresponding to the plurality of start commands, where the start commands are in one-to-one correspondence with the control page linked list.
In the above embodiment, each time the host sends a start command, the construction of the CP chain starts once, at most 8 construction commands can be issued once, and the 8 CP chains complete the construction in sequence.
It should be noted that each of the above units may be implemented by hardware.
In order to enable those skilled in the art to more clearly understand the technical solution of the present application, the implementation process of the simulation system model reduction method of the present application will be described in detail below with reference to specific embodiments.
The present embodiment relates to a specific construction flow of a control page linked list construction device, in the construction device, a host starts construction of a control page linked list chain once every time a start command is sent, that is, construction of a CP chain, and all CPs (control pages) in the CP chain need to be corrected and written into a write control page access space of an LMU, that is, a write control page access space corresponding to a write LMU unit. The host can organize a plurality of starting commands at a time by using idle time, configuring descriptor information and corresponding buffered data, and transmitting the starting commands to the construction device, and the construction device automatically executes the construction process of the CP chain without participation of the host, so that the host is liberated, and the performance is improved.
In the working process of the construction unit, in order to improve the efficiency of chain table construction and improve the read-write access performance, other processes are executed concurrently except that the first read descriptor, the read control page template and the read position information are required to be executed sequentially, as shown in fig. 5, the working flow is as follows:
1) Detecting whether a starting buffer area is empty or not, wherein the starting buffer area is not empty, and starting a construction flow, wherein the situation that a construction command needs to be executed is represented;
2) And reading the descriptor, namely calculating an ACP read access address according to a descriptor offset base in the construction command and a descriptor base address configured by a host, and reading the descriptor information of 48B from the Cache, wherein the descriptor contains information such as the number of CPs, correction position offset and the like. The descriptor definition is shown in fig. 3, wherein:
word0 indicates the number of CPs of the current CP chain and the offset address of the corrected position;
word1 indicates the read offset address of the CP template of the current CP chain;
word 2-Word 5 shows the number of words required to be modified in each CP in the current CP chain, the sum of the number of modified words in all CPs cannot be zero, and the CPDMA obtains a correction value and the size of a correction position through the sum of the number;
word6 indicates the read offset address of the correction value;
e, word 7-Word 10 represent offset addresses written into the LMU by each corrected CP;
Word11 reserved.
3) And reading the correction value, calculating the access address and the size of the correction value according to the configuration, reading the correction value from the Cache and storing the correction value in a correction value buffer area. When the correction value is read, the CP templates are read concurrently, the access address and the size of the templates are calculated, and the CP templates are read and written into the template buffer area;
4) Reading the correction position information, when the CP template is completely read, starting to read the correction position, calculating an access address and the size according to the correction position, reading the correction position from the LMU and writing the correction position into a correction position buffer area, wherein:
a. the bit width indicates the bit width of the correction data in the current word;
b. the initial bit offset indicates the initial position of the correction data in the current word;
c. the word offset indicates the position information of the word in the corrected CP;
the CP index indicates what CP in the CP chain needs to be corrected.
5) When the correction position buffer and the correction value buffer have data (not empty), the correction template is started. And calculating the address of the corrected word according to the correction position, and writing the correction value into the template buffer area according to the address. The correction template process does not need to wait for the correction position information and the correction value to be completely read, and is executed concurrently as long as one data exists. If one buffer is empty, the correction is suspended. Until all template corrections are completed;
6) It is checked if the CP correction has been completed, if so, the CP is read from the template buffer and written to the LMU via AXI until all CPs have been written. The LMU writing process is completed without the complete correction of the template, and only one CP correction is completed, so that the LMU writing process can be executed concurrently;
7) In the working process, if errors such as bus reading and writing occur, the construction is stopped, and an interrupt is reported. The next build is started.
3. Correction template unit
As a core component in the linked list construction device, the correction template unit is responsible for locating the position of the word to be corrected in the CP template by using the read correction position, and writing the corresponding correction value into the template buffer by using the corresponding correction value as a new value of the corrected field. The workflow of the correction template unit is shown in fig. 4, and the workflow is as follows:
1) Idle, detecting whether the correction value buffer area and the correction position buffer area have data, and if so, entering a correction preparation state;
2) And a correction preparation unit for detecting whether all CPs are corrected and finishing the operation if so. If not, detecting whether the correction value buffer area and the correction position buffer area have data, if so, entering a correction proceeding state, otherwise, waiting in a correction preparation state;
3) And the correction execution unit is used for detecting whether all CPs are corrected and finishing the operation if the CPs are corrected. If not, detecting whether the correction value buffer area and the correction position buffer area have data, if so, continuing to execute the correction proceeding state, otherwise, jumping to the correction preparation state;
4) And (5) automatically jumping back to the idle state.
In the correction template unit, the corresponding position in the template buffer is required to be modified according to the correction value and the correction position value, and the process is performed in the correction execution unit. The correction execution unit needs to read the correction value and the correction position, the two data are stored according to 128 bits, and the correction is carried out by taking word as a unit for modification, so that a 4-bit counter is started internally, and the control of 4 clock cycles (clock cycles 0-3) is realized by adopting single-hot coding, and only one word is modified in each cycle.
In the correction unit, out-of-order execution of the corrected CP template is supported. The read correction value and the corrected position value are in one-to-one correspondence, but the position of the modified CP is not sequential and is determined by the CP index. The CP template buffer is also accessed in 128 bits, so that correction values need to be written to the corresponding locations of the buffer and the data bits to be corrected changed are changed at each cycle, thus requiring control of the address, data and bit enable signals of the write template buffer.
Address calculation rules:
1) The CP index is multiplied by the CP size, then the CP index is shifted right by four bits, and the head address of the current CP in the buffer area is calculated;
2) Word offset right shift two bits, calculate the offset address of the Word in the CP;
3) The first address plus the offset address is the address written into the buffer.
bw calculation rule:
1) The start and end positions of the correction data are calculated. Shifting the current clock period by five bits leftwards, and adding bit offset to obtain a corrected data starting position, wherein the starting position is added with a bit ending position which is the length of the upper bit;
2) Between calculating the start bit and the end bit, the bit enable is active and the other bit enables are inactive.
For the data, the correction value is set to the left offset start position.
In the correcting unit, whether the CP is corrected is calculated, and whether the current CP is corrected is judged according to the Word number which needs to be corrected by the CP and the Word number which is corrected.
The embodiment of the application also provides electronic equipment which comprises a host and any control page linked list construction device.
Specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the exemplary implementation, and this embodiment is not described herein.
It will be apparent to those skilled in the art that they may be implemented as separate integrated circuit modules, or as multiple units within a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware.
The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application should be included in the protection scope of the present application.

Claims (20)

1. A control page linked list construction apparatus, comprising:
the register configuration unit is used for receiving a starting command of a control page linked list sent by a host, wherein the starting command is at least used for inquiring an offset address of construction information, the construction information comprises a correction value, a correction position and a control page template of the control page linked list, and the correction value corresponds to the correction position one by one;
a reading unit, which is in communication connection with the register configuration unit, and is used for calculating the access address of each construction information according to the offset address of each construction information, reading each construction information according to the access address of each construction information, and storing each construction information into the storage space of the register;
And the correction template unit is in communication connection with the register and is used for reading the correction value, the correction position and the control page template in the register, determining a field to be corrected in the control page template according to the correction position, correcting the field to be corrected into the correction value, obtaining the corrected control page template until all correction positions in the control page linked list are corrected, and completing the construction of the control page linked list.
2. The control page linked list construction apparatus according to claim 1, wherein the register configuration unit is configured to divide a descriptor storage space for storing a descriptor corresponding to the start command, a correction value storage space for storing the correction value, a correction position storage space for storing the correction position, a template access space for storing the control page template, and a write memory access space for storing the modified control page template, and allocate corresponding base addresses in the storage space of the register.
3. The control page linked list construction apparatus according to claim 2, wherein the control page linked list construction apparatus further comprises:
the read descriptor unit is in communication connection with the register configuration unit, and is used for reading the descriptor corresponding to the starting command through a fourth interface, calculating an access address of the descriptor according to the offset address of the descriptor carried by the starting command and the base address of the descriptor storage space, and storing the descriptor into the descriptor storage space according to the access address of the descriptor, wherein the descriptor comprises the number of control pages in the control page linked list, the offset address of the correction value, the offset address of the correction position, the offset address of the control page template, the number of fields to be corrected of each control page template and the offset address of the modified control page template.
4. The control page linked list construction apparatus according to claim 3, wherein the descriptor includes a plurality of fields arranged in order, the reading unit is further configured to read a first field, a second field, and a fourth field of the descriptor according to an access address of the descriptor, the first field includes an offset address of the correction position, the second field includes an offset address of the control page template, and the fourth field includes an offset address of the correction value.
5. The control page linked list construction apparatus according to claim 4, wherein the reading unit further comprises:
the correction value reading unit is in communication connection with the register and is used for reading the correction value through a first interface, calculating an access address of the correction value according to a base address of the correction value storage space and an offset address of the correction value, and storing the correction value into the correction value storage space according to the access address of the correction value;
the read correction position unit is in communication connection with the register and is used for reading the correction position through a second interface, calculating an access address of the correction position according to a base address of the correction position storage space and an offset address of the correction position, and storing the correction position into the correction position storage space according to the access address of the correction position;
and the template reading unit is in communication connection with the register and is used for reading the control page template through a third interface, calculating the access address of the control page template according to the base address of the template access space and the offset address of the control page template, and storing the control page template into the template access space according to the access address of the control page template.
6. The apparatus according to claim 3, wherein the descriptor includes a plurality of fields arranged in sequence, the correction template unit is further configured to read a first field of the descriptor including the number of control pages in the control page linked list and a plurality of third fields including the number of fields to be corrected of the control page template according to an access address of the descriptor, and the third fields are in one-to-one correspondence with the control page template.
7. The control page linked list construction apparatus according to claim 6, wherein the correction template unit includes:
a correction preparation unit configured to detect whether data exists in both the correction value storage space and the correction position storage space;
and the correction execution unit is in communication connection with the correction preparation unit, and is used for entering a correction proceeding state when data exist in the correction value storage space and the correction position storage space, entering a correction preparation state when data do not exist in the correction value storage space and the correction position storage space, detecting whether all the control page templates are corrected in the correction preparation state, and ending the correction when all the control page templates are corrected, wherein the correction proceeding state is a state of correcting the control page templates, and the correction preparation state is a state of stopping correcting the control page templates.
8. The control page linked list construction apparatus according to claim 7, wherein when the correction execution unit enters the correction execution state, the correction execution unit concurrently corrects a plurality of the control page templates.
9. The apparatus according to claim 7, wherein when the correction execution unit enters the correction execution state, the correction execution unit is configured to read the correction position in the correction position storage space and the correction value corresponding to the correction value storage space, the correction position including a bit width, a start bit offset, a word offset, and a CP index, the bit width being a bit width of correction data in the field to be corrected, the start bit offset being used to determine a start position of the correction data in the field to be corrected, the word offset being used to determine position information of the field to be corrected, the CP index being a sequence number of the control page template in which the field to be corrected is located.
10. The apparatus for constructing a control page linked list according to claim 9, wherein when the correction execution unit enters the correction execution state, the correction execution unit is further configured to calculate a product of the CP index and the size of the control page template to obtain a first address, right shift the first address by four bits to obtain a head address of the control page template in the template access space, right shift the word offset by two bits to obtain an offset address of the field to be corrected, calculate a sum of the head address and the offset address of the field to be corrected to obtain an access address of the field to be corrected, and write the correction value corresponding to the field to be corrected into the access address of the field to be corrected to replace the correction data in the field to be corrected.
11. The apparatus according to claim 10, wherein the correction execution unit is further configured to shift left five bits of a current clock cycle to obtain an initial position, calculate a sum of the initial position and the initial bit offset to obtain a start position of the correction data, determine an end position of the correction data according to the start position and the bit width of the correction data, and enable bits of a position between the start position and the end position of the correction data to be valid, and disable bits of a remaining position in the field to be corrected before writing the correction value corresponding to the field to be corrected into the access address of the field to be corrected.
12. The apparatus according to claim 7, wherein the correction execution unit is further configured to read the number of the fields to be corrected of the control page template to obtain a target number, start a counter of the target number, and decrease the counter by one so that the correction execution unit corrects one of the fields to be corrected until it decreases to 0.
13. The apparatus according to claim 12, wherein said counter is decremented by one in one clock cycle, such that said correction execution unit corrects one of said fields to be corrected in one of said clock cycles.
14. The control page linked list construction apparatus according to claim 7, wherein the correction execution unit is further configured to compare the number of the fields to be corrected that have been modified with the number of the fields to be corrected of the control page template, and determine that the control page template correction is completed in a case where the number of the fields to be corrected that have been modified is equal to the number of the fields to be corrected of the control page template.
15. The control page linked list construction apparatus according to claim 2, wherein the control page linked list construction apparatus further comprises:
and the write memory unit is in communication connection with the register and is used for reading all the modified control page templates in the template access space and storing the modified control page templates in the template access space into the write memory access space to obtain the control page linked list after construction is completed.
16. The control page linked list construction apparatus of claim 15, wherein the descriptor includes a plurality of fields arranged in sequence, the write memory unit further configured to read a fifth field of the descriptor according to an access address of the descriptor, the fifth field including an offset address of the modified control page template.
17. The control page linked list construction apparatus of claim 16, wherein the write memory unit comprises:
a write memory preparation unit, which is in communication connection with the register and is used for detecting whether the control page template is corrected;
and the write memory executing unit is in communication connection with the write memory preparing unit and is used for calculating the access address of the modified control page template according to the offset address of the modified control page template and writing the modified control page template into the write memory access space according to the access address of the modified control page template under the condition that the modification of the control page template is completed.
18. The control page linked list construction apparatus according to claim 1, further comprising:
the detection unit is in communication connection with the register and is used for detecting whether the register has bus read-write operation or not, and stopping building the control page linked list and reporting the building interrupt under the condition that the bus read-write operation exists.
19. The apparatus according to claim 1, wherein, when there are a plurality of start commands, the correction template unit is configured to complete the construction of the control page link list corresponding to the plurality of start commands in sequence, and the start commands are in one-to-one correspondence with the control page link list.
20. An electronic device comprising a host and the control page linked list construction apparatus as claimed in any one of claims 1 to 19.
CN202311252706.2A 2023-09-26 2023-09-26 Control page linked list construction device and electronic equipment Active CN117008843B (en)

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