CN117008515A - Distributed control system and control method based on PTP protocol - Google Patents

Abstract

The invention relates to a distributed control system, in particular to a distributed control system and a control method based on a PTP protocol, which solve the technical problem that the time precision of the existing distributed control system based on the PTP protocol is limited by the system scale and the node type. The distributed control system provided by the invention comprises a core switch, a PTP server and an end execution mechanism, wherein the end execution mechanism comprises a PTP module and T I/O modules. The invention also provides a distributed control method, wherein the PTP module generates and transmits TOD, PPS and reference clock signals to the I/O module in real time through the back plate, the I/O module is internally provided with an FPGA, real-time hardware decoding is carried out according to the received signals, the current system time is obtained, the current system time is compared with the preset starting and ending moments of instruction output, and when the instruction output condition is met, the terminal of the I/O module outputs corresponding instructions in real time, so that the time acquisition and synchronous output of the instructions are realized.

Description

Distributed control system and control method based on PTP protocol

Technical Field

The invention relates to a distributed control system, in particular to a distributed control system and a control method based on a PTP protocol.

Background

For a large-scale distributed control system related to the national life fields such as waterpower, wind power, petrochemical industry, municipal administration and national defense, the distribution of each control node is very wide, and the front-end control equipment of each control node is required to execute actions according to uniform and accurate control instructions, so that the synchronous precision of the instruction input and output time among the control nodes of the system is required to be high.

Currently, clock synchronization techniques based on distributed control systems include:

(1) The GPS clock is synchronous, each distributed control node receives the second pulse and serial port time information of the GPS synchronous satellite by using the GPS receiver respectively, so that the time synchronization of the distributed clock and the atomic clock mounted on the GPS satellite is realized, the whole system structure is complex, and the system is easily interfered by weather and other conditions;

(2) IRIG-B code communication, time information sent through a serial port comprises year, month, day, time, minute and second, the receiving end decodes the time after receiving the message, so that time synchronization is realized, the synchronization precision can reach the order of 10 microseconds, but the transmission distance is limited and the system realization difficulty is higher;

(3) The NTP network time synchronization adopts a CS synchronization mode (namely a client/server mode) to regulate a local clock by calculating the delay and time deviation of a transmission link of a network between each client and a server, thereby realizing the time synchronization of each client and the server, and the synchronization precision can only reach the ms magnitude;

(4) The PTP network time synchronization, the PTP (IEEE 1588) protocol is a precision clock time service protocol based on a network, the clock synchronization is carried out by adopting a mode of combining software and hardware, and the time synchronization and the frequency synchronization among all the nodes are realized by exchanging network data messages between all the distributed nodes and a master clock, so that the synchronization precision can reach the sub microsecond level. In the existing distributed control system adopting the PTP protocol, the synchronization of clocks of all nodes in the system is generally realized by adopting a network synchronization mode, and a control task is realized by software control logic. However, software control cannot directly realize the output of control instructions, and the time precision of the software control cannot be limited by the system scale, the control node type and the like.

Disclosure of Invention

The invention aims to solve the technical problems that the prior distributed control system based on PTP network time synchronization generally adopts a network synchronization mode to realize the synchronization of clocks of all nodes in the system, realizes control tasks through software control logic, and cannot directly realize the output of control instructions by software control, and the time precision of the distributed control system is limited by the system scale and the control node type.

In order to achieve the above purpose, the invention adopts the following technical scheme:

a distributed control system based on PTP protocol is characterized in that: the system comprises a core switch, a PTP server and an end execution mechanism, wherein the PTP server and the end execution mechanism are connected through the core switch;

the core switch is used for interconnecting the PTP server and the end execution mechanism; the PTP server is used for timing an end execution mechanism;

the number of the end execution mechanisms is K, each end execution mechanism comprises a power supply module, a PTP module and T I/O modules, wherein the PTP module and the T I/O modules are respectively connected with the power supply module, and K, T is a positive integer;

the PTP module is connected with the core switch through a network interface, is connected with the T I/O modules through a backboard interface respectively, and is used for generating TOD signals, reference clock signals and PPS signals and outputting the TOD signals, the reference clock signals and the PPS signals to the T I/O modules;

the I/O module is used for acquiring system time and realizing synchronous output of instructions;

the instruction schedule comprises N instructions, and an instruction output starting time register and an instruction output ending time register corresponding to each instruction, wherein N is a positive integer.

Further, the power module is connected with the PTP module, the T I/O modules and the PTP module and the T I/O modules through the backboard interface by adopting a tight coupling structure.

Further, the PTP module is provided with at least one network interface;

and the FPGA is arranged in the TOD decoding module of the I/O module.

A distributed control method based on a PTP protocol is based on the distributed control system based on the PTP protocol, and is characterized by comprising the following steps:

step 1, a PTP server gives time to K PTP modules through a core switch, and each PTP module generates a TOD signal, a reference clock signal and a PPS signal and transmits the TOD signal, the reference clock signal and the PPS signal to the corresponding T I/O modules respectively;

step 2, each I/O module receives the TOD signal and the reference clock signal transmitted by the PTP module, decodes the TOD signal according to the reference clock signal through a TOD decoding module in the I/O module to obtain year, month, day, time, minute and second information of the system time, and stores the year, month, day, time, minute and second information into a year register, a month register, a day register, a time register, a minute register and a second register in the I/O module respectively;

step 3, the I/O module receives the PPS signal and the reference clock signal transmitted by the PTP module, synchronously counts the reference clock signal according to the arrival time of the PPS signal, obtains the information below second of the system time, and stores the information into a time register below second in the I/O module;

step 4, combining the information in the year register, the month register, the day register, the Time register, the minute register and the second register obtained in the step 2 and the information in the Time register below second obtained in the step 3 to obtain the current system Time Sys_Time, and storing the current system Time Sys_Time into the system Time register in the I/O module;

step 5, registering the system Time Sys_Time in the system Time register and the instruction output starting Time of each instruction in the preset instruction timetableInstructions in the device start Time on_Time _i Instruction end Time off_time in instruction output end Time register _i Comparing, when Sys_Time is larger than or equal to On_Time _i And Sys_Time is less than or equal to off_Time _i When the I/O module outputs a corresponding instruction, then the step 6 is executed; otherwise, the instruction is not output, and the step 6 is directly executed;

and 6, repeating the steps 1-5, acquiring the system time in real time, and synchronously outputting the instructions while acquiring the system time until the control of the distributed control system is completed.

Further, the step 2 specifically includes:

2.1, the I/O module receives TOD signals and reference clock signals transmitted by the PTP module;

2.2, performing serial protocol decoding on the TOD signals according to the reference clock signals through an FPGA (field programmable gate array) arranged in a TOD decoding module of the I/O module, converting high-low level signals of the TOD signals into TOD byte signals, outputting an enabling signal RX_VLD, a TOD byte signal RX_TOD and an error signal RX_ERR, and transmitting RX_TOD byte data to the TOD decoding module when RX_VLD is 1 and RX_ERR is 0; if RX_ERR is 1, alarming to prompt system error; if RX_VLD is 0, not processing, returning to the step 1;

2.3, the TOD decoding module receives the TOD byte signal RX_TOD byte by byte, takes the bytes of the data as ASIIC codes as the dividing points, and divides the TOD byte signal RX_TOD into a plurality of data frames;

2.4, judging whether the data frame is an RMC data frame or a ZDA data frame according to the first field of the data frame;

2.5, if the data frame is an RMC data frame, selecting a second field of the data frame as time information, and respectively storing data of corresponding bytes in the second field into a time register, a minute register and a second register; taking the tenth field as date information, and respectively storing the data of the corresponding bytes in the tenth field into a year register, a month register and a day register in the I/O module;

if the data frame is a ZDA data frame, selecting a second field as time information, and respectively storing data of corresponding bytes in the second field into a time register, a minute register and a second register; taking the third field, the fourth field and the fifth field as the day, the month and the year in the date information respectively, and storing the data of the corresponding bytes into a day register, a month register and a year register in the I/O module respectively;

if the data frame is not the RMC data frame or the ZDA data frame, the processing is not carried out, the step 2.4 is returned, and the next frame of data frame is judged.

Further, the step 3 specifically includes:

3.1, the I/O module receives the PPS signal and the reference clock signal transmitted by the PTP module;

3.2, setting a synchronous counter by taking a reference clock signal as a reference, and taking the rising edge of the PPS signal as a clear 0 reset signal of the synchronous counter;

3.3, counting the reference clock signal by adopting a synchronous counter, and adding 1 to the numerical value of the synchronous counter when the rising edge of the reference clock signal is detected; when the rising edge of the PPS signal is detected, the numerical value of the synchronous counter becomes 0;

and 3.4, compensating the numerical value of the synchronous counter according to the delay of the PPS signal output by the PTP module, and storing the numerical value into a time register below second in the I/O module.

Further, in step 2.3, after dividing the TOD byte signal rx_tod into a plurality of data frames, the method further includes checking the data frames, specifically:

checking each data frame according to byte parity in the data frame transmission process, and if the data frame check is successful, performing step 2.4; if the verification fails, the data frame is not processed, and the next frame of data frame is continuously verified.

Further, in step 2.4, the RMC data frame has the following data frame format:

$xxRMC,UTCTime,status,lat,ulat,lon,ulon,spd,cog,date,mv,mvE,mode*CS<CR><LF>；

the ZDA data frame has the following data frame format:

$xxZDA,UTCTime,day,month,year,ltzh,ltzn*CS<CR><LF>。

further, in step 4, the current system Time sys_time has the following structure:

YY，MM，DD，HH，MM，SS，SSS；

wherein YY represents year, MM represents month, DD represents day, HH represents minute, SS represents second, SSs represents millisecond.

Further, in step 1, the reference clock signal is a ns-level signal.

Compared with the prior art, the invention has the following beneficial technical effects:

1. according to the distributed control system based on the PTP protocol, the network time synchronization function and the command output function based on the PTP protocol are integrated in the end execution mechanism, the scale of the distributed control system, the type of control nodes and the like are not limited and restrained, the system is simple and reliable, and the control command output precision is high; the system and the control logic are realized in a hardware mode, so that the system has high instantaneity, has no special requirement on the network structure of the existing control system, has low reconstruction cost and strong portability, and can be widely applied to various distributed control systems with high requirements on the instruction output precision of the system;

2. according to the distributed control system based on the PTP protocol, the PTP modules are connected with the I/O modules through the backboard interface in a tight coupling mode, so that the number of the I/O modules can be arbitrarily expanded or the types of the I/O modules can be changed according to control requirements, and the distributed control system has good expandability;

3. according to the distributed control method based on the PTP protocol, the TOD signal is decoded, the PPS signal is used as the zero reset signal to synchronously count the reference clock signal, and therefore high-time-precision instruction output of each node in the distributed control system is achieved.

Drawings

Fig. 1 is a schematic structural diagram of a distributed control system based on PTP protocol according to an embodiment of the present invention;

fig. 2 is a working schematic diagram of an end effector in a distributed control system based on PTP protocol according to an embodiment of the present invention;

fig. 3 is a flowchart of a distributed control method based on PTP protocol according to an embodiment of the present invention;

fig. 4 is a schematic diagram of a step 2 of a distributed control method based on PTP protocol according to an embodiment of the present invention;

fig. 5 is a schematic diagram of a distributed control method step 3 based on PTP protocol according to an embodiment of the present invention;

the reference numerals are explained as follows:

1-PTP server, 2-core switch, 3-end effector, 4-power module, 5-PTP module, 6-I/O module.

Detailed Description

The invention provides a distributed control system and a control method based on a PTP protocol, which are further described in detail below with reference to the accompanying drawings and detailed description. It should be understood by those skilled in the art that these embodiments are merely for explaining the technical principles of the present invention, and are not intended to limit the scope of the present invention.

A distributed control system based on PTP protocol, as shown in fig. 1, includes a PTP server 1 and an end effector 3 connected by a core switch 2. The PTP server 1 is used as a master clock of a PTP network and used for timing the end execution mechanism 3, the internal integrated GPS clock and the Beidou clock are used as reference clock sources and used for providing accurate time standard, and meanwhile, a rubidium atomic clock module can be added for timing. The core switch 2 is used for interconnection of the PTP server 1 and the end effector 3, and exchange of time information.

The number of the end effectors 3 is K, and as shown in fig. 2, each end effector 3 includes a power module 4, and a PTP module 5 and T I/O modules 6 respectively connected to the power module 4, wherein K, T is a positive integer. The power module 4 is connected with the PTP module 5 and the T I/O modules 6, and the PTP module 5 is connected with the T I/O modules 6 through a backboard interface by adopting a tight coupling structure. The PTP module 5 has at least one network interface, through which it is connected to the core switch 2. The PTP module 5 is connected with the T I/O modules 6 through back board interfaces respectively, and the PTP module 5 is responsible for realizing accurate network time synchronization in the control system, and generating and transmitting TOD signals, reference clock signals and PPS signals to the T I/O modules 6 in real time through the back board interfaces. The I/O module 6 is mounted with an FPGA that receives the TOD signal, PPS signal, and reference clock signal input by the PTP module 5. The I/O module 6 is preset with an instruction schedule, which is used for acquiring the system time and synchronously outputting the instruction while acquiring the system time. The instruction schedule comprises N instructions, and an instruction output start time register and an instruction output end time register corresponding to each instruction, wherein N is a positive integer. The 10M frequency signal in FIG. 2 is the reference clock signal.

According to the distributed control system based on the PTP protocol, the PTP server 1 gives time to the PTP module 5 through the core switch 2, the PTP module 5 generates TOD signals, reference clock signals and PPS signals, the TOD signals, the reference clock signals and the PPS signals are respectively transmitted to T I/O modules 6 through the back board interface, the FPGA carried in each I/O module 6 decodes the FPGA according to the received three signals in real time, the current system time is obtained and stored in the system time register, the system time register is compared with the preset instruction time register, and when the instruction output condition is met, the hardware outputs corresponding terminal instructions in real time.

The distributed control system based on the PTP protocol provided by the invention has no limitation and restriction on the scale of the distributed control system, the type of the control node and the like, and is simple and reliable, and the control instruction output precision is high. The PTP module 5 is connected with each I/O module 6 through a back plate in a tight coupling mode, the number of the I/O modules 6 can be arbitrarily expanded or the types of the I/O modules 6 can be changed according to control requirements, the system has good expandability, no special requirements on the network structure of the existing control system are met, the improvement cost is low, the portability is high, and the system can be widely applied to various distributed control systems with high requirements on the instruction output precision of the system. The time system and the control logic are tightly coupled together in a hardware mode, so that high-time precision synchronous output of the control instruction is directly realized, the instruction output synchronous precision is higher, and the system has higher real-time performance.

A distributed control method based on PTP protocol, based on the above-mentioned distributed control system based on PTP protocol, as shown in figure 3, includes the following steps:

in step 1, the PTP server 1 gives time to K PTP modules 5 through the core switch 2, and each PTP module 5 generates a TOD signal, a reference clock signal, and a PPS signal, and transmits the TOD signal, the reference clock signal, and the PPS signal to the corresponding T I/O modules 6 through the back plane, respectively, where the reference clock signal is a ns-level signal. The PTP server 1 leads to K PTP modules 5 for time service, and can adopt a periodic time service mode, so that the time precision is high in the time service period.

Step 2, each I/O module 6 receives the TOD signal and the reference clock signal transmitted by the PTP module 5, decodes the TOD signal according to the reference clock signal by a TOD decoding module in the I/O module 6, obtains year, month, day, time, minute and second information of the system time, and stores the year, month, day, time, minute and second information in a year register, a time register, a minute register and a second register in the I/O module 6, as shown in fig. 4, specifically:

2.1, the I/O module 6 receives the TOD signal and the reference clock signal transmitted by the PTP module 5;

2.2, the FPGA in the TOD decoding module of the I/O module 6 decodes the TOD signal according to the serial protocol according to the reference clock signal, converts the high-low level signal of the TOD signal into a TOD byte signal, outputs an enable signal RX_VLD, a TOD byte signal RX_TOD and an error signal RX_ERR, and transmits RX_TOD byte data to the TOD decoding module when RX_VLD is 1 and RX_ERR is 0; if RX_ERR is 1, alarming to prompt system error; if RX_VLD is 0, not processing, returning to the step 1;

2.3, the TOD decoding module receives RX_TOD byte by byte, takes the bytes of data as ASIIC code and as dividing points, divides RX_TOD into a plurality of data frames, and checks each data frame, wherein the checking process specifically comprises the following steps:

checking the data frame by adopting byte parity in the data frame transmission process, and if the data frame is checked successfully, performing step 2.4; if the verification fails, the data frame is not processed, and the next frame of data frame is continuously verified;

2.4, judging whether the data frame is an RMC data frame or a ZDA data frame according to the first field of the data frame;

the RMC data frame has the following data frame format:

$xxRMC,UTCTime,status,lat,ulat,lon,ulon,spd,cog,date,mv,mvE,mode*CS<CR><LF>；

the ZDA data frames have the following data frame format:

$xxZDA,UTCTime,day,month,year,ltzh,ltzn*CS<CR><LF>；

2.5, if the data frame is an RMC data frame, selecting a second field of the data frame as time information, and respectively storing data of corresponding bytes in the second field into a time register, a minute register and a second register; taking the tenth field as date information, and respectively storing the data of the corresponding bytes in the tenth field into a year register, a month register and a day register in the I/O module 6;

if the data frame is a ZDA data frame, selecting a second field as time information, and respectively storing data of corresponding bytes in the second field into a time register, a minute register and a second register; taking the third field, the fourth field and the fifth field as the day, the month and the year in the date information respectively, and storing the data of the corresponding bytes into a day register, a month register and a year register in the I/O module 6 respectively;

if the data frame is not the RMC data frame or the ZDA data frame, the processing is not carried out, the step 2.4 is returned, and the next frame of data frame is continuously judged.

Step 3, the I/O module 6 receives the PPS signal and the reference clock signal transmitted by the PTP module 5, counts the reference clock signal synchronously, obtains the information below second of the system time, and stores the information below second in the I/O module 6, as shown in fig. 5, specifically:

3.1, the I/O module 6 receives the PPS signal and the reference clock signal transmitted by the PTP module 5;

3.2, setting a synchronous counter by taking a reference clock signal as a reference, and taking the rising edge of the PPS signal as a clear 0 reset signal of the synchronous counter;

3.3, counting the reference clock signal by adopting a synchronous counter, and adding 1 to the numerical value of the synchronous counter when the rising edge of the reference clock signal is detected; when the rising edge of the PPS signal is detected, the numerical value of the synchronous counter becomes 0;

and 3.4, compensating the numerical value of the synchronous counter according to the delay of the PPS signal output by the PTP module, and storing the numerical value into a time register below second in the I/O module 6.

And 4, combining the information in the year register, the month register, the day register, the Time register, the minute register and the second register obtained in the step 2 and the information in the Time register below second obtained in the step 3 to obtain the current system Time Sys_Time, and storing the current system Time Sys_Time into the system Time register in the I/O module 6.

The current system Time sys_time has the following structure:

YY，MM，DD，HH，MM，SS，SSS；

wherein YY represents year, MM represents month, DD represents day, HH represents minute, SS represents second, SSs represents millisecond.

Step 5, the system Time Sys_Time in the system Time register and the instruction starting Time on_Time in the starting Time register of each instruction in the preset instruction schedule are compared _i Instruction end Time off_time in end Time register _i Comparing, when Sys_Time is larger than or equal to On_Time _i And Sys_Time is less than or equal to off_Time _i When the I/O module 6 outputs a corresponding instruction, then the step 6 is executed; otherwise, the instruction is not output, and the step 6 is directly executed.

And 6, repeating the steps 1-5, acquiring the system time in real time, and synchronously outputting the instruction while acquiring the system time to complete the control of the distributed control system.

By adopting the distributed control method provided by the invention, the instruction output synchronization time precision depends on the PTP network time synchronization precision and is irrelevant to the system scale, the control terminal distance and the quantity. Compared with the control method adopting the NTP network time synchronization mode, the control method of the distributed control system based on the PTP protocol provided by the invention has the advantages that the final output precision of the instruction is obviously improved; compared with a GPS time mode, the system has the advantages that the network structure is obviously simplified, and the reliability is obviously improved; compared with an IRIG-B code mode, the system layout has higher degree of freedom, and the instruction output precision can reach the sub microsecond level.

Claims (10)

1. A distributed control system based on PTP protocol, characterized in that: comprises a core switch (2), a PTP server (1) and an end actuator (3) which are connected through the core switch (2);

the core switch (2) is used for interconnecting the PTP server (1) and the end execution mechanism (3); the PTP server (1) is used for timing an end execution mechanism (3);

the number of the end execution mechanisms (3) is K, each end execution mechanism (3) comprises a power module (4), and a PTP module (5) and T I/O modules (6) which are respectively connected with the power module (4), wherein K, T is a positive integer;

the PTP module (5) is connected with the core switch (2) through a network interface, is connected with the T I/O modules (6) through a back plate interface respectively, and is used for generating TOD signals, reference clock signals and PPS signals and outputting the TOD signals, the reference clock signals and the PPS signals to the T I/O modules (6);

the I/O module (6) is internally preset with an instruction schedule, and the I/O module (6) is used for acquiring system time and realizing synchronous output of instructions;

the instruction schedule comprises N instructions, and an instruction output starting time register and an instruction output ending time register corresponding to each instruction, wherein N is a positive integer.

2. A distributed control system based on PTP protocol according to claim 1, wherein: the power module (4) is connected with the PTP module (5), the T I/O modules (6) and the PTP module (5) is connected with the T I/O modules (6) through a backboard interface by adopting a tight coupling structure.

3. A distributed control system based on PTP protocol according to claim 2, wherein: the PTP module (5) is provided with at least one network interface;

the TOD decoding module of the I/O module (6) is realized by FPGA hardware.

4. A distributed control method based on PTP protocol, based on a distributed control system based on PTP protocol according to any of claims 1 to 3, characterized by comprising the steps of:

step 1, a PTP server (1) gives time to K PTP modules (5) through a core switch (2), and each PTP module (5) generates a TOD signal, a reference clock signal and a PPS signal and transmits the TOD signal, the reference clock signal and the PPS signal to T I/O modules (6) corresponding to the PTP modules respectively;

step 2, each I/O module (6) receives the TOD signal and the reference clock signal transmitted by the PTP module (5), decodes the TOD signal according to the reference clock signal through a TOD decoding module in the I/O module (6) to obtain year, month, day, time, minute and second information of the system time, and stores the year, month, day, time, minute and second information into a year register, a month register, a day register, a time register, a minute register and a second register in the I/O module (6) respectively;

step 3, the I/O module (6) receives the PPS signal and the reference clock signal transmitted by the PTP module (5), synchronously counts the reference clock signal according to the arrival time of the PPS signal, obtains the information below second of the system time, and stores the information below second in the I/O module (6);

step 4, combining the information in the year register, month register, day register, time register, minute register and second register obtained in the step 2 and the information in the Time register below second obtained in the step 3 to obtain the current system Time Sys_Time, and storing the current system Time Sys_Time into the system Time register in the I/O module (6);

step 5, outputting the system Time Sys_Time in the system Time register and the instruction of each instruction in the preset instruction schedule to the instruction starting Time on_Time in the starting Time register _i Instruction end Time off_time in instruction output end Time register _i Comparing, when Sys_Time is larger than or equal to On_Time _i And Sys_Time is less than or equal to off_Time _i When the I/O module (6) outputs a corresponding instruction, then the step (6) is executed; otherwise, the instruction is not output, and the step 6 is directly executed;

and 6, repeating the steps 1-5, acquiring the system time in real time, and realizing synchronous output of the instructions until the control of the distributed control system is completed.

5. The distributed control method based on PTP protocol according to claim 4, wherein said step 2 specifically comprises:

2.1, the I/O module (6) receives the TOD signal and the reference clock signal transmitted by the PTP module (5);

2.2, performing serial protocol decoding on TOD signals according to a reference clock signal through an FPGA arranged in a TOD decoding module of the I/O module (6), converting high-low level signals of the TOD signals into TOD byte signals, outputting enable signals RX_VLD, TOD byte signals RX_TOD and error signals RX_ERR, and transmitting the TOD byte signals RX_TOD to the TOD decoding module when RX_VLD is 1 and RX_ERR is 0, and performing step 2.3; if RX_ERR is 1, alarming to prompt system error; if RX_VLD is 0, not processing, returning to the step 1;

2.3, the TOD decoding module receives the TOD byte signal RX_TOD byte by byte, takes the bytes of the data as ASIIC codes as the dividing points, and divides the TOD byte signal RX_TOD into a plurality of data frames;

2.4, judging whether the data frame is an RMC data frame or a ZDA data frame according to the first field of the data frame;

2.5, if the data frame is an RMC data frame, selecting a second field of the data frame as time information, and respectively storing data of corresponding bytes in the second field into a time register, a minute register and a second register; taking a tenth field as date information, and respectively storing data of corresponding bytes in the tenth field into a year register, a month register and a day register in the I/O module (6);

if the data frame is a ZDA data frame, selecting a second field as time information, and respectively storing data of corresponding bytes in the second field into a time register, a minute register and a second register; taking the third field, the fourth field and the fifth field as the day, the month and the year in the date information respectively, and storing the data of the corresponding bytes into a day register, a month register and a year register in the I/O module (6) respectively;

if the data frame is not the RMC data frame or the ZDA data frame, the processing is not carried out, the step 2.4 is returned, and the next frame of data frame is judged.

6. The distributed control method based on PTP protocol according to claim 5, wherein said step 3 specifically comprises:

3.1, the I/O module (6) receives the PPS signal and the reference clock signal transmitted by the PTP module (5);

3.2, setting a synchronous counter by taking a reference clock signal as a reference, and taking the rising edge of the PPS signal as a clear 0 reset signal of the synchronous counter;

3.3, counting the reference clock signal by adopting a synchronous counter, and adding 1 to the numerical value of the synchronous counter when the rising edge of the reference clock signal is detected; when the rising edge of the PPS signal is detected, the numerical value of the synchronous counter becomes 0;

and 3.4, compensating the numerical value of the synchronous counter according to the delay of the PPS signal output by the PTP module (5), and storing the numerical value into a time register below seconds in the I/O module (6).

7. The distributed control method according to claim 6, wherein in step 2.3, after dividing the TOD byte signal rx_tod into a plurality of data frames, the method further comprises checking the data frames, specifically:

checking each data frame according to byte parity in the data frame transmission process, and if the data frame check is successful, performing step 2.4; if the verification fails, the data frame is not processed, and the next frame of data frame is continuously verified.

8. The method according to any one of claims 5-7, wherein in step 2.4, the RMC data frame has the following data frame format:

$xxRMC,UTCTime,status,lat,ulat,lon,ulon,spd,cog,date,mv,mvE,mode*CS<CR><LF>；

the ZDA data frame has the following data frame format:

$xxZDA,UTCTime,day,month,year,ltzh,ltzn*CS<CR><LF>。

9. the distributed control method according to claim 8, wherein in step 4, the current system Time sys_time has the following structure:

YY，MM，DD，HH，MM，SS，SSS；

wherein YY represents year, MM represents month, DD represents day, HH represents minute, SS represents second, SSs represents millisecond.

10. The distributed control method according to claim 9, wherein in step 1, the reference clock signal is a ns-level signal.