CN116996036A - Silicon-based MEMS radio frequency filter and preparation method thereof - Google Patents
Silicon-based MEMS radio frequency filter and preparation method thereof Download PDFInfo
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- CN116996036A CN116996036A CN202311026320.XA CN202311026320A CN116996036A CN 116996036 A CN116996036 A CN 116996036A CN 202311026320 A CN202311026320 A CN 202311026320A CN 116996036 A CN116996036 A CN 116996036A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 240
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 239
- 239000010703 silicon Substances 0.000 title claims abstract description 239
- 238000002360 preparation method Methods 0.000 title claims abstract description 21
- 239000010931 gold Substances 0.000 claims abstract description 90
- 229910052737 gold Inorganic materials 0.000 claims abstract description 90
- 229910052802 copper Inorganic materials 0.000 claims abstract description 87
- 239000010949 copper Substances 0.000 claims abstract description 87
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 86
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 85
- 238000000034 method Methods 0.000 claims abstract description 48
- 238000009713 electroplating Methods 0.000 claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 claims abstract description 18
- 238000000151 deposition Methods 0.000 claims abstract description 11
- 235000012431 wafers Nutrition 0.000 claims description 230
- 239000007787 solid Substances 0.000 claims description 26
- 238000001259 photo etching Methods 0.000 claims description 15
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 238000000708 deep reactive-ion etching Methods 0.000 claims description 9
- 238000011049 filling Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 7
- 238000000227 grinding Methods 0.000 claims description 7
- 238000005498 polishing Methods 0.000 claims description 7
- 239000000126 substance Substances 0.000 claims description 7
- 238000007731 hot pressing Methods 0.000 claims description 4
- 238000001465 metallisation Methods 0.000 abstract description 4
- 238000012545 processing Methods 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 28
- 238000005516 engineering process Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 239000002356 single layer Substances 0.000 description 4
- 238000005459 micromachining Methods 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 239000002355 dual-layer Substances 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000011112 process operation Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/0072—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/02—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material
- C23C28/023—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material only coatings of metal elements only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/0072—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks
- H03H3/0076—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks for obtaining desired frequency or temperature coefficients
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/46—Filters
- H03H9/462—Microelectro-mechanical filters
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Abstract
The invention discloses a silicon-based MEMS radio frequency filter and a preparation method thereof, wherein the surface metallization treatment is carried out on the side wall of a through hole of the filter in a manner of electroplating and depositing copper, so that the process of depositing a gold film on the side wall of the through hole of the MEMS filter is improved, the use of expensive gold targets for preparing seed layers on the side wall of the through hole, the use of deep hole electro-plating and other non-conventional process flows is avoided, the mature electro-coppering process widely used in the industry is adopted, the process difficulty and the production cost of the MEMS filter are reduced, no special process line is needed, and the silicon-based MEMS radio frequency filter can be produced on most conventional MEMS micro-nano processing platforms.
Description
Technical Field
The invention relates to the technical field of radio frequency passive devices, in particular to the technical field of filters, and in particular relates to a silicon-based MEMS radio frequency filter and a preparation method thereof.
Background
The filter is widely applied to electronic systems such as communication, radar and the like. As a key element of an electronic system, the traditional metal cavity and ceramic cavity filter cannot meet the requirement of the system on miniaturization. Microstrip filter based on LTCC and ceramic substrate has relatively small volume, but its processing uniformity is relatively poor, can't satisfy the uniformity requirement of filter in large-scale application scene.
MEMS micromachining technology has matured in recent years. MEMS micromachining techniques inherit the advantages of integrated circuit fabrication techniques, such as high precision, mass production, low cost, etc. MEMS micro-machining technology can manufacture fine cavities and through hole structures on a silicon wafer by means of photoetching, DRIE (deep reactive ion etching), wafer bonding technology and the like, and the machining precision can reach the micron level. Therefore, the silicon-based filter prepared based on the MEMS process has the advantages of small volume, high consistency, no debugging and the like.
The key preparation process of the silicon-based MEMS filter comprises the steps of preparing a through hole, metallizing the through hole and the like, wherein the function of the metallized through hole is to realize the electric connection of metal film patterns on the two sides of a silicon wafer where the through hole is located. Currently, for silicon-based MEMS radio frequency filters, a common metallization method for vias is implemented by covering the sidewalls of the vias with a gold film. According to the method, a magnetron sputtering mode is adopted to cover a gold seed layer on the side wall of the through hole, and gold is wasted greatly in the sputtering process; then, a gold film is deposited on the side wall of the through hole by adopting an electro-gold plating method, and the deep hole electro-gold plating process does not belong to the conventional process in the industry. Therefore, the current through hole metallization process scheme of covering the through hole side wall with a gold film increases the preparation difficulty and the production cost of the silicon-based MEMS filter.
Disclosure of Invention
The invention provides a silicon-based MEMS radio frequency filter and a preparation method thereof, aiming at solving the technical problems of high preparation difficulty and high production cost faced by the traditional through hole metallization process scheme of the silicon-based MEMS radio frequency filter.
In a first aspect, a method for manufacturing a silicon-based MEMS radio frequency filter includes the steps of:
s1: preparing a mask pattern of the through hole on the front side of the first silicon wafer by photoetching, and etching a blind hole by DRIE;
s2: the front surface of the first silicon wafer is subjected to magnetron sputtering to cover the surface of the first silicon wafer and the inner wall of the blind hole with a copper seed layer;
s3: depositing copper on the front side of the first silicon wafer by electroplating and filling blind holes to form copper columns;
s4: completely removing a copper film on the surface of the front side of the first silicon wafer through chemical mechanical polishing;
s5: thinning the back of the first silicon wafer by grinding and exposing the metal copper in the blind hole;
s6: and preparing a microstrip pattern based on a gold film on the back surface of the first silicon wafer through photoetching and electroplating processes.
Further, a section of the copper column, which is close to the front surface of the first silicon wafer, is of a hollow structure, and a section of the copper column, which is close to the back surface of the first silicon wafer, is of a solid structure.
Further, the thickness range of the thinned first silicon wafer is 300-500 microns, and the height of the solid section of the copper column is less than or equal to 200 microns.
Further, the method further comprises the step S7: and covering a layer of gold film on the front surface of the first silicon wafer, and preparing patterns on the gold film according to the requirement, wherein the thickness range of the gold film on the front surface and the back surface of the silicon wafer is 2-10 microns.
Further, the method also comprises the following steps:
applying the steps S1 to S6 to a second silicon wafer, and performing hot pressing on the back surface of the first silicon wafer and the back surface of the second silicon wafer to realize wafer-level bonding of the first silicon wafer and the second silicon wafer;
and respectively covering the front and back sides of the bonded wafer with gold films, and preparing patterns on the gold films according to requirements.
Further, the method also comprises the following steps:
and (3) applying the steps S1 to S6 to the second silicon wafer, … and the N-th silicon wafer in the same way, wherein N is less than or equal to 5 and N is a positive integer, covering a layer of gold film on the front surface of the third silicon wafer and the … -th silicon wafer, preparing patterns on the gold film according to the requirement, stacking the N silicon wafers, bonding the N silicon wafers at the wafer level, wherein the first silicon wafer and the second silicon wafer are positioned at the bottommost layer and the topmost layer of the stacked wafer, covering the gold film on the front surface and the back surface of the bonded wafer respectively, and preparing the patterns on the gold film according to the requirement.
Further, all or part of through holes of the third silicon wafer to the Nth silicon wafer are completely filled with copper columns, and the thickness of the silicon wafers is less than or equal to 200 micrometers.
On the other hand, the silicon-based MEMS radio frequency filter comprises a first silicon wafer and a through hole on the first silicon wafer, wherein a copper column is arranged in the through hole; the upper surface of the first silicon wafer, namely the wafer thinning surface, is provided with a first gold film for covering, and the lower surface of the first silicon wafer is provided with a second gold film for covering; the copper column in the through hole close to the thinning surface of the wafer is of a solid structure, and the other end of the copper column is of a hollow structure; the surface of the copper column solid structure exposed on the thinned surface of the wafer is covered with a first gold film, and the surface of the copper column exposed on the lower surface of the first silicon wafer and the inner wall of the hollow structure are covered with a second gold film.
Further, the thickness of the first silicon wafer is 300-450 micrometers, and the thickness of the solid structure of the hole column arranged in the through hole is less than or equal to 200 micrometers; the thickness of the gold film of the first gold film and the second gold film is 2-10 microns.
Further, the semiconductor device further comprises a second silicon wafer, a … and an Nth silicon wafer which have the same characteristics as the first silicon wafer, wherein N is less than or equal to 5 and is a positive integer, and the N silicon wafers are stacked together through wafer bonding to form the device.
Further, the wafer level bonding method comprises the steps of forming a first silicon wafer, forming a second silicon wafer with the same characteristics as the first silicon wafer, completely filling all or part of through holes of the third silicon wafer to the N-th silicon wafer by copper columns, enabling the thickness of the silicon wafer to be less than or equal to 200 microns, enabling N to be less than or equal to 5 and enabling N to be a positive integer, stacking the N silicon wafers, and performing wafer level bonding, wherein the first silicon wafer and the second silicon wafer are located at the bottommost layer and the topmost layer of the stacked wafers.
The invention has the beneficial effects that: according to the silicon-based MEMS radio frequency filter and the preparation method thereof, the problems of a process of depositing gold materials on the side wall of the through hole of the filter, waste of gold materials in a magnetron sputtering mode and an unconventional process flow of deep hole electro-gold plating are solved, the problem that expensive gold target materials are used for preparing seed layers on the side wall of the through hole is avoided, a mature copper electroplating process widely used in the industry is adopted, the process difficulty and the production cost of the MEMS filter are remarkably reduced, a special process line is not needed, and the silicon-based MEMS radio frequency filter can be produced on most of conventional MEMS micro-nano processing platforms.
Drawings
FIG. 1 is a flow chart of a method for fabricating a silicon-based MEMS radio frequency filter in accordance with the present invention;
FIG. 2 is a flow chart of a dual layer silicon wafer stacked silicon-based MEMS RF filter fabrication in accordance with an embodiment of the present invention;
FIG. 3 is a cross-sectional view of a through-hole of a single-layer silicon-based MEMS radio frequency filter in accordance with an embodiment of the present invention;
FIG. 4 is a schematic side view of a single-layer silicon-based MEMS RF filter according to an embodiment of the present invention;
FIG. 5 is a schematic side view of a dual-layer silicon-based MEMS RF filter according to an embodiment of the present invention;
FIG. 6 is a schematic side view of a three-layer silicon-based MEMS RF filter according to an embodiment of the present invention;
FIG. 7 is a schematic side view of another three-layer silicon-based MEMS RF filter according to an embodiment of the invention;
the silicon chip comprises a 1-first silicon chip, a 2-first gold film, a 3-second gold film, a 4-copper column, a 5-second silicon chip, a 6-third silicon chip, a 7-medium solid structure copper column, an 8-copper seed layer, a 9-first gold film gold micro-bump and a 10-through hole, wherein the 10-through hole is an intermediate layer silicon chip of the solid copper column.
Description of the embodiments
For a clearer understanding of technical features, objects, and effects of the present invention, a specific embodiment of the present invention will be described with reference to the accompanying drawings.
The invention provides a silicon-based MEMS radio frequency filter and a preparation method thereof, wherein the preparation method is shown in figure 1 and comprises the following steps:
step S1: preparing a mask pattern of the through hole on the front side of the first silicon wafer by photoetching, and etching a blind hole by DRIE;
step S2: the front surface of the first silicon wafer is subjected to magnetron sputtering to cover the surface of the first silicon wafer and the inner wall of the blind hole with a copper seed layer;
step S3: depositing copper on the front side of the first silicon wafer by electroplating and filling blind holes to form copper columns;
step S4: completely removing a copper film on the surface of the front side of the first silicon wafer through chemical mechanical polishing;
step S5: thinning the back of the first silicon wafer by grinding and exposing the metal copper in the blind hole;
step S6: preparing a gold film-based microstrip pattern on the back surface of the first silicon wafer through photoetching and electroplating processes;
because of the larger difference of thermal expansion coefficients between copper and silicon, in order to enhance the adaptability of the MEMS filter under extreme temperature working conditions and avoid the silicon chip near the through hole from cracking, in the step S3, the bottom of the blind hole is preferably filled with copper by controlling the process of electroplating deposition copper, and the open end of the blind hole is in a hollow structure. The depth of the hollow depends on the thickness of the thinned silicon wafer, and preferably when the thickness of the thinned silicon wafer is greater than or equal to 300 micrometers, the height of the bottom of the through hole filled with copper is not more than 200 micrometers. The partially hollow filling structure enables copper metal in the through hole to be deformed more easily, so that stress caused by unmatched thermal expansion of copper and silicon at high and low temperatures is reduced, and the reliability of the device is improved. In addition, as the bottom of the blind hole is filled with copper, the back of the silicon wafer is thinned, and the through hole at the back is kept flat, so that convenience is brought to the preparation of the gold microstrip pattern at the back and the subsequent process. For example, a photoresist spraying device is not needed, and a conventional photoresist spin coating method is adopted to cover photoresist on the back surface of the wafer; for example, after the back of the silicon wafer is thinned, the wafer can be directly fixed by negative pressure because no through hole exists, so that a plurality of process operation links such as photoresist spin coating, exposure, development, mechanical arm pickup and the like are greatly facilitated.
[ example 1 ]
A silicon-based MEMS radio frequency filter with a single-layer silicon wafer structure comprises the following steps:
(S1) preparing a mask pattern of a through hole on the front side of a first silicon wafer by photoetching, and etching a blind hole by DRIE;
(S2) covering the surface of the first silicon wafer and the inner wall of the blind hole with a copper seed layer through magnetron sputtering on the front surface of the first silicon wafer;
(S3) copper is deposited on the front side of the first silicon wafer through electroplating, and blind holes are filled to form copper columns;
(S4) completely removing the copper film on the surface of the front side of the first silicon wafer through chemical mechanical polishing;
(S5) grinding and thinning the back surface of the first silicon wafer to expose the metal copper in the blind hole;
(S6) preparing a gold film-based microstrip pattern on the back surface of the first silicon wafer through photoetching and electroplating processes;
and (S7) covering a gold film on the front surface of the first silicon wafer, and preparing patterns on the gold film according to requirements.
As shown in FIG. 4, the section of the copper column, which is close to the front side of the first silicon wafer, is of a hollow structure, the section of the copper column, which is close to the back side of the first silicon wafer, is of a solid structure, and the height of the solid section of the copper column is less than or equal to 200 micrometers. The thickness range of the gold film is 2-10 micrometers, and the thickness range of the first silicon wafer after thinning is 300-500 micrometers. The upper and lower surfaces of the single-layer silicon-based MEMS filter are respectively covered with gold films, the specific structure of the through hole is shown in figure 3, wherein A, B, C respectively represents the morphology of copper under different electroplating process conditions. In order to improve the reliability of the device under high and low temperature working conditions, the copper column 4 with a hollow structure is adopted under the condition that the size of the through hole is large. As shown in fig. 3, the upper surface of the first silicon wafer 1, that is, the thinned wafer surface, is covered with a patterned first gold film 2; the lower surface of the first silicon wafer 1 is covered with a second gold film 3. Copper in the through hole close to the thinning surface of the wafer has a solid structure, and the exposed surface of the copper column 4 on the thinning surface is covered by the first gold film 2; the exposed surface of the copper column 4 on the lower surface of the silicon wafer and the inner wall of the hollow structure are covered by the second gold film 3. Copper in the via is protected by the gold film and is therefore protected from oxidation by exposure to air. The preferred thickness range of the gold films 2 and 3 is 2 to 10 μm. In order to ensure reliability, preferably, when the thickness of the silicon wafer (after thinning) is 300-500 micrometers, the height h of the solid section of the copper pillar 4 in the through hole is less than or equal to 200 micrometers.
[ example 2 ]
The preparation flow of the MEMS silicon-based filter with double-layer silicon wafer stacking is shown in figure 2, and specifically comprises the following steps:
(S1) preparing a mask pattern of a through hole on the front surface of a first silicon wafer 1 by photoetching, and etching a blind hole by DRIE;
(S2) covering the surface of the first silicon wafer 1 and the inner wall of the blind hole with a copper seed layer 8 by magnetron sputtering on the front surface of the first silicon wafer 1;
(S3) depositing copper on the front surface of the first silicon wafer 1 by electroplating and filling blind holes;
(S4) completely removing the copper film on the surface of the front side of the first silicon wafer 1 through chemical mechanical polishing;
(S5) grinding and thinning the back surface of the first silicon wafer 1 to expose the metal copper in the blind hole;
(S6) preparing a first gold film 2 containing microstrip patterns on the back surface of the first silicon wafer 1 through photoetching and electroplating processes, and preparing gold micro-bumps on the microstrip according to requirements so as to improve the bonding strength of subsequent wafers;
(S7) applying the steps S1 to S6 to the second silicon wafer 5 in the same manner, and thermally pressing the back surface of the first silicon wafer 1 and the back surface of the second silicon wafer 5 to bond the first silicon wafer 1 and the second silicon wafer 5 at the wafer level;
and (S8) respectively covering the gold film on the front and back sides of the bonded wafer, namely, the second gold film of the first silicon wafer and the second gold film of the second silicon wafer, and preparing patterns on the gold films according to requirements.
As shown in FIG. 5, after the silicon wafers 1 and 5 are processed, the back surfaces of the silicon wafers 1 and 5 are thermally pressed to bond the wafers to form a double-layer stacked structure, the thicknesses of the silicon wafers 1 and 5 are preferably 300-450 micrometers, and the filled height of the copper column solid structures 4 in the through holes is less than or equal to 200 micrometers. The thickness ranges of the gold films covered on the upper surface and the lower surface and the gold film on the bonding surface of the wafer are 2-10 microns, the gold microstrip structure is positioned between the two silicon chips, and one end of the through hole solid structure faces the bonding surface.
[ example 3 ]
The preparation method of the three-layer silicon-based MEMS radio frequency filter comprises the following steps:
(S1) preparing a mask pattern of a through hole on the front surface of a first silicon wafer 1 by photoetching, and etching a blind hole by DRIE;
(S2) covering the surface of the first silicon wafer 1 and the inner wall of the blind hole with a copper seed layer 8 by magnetron sputtering on the front surface of the first silicon wafer 1;
(S3) depositing copper on the front surface of the first silicon wafer 1 by electroplating and filling blind holes;
(S4) completely removing the copper film on the surface of the front side of the first silicon wafer 1 through chemical mechanical polishing;
(S5) grinding and thinning the back surface of the first silicon wafer 1 to expose the metal copper in the blind hole;
(S6) preparing a first gold film 2 containing microstrip patterns on the back surface of the first silicon wafer 1 through photoetching and electroplating processes, and preparing gold micro-bumps on the microstrip according to requirements so as to improve the bonding strength of subsequent wafers;
(S7) applying the steps S1 to S6 to the second silicon wafer 5 and the third silicon wafer 6 in the same way, covering the front surface of the third silicon wafer with a patterned gold film, and sequentially performing hot pressing on the back surface of the first silicon wafer 1, the back surface of the third silicon wafer 6, the front surface of the third silicon wafer 6 and the back surface of the second silicon wafer 5 to realize wafer-level bonding of the first silicon wafer 1, the second silicon wafer 5 and the third silicon wafer 6;
and (S8) finally, respectively covering the front surface and the back surface of the bonded wafer with a gold film, and preparing patterns on the gold film according to requirements.
In this embodiment, as shown in fig. 6, for the structure in which three silicon-based MEMS radio frequency filters are bonded together, the thickness of the three silicon wafers is 300 μm or more, all the silicon wafers are filled with the through hole structure by the preparation method, and one ends of the through hole copper pillar solid structures contained in the uppermost silicon wafer and the lowermost silicon wafer face inwards, that is, face the bonding surface of the silicon wafer where each silicon wafer is located. As shown in fig. 6, silicon wafers 1, 6 and 5 are sequentially bonded to form a silicon-based MEMS filter with a three-layer stacked structure, wherein the thickness of the preferred silicon wafers 1, 5 and 6 is 300-450 micrometers, and the filled height of the copper pillar solid structure 4 in the through hole is less than or equal to 200 micrometers. The thickness ranges of the gold films covered on the upper and lower surfaces and the gold film on the wafer bonding surface are all 2-10 micrometers.
[ example 4 ]
The preparation method of the three-layer silicon-based MEMS radio frequency filter comprises the following steps:
(S1) preparing a mask pattern of a through hole on the front surface of a first silicon wafer 1 by photoetching, and etching a blind hole by DRIE;
(S2) covering the surface of the first silicon wafer 1 and the inner wall of the blind hole with a copper seed layer 8 by magnetron sputtering on the front surface of the first silicon wafer 1;
(S3) depositing copper on the front surface of the first silicon wafer 1 by electroplating and filling blind holes;
(S4) completely removing the copper film on the surface of the front side of the first silicon wafer 1 through chemical mechanical polishing;
(S5) grinding and thinning the back surface of the first silicon wafer 1 to expose the metal copper in the blind hole;
(S6) preparing a first gold film 2 containing microstrip patterns on the back surface of the first silicon wafer 1 through photoetching and electroplating processes, and preparing gold micro-bumps on the microstrip according to requirements so as to improve the bonding strength of subsequent wafers;
(S7) applying the steps S1 to S6 to a second silicon wafer and a third silicon wafer, wherein in the embodiment, the third silicon wafer selects an intermediate layer silicon wafer 10 with a through hole of a solid copper column, the through hole of the intermediate layer silicon wafer 10 is completely filled with the copper column, and the back surface of the first silicon wafer 1 and the back surface of the intermediate layer silicon wafer 10 and the back surface of the second silicon wafer 5 are subjected to hot pressing in sequence to realize wafer bonding;
and (S8) respectively covering the front surface and the back surface of the bonded wafer with a gold film, and preparing patterns on the gold film according to requirements.
In this embodiment, as shown in fig. 7, after bonding different silicon wafers, the through holes do not need to be aligned, when the thicknesses of the uppermost silicon wafer and the lowermost silicon wafer are equal to or greater than 300 micrometers, the thickness of the intermediate silicon wafer is less than 200 micrometers, the uppermost silicon wafer and the lowermost silicon wafer are filled with the through hole structure by adopting the preparation method, one end of the copper post solid structure of the through hole is inward, and the intermediate silicon wafer 10 is a completely filled copper through hole structure. As shown in fig. 7, silicon wafers 1, 10 and 5 are sequentially bonded to form a silicon-based MEMS filter with a three-layer stacked structure, wherein the structure of an intermediate silicon wafer 10 with a solid copper column through hole is different from that of the silicon wafers 1 and 5, the thickness of the silicon wafers 1 and 5 is preferably 300-450 micrometers, and the filling height of a copper column solid structure 4 in the through hole is less than or equal to 200 micrometers; the thickness of the interlayer silicon wafer 10 with the through holes being solid copper columns is 30-150 micrometers, and the through holes are completely filled with the solid copper columns 7. The thickness ranges of the gold films covered on the upper and lower surfaces and the gold film on the wafer bonding surface are all 2-10 micrometers.
The invention mainly improves the procedure of depositing gold material on the side wall of the through hole in the background technology, and solves the problems of waste of gold material in a magnetron sputtering mode, deep hole electro-gold plating and other unconventional technological processes. These approaches all increase the difficulty of manufacturing and the cost of manufacturing silicon-based MEMS filters.
The preparation method provided by the invention avoids the use of expensive gold targets for preparing the seed layer on the side wall of the through hole, and adopts a mature copper electroplating process widely used in industry. Therefore, the preparation method provided by the invention obviously reduces the process difficulty and the production cost of the MEMS filter. Based on the preparation method, no special process line is needed, and the silicon-based MEMS radio-frequency filter can be produced on most of conventional MEMS micro-nano processing platforms.
The foregoing has shown and described the basic principles and features of the invention and the advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (11)
1. The preparation method of the silicon-based MEMS radio frequency filter is characterized by comprising the following steps of:
s1: preparing a mask pattern of the through hole on the front side of the first silicon wafer by photoetching, and etching a blind hole by DRIE;
s2: the front surface of the first silicon wafer is subjected to magnetron sputtering to cover the surface of the first silicon wafer and the inner wall of the blind hole with a copper seed layer;
s3: depositing copper on the front side of the first silicon wafer by electroplating and filling blind holes to form copper columns;
s4: completely removing a copper film on the surface of the front side of the first silicon wafer through chemical mechanical polishing;
s5: thinning the back of the first silicon wafer by grinding and exposing the metal copper in the blind hole;
s6: and preparing a microstrip pattern based on a gold film on the back surface of the first silicon wafer through photoetching and electroplating processes.
2. The method for manufacturing a silicon-based MEMS radio frequency filter according to claim 1, wherein a section of the copper pillar close to the front surface of the first silicon wafer is of a hollow structure, and a section of the copper pillar close to the back surface of the first silicon wafer is of a solid structure.
3. The method for manufacturing a silicon-based MEMS radio frequency filter according to claim 2, wherein the thickness range of the thinned first silicon wafer is 300-500 microns, and the height of the solid section of the copper pillar is less than or equal to 200 microns.
4. The method for manufacturing a silicon-based MEMS radio frequency filter according to claim 3, further comprising step S7: and covering a layer of gold film on the front surface of the first silicon wafer, and preparing patterns on the gold film according to the requirement, wherein the thickness range of the gold film on the front surface and the back surface of the silicon wafer is 2-10 microns.
5. A method for manufacturing a silicon-based MEMS radio frequency filter according to any one of claims 1 to 3, further comprising the steps of:
applying the steps S1 to S6 to a second silicon wafer, and performing hot pressing on the back surface of the first silicon wafer and the back surface of the second silicon wafer to realize wafer-level bonding of the first silicon wafer and the second silicon wafer;
and respectively covering the front and back sides of the bonded wafer with gold films, and preparing patterns on the gold films according to requirements.
6. A method for manufacturing a silicon-based MEMS radio frequency filter according to any one of claims 1 to 3, further comprising the steps of:
and (3) applying the steps S1 to S6 to the second silicon wafer, … and the N-th silicon wafer in the same way, wherein N is less than or equal to 5 and N is a positive integer, covering a layer of gold film on the front surface of the third silicon wafer and the … -th silicon wafer, preparing patterns on the gold film according to the requirement, stacking the N silicon wafers, bonding the N silicon wafers at the wafer level, wherein the first silicon wafer and the second silicon wafer are positioned at the bottommost layer and the topmost layer of the stacked wafer, covering the gold film on the front surface and the back surface of the bonded wafer respectively, and preparing the patterns on the gold film according to the requirement.
7. The method of fabricating a silicon-based MEMS radio frequency filter as defined in claim 6, wherein all or part of the through holes of the third through nth silicon wafers are completely filled with copper pillars and the thickness of the silicon wafer is 200 μm or less.
8. The silicon-based MEMS radio frequency filter is characterized by comprising a first silicon wafer (1) and a through hole on the first silicon wafer (1), wherein a copper column is arranged in the through hole; the upper surface of the first silicon wafer (1), namely the wafer thinning surface, is provided with a first gold film (2) for covering, and the lower surface of the first silicon wafer (1) is provided with a second gold film (3) for covering; the copper column in the through hole close to the thinning surface of the wafer is arranged to be a solid structure (4), and the other end of the copper column is of a hollow structure; the surface of the copper column solid structure (4) exposed on the thinning surface of the wafer is covered with a first gold film (2), and the surface of the copper column exposed on the lower surface of the first silicon wafer (1) and the inner wall of the hollow structure are covered with a second gold film (3).
9. The silicon-based MEMS radio frequency filter according to claim 8, wherein the thickness of the first silicon wafer (1) is 300-450 microns, and the thickness of the hole column solid structure (4) arranged in the through hole is less than or equal to 200 microns; the thickness of the gold film of the first gold film (2) and the second gold film (3) is 2-10 microns.
10. A MEMS radio frequency filter according to any of claims 8 or 9, further comprising a second silicon wafer, …, an nth silicon wafer having the same characteristics as the first silicon wafer, N being less than or equal to 5 and N being a positive integer, the N silicon wafers being stacked together by wafer bonding to form the device.
11. The MEMS radio frequency filter according to any one of claims 8 or 9, further comprising a second silicon wafer having the same characteristics as the first silicon wafer, wherein all or part of the through holes of the third to nth silicon wafers are completely filled with copper pillars and have a thickness of 200 μm or less, N is 5 or less and N is a positive integer, the N silicon wafers are stacked and wafer-level bonded, wherein the first and second silicon wafers are located at the bottommost layer and the topmost layer of the stacked wafers.
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