CN116994976A - Method and device for identifying wafer edge defect type, medium and wafer processing method - Google Patents

Method and device for identifying wafer edge defect type, medium and wafer processing method Download PDF

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Publication number
CN116994976A
CN116994976A CN202310953229.6A CN202310953229A CN116994976A CN 116994976 A CN116994976 A CN 116994976A CN 202310953229 A CN202310953229 A CN 202310953229A CN 116994976 A CN116994976 A CN 116994976A
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defect
identified
area
region
wafer
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马强强
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Xian Eswin Silicon Wafer Technology Co Ltd
Xian Eswin Material Technology Co Ltd
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Xian Eswin Silicon Wafer Technology Co Ltd
Xian Eswin Material Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67294—Apparatus for monitoring, sorting or marking using identification means, e.g. labels on substrates or labels on containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Image Analysis (AREA)

Abstract

The embodiment of the application discloses a method, a device, a medium and a wafer processing method for identifying the defect type of the edge of a wafer; the method for identifying the defect type of the wafer edge comprises the following steps: receiving an acquired edge image of a wafer to be tested; determining a region to be identified with defects according to the image characteristics of the edge image; obtaining the morphological characteristics of defects existing in the region to be identified; and determining the type of the defect in the region to be identified according to the morphological characteristics and the region to be identified.

Description

Method and device for identifying wafer edge defect type, medium and wafer processing method
Technical Field
The embodiment of the application relates to the technical field of semiconductor manufacturing, in particular to a method, a device, a medium and a wafer processing method for identifying the defect type of a wafer edge.
Background
In the course of integrated circuit fabrication, defects may be formed on the wafer during each process flow. With the development of semiconductor technology, semiconductor devices tend to be miniaturized, and the influence of defects on wafers in the semiconductor technology is larger, so that in the process of manufacturing integrated circuits, defect detection needs to be performed on the wafers, and the defect is generated by analyzing the detection result as a basis, so that the production technology or the technological equipment is adjusted, and the defect generation is reduced.
The wafer edge is very prone to scratches or residual foreign matter, which can become a source of contamination, diffusing to the interior area and surface of the wafer, affecting devices within the wafer. As feature sizes continue to shrink, devices get closer to the edge of the wafer, and wafer edge defects have a greater impact on process and product yield. Particularly 65nm and below, wafer edge defects have severely affected the process and have resulted in significant product rejection. Therefore, wafer edge defects have become an item that must be detected and controlled.
In the conventional process, the edges of the wafer can be scanned by a microscope for manual visual observation, but the manual efficiency is too low, which affects the speed of production and manufacture. For the current automatic edge defect scanning equipment which is specially used for scanning and monitoring the edge of the wafer, most of the automatic edge defect scanning equipment only detects whether edge defects exist or not, and cannot classify the edge defects, and therefore cannot adjust the production process or process equipment according to the detection result.
Disclosure of Invention
Accordingly, embodiments of the present application desirably provide a method, apparatus, medium and wafer processing method for identifying a type of wafer edge defect; the defect type of the wafer edge can be accurately identified.
The technical scheme of the embodiment of the application is realized as follows:
in a first aspect, an embodiment of the present application provides a method for identifying a type of an edge defect of a wafer, where the method includes:
receiving an acquired edge image of a wafer to be tested;
determining a region to be identified with defects according to the image characteristics of the edge image;
obtaining the morphological characteristics of defects existing in the region to be identified;
and determining the type of the defect in the region to be identified according to the morphological characteristics and the region to be identified.
In some examples, the determining the area to be identified that is defective according to the image features of the edge image includes:
selecting a gray value at a position where the gray fluctuation value is smaller than a set first threshold value from the gray image corresponding to the edge image as a reference value;
taking a region with the gray fluctuation amplitude value larger than a set second threshold value as a region to be expanded;
acquiring the longest distance of the boundary of the region to be expanded along the horizontal direction and the vertical direction respectively by using the center in the region to be expanded to form a width side and a height side of the region to be identified;
and determining the region to be identified according to the width edge and the height edge of the region to be identified and the center in the region to be expanded.
In some examples, the topographical features include: the area occupation ratio of the defect in the area to be identified and the deflection angle of the longest axis of the defect relative to a set reference angle; the region to be identified features comprise a horizontal direction length and a vertical direction length of the region to be identified.
In some of the examples of the present application,
the determining the type of the defect existing in the region to be identified according to the morphological feature and the region to be identified comprises the following steps:
the area ratio of the defects in the to-be-identified area is not smaller than a set area ratio threshold, the length in the horizontal direction and the length in the vertical direction of the to-be-identified area are not smaller than a set first length threshold and a set second length threshold respectively, and the type of the defects in the to-be-identified area is determined to be edge breakage defects;
the deflection angle corresponding to the longest axis of the defect relative to a set reference angle is in a set first deflection angle range, the length of the to-be-identified area in the vertical direction is not smaller than the second length threshold, the area occupation ratio of the defect in the to-be-identified area is smaller than the area occupation ratio threshold, and the type of the defect in the to-be-identified area is determined to be a crack defect;
and determining that the type of the defect in the area to be identified is a scratch defect, wherein the deflection angle corresponding to the longest axis of the defect relative to a set reference angle is in a set second deflection angle range, the length of the area to be identified in the horizontal direction is not smaller than the first length threshold value, and the area occupation ratio of the defect in the area to be identified is smaller than an area occupation ratio threshold value.
In some examples, the obtaining the topographical features of the defect present in the area to be identified includes:
and in the region to be identified, connecting the two ends of the region occupied by the defect, and determining the rotation angle of the longest connecting line to the set reference line according to the set rotation direction as the deflection angle of the longest axis of the defect relative to the set reference angle.
In a second aspect, an embodiment of the present application provides an apparatus for identifying a type of a wafer edge defect, the apparatus comprising: a receiving section, a determining section, an acquiring section, and an identifying section; wherein,,
the receiving part is configured to receive the collected edge image of the wafer to be tested;
the determining part is configured to determine a region to be identified with a defect according to the image characteristics of the edge image;
the acquisition part is configured to acquire the morphological characteristics of defects in the area to be identified;
the identification portion is configured to determine a type of defect present in the region to be identified based on the topographical features and the region to be identified features.
In a third aspect, embodiments of the present application provide a computing device, the computing device comprising: a processor and a memory; the processor is configured to execute the instructions stored in the memory to implement the method of identifying a wafer edge defect type as described in the first aspect and any one of the examples of the first aspect.
In a fourth aspect, embodiments of the present application provide a computer storage medium storing at least one instruction for execution by a processor to implement a method of identifying a wafer edge defect type as described in the first aspect and any one of the examples of the first aspect.
In a fifth aspect, embodiments of the present application provide a computer program product comprising computer instructions stored in a computer readable storage medium; the computer instructions are read from a computer-readable storage medium by a processor of an electronic device, the computer instructions being executable by the processor to cause the electronic device to perform the method of identifying a wafer edge defect type as described in the first aspect and any one of the examples of the first aspect.
In a sixth aspect, an embodiment of the present application provides a wafer processing method, including:
carrying out wafer processing treatment on a single crystal silicon ingot drawn by a setting method to obtain a plurality of wafers;
for each of the plurality of wafers, identifying an edge defect type by the method of identifying a wafer edge defect type of any of the first aspect and the first aspect.
The embodiment of the application provides a method, a device, a medium and a wafer processing method for identifying the defect type of the edge of a wafer; after the region to be identified with the defects is obtained, the edge defect type is identified by combining the region to be identified features capable of framing the defects and the morphology features of the defects, so that the identification accuracy of the wafer edge defect type is improved.
Drawings
FIG. 1 is a schematic view of an implementation environment according to an embodiment of the present application;
FIG. 2 is a flow chart of a method for identifying a wafer edge defect type according to an embodiment of the present application;
FIG. 3 is a schematic view of a wafer edge image according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a defect at a wafer edge according to an embodiment of the present application;
FIG. 5 is a schematic diagram of edge chipping defect provided by an embodiment of the present application;
FIG. 6 is a schematic diagram of a crack defect provided by an embodiment of the present application;
FIG. 7 is a schematic diagram of a scratch defect provided by an embodiment of the present application;
FIG. 8 is a schematic diagram illustrating an apparatus for identifying a type of wafer edge defect according to an embodiment of the present application;
FIG. 9 is a schematic diagram of a computing device according to an embodiment of the present application;
fig. 10 is a schematic flow chart of a wafer processing method according to an embodiment of the application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application.
After a single crystal silicon ingot is obtained by pulling by a Czochralski method, the single crystal silicon ingot can be sequentially subjected to processing procedures such as cutting, grinding, polishing, cleaning and the like, so that a polished wafer is obtained; in some cases, an epitaxial wafer is also obtained by forming an epitaxial layer with monocrystalline silicon on the surface of the polished wafer by chemical vapor deposition or the like.
Whether directed to polished wafers or epitaxial wafers, edge defects have a growing impact on subsequent integrated circuit fabrication processes and product yields. Based on long-term observation and statistics of the wafer production process, it was found that more than about 90% of the edge defects occurred belong to chipping (Chip) defects, cracking (Crack) defects, and Scratch (Scratch) defects.
For the three defects, specifically, the Chip defects are edge bump-shaped defects, the angles of the Chip defects are not fixed, the Chip defects are easy to cause the risk of fragments in the subsequent manufacturing process, the customer complaints are easy to cause, and the Chip defects cannot be removed through reworking; the Crack defect is linear and extends along the longitudinal direction of the wafer, is extremely prone to the risk of chipping after heating, and therefore must be intercepted before shipment, and the type is believed to be unable to pass rework; the Scratch defects are mostly transverse extending defects, and are mostly caused by abnormal edge polishing (edge polishing) equipment, and can be removed by reworking.
Based on the above detailed description of the three types of defects, since Chip defects and mask defects have a large risk of chipping, and Scratch defects can be removed by reworking, it is necessary to be able to accurately identify the type to which the edge defects of the wafer belong. In view of this, the embodiment of the application expects to identify the edge defect type by combining the region feature to be identified of the selected defect and the morphological feature of the defect in the edge image, thereby improving the identification accuracy of the wafer edge defect type.
Referring to FIG. 1, a schematic diagram of an implementation environment provided by an embodiment of the present application is shown. In fig. 1, a wafer W to be measured is laid on a carrying platform 10 rotatable about a central axis C, and a Laser emitter 20 emits a Laser beam Laser to the wafer W to be measured. The scanning camera 30 collects reflected light or refracted light (as indicated by the dotted arrow) of the laser beam passing through the edge of the wafer W to be measured, generates an edge image of the wafer W to be measured, and transmits the edge image to the computing device 40. The computing device 40 may execute the technical solution according to the embodiment of the present application according to the received edge image, so as to identify the edge defect type of the wafer to be tested.
It should be noted that the implementation environment shown in fig. 1 is only illustrative and not limiting. It can be appreciated that, those skilled in the art may acquire the edge image of the wafer W to be measured by other methods or systems, which are not described in detail in the embodiments of the present application.
In some examples, computing device 40 may be at least one of a smart phone, a smart watch, a desktop computer, a laptop computer, a virtual reality terminal, an augmented reality terminal, a wireless terminal, and a laptop portable computer. Computing device 40 has communication capabilities and may access a wired network or a wireless network. Computing device 40 may refer broadly to one of a plurality of terminals, and those skilled in the art will recognize that the number of terminals may be greater or lesser. In some examples, computing device 40 may receive the edge image transmitted by scanning camera 30 based on an accessed wired network or wireless network. It will be appreciated that the computing device 40 performs the computing and processing operations of the present application, and embodiments of the present application are not limited in this regard.
Referring to fig. 2, a method for identifying a type of wafer edge defect provided by an embodiment of the present application may be performed by the computing device 40 shown in fig. 1, and may include:
s210: receiving an acquired edge image of a wafer to be tested;
in the embodiment of the application, the wafer to be tested is generally provided with a notch (notch). Taking the implementation environment shown in fig. 1 as an example, since the loading platform 10 is rotatable, a complete edge image should start with a notch shape pattern and end with a notch shape pattern as shown in fig. 3. Therefore, the embodiment of the application can treat the image part between two notch patterns in the complete image as an edge image of the wafer to be detected.
In some examples, binarization processing may be performed on the acquired original image of the edge of the wafer to be measured, that is, the gray value of the pixel in the image is set to be in the range of 0 to 255; compared with the original image, the normal part and the defect part in the edge of the wafer to be detected can be distinguished more obviously.
S220: determining a region to be identified with defects according to the image characteristics of the edge image;
in the embodiment of the application, the region to be identified with the defect can be determined according to the gray value change in the image. It should be noted that, for the portion where the edge of the wafer is not defective, the laser light will be specularly reflected at the portion, so that the laser beams collected by the scanning camera 30 are more, and the corresponding portion in the image presents brighter gray values; for the portion of the wafer edge where the defect exists, the laser light will be diffusely reflected at the defect, so that the laser light beam collected by the scanning camera 30 is less, and the gray value of the portion where the defect exists in the image is significantly changed and is darker. Based on the above description of the characteristics of the defect produced in the image, when a region of significantly varying gray values and darker appears in the edge image, then the presence of the defect in that region can be determined. In some examples, the shape of the region to be identified may be rectangular and may be capable of fully framing defects present therein.
S230: obtaining the morphological characteristics of defects existing in the region to be identified;
in the embodiment of the application, after the identification of the area to be identified is completed according to the steps, the morphological characteristics of the defect existing in the area in the image can be acquired. The morphology that appears at the wafer edge is correspondingly different for each edge defect type, and further, the topographical features that appear in the image are also different, due to the different mechanisms by which they are formed. Therefore, the morphological features can directly represent morphological parameters such as the shape, the size, the occupied area and the like of the defect at the edge of the wafer, and compared with the image features such as gray values, the morphological features can provide more accurate identification basis for the defect type. Continuing with the illustration of FIG. 3, a topographical representation of the most frequently occurring edge chipping (Chip), cracking (Crack), and scoring (Scratch) defects, respectively, are presented. As can be seen from the morphology presented in fig. 3, the morphology difference of the three types of defects is quite obvious, and a more accurate identification basis can be provided for the defect types.
S240: and determining the type of the defect in the region to be identified according to the morphological characteristics and the region to be identified.
In the embodiment of the application, besides the morphological features, since the region to be identified can completely frame the defects existing in the region, the characteristic parameters of the region can also characterize the morphology of the defects from some aspects. Based on the above, the embodiment of the application combines the morphological characteristics and the regional characteristics to be identified to jointly identify the types of the edge defects, and compared with the single use of the morphological characteristics or the regional characteristics to be identified, the identification accuracy of the defect types is improved.
In addition, among the most frequently occurring edge chipping (Chip) defects, crack (Crack) defects and Scratch (Scratch) defects, since the Scratch (Scratch) defects can be removed by reworking, the type of edge defects can be accurately identified, and the wafer with the Scratch (Scratch) defects can be identified for reworking, so that the wafer with the edge defects does not need to be scrapped, and the manufacturing cost is reduced.
For the technical scheme, according to the embodiment of the application, after the edge image of the wafer is obtained and the region to be identified with the defect is obtained, the edge defect type is identified by combining the feature of the region to be identified with the defect and the morphological feature of the defect, so that the identification accuracy of the wafer edge defect type is improved.
For the solution shown in fig. 2, in some possible implementations, the determining, according to the image features of the edge image, the area to be identified where the defect exists includes:
selecting a gray value at a position where the gray fluctuation value is smaller than a set first threshold value from the gray image corresponding to the edge image as a reference value;
taking a region with the gray fluctuation amplitude value larger than a set second threshold value as a region to be expanded;
acquiring the longest distance of the boundary of the region to be expanded along the horizontal direction and the vertical direction respectively by using the center in the region to be expanded to form a width side and a height side of the region to be identified;
and determining the region to be identified according to the width edge and the height edge of the region to be identified and the center in the region to be expanded.
In the gray level image corresponding to the edge image, the portion of the wafer edge having no defect is represented as a bright gray level value, and the fluctuation of the gray level value is gentle, which may be regarded as the gray level value is substantially consistent; for the portion of the wafer edge where there is a defect, the corresponding portion in the image appears as a significant change in gray value and is darker. For the implementation manner, in a specific implementation process, the fluctuation degree of the gray value is respectively represented by a first threshold value and a second threshold value. In detail, if the fluctuation value of the gray value is smaller than the first threshold value, it is indicated that the fluctuation degree is relatively gentle, and the portion of the wafer edge corresponding to the region with relatively gentle fluctuation in the image is free of defects. If the fluctuation value of the gray value is larger than the second threshold value, the fluctuation degree is larger, and the part of the wafer edge corresponding to the region with larger fluctuation in the image has defects. For a region in the image where the gray value fluctuates greatly, it can be considered that a defect exists in the region, but the defect cannot be completely framed. Therefore, the region with larger gray value fluctuation in the image is regarded as a region to be expanded to form a region to be identified which can frame the defect.
In detail, as shown in fig. 4, the region with gray scale is the region to be expanded with Defect (Defect), and the longest distance of the boundary (i.e. the boundary of the Defect) of the region to be expanded is obtained in the horizontal direction and the vertical direction (as shown by the dotted lines in the horizontal direction and the vertical direction) with the center of gravity of the Defect region in the region to be expanded as the center, so as to form the Width edge (Width) and the height edge (height) of the region to be identified (as shown by the Box mark in fig. 4). And forming the region to be identified according to the width edge and the height edge of the region to be identified and the center in the region to be expanded.
For the solution shown in fig. 2, in some possible implementations, the topographical features of the defect include: the area occupation ratio of the defect in the area to be identified and the deflection angle of the longest axis of the defect relative to a set reference angle; the region to be identified features comprise a horizontal direction length and a vertical direction length of the region to be identified.
In the foregoing implementation manner, in some examples, for the process of obtaining the topographical features of the defect, specifically, on one hand, the area occupation ratio of the defect in the area to be identified may be obtained according to the ratio of the area occupied by the defect in the area to be identified to the area of the area to be identified. On the other hand, in the area to be identified, connecting the two ends of the area occupied by the defect, and taking the connecting line with the longest distance as the longest axis of the defect; and determining the rotation angle of the longest axis of the defect to a set reference line according to the set rotation direction as the deflection angle of the longest axis of the defect relative to the set reference angle.
For the above example, with continued reference to fig. 4, in detail, the area of the region where the gray scale exists is the area occupied by the Defect in the region to be identified, which is denoted as Defect area. The area Box area of the area to be recognized is the product of the Width side (Width) length and the height side (height) length. The area Ratio of the Defect in the area to be identified is Fill ratio=defect area/Box area.
In addition, in the area to be identified, the connecting line with the longest distance is the longest axis of the defect in the connecting lines at the two ends of the area occupied by the defect, and the mark is Major axis. The set rotation direction may be counterclockwise, the set reference line is a broken line labeled 0 ° in fig. 4, and the broken line having the deflection angle θ of 0 ° rotates counterclockwise to a rotation angle overlapping with Major axes.
In the above implementation manner, in some examples, the area to be identified features include at least: and the length of the area to be identified in the horizontal direction and the length of the area to be identified in the vertical direction.
For the above example, the Width (Width) length and the height (height) length of the area to be identified may be determined as the horizontal direction length and the vertical direction length of the area to be identified, respectively.
It should be noted that, through the above implementation manner and examples thereof, after determining the to-be-identified areas with defects and obtaining the morphological features of the defects existing in the to-be-identified areas, defect type identification may be performed for the defects in each to-be-identified area. The specific morphology and the shape of the region to be identified formed corresponding to the morphology are obviously different from the three types of defects, namely the edge chipping (Chip) defect, the Crack (Crack) defect and the Scratch (Scratch) defect, which are common on the edge of the wafer.
For a broken edge (Chip) defect, the defect is generally formed by collision of the edge of a wafer, the width edge length and the high-speed edge length of a region to be identified with the defect are relatively close, the region to be identified is relatively full when viewed from a rectangular shape selected by a frame of the region to be identified, the area of the defect in the region to be identified is relatively large, and the deflection angle of the longest axis of the defect relative to a set reference angle is not in a fixed angle range.
For a Crack defect, the appearance of the Crack defect is linear, the area to be identified where the Crack defect is located is correspondingly in an elongated strip shape, the area of the defect in the area to be identified is relatively small, and the Crack defect extends in the longitudinal direction (vertical direction).
For the Scratch (Scratch) defect, the morphology is linear, the area to be identified where the Scratch (Scratch) defect is located is correspondingly in an elongated strip shape, the area of the defect in the area to be identified is smaller, and the Scratch (Scratch) defect is extended transversely (horizontally) compared with the Crack defect.
Based on the above analysis for three types of defects, the topographical features of the defects and the to-be-identified region features obtained using the foregoing implementations and examples thereof, in some examples, the determining the type of the defect existing in the to-be-identified region according to the topographical features and the to-be-identified region features includes:
the area ratio of the defects in the to-be-identified area is not smaller than a set area ratio threshold, the length in the horizontal direction and the length in the vertical direction of the to-be-identified area are not smaller than a set first length threshold and a set second length threshold respectively, and the type of the defects in the to-be-identified area is determined to be edge breakage defects;
the deflection angle corresponding to the longest axis of the defect relative to a set reference angle is in a set first deflection angle range, the length of the to-be-identified area in the vertical direction is not smaller than the second length threshold, the area occupation ratio of the defect in the to-be-identified area is smaller than the area occupation ratio threshold, and the type of the defect in the to-be-identified area is determined to be a crack defect;
and determining that the type of the defect in the area to be identified is a scratch defect, wherein the deflection angle corresponding to the longest axis of the defect relative to a set reference angle is in a set second deflection angle range, the length of the area to be identified in the horizontal direction is not smaller than the first length threshold value, and the area occupation ratio of the defect in the area to be identified is smaller than an area occupation ratio threshold value.
For the edge breakage defect set forth in the above example, in a specific implementation process, the area ratio of the defect in the area to be identified, the horizontal length and the vertical length of the area to be identified may be compared with a set area ratio threshold, a first length threshold and a second length threshold, respectively; when the area ratio of the defect in the area to be identified is not smaller than the area ratio threshold, and the horizontal length and the vertical length of the area to be identified are not smaller than the first length threshold and the second length threshold respectively, the type of the defect in the area to be identified can be determined to be a broken edge defect.
For the above specific implementation process, first, the embodiment of the present application characterizes the shape "plumpness" of the area to be identified by comparing the horizontal (Width) length and the vertical (height) length of the area to be identified with the first length threshold a and the second length threshold b, respectively. The size of the area Ratio of the defect in the area to be identified can be characterized by the comparison result of the area Ratio (Fill Ratio) of the defect in the area to be identified and the area Ratio threshold c. As shown in fig. 5, by the above-mentioned identification means, it can be determined that the defect in the box is a broken edge (Chip) defect, the shape of the area to be identified formed by the defect is more "full", and the area occupied by the defect in the area to be identified is larger. In addition, the deflection angle θ in fig. 5 has no obvious rule, i.e., a fixed angle range, and may be disregarded in determining a Chip defect.
For the Crack (mask) defect set forth in the above example, in a specific implementation, the deflection angle of the longest axis of the defect relative to a set reference angle, the vertical length of the region to be identified, and the area ratio of the defect in the region to be identified may be compared with a set first deflection angle range, a second length threshold, and an area ratio threshold, respectively; and when the deflection angle of the longest axis of the defect relative to the set reference angle is in the first deflection angle range, the length of the to-be-identified area in the vertical direction is not smaller than the second length threshold, and the area occupation ratio of the defect in the to-be-identified area is smaller than the area occupation ratio threshold, determining that the type of the defect in the to-be-identified area is a crack defect.
In detail, for the above-described implementation procedure, first, it is judged whether or not the deflection angle θ of the longest axis of the defect with respect to the set reference angle satisfies-90 θ.ltoreq.θ.ltoreq.d or d.ltoreq.θ.ltoreq.90 °, d being the set angle value. When the deflection angle θ of the defect satisfies the above-described first deflection angle range, the defect can be considered to exhibit a longitudinal extension. And secondly, comparing the vertical length height of the region to be identified with a set second length threshold b, and if the vertical length height of the region to be identified is larger than the set second length threshold b, indicating that the shape of the region to be identified is in an elongated strip shape. Finally, comparing the area Ratio (Fill Ratio) of the defect in the area to be identified with an area Ratio threshold c, and if the area Ratio is smaller than the area Ratio threshold c, considering that the area Ratio of the defect in the area to be identified is smaller. As shown in fig. 6, by the above identification means, it is possible to determine that the defect in the block is a Crack (ack) defect.
For the Scratch (Scratch) defect set forth in the above example, in a specific implementation, the deflection angle of the longest axis of the defect relative to a set reference angle, the horizontal length of the region to be identified, and the area ratio of the defect within the region to be identified may be compared with a set second deflection angle range, a first length threshold, and an area ratio threshold, respectively; and when the deflection angle of the longest axis of the defect relative to the set reference angle is in the second deflection angle range, the length of the horizontal direction of the region to be identified is not smaller than the first length threshold, and the area occupation ratio of the defect in the region to be identified is smaller than the area occupation ratio threshold, determining that the type of the defect in the region to be identified is a scratch defect.
In detail, the length of the area to be identified in the horizontal direction is compared with the set first length threshold value a, and if the length is greater than the first length threshold value a, the shape of the area to be identified may be represented as an elongated strip. And secondly, judging whether the deflection angle theta of the longest axis of the defect relative to the set reference angle meets the condition that the deflection angle theta is less than or equal to-d and less than or equal to d, wherein d is a set angle value. When the deflection angle θ of the defect satisfies the above-described second deflection angle range, the defect can be regarded as exhibiting a horizontal extension. And finally, comparing the area Ratio (Fill Ratio) of the defect in the area to be identified with an area Ratio threshold c, and if the area Ratio is smaller than the threshold c, considering that the area Ratio of the defect in the area to be identified is smaller. As shown in fig. 7, by the above-described identification means, it is possible to determine that the defect in the box is a Scratch (Scratch) defect.
Through the explanation of the above examples and the specific implementation processes thereof, based on the morphological features presented by the defects in the image and the features of the region to be identified adopted by the frame selection defects, not only can three defect types of the wafer edge be accurately distinguished, but also the wafer which cannot be reworked can be scrapped accurately, and the wafer which can be reworked to eliminate the defects. The production cost is reduced.
Based on the same inventive concept as the foregoing technical solution, referring to fig. 8, an apparatus 80 for identifying a type of wafer edge defect according to an embodiment of the present application is shown, where the apparatus 80 includes: a receiving section 801, a determining section 802, an acquiring section 803, and an identifying section 804; wherein,,
the receiving part 801 is configured to receive the collected edge image of the wafer to be tested;
the determining part 802 is configured to determine a region to be identified where a defect exists according to an image feature of the edge image;
the acquiring section 803 is configured to acquire a morphological feature of a defect existing in the region to be identified;
the identifying portion 804 is configured to determine a type of defect present in the area to be identified based on the topographical features and the area to be identified features.
In some examples, the determining portion 802 is configured to:
selecting a gray value at a position where the gray fluctuation value is smaller than a set first threshold value from the gray image corresponding to the edge image as a reference value;
taking a region with the gray fluctuation amplitude value larger than a set second threshold value as a region to be expanded;
acquiring the longest distance of the boundary of the region to be expanded along the horizontal direction and the vertical direction respectively by using the center in the region to be expanded to form a width side and a height side of the region to be identified;
and determining the region to be identified according to the width edge and the height edge of the region to be identified and the center in the region to be expanded.
In some examples, the topographical features include: the area occupation ratio of the defect in the area to be identified and the deflection angle of the longest axis of the defect relative to a set reference angle; the region to be identified features comprise a horizontal direction length and a vertical direction length of the region to be identified.
In some examples, the identification portion 804 is configured to:
the area ratio of the defects in the to-be-identified area is not smaller than a set area ratio threshold, the length in the horizontal direction and the length in the vertical direction of the to-be-identified area are not smaller than a set first length threshold and a set second length threshold respectively, and the type of the defects in the to-be-identified area is determined to be edge breakage defects;
the deflection angle corresponding to the longest axis of the defect relative to a set reference angle is in a set first deflection angle range, the length of the to-be-identified area in the vertical direction is not smaller than the second length threshold, the area occupation ratio of the defect in the to-be-identified area is smaller than the area occupation ratio threshold, and the type of the defect in the to-be-identified area is determined to be a crack defect;
and determining that the type of the defect in the area to be identified is a scratch defect, wherein the deflection angle corresponding to the longest axis of the defect relative to a set reference angle is in a set second deflection angle range, the length of the area to be identified in the horizontal direction is not smaller than the first length threshold value, and the area occupation ratio of the defect in the area to be identified is smaller than an area occupation ratio threshold value.
In some examples, the acquisition portion 803 is configured to:
and in the region to be identified, connecting the two ends of the region occupied by the defect, and determining the rotation angle of the longest connecting line to the set reference line according to the set rotation direction as the deflection angle of the longest axis of the defect relative to the set reference angle.
Referring to FIG. 9, a block diagram of a computing device is shown, according to one exemplary embodiment of the present application. The computing device of the present application may include one or more of the following components: a processor 910 and a memory 920.
In the alternative, processor 910 utilizes various interfaces and lines to connect various portions of the overall computing device, performing various functions of the computing device and processing data by executing or executing instructions, programs, code sets, or instruction sets stored in memory 920, and invoking data stored in memory 920. Alternatively, the processor 910 may be implemented in at least one hardware form of digital signal processing (Digital Signal Processing, DSP), field-Programmable gate array (FPGA), programmable logic array (Programmable Logic Array, PLA). The processor 910 may integrate one or a combination of several of a central processing unit (Central Processing Unit, CPU), an image processor (Graphics Processing Unit, GPU), a Neural network processor (Neural-network Processing Unit, NPU), and baseband chips, etc. The CPU mainly processes an operating system, a user interface, an application program and the like; the GPU is used for rendering and drawing the content required to be displayed by the touch display screen; the NPU is used to implement artificial intelligence (Artificial Intelligence, AI) functionality; the baseband chip is used for processing wireless communication. It will be appreciated that the baseband chip may not be integrated into the processor 910 and may be implemented by a single chip.
The Memory 920 may include a random access Memory (Random Access Memory, RAM) or a Read-Only Memory (ROM). Optionally, the memory 920 includes a non-transitory computer readable medium (non-transitory computer-readable storage medium). Memory 920 may be used to store instructions, programs, code, sets of codes, or instruction sets. The memory 920 may include a stored program area and a stored data area, wherein the stored program area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playing function, an image playing function, etc.), instructions for implementing the various method embodiments described below, etc.; the storage data area may store data created from the use of the computing device, and the like.
In addition, those skilled in the art will appreciate that the structure of the computing device shown in the above-described figures is not limiting of the computing device, and that the computing device may include more or fewer components than shown, or may combine certain components, or a different arrangement of components. For example, the computing device further includes a display screen, a camera component, a microphone, a speaker, a radio frequency circuit, an input unit, a sensor (such as an acceleration sensor, an angular velocity sensor, a light sensor, etc.), an audio circuit, a WiFi module, a power supply, a bluetooth module, etc., which are not described herein.
Embodiments of the present application also provide a computer readable storage medium storing at least one instruction for execution by a processor to implement the method of identifying a wafer edge defect type as described in the various embodiments above.
Embodiments of the present application also provide a computer program product comprising computer instructions stored in a computer-readable storage medium; the computer instructions are read from a computer-readable storage medium by a processor of a computing device, and executed by the processor, cause the computing device to perform a method of identifying a wafer edge defect type provided in various alternative implementations of the above aspects.
Those skilled in the art will appreciate that in one or more of the examples described above, the functions described in the embodiments of the present application may be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, these functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.
Based on the above-described scheme for identifying the defect type of the wafer edge, referring to fig. 10, a wafer processing method according to an embodiment of the present application is shown, where the method may include:
s1010: carrying out wafer processing treatment on a single crystal silicon ingot drawn by a setting method to obtain a plurality of wafers;
s1020: for each of the plurality of wafers, an edge defect type is identified by the method of identifying a wafer edge defect type described in any of the previous embodiments.
For the wafer processing method, in some examples, the method further comprises:
judging the wafer identified as the edge breakage defect or the crack defect as a defective wafer which cannot be reworked, and scrapping the defective wafer;
the wafer identified as the scratch defect is determined as a defective wafer that can be reworked, and the scratch defect is removed by reworking.
It should be noted that: the technical schemes described in the embodiments of the present application may be arbitrarily combined without any collision.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A method of identifying a type of wafer edge defect, the method comprising:
receiving an acquired edge image of a wafer to be tested;
determining a region to be identified with defects according to the image characteristics of the edge image;
obtaining the morphological characteristics of defects existing in the region to be identified;
and determining the type of the defect in the region to be identified according to the morphological characteristics and the region to be identified.
2. The method according to claim 1, wherein the determining the area to be identified having the defect based on the image features of the edge image comprises:
selecting a gray value at a position where the gray fluctuation value is smaller than a set first threshold value from the gray image corresponding to the edge image as a reference value;
taking a region with the gray fluctuation amplitude value larger than a set second threshold value as a region to be expanded;
acquiring the longest distance of the boundary of the region to be expanded along the horizontal direction and the vertical direction respectively by using the center in the region to be expanded to form a width side and a height side of the region to be identified;
and determining the region to be identified according to the width edge and the height edge of the region to be identified and the center in the region to be expanded.
3. The method of claim 1, the topographical features comprising: the area occupation ratio of the defect in the area to be identified and the deflection angle of the longest axis of the defect relative to a set reference angle; the region to be identified features comprise a horizontal direction length and a vertical direction length of the region to be identified.
4. A method according to claim 3, wherein said determining the type of defect present in the area to be identified from the topographical features and the area to be identified features comprises:
the area ratio of the defects in the to-be-identified area is not smaller than a set area ratio threshold, the length in the horizontal direction and the length in the vertical direction of the to-be-identified area are not smaller than a set first length threshold and a set second length threshold respectively, and the type of the defects in the to-be-identified area is determined to be edge breakage defects;
the deflection angle corresponding to the longest axis of the defect relative to a set reference angle is in a set first deflection angle range, the length of the to-be-identified area in the vertical direction is not smaller than the second length threshold, the area occupation ratio of the defect in the to-be-identified area is smaller than the area occupation ratio threshold, and the type of the defect in the to-be-identified area is determined to be a crack defect;
and determining that the type of the defect in the area to be identified is a scratch defect, wherein the deflection angle corresponding to the longest axis of the defect relative to a set reference angle is in a set second deflection angle range, the length of the area to be identified in the horizontal direction is not smaller than the first length threshold value, and the area occupation ratio of the defect in the area to be identified is smaller than an area occupation ratio threshold value.
5. The method of claim 1, wherein the obtaining the topographical features of the defect present in the area to be identified comprises:
and in the region to be identified, connecting the two ends of the region occupied by the defect, and determining the rotation angle of the longest connecting line to the set reference line according to the set rotation direction as the deflection angle of the longest axis of the defect relative to the set reference angle.
6. An apparatus for identifying a type of wafer edge defect, the apparatus comprising: a receiving section, a determining section, an acquiring section, and an identifying section; wherein,,
the receiving part is configured to receive the collected edge image of the wafer to be tested;
the determining part is configured to determine a region to be identified with a defect according to the image characteristics of the edge image;
the acquisition part is configured to acquire the morphological characteristics of defects in the area to be identified;
the identification portion is configured to determine a type of defect present in the region to be identified based on the topographical features and the region to be identified features.
7. A computing device, the computing device comprising: a processor and a memory; the processor is configured to execute the instructions stored in the memory to implement the method for identifying a wafer edge defect type as claimed in any one of claims 1 to 5.
8. A computer storage medium storing at least one instruction for execution by a processor to implement the method of identifying a wafer edge defect type of any one of claims 1 to 5.
9. A method of processing a wafer, the method comprising:
carrying out wafer processing treatment on a single crystal silicon ingot drawn by a setting method to obtain a plurality of wafers;
identifying an edge defect type by the method of identifying an edge defect type of a wafer as claimed in any one of claims 1 to 5 for each of the plurality of wafers.
10. The method according to claim 9, wherein the method further comprises:
judging the wafer identified as the edge breakage defect or the crack defect as a bad wafer which cannot be reworked;
the wafer identified as the scratch defect is determined as a defective wafer that can be reworked, and the scratch defect is removed by reworking.
CN202310953229.6A 2023-07-31 2023-07-31 Method and device for identifying wafer edge defect type, medium and wafer processing method Pending CN116994976A (en)

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