CN116973650A - Capacitance detection circuit with high detection accuracy, related device and equipment - Google Patents
Capacitance detection circuit with high detection accuracy, related device and equipment Download PDFInfo
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- CN116973650A CN116973650A CN202211007986.6A CN202211007986A CN116973650A CN 116973650 A CN116973650 A CN 116973650A CN 202211007986 A CN202211007986 A CN 202211007986A CN 116973650 A CN116973650 A CN 116973650A
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Abstract
The embodiment of the application provides a capacitance detection circuit with high detection accuracy, a related device and equipment, wherein the detection circuit comprises: the driving module, the first switching tube Q1, the second switching tube Q2, the third switching tube Q3 and the fourth switching tube Q4, the first capacitor C1, the second capacitor C2, the first resistor R1, the detection module and the battery can detect the state of the first capacitor through the detection module, and accuracy in state detection of the first capacitor is improved.
Description
Technical Field
The application relates to the technical field of circuit structures, in particular to a capacitance detection circuit with high detection accuracy, and a related device and equipment.
Background
In recent years, mobile portable intelligent devices based on lithium batteries are increasingly applied, but due to the energy density of the lithium batteries, the cruising ability of the devices is always polluted by users. Based on this, high-efficiency high-power charge management integrated circuit products have been developed, especially switched capacitor converters, which use capacitors as energy transfer stations, unlike traditional inductive converters, with much higher conversion efficiency than traditional inductive converters. As the core of the switched capacitor converter, an external capacitor device, if the external capacitor device is short-circuited or has a small capacity, the efficiency of the converter system is greatly reduced, so that an excellent capacitance detection circuit is particularly important for the switched capacitor converter system.
Disclosure of Invention
The embodiment of the application provides a capacitance detection circuit with high detection accuracy, a related device and equipment, and the accuracy of detecting the state of a first capacitor is improved by detecting the state of the first capacitor through a detection module.
A first aspect of an embodiment of the present application provides a capacitance detection circuit, including: the device comprises a driving module, a first switching tube Q1, a second switching tube Q2, a third switching tube Q3, a fourth switching tube Q4, a first capacitor C1, a second capacitor C2, a first resistor R1, a detection module and a battery,
the drain electrode of the first switch tube Q1 is connected with a power input port, the grid electrode of the first switch tube Q1 is connected with a first control port of the driving module, the source electrode of the first switch tube Q1 is connected with the drain electrode of the second switch tube Q2, a first port of the detecting module and an upper polar plate of the first capacitor C1, the grid electrode of the second switch tube Q2 is connected with a second control port of the driving module, the source electrode of the second switch tube Q2 is connected with the drain electrode of the third switch tube Q3, a first end of the first resistor R1 and a first end of the battery, the grid electrode of the third switch tube Q3 is connected with a third control port of the driving module, the source electrode of the third switch tube Q3 is connected with the drain electrode of the fourth switch tube Q4, a second port of the detecting module and a lower polar plate of the first capacitor C1, the grid electrode of the fourth switch tube Q4 is connected with a fourth control port of the fourth switch tube Q4,
the second end of the first resistor R1 is connected with the first end of the second capacitor C2, and the second end of the second capacitor C2 is grounded.
With reference to the first aspect, in one possible implementation manner, the detection module includes: a first current source, a second current source, a first comparator, a second comparator, a third comparator, a first timer, a second timer, a third timer, wherein,
the inverting terminal of the first comparator is connected with the lower polar plate of the first capacitor C1 and the first terminal of the first current source, the non-inverting terminal of the first comparator is used for receiving a first reference signal, the output port of the first comparator is connected with the S port of the first RS trigger, the R port of the first RS trigger is connected with the output port of the first timer, and the second terminal of the first current source is grounded;
the positive end of the second comparator is connected with the upper polar plate of the first capacitor C1, the first end of the second current source and the positive end of the third comparator, the negative end of the second comparator is used for receiving a second reference signal, the output end of the second comparator is connected with the S port of the second RS trigger, and the R port of the second RS trigger is connected with the output port of the second timer;
the inverting terminal of the third comparator is used for receiving a third reference signal, the output port of the third comparator is connected with the S port of the third RS trigger, and the R port of the third RS trigger is connected with the third timer.
With reference to the first aspect, in one possible implementation manner, the detection circuit further includes a second resistor R2, a first end of the second resistor R2 is connected to the first end of the first resistor R1, and a second end of the second resistor R2 is connected to the first end of the battery.
With reference to the first aspect, in one possible implementation manner, the detection circuit further includes a temperature detection module, where the temperature detection module is connected to the battery, and the temperature detection module is configured to detect a temperature of the battery.
With reference to the first aspect, in one possible implementation manner, the detection circuit further includes: the first end of the protection module is connected with the drain electrode of the first switching tube Q1, and the protection module is used for protecting the detection circuit when strong voltage appears in the circuit.
With reference to the first aspect, in one possible implementation manner, the protection module includes: a first zener diode D1, a second zener diode D2, a third capacitor C3, and a fourth capacitor C4, wherein,
the first end of the first zener diode D1 is connected to the drain electrode of the first switching tube Q1, the second end of the first zener diode D1 is connected to the first end of the second zener diode D2, the second end of the second zener diode D2 is connected to the first end of the third capacitor C3 and the first end of the fourth capacitor C4, the second end of the third capacitor C3 is grounded, and the second end of the fourth capacitor C4 is grounded.
With reference to the first aspect, in one possible implementation manner, the protection module includes: the voltage detection submodule, the fourth switching tube Q4, the fifth capacitor C5 and the third resistor R3, wherein,
the detection end of the voltage detection submodule is connected with the drain electrode of the first switch tube Q1 and the drain electrode of the fourth switch tube Q4, the control port of the voltage detection submodule is connected with the grid electrode of the fourth switch tube Q4, the source electrode of the fourth switch tube Q4 is connected with the first end of the fifth capacitor C5 and the first end of the third resistor R3, the second end of the fifth capacitor C5 is grounded, and the second end of the third resistor R3 is grounded.
With reference to the first aspect, in one possible implementation manner, the detection circuit further includes a fourth resistor R4 and a sixth capacitor C6, a first end of the fourth resistor R4 is connected to the first output port of the driving module, a second end of the fourth resistor R4 is connected to the gate of the first switching tube Q1 and a first end of the sixth capacitor C6, and a second end of the sixth capacitor C6 is grounded.
A second aspect of an embodiment of the present application provides a capacitance detection device comprising a circuit board and a capacitance detection circuit according to any one of the first aspect.
A third aspect of an embodiment of the present application provides a capacitance detection apparatus, the capacitance detection device comprising a housing and a capacitance detection circuit as described in the second aspect.
The embodiment of the application has at least the following beneficial effects:
the capacitance detection circuit includes: the device comprises a driving module, a first switching tube Q1, a second switching tube Q2, a third switching tube Q3, a fourth switching tube Q4, a first capacitor C1, a second capacitor C2, a first resistor R1, a detection module and a battery, wherein the drain electrode of the first switching tube Q1 is connected with a power input port, the grid electrode of the first switching tube Q1 is connected with a first control port of the driving module, the source electrode of the first switching tube Q1 is connected with the drain electrode of the second switching tube Q2, the first port of the detection module is connected with the upper electrode plate of the first capacitor C1, the grid electrode of the second switching tube Q2 is connected with the second control port of the driving module, the source electrode of the second switching tube Q2 is connected with the drain electrode of the third switching tube Q3, the first end of the first resistor R1 is connected with the first end of the battery, the grid electrode of the third switching tube Q3 is connected with the third control port of the driving module, the grid electrode of the third switching tube Q3 is connected with the fourth control port of the fourth switching tube Q2, the fourth switching tube Q2 is connected with the second control port of the fourth capacitor C1, and the fourth capacitor C2 is connected with the fourth capacitor C2.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a structure of a capacitance detection circuit according to an embodiment of the present application;
FIG. 2 is a schematic structural diagram of a detection module according to an embodiment of the present application;
FIG. 3 is a schematic diagram of another capacitance detection circuit according to an embodiment of the present application;
FIG. 4 is a schematic diagram of another capacitance detection circuit according to an embodiment of the present application;
FIG. 5 is a schematic diagram of another capacitance detection circuit according to an embodiment of the present application;
FIG. 6 is a schematic diagram of another capacitance detection circuit according to an embodiment of the present application;
FIG. 7 is a waveform diagram illustrating the operation of a capacitance detection circuit according to an embodiment of the present application;
FIG. 8 is a diagram showing an operational waveform of a capacitance detection circuit under a first capacitance short circuit condition according to an embodiment of the present application;
FIG. 9 is a diagram showing waveforms of the capacitor detection circuit under no-battery load condition according to an embodiment of the present application;
fig. 10 is a waveform diagram of an operation of the capacitance detection circuit under the condition that the first capacitor C is opened according to the embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms first, second and the like in the description and in the claims and in the above-described figures are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference in the specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the described embodiments of the application may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic diagram of a capacitance detection circuit according to an embodiment of the application. As shown in fig. 1, the capacitance detection circuit includes: the driving module 10, the first switching tube Q1, the second switching tube Q2, the third switching tube Q3 and the fourth switching tube Q4, the first capacitor C1, the second capacitor C2, the first resistor R1, the detecting module 20 and the battery 30, wherein,
the drain electrode of the first switch tube Q1 is connected with the power input port, the grid electrode of the first switch tube Q1 is connected with the first control port of the driving module 10, the source electrode of the first switch tube Q1 is connected with the drain electrode of the second switch tube Q2, the first port of the detection module 20, the upper polar plate of the first capacitor C1, the grid electrode of the second switch tube Q2 is connected with the second control port of the driving module 10, the source electrode of the second switch tube Q2 is connected with the drain electrode of the third switch tube Q3, the first end of the first resistor R1 and the first end of the battery 30, the grid electrode of the third switch tube Q3 is connected with the third control port of the driving module 10, the source electrode of the third switch tube Q3 is connected with the drain electrode of the fourth switch tube Q4, the second port of the detection module 20 and the lower polar plate of the first capacitor C1, the grid electrode of the fourth switch tube Q4 is connected with the fourth control port of the fourth switch tube Q4,
the second end of the first resistor R1 is connected with the first end of the second capacitor C2, and the second end of the second capacitor C2 is grounded.
In this example, the capacitance detection circuit includes: the device comprises a driving module, a first switching tube Q1, a second switching tube Q2, a third switching tube Q3, a fourth switching tube Q4, a first capacitor C1, a second capacitor C2, a first resistor R1, a detection module and a battery 30, wherein the drain electrode of the first switching tube Q1 is connected with a power input port, the grid electrode of the first switching tube Q1 is connected with a first control port of the driving module, the source electrode of the first switching tube Q1 is connected with the drain electrode of the second switching tube Q2, the first port of the detection module and the upper electrode plate of the first capacitor C1, the grid electrode of the second switching tube Q2 is connected with the second control port of the driving module, the source electrode of the second switching tube Q2 is connected with the drain electrode of the third switching tube Q3, the first end of the first resistor R1 and the first end of the battery 30, the grid electrode of the third switching tube Q3 is connected with the third control port of the driving module, the grid electrode of the third switching tube Q3 is connected with the third control port of the fourth switching tube Q2, the grid electrode of the fourth switching tube Q3 is connected with the second control port of the fourth capacitor C1, and the fourth capacitor C1 is connected with the fourth capacitor C2, and the fourth capacitor C2 is connected with the fourth capacitor C3. The capacitance detection circuit has a simple circuit structure, can realize the detection of short circuit and open circuit of the capacitance, can simply judge the capacitance value of the capacitance, and provides good basic detection for the switched-capacitor buck converter in multiphase operation.
In one possible implementation, as shown in fig. 2, the detection module 20 includes: a first current source I1, a second current source I2, a first comparator CMP1, a second comparator CMP2, a third comparator CMP3, a first timer 201, a second timer 202, a third timer 203, wherein,
the inverting terminal of the first comparator CMP1 is connected with the lower polar plate of the first capacitor C1 and the first terminal of the first current source I1, the non-inverting terminal of the first comparator CMP1 is used for receiving a first reference signal, the output port of the first comparator CMP1 is connected with the S port of a first RS trigger, the R port of the first RS trigger is connected with the output port of the first timer 201, and the second terminal of the first current source I1 is grounded;
the positive end of the second comparator CMP2 is connected with the upper polar plate of the first capacitor C1, the first end of the second current source I2, and the positive end of the third comparator CMP3, the negative end of the second comparator CMP2 is used for receiving a second reference signal, the output end of the second comparator CMP2 is connected with the S port of a second RS trigger, and the R port of the second RS trigger is connected with the output port of the second timer 202;
the inverting terminal of the third comparator CMP3 is configured to receive a third reference signal, an output port of the third comparator CMP3 is connected to an S port of a third RS flip-flop, and an R port of the third RS flip-flop is connected to the third timer 203.
In one possible implementation, as shown in fig. 3, the detection circuit further includes a second resistor R2, where a first end of the second resistor R2 is connected to the first end of the first resistor R1, and a second end of the second resistor R2 is connected to the first end of the battery 30.
In one possible implementation, the detection circuit further includes a temperature detection module, where the temperature detection module is connected to the battery 30, and the temperature detection module is configured to detect a temperature of the battery 30.
In one possible implementation, as shown in fig. 4, the detection circuit further includes: the first end of the protection module 40 is connected with the drain electrode of the first switching tube Q1, and the protection module 40 is used for protecting the detection circuit when a strong voltage appears in the circuit.
In one possible implementation, as shown in fig. 5, the protection module includes: a first zener diode D1, a second zener diode D2, a third capacitor C3, and a fourth capacitor C4, wherein,
the first end of the first zener diode D1 is connected to the drain electrode of the first switching tube Q1, the second end of the first zener diode D1 is connected to the first end of the second zener diode D2, the second end of the second zener diode D2 is connected to the first end of the third capacitor C3 and the first end of the fourth capacitor C4, the second end of the third capacitor C3 is grounded, and the second end of the fourth capacitor C4 is grounded.
With reference to the first aspect, in one possible implementation manner, as shown in fig. 6, the detection circuit further includes a third resistor R3 and a fifth capacitor C5, a first end of the third resistor R3 is connected to the first output port of the driving module, a second end of the third resistor R3 is connected to the gate of the first switch tube Q1 and a first end of the fifth capacitor C5, and a second end of the fifth capacitor C5 is grounded.
During detection, a lower polar plate of the first capacitor C1 is firstly connected by the first current source I1 to discharge, in the time of the timer T1, the voltage release threshold value is smaller than V1, then the DRV4 logic is started to open the fourth switching tube Q4 so that the lower polar plate CL of the first capacitor C1 is grounded, then the second current source I2 is started to pull the voltage of the upper polar plate CH of the first capacitor C1 high, the timer T2 is started, if the voltage threshold value is higher than V2 in the time of the timer T2, the first capacitor C1 is considered to be open, the timer T2 and the voltage V2 can be combined to detect the minimum capacitance range of the first capacitor C1, the capacity value of the first capacitor C1 is limited under specific conditions, if the voltage of the upper polar plate CH of the first capacitor C1 is smaller than V2 in the time of the timer T2, the first capacitor C1 is switched to the voltage V3, the timer T3 is started, if the voltage CH of the upper polar plate CH of the first capacitor C1 is higher than V3 in the time of the timer T3, the state of the first capacitor C1 is considered to be closed, and if the voltage of the upper polar plate CH of the first capacitor C1 is not detected to be normal, and the system is not detected when the voltage of the upper polar plate of the first capacitor C1 is detected in the timer T3 is finished.
Fig. 7 shows a waveform diagram of the operation of the capacitance detection circuit, in which the output terminal of the system VOUT is connected to a battery load, the voltage VOUT is already before the system does not start to operate, the initial voltage difference is 0 according to the first capacitor C1, and the parasitic body diode is present in the second switching tube Q2, so that the initial voltage of the CH node is about VOUT, the voltage difference of the first capacitor C1 is 0, and the cl voltage is substantially VOUT.
The above condition continues until T1 starts to time, the first current source I1 starts to work, the CL end voltage will be pulled down slowly after the first current source I1 works, meanwhile, the CH end voltage remains unchanged basically due to the existence of the parasitic diode of the second switching tube Q2, the CL voltage will be pulled below VREF1 before T1 time is over, the output of the first comparator CMP1 is high at this moment, if this moment is smaller than the time of the timer T1, the CL end voltage is pulled down basically unchanged, the first capacitor C1 is supposed to be connected correctly and the capacitance is normal_The OK signal goes high and CL port detection ends.
After the CL detection is finished, the detection circuit informs the driver to start DRV4, opens the fourth switching tube Q4, then the second current source I2 starts to work, CH voltage starts to rise, the timer T2 starts to count, when the timer T2 finishes counting, whether the CH end voltage is higher than VREF2 voltage or not is judged, under the normal condition of capacitor connection, the CH voltage is smaller than VREF2 reference voltage in the time T2, the comparator output is kept low, and the CH_FAULT output is 0.
After the ch_fault detection is completed, the timer T3 starts to count, the third comparator CMP3 starts to operate, if the CH voltage reaches the VREF3 voltage value in the T3 time, the capacitance detection is completed, the output of the third comparator CMP3 is high, the ch_ok output is high, the system receives cl_ok and ch_ok signals sent by the capacitance detection circuit, it is determined that the external capacitance connection is normal, the capacitance value is within the allowable range, and then the converter system is further notified to perform normal switching operation.
Fig. 8 shows a working waveform diagram of the capacitance detection circuit under the condition that the first capacitor C1 is short-circuited, at this time, the load battery is connected to the system, because the capability of the first current source I1 in the capacitance detection circuit is limited, at this time, the CH and CL ports are short-circuited together, the CL terminal voltage cannot be pulled down to be lower than the VREF1 reference voltage in the time t1, the first comparator CMP1 in the capacitance detection circuit cannot be turned high, cl_ok is always low, and the system does not start the switching operation.
Fig. 9 shows a working waveform diagram of the capacitance detection circuit under the condition that no battery load exists and the first capacitor C1 is short-circuited, at this time, the VOUT output end has no initial voltage, the CL end is pulled down below VREF1 by the first current source, cl_ok is set to 1, drv4 is opened, the fourth switching tube Q4 is opened, the second current source I2 is opened, CH and CL are short-circuited, then Q4 is opened to ground, CH cannot reach VREF2 reference voltage in T2 due to limited capability of the second current source I2, ch_fault=0, the detection circuit enters a third stage, the second current source I2 continues to charge CH, CH cannot reach VREF3 voltage in T3 time, the third comparator CMP3 cannot overturn, ch_ok is constant 0, and the system does not start switching action.
Fig. 10 shows a working waveform diagram of a capacitor detection circuit under the condition that a first capacitor C1 is opened, a load battery is connected to a system at this moment, the circuit firstly enters a first stage CL node for detection, the voltage of the CL node is quickly pulled down to VREF1 after the first stage starts a first current source I1 due to the fact that the capacitor between CH and CL is opened, a first comparator CMP1 is set high, cl_ok is high, the detection circuit enters a second stage, a second current source I2 of the CH node is opened, the voltage of the CH node is quickly charged up to VREF2 during a time t2 due to the fact that the first capacitor C1 is opened, a second comparator CMP2 is turned over, the ch_fault is set high, the system does not perform a third stage detection any more, a ch_ok signal is always low, the system does not start a switching action, and similarly, the working waveform is similar to the working waveform of fig. 10 under the application of not receiving a battery load, except that the initial node voltages of CH and CL are in an indefinite state.
The embodiment of the application also provides a capacitance detection device, which comprises a circuit board and the capacitance detection circuit according to any one of the previous embodiments.
The embodiment of the application also provides capacitance detection equipment, and the capacitance detection device comprises a shell and the capacitance detection circuit in the previous embodiment.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present application is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present application.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, such as the division of the units, merely a logical function division, and there may be additional manners of dividing the actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, or may be in electrical or other forms.
The foregoing has outlined rather broadly the more detailed description of embodiments of the application, wherein the principles and embodiments of the application are explained in detail using specific examples, the above examples being provided solely to facilitate the understanding of the method and core concepts of the application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.
Claims (9)
1. A capacitance detection circuit is characterized in that,
the detection circuit includes: the driving sub-circuit, the first switching tube Q1, the second switching tube Q2, the third switching tube Q3, the fourth switching tube Q4, the first capacitor C1, the second capacitor C2, the first resistor R1, the detecting sub-circuit and the battery, wherein,
the drain electrode of the first switch tube Q1 is connected with the power input port, the grid electrode of the first switch tube Q1 is connected with the first control port of the driving sub-circuit, the source electrode of the first switch tube Q1 is connected with the drain electrode of the second switch tube Q2, the first port of the detection module and the upper polar plate of the first capacitor C1, the grid electrode of the second switch tube Q2 is connected with the second control port of the driving sub-circuit, the source electrode of the second switch tube Q2 is connected with the drain electrode of the third switch tube Q3, the first end of the first resistor R1 and the first end of the battery, the grid electrode of the third switch tube Q3 is connected with the third control port of the driving sub-circuit, the source electrode of the third switch tube Q3 is connected with the drain electrode of the fourth switch tube Q4, the second port of the detection module and the lower polar plate of the first capacitor C1, the grid electrode of the fourth switch tube Q4 is connected with the fourth control port of the fourth switch tube Q4,
the second end of the first resistor R1 is connected with the first end of the second capacitor C2, and the second end of the second capacitor C2 is grounded.
2. The capacitance detection circuit according to claim 1, wherein the detection sub-circuit includes: a first current source, a second current source, a first comparator, a second comparator, a third comparator, a first timer, a second timer, a third timer, wherein,
the inverting terminal of the first comparator is connected with the lower polar plate of the first capacitor C1 and the first terminal of the first current source, the non-inverting terminal of the first comparator is used for receiving a first reference signal, the output port of the first comparator is connected with the S port of the first RS trigger, the R port of the first RS trigger is connected with the output port of the first timer, and the second terminal of the first current source is grounded;
the positive end of the second comparator is connected with the upper polar plate of the first capacitor C1, the first end of the second current source and the positive end of the third comparator, the negative end of the second comparator is used for receiving a second reference signal, the output end of the second comparator is connected with the S port of the second RS trigger, and the R port of the second RS trigger is connected with the output port of the second timer;
the inverting terminal of the third comparator is used for receiving a third reference signal, the output port of the third comparator is connected with the S port of the third RS trigger, and the R port of the third RS trigger is connected with the third timer.
3. The capacitance detection circuit according to claim 1 or 2, further comprising a second resistor R2, a first end of the second resistor R2 being connected to a first end of the first resistor R1, and a second end of the second resistor R2 being connected to a first end of the battery.
4. A capacitance sensing circuit according to claim 3, further comprising a temperature sensing sub-circuit connected to the battery for sensing the temperature of the battery.
5. The capacitance detection circuit according to claim 3, further comprising: and the protection sub-circuit is used for protecting the capacitance detection circuit when strong voltage appears in the circuit.
6. The capacitance detection circuit according to claim 5, wherein the protection sub-circuit includes: a first zener diode D1, a second zener diode D2, a third capacitor C3, and a fourth capacitor C4, wherein,
the first end of the first zener diode D1 is connected to the drain electrode of the first switching tube Q1, the second end of the first zener diode D1 is connected to the first end of the second zener diode D2, the second end of the second zener diode D2 is connected to the first end of the third capacitor C3 and the first end of the fourth capacitor C4, the second end of the third capacitor C3 is grounded, and the second end of the fourth capacitor C4 is grounded.
7. The capacitance detection circuit according to claim 6, further comprising a fourth resistor R4 and a sixth capacitor C6, wherein a first end of the fourth resistor R4 is connected to the first output port of the driving sub-circuit, a second end of the fourth resistor R4 is connected to the gate of the first switching tube Q1 and a first end of the sixth capacitor C6, and a second end of the sixth capacitor C6 is grounded.
8. A capacitance detecting device, characterized in that the capacitance detecting device comprises a circuit board and a capacitance detecting circuit according to any one of claims 1 to 7.
9. A capacitance detecting apparatus, characterized in that the capacitance detecting device comprises a housing and the capacitance detecting device according to claim 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211007986.6A CN116973650A (en) | 2022-04-22 | 2022-04-22 | Capacitance detection circuit with high detection accuracy, related device and equipment |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211007986.6A CN116973650A (en) | 2022-04-22 | 2022-04-22 | Capacitance detection circuit with high detection accuracy, related device and equipment |
| CN202210428791.2A CN114527407B (en) | 2022-04-22 | 2022-04-22 | Capacitance detection circuit, device and equipment |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN202210428791.2A Division CN114527407B (en) | 2022-04-22 | 2022-04-22 | Capacitance detection circuit, device and equipment |
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| CN116973650A true CN116973650A (en) | 2023-10-31 |
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| CN202210428791.2A Active CN114527407B (en) | 2022-04-22 | 2022-04-22 | Capacitance detection circuit, device and equipment |
| CN202211007986.6A Pending CN116973650A (en) | 2022-04-22 | 2022-04-22 | Capacitance detection circuit with high detection accuracy, related device and equipment |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202210428791.2A Active CN114527407B (en) | 2022-04-22 | 2022-04-22 | Capacitance detection circuit, device and equipment |
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| WO (1) | WO2023202690A1 (en) |
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| CN114527407B (en) * | 2022-04-22 | 2022-07-08 | 深圳英集芯科技股份有限公司 | Capacitance detection circuit, device and equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| EP1863164A1 (en) * | 2006-05-30 | 2007-12-05 | STMicroelectronics S.r.l. | Enhancement of the efficiency of energy recovery during spindle motor step-up phase for parking the R/W head of a disk storage device upon external supply failure |
| US7460441B2 (en) * | 2007-01-12 | 2008-12-02 | Microchip Technology Incorporated | Measuring a long time period |
| CN201352762Y (en) * | 2008-12-31 | 2009-11-25 | 西南交通大学 | Multi-level impulse sequence control device for switch power supply in pseudo continuous work mode |
| TWI485410B (en) * | 2012-12-03 | 2015-05-21 | Anpec Electronics Corp | Bootstrap capacitor detecting circuit and bootstrap dc-dc converter thereof |
| US9484799B2 (en) * | 2014-01-17 | 2016-11-01 | Linear Technology Corporation | Switched capacitor DC-DC converter with reduced in-rush current and fault protection |
| US10447154B2 (en) * | 2017-07-14 | 2019-10-15 | Renesas Electronics America Inc. | PWM control scheme for providing minimum on time |
| CN109802560A (en) * | 2018-12-27 | 2019-05-24 | 南京矽力杰半导体技术有限公司 | Switching capacitors and its control method |
| US11340265B2 (en) * | 2019-10-01 | 2022-05-24 | Silego Technology Inc. | Circuit and method for real time detection of a faulty capacitor |
| US20210140798A1 (en) * | 2019-11-12 | 2021-05-13 | Hamilton Sundstrand Corporation | Determining a rotational direction of a resolver |
| CN113890354B (en) * | 2020-07-03 | 2024-04-09 | 华为技术有限公司 | Resonant switch capacitor circuit and electronic equipment |
| CN113612385B (en) * | 2021-07-07 | 2022-12-30 | 上海伏达半导体有限公司 | Capacitance calculation device, method and system |
| CN114527407B (en) * | 2022-04-22 | 2022-07-08 | 深圳英集芯科技股份有限公司 | Capacitance detection circuit, device and equipment |
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2022
- 2022-04-22 CN CN202210428791.2A patent/CN114527407B/en active Active
- 2022-04-22 CN CN202211007986.6A patent/CN116973650A/en active Pending
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| WO2023202690A1 (en) | 2023-10-26 |
| CN114527407A (en) | 2022-05-24 |
| CN114527407B (en) | 2022-07-08 |
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