CN116962125A - Feedforward equalizer circuit with adjustable tap frequency response - Google Patents
Feedforward equalizer circuit with adjustable tap frequency response Download PDFInfo
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- CN116962125A CN116962125A CN202310715096.9A CN202310715096A CN116962125A CN 116962125 A CN116962125 A CN 116962125A CN 202310715096 A CN202310715096 A CN 202310715096A CN 116962125 A CN116962125 A CN 116962125A
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- 230000005540 biological transmission Effects 0.000 claims description 2
- 230000007850 degeneration Effects 0.000 claims description 2
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
- H04L2025/03439—Fixed structures
- H04L2025/03445—Time domain
- H04L2025/03471—Tapped delay lines
- H04L2025/03484—Tapped delay lines time-recursive
- H04L2025/03496—Tapped delay lines time-recursive as a prediction filter
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Abstract
The invention relates to a feedforward equalizer circuit with adjustable tap frequency response, which comprises N transconductance amplifiers with adjustable frequency response, N-1 input signal delay units, an input end resistor, an output end resistor and N-1 output signal delay units. The input signal VI passes through the multi-stage input signal delay unit and enters the 1 st to the N th transconductance amplifiers, the output signals of the transconductance amplifiers pass through the multi-stage output signal delay unit, the input signals to the output signals have N different delays, and the signal gain corresponding to each delay is adjustable, so that the function of the feedforward equalizer is realized; by adjusting the morphology of the frequency response of the transconductance amplifier, the frequency response of the feedforward equalizer as a whole is also changed until the desired frequency response requirement is met. The invention can directly adjust the frequency response form of each transconductance amplifier, can avoid using a large number of transconductance amplifiers and delay units when adjusting low frequency response, and reduces the power consumption and area of the circuit.
Description
Technical Field
The invention belongs to the technical field of electronics, in particular to the field of high-speed interface integrated circuits, and relates to a feedforward equalizer circuit with adjustable tap frequency response.
Background
The feedforward equalizer delays an input signal, distributes the delayed signal to each tap, configures each tap gain, and performs weighted summation on the delayed signal to construct a specified frequency response. Are commonly used in transmitters and receivers for high-speed interface circuits.
A conventional feed forward equalizer circuit is shown in fig. 1. The circuit comprises a transconductance amplifier 101, an input signal delay unit 102, an input end resistor 103, an output end resistor 104 and an output signal delay unit 108. Taking four taps as an example, 3 input signal delay units 102 delay the input signal VI by 0, 1, 2 and 3 units of delay TD (Time Delay), respectively, and convert the four voltage signals into current through four transconductance amplifiers 101, and then sum the current signals through 3 output signal delay units to generate the output voltage VO. The transconductance amplifier 101 may take the typical configuration of a common source differential amplifier including NMOS transistors 105, 106 and a controllable current source 107. By adjusting the current level of the controllable current source 107, the gain of each transconductance amplifier can be controlled, thereby adjusting the frequency response of the feedforward equalizer as a whole. Fig. 4 shows a frequency response of the transconductance amplifier, where the frequency response is curve 401 and the frequency response is curve 402 when the current is small, and increasing the current increases the transconductance. However, increasing the current can only adjust the gain, and cannot adjust the morphology of the frequency response.
Thus, to achieve feed forward equalizer frequency response adjustment, it can only be achieved by adjusting the gain of the transconductance amplifier for different signal delays. The tuning range of the frequency response of such a feed forward equalizer circuit is limited by the number of transconductance amplifier 101 and delay elements 102, 108. If the frequency response of the low frequency is to be adjusted, a plurality of delay units 102, 108 are required to make the total delay comparable to the period of the low frequency signal, which results in a high power consumption and large area of the feedforward equalizer circuit.
Disclosure of Invention
In order to reduce the power consumption and the area of the feedforward equalizer circuit, the invention provides the feedforward equalizer circuit with adjustable tap frequency response.
The technical scheme adopted by the invention is as follows:
a feedforward equalizer circuit with adjustable tap frequency response comprises N transconductance amplifiers with adjustable frequency response, N-1 input signal delay units, an input end resistor, an output end resistor and N-1 output signal delay units; the input signal VI is connected to one end of an input end resistor through N-1 input signal delay units, and the other end of the input end resistor is grounded; the input end of the 1 st input signal delay unit is connected with the input end of the 1 st transconductance amplifier, and the output ends of the 1 st, 2 nd and … … th and N-1 st input signal delay units are connected with the input ends of the 2 nd, 3 rd, … … th and N th transconductance amplifiers; the input end of the N-1 output signal delay unit is connected to the output end of the N transconductance amplifier and one end of an output end resistor, and the other end of the output end resistor is connected with a power supply; the input ends of the N-2 th, N-3 rd, … … th and 1 st output signal delay units are respectively connected with the output ends of the N-1 th, N-2 nd, … … nd and 2 nd output signal delay units, and the output ends of the N-1 th, N-2 nd, … … nd transconductance amplifiers; the output end of the 1 st output signal delay unit is connected with the output end of the 1 st transconductance amplifier to generate an output signal VO.
Further, the number of input signal delay cells may be 1 or more, i.e. at least 1.
Further, the number of output signal delay units may be 1 or more, i.e. at least 1.
Further, the delay value provided by each of the input signal delay units and the output signal delay units may be equal to any time and need not be the same.
Further, the number of transconductance amplifiers may be 2 or more, i.e. at least 2.
Further, the input signal delay unit and the output signal delay unit may be embodied as a transmission line, an lc-based delay line, or an amplifier-based delay unit.
Further, the input end resistor is grounded, and one end of the input end resistor can be connected with any voltage.
Further, the output end resistor is connected with one end of the power supply, and can also be connected with any voltage.
Further, the transconductance amplifier with adjustable frequency response adopts a transconductance amplifier circuit with a low-frequency channel, and comprises a first controllable current source, a second controllable current source, two controllable resistors, a controllable capacitor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor and a fourth NMOS transistor; the gates of the first NMOS transistor and the second NMOS transistor are respectively connected with a negative end VIN and a positive end VIP of an input differential voltage signal, and the sources are connected with one end of a first controllable current source; the other end of the first controllable current source is grounded; one end of each controllable resistor is respectively connected with a positive terminal VIP and a negative terminal VIN of an input differential voltage signal, and the other end of each controllable resistor is respectively connected with the gates of the third NMOS transistor and the fourth NMOS transistor; the two ends of the controllable capacitor are also connected with the grid electrodes of the third NMOS transistor and the fourth NMOS transistor respectively; the sources of the third NMOS transistor and the fourth NMOS transistor are connected with one end of a second controllable current source; the other end of the second controllable current source is grounded; the drains of the first NMOS transistor and the second NMOS transistor are respectively connected with the drains of the third NMOS transistor and the fourth NMOS transistor, and the drains are respectively used as a negative end ION and a positive end IOP of the differential current signal output by the transconductance amplifier with adjustable frequency response.
Further, the tunable frequency response transconductance amplifier employs a source resistance-capacitance degeneration based transconductance amplifier comprising: the first NMOS transistor, the second NMOS transistor, the controllable capacitor, the controllable resistor, the first controllable current source and the second controllable current source; the gates of the first NMOS transistor and the second NMOS transistor are respectively connected with a negative end VIN and a positive end VIP of an input differential voltage signal, the sources of the first NMOS transistor and the second NMOS transistor are respectively connected with one ends of a first controllable current source and a second controllable current source, and the drains of the first NMOS transistor and the second NMOS transistor are respectively a negative end ION and a positive end IOP of an output differential current signal of the transconductance amplifier with adjustable frequency response; the other ends of the first controllable current source and the second controllable current source are grounded; two ends of the controllable capacitor are respectively connected with the sources of the first NMOS transistor and the second NMOS transistor; the two ends of the controllable resistor are respectively connected with the sources of the first NMOS transistor and the second NMOS transistor.
Further, the feedforward equalizer circuit with adjustable tap frequency response provided by the invention can be in the form of a single-ended circuit as shown in fig. 2 or a differential circuit.
The beneficial effects of the invention are as follows:
the feedforward equalizer circuit with adjustable tap frequency response can directly adjust the frequency response form of each transconductance amplifier, and can avoid using a large number of transconductance amplifiers and delay units when adjusting low-frequency response, thereby reducing the power consumption and the area of the circuit.
Drawings
Fig. 1 is a circuit diagram of a conventional feedforward equalizer circuit.
Fig. 2 is a circuit diagram of a feedforward equalizer circuit with an adjustable tap frequency response according to the present invention.
Fig. 3 is a circuit diagram of a feed forward equalizer circuit using a transconductance amplifier including a low frequency path, in accordance with a preferred embodiment of the present invention.
Fig. 4 is a frequency response diagram of the transconductance amplifiers 101, 301, 600 when only the gain is adjusted.
Fig. 5 is a frequency response diagram of transconductance amplifiers 301, 600 when adjusting the frequency response pattern.
Fig. 6 is a circuit diagram of a transconductance amplifier based on source resistance-capacitance degradation.
Description of main reference numerals:
100: traditional feedforward equalizer circuit
101: common-source differential transconductance amplifier
201: transconductance amplifier
301: transconductance amplifier with low frequency path
600: transconductance amplifier based on source resistance-capacitance degradation
102. 202, 302: input signal delay unit
108. 205, 313: output signal delay unit
103. 104, 203, 204, 303, 304: resistor
105. 106, 307, 308, 309, 310, 601, 602: NMOS transistor
107. 305, 306: controllable current source
200: the feedforward equalizer circuit with adjustable tap frequency response
300: feedforward equalizer circuit using transconductance amplifier with low frequency path
311. 604: controllable resistor
312. 603: controllable capacitor
VI: input voltage signal
VO: output voltage signal
VIP: input differential voltage signal positive terminal
VIN: negative terminal of input differential voltage signal
IOP: positive terminal for outputting differential current signal
ION: negative terminal for outputting differential current signal
VLP: input differential voltage signal positive terminal after low-pass filtering
VLN: negative terminal of input differential voltage signal after low-pass filtering
Detailed Description
The invention will be further described with reference to the accompanying drawings.
The invention provides a feedforward equalizer circuit 200 with adjustable tap frequency response, which comprises N (N is an integer greater than or equal to 2) transconductance amplifiers 201 with adjustable frequency response, N-1 input signal delay units 202, an input end resistor 203, an output end resistor 204 and N-1 output signal delay units 205, as shown in fig. 2. The input signal VI is connected to one end of the input resistor 203 through the multi-stage input signal delay unit 202, and the other end of the input resistor 203 is grounded. The input end of the 1 st input signal delay unit is connected with the input end of the 1 st transconductance amplifier, and the output ends of the 1 st, 2 nd and … … th and N-1 st input signal delay units are connected with the input ends of the 2 nd, 3 rd, … … th and N th transconductance amplifiers. The input of the N-1 th output signal delay unit is connected to the output of the N-th transconductance amplifier and to one end of the output resistor 204. The other end of the output resistor 204 is connected to a power supply. The input ends of the N-2 th, N-3 rd, … … th and 1 st output signal delay units are respectively connected with the output ends of the N-1 th, N-2 nd, … … nd and 2 nd output signal delay units, and the output ends of the N-1 th, N-2 nd, … … nd transconductance amplifiers. The output end of the 1 st output signal delay unit is connected with the output end of the 1 st transconductance amplifier to generate an output signal VO. The transconductance amplifier 201 has a function of adjusting the frequency response pattern in addition to the gain.
The working principle of the invention is as follows: the input signal VI is delayed by 0, TD, 2×td, … …, (N-1) TD times respectively by the multi-stage input signal delay unit 202, and enters the 1 st, 2 nd, … … th and nth transconductance amplifiers 203. The output signals of the 1 st, 2 nd, … … th and nth transconductance amplifiers are delayed by 0, TD, 2×td, … …, (N-1) time, respectively, by the multi-stage output signal delay unit 205. In this way, the input signal and the output signal have N different delays of 0, 2×td, 4×td, … …, (2*N-2) TD, and the signal gain corresponding to each delay is adjustable, so that the function of the feedforward equalizer is realized. The transconductance amplifier 201 has the function of adjusting the frequency response in addition to the gain, and by adjusting the frequency response of the transconductance amplifier 201, the overall frequency response of the feedforward equalizer is changed until the desired frequency response requirement is met.
Fig. 3 is a circuit diagram of a feed forward equalizer circuit of a transconductance amplifier including a low frequency path, in accordance with a preferred embodiment of the present invention. The transconductance amplifier 301 with adjustable frequency response employs a transconductance amplifier circuit with a low frequency path including controllable current sources 305, 306, controllable resistor 311, controllable capacitor 312, nmos transistors 307, 308, 309 and 310. The gates of the NMOS transistors 307, 308 are connected to the negative terminal VIN and the positive terminal VIP of the input differential voltage signal, respectively, and the sources are connected to one end of the controllable current source 305. The other end of the controllable current source 305 is grounded. One end of the two controllable resistors 311 is respectively connected to the positive terminal VIP and the negative terminal VIN of the input differential voltage signal, and the other end is respectively connected to the gates of the NMOS transistors 309 and 310. The two ends of the controllable capacitor 312 are also connected to the gates of the NMOS transistors 309 and 310, respectively. The sources of the NMOS transistors 309, 310 are both connected to one terminal of the controllable current source 306. The other end of the controllable current source 306 is grounded. The drains of NMOS transistors 307, 308 are connected to the drains of NMOS transistors 309, 310, respectively, and transconductance amplifier 301, which is the tunable frequency response, outputs a negative terminal ION and a positive terminal IOP of the differential current signal, respectively.
The principle of operation of the tunable frequency response transconductance amplifier 301 is: by adjusting the current level of the controllable current source 305, the gain of the transconductance amplifier can be controlled, thereby achieving tap gain adjustment of the feedforward equalizer. As shown in fig. 4, the gain is lower when the output current of the controllable current source 305 is smaller, the gain is higher when the output current is larger, as shown in a frequency response curve 401, and the frequency response curve is shown in a curve 402. In addition to controlling the gain, the frequency response of the transconductance amplifier may be directly adjusted by adjusting the values of the controllable resistor 311, the controllable capacitor 312, and the controllable current source 306. As shown in fig. 5, when the output current of the controllable current source 306 is adjusted from large to small, the frequency response is shown by curves 501, 502, 503, respectively; the frequency response is shown by curves 504, 505, 506 when the product of controllable resistor 311 and controllable capacitor 312 is adjusted from large to small; when the frequency response of the transconductance amplifier 301 is adjusted, the overall frequency response of the feedforward equalizer 300 also changes. Adjusting the controllable resistor 307 and controllable capacitor 308 in the transconductance amplifier 301 of any one stage alone can significantly adjust the low frequency response of the feedforward equalizer 300, avoiding the use of a large number of transconductance amplifiers and delay cells.
In the transconductance amplifier 301, only the controllable resistor 311 may be provided, and the controllable capacitor 312 may be omitted without the controllable capacitor 312.
In the transconductance amplifier 301, the controllable resistor 311 may be replaced by a fixed resistor.
In the transconductance amplifier 301, the controllable capacitor 312 may be replaced by a fixed capacitor.
In the transconductance amplifier 301, the current sources 305 and 306 may output only a fixed current value.
In the present invention, the transconductance amplifier 301 may not only adopt the circuit configuration shown in fig. 3, but also other amplifiers having an adjustable frequency response. For example:
fig. 6 is a transconductance amplifier 600 based on source resistance-capacitance degradation, comprising: NMOS transistors 601, 602, controllable capacitance 603, controllable resistance 604, controllable current sources 605, 606. The connection relation among the parts is as follows: the gates of the NMOS transistors 601 and 602 are respectively connected to the negative terminal VIN and the positive terminal VIP of the input differential voltage signal, the sources are respectively connected to one ends of the controllable current sources 605 and 606, and the drains are respectively connected to the negative terminal ION and the positive terminal IOP of the output differential current signal of the transconductance amplifier 600 with adjustable frequency response. The other ends of the controllable current sources 605, 606 are grounded. Both ends of the controllable capacitor 603 are connected to the sources of the NMOS transistors 601 and 602, respectively. Both ends of the controllable resistor 604 are respectively connected with the sources of the NMOS transistors 601 and 602.
The operational principle of the tunable frequency response transconductance amplifier 600 is: by adjusting the current levels of the controllable current sources 605, 606, the gain of the transconductance amplifier can be controlled, but the frequency response morphology is kept unchanged, as shown in fig. 4: the controllable current sources 605, 606 have lower gains when the output current is smaller, as shown by the frequency response curve 401, and higher gains when the output current is larger, as shown by the frequency response curve 402. By adjusting the controllable resistor 603, the controllable capacitor 604, the frequency response of the transconductance amplifier can be directly adjusted, as shown in fig. 5: the controllable resistance 603 is adjusted from large to small, and the frequency response is shown by curves 501, 502 and 503 respectively; the controllable capacitance 604 is adjusted up to a small value and the frequency response is shown by curves 504, 505, 506, respectively.
The above-disclosed embodiments of the present invention are intended to aid in understanding the contents of the present invention and to enable the same to be carried into practice, and it will be understood by those of ordinary skill in the art that various alternatives, variations and modifications are possible without departing from the spirit and scope of the invention. The invention should not be limited to what has been disclosed in the examples of the specification, but rather by the scope of the invention as defined in the claims.
Claims (10)
1. The feedforward equalizer circuit with adjustable tap frequency response is characterized by comprising N transconductance amplifiers with adjustable frequency response, N-1 input signal delay units, an input end resistor, an output end resistor and N-1 output signal delay units; the input signal VI is connected to one end of an input end resistor through N-1 input signal delay units, and the other end of the input end resistor is grounded; the input end of the 1 st input signal delay unit is connected with the input end of the 1 st transconductance amplifier, and the output ends of the 1 st, 2 nd and … … th and N-1 st input signal delay units are connected with the input ends of the 2 nd, 3 rd, … … th and N th transconductance amplifiers; the input end of the N-1 output signal delay unit is connected to the output end of the N transconductance amplifier and one end of an output end resistor, and the other end of the output end resistor is connected with a power supply; the input ends of the N-2 th, N-3 rd, … … th and 1 st output signal delay units are respectively connected with the output ends of the N-1 th, N-2 nd, … … nd and 2 nd output signal delay units, and the output ends of the N-1 th, N-2 nd, … … nd transconductance amplifiers; the output end of the 1 st output signal delay unit is connected with the output end of the 1 st transconductance amplifier to generate an output signal VO.
2. The feedforward equalizer circuit of claim 1, wherein the input signal VI is delayed by 0, TD, 2 x TD, … …, (N-1) x TD times, respectively, through a plurality of stages of input signal delay units, into the 1 st, 2 nd, … … th, nth transconductance amplifier; the output signals of the 1 st, 2 nd, … … th and N th transconductance amplifiers are respectively delayed by 0, TD, 2 x TD, … …, (N-1) x TD time through a multi-stage output signal delay unit; the input signal and the output signal have N different delays of 0, 2, 4, … …, (2*N-2) TD, and the signal gain corresponding to each delay is adjustable, so that the function of the feedforward equalizer is realized; the transconductance amplifier with adjustable frequency response has the functions of adjustable gain and adjustable frequency response form, and the frequency response of the whole feedforward equalizer is changed along with the regulation of the frequency response form of the transconductance amplifier until the required frequency response requirement is met.
3. The adjustable tap frequency response feedforward equalizer circuit of claim 1, wherein the number of input signal delay elements is at least 1; the number of output signal delay units is at least 1.
4. The tunable tap frequency response feedforward equalizer circuit of claim 1, wherein the number of tunable frequency response transconductance amplifiers is at least 2.
5. The adjustable tap frequency response feedforward equalizer circuit of claim 1, wherein the input signal delay element and the output signal delay element are implemented as a transmission line, an lc-based delay line, or an amplifier-based delay element.
6. The adjustable tap frequency response feedforward equalizer circuit of claim 1, wherein one end of the input terminal resistor to ground is capable of receiving any voltage; one end of the output end resistor connected with the power supply can be connected with any voltage.
7. The feedforward equalizer circuit of claim 1, wherein the transconductance amplifier of the adjustable tap frequency response uses a transconductance amplifier circuit with a low frequency path, including a first controllable current source, a second controllable current source, two controllable resistors, a controllable capacitance, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, and a fourth NMOS transistor; the gates of the first NMOS transistor and the second NMOS transistor are respectively connected with a negative end VIN and a positive end VIP of an input differential voltage signal, and the sources are connected with one end of a first controllable current source; the other end of the first controllable current source is grounded; one end of each controllable resistor is respectively connected with a positive terminal VIP and a negative terminal VIN of an input differential voltage signal, and the other end of each controllable resistor is respectively connected with the gates of the third NMOS transistor and the fourth NMOS transistor; the two ends of the controllable capacitor are also connected with the grid electrodes of the third NMOS transistor and the fourth NMOS transistor respectively; the sources of the third NMOS transistor and the fourth NMOS transistor are connected with one end of a second controllable current source; the other end of the second controllable current source is grounded; the drains of the first NMOS transistor and the second NMOS transistor are respectively connected with the drains of the third NMOS transistor and the fourth NMOS transistor, and the drains are respectively used as a negative end ION and a positive end IOP of the differential current signal output by the transconductance amplifier with adjustable frequency response.
8. The tunable tap frequency response feedforward equalizer circuit of claim 1, wherein the tunable frequency response transconductance amplifier removes a controllable capacitance; alternatively, the controllable resistance is replaced by a fixed resistance; alternatively, the controllable capacitance is replaced by a fixed capacitance; or the first controllable current source and the second controllable current source only output fixed current values.
9. The tunable tap frequency response feedforward equalizer circuit of claim 1, wherein the tunable frequency response transconductance amplifier employs a source resistance-capacitance degeneration based transconductance amplifier, comprising: the first NMOS transistor, the second NMOS transistor, the controllable capacitor, the controllable resistor, the first controllable current source and the second controllable current source; the gates of the first NMOS transistor and the second NMOS transistor are respectively connected with a negative end VIN and a positive end VIP of an input differential voltage signal, the sources of the first NMOS transistor and the second NMOS transistor are respectively connected with one ends of a first controllable current source and a second controllable current source, and the drains of the first NMOS transistor and the second NMOS transistor are respectively a negative end ION and a positive end IOP of an output differential current signal of the transconductance amplifier with adjustable frequency response; the other ends of the first controllable current source and the second controllable current source are grounded; two ends of the controllable capacitor are respectively connected with the sources of the first NMOS transistor and the second NMOS transistor; the two ends of the controllable resistor are respectively connected with the sources of the first NMOS transistor and the second NMOS transistor.
10. The adjustable tap frequency responsive feedforward equalizer circuit of claim 1, wherein the adjustable tap frequency responsive feedforward equalizer circuit is in the form of a single-ended circuit or a differential circuit.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2023101501919 | 2023-02-13 | ||
| CN202310150191 | 2023-02-13 |
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| Publication Number | Publication Date |
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| CN116962125A true CN116962125A (en) | 2023-10-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310715096.9A Pending CN116962125A (en) | 2023-02-13 | 2023-06-15 | Feedforward equalizer circuit with adjustable tap frequency response |
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- 2023-06-15 CN CN202310715096.9A patent/CN116962125A/en active Pending
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