CN116961612A - Piezoelectric resonator and preparation method thereof - Google Patents
Piezoelectric resonator and preparation method thereof Download PDFInfo
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- CN116961612A CN116961612A CN202310677828.XA CN202310677828A CN116961612A CN 116961612 A CN116961612 A CN 116961612A CN 202310677828 A CN202310677828 A CN 202310677828A CN 116961612 A CN116961612 A CN 116961612A
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/02244—Details of microelectro-mechanical resonators
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/125—Driving means, e.g. electrodes, coils
- H03H9/13—Driving means, e.g. electrodes, coils for networks consisting of piezoelectric or electrostrictive materials
- H03H9/131—Driving means, e.g. electrodes, coils for networks consisting of piezoelectric or electrostrictive materials consisting of a multilayered structure
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
- H03H2003/027—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the microelectro-mechanical [MEMS] type
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- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Abstract
The application provides a piezoelectric resonator and a preparation method thereof, wherein the piezoelectric resonator comprises a resonance area and a beam area distributed along an extension surface, and the piezoelectric resonator comprises: the substrate comprises a cavity corresponding to the resonance area and the beam area and a through hole corresponding to the resonance area, and the through hole is communicated with the cavity and the external space; and the piezoelectric assembly is arranged on the substrate corresponding to the beam region. By the mode, the structure of the piezoelectric resonator is simplified, and therefore the manufacturing cost of the piezoelectric resonator is reduced.
Description
Technical Field
The application relates to the technical field of micro-electromechanical systems, in particular to a piezoelectric resonator and a preparation method thereof.
Background
MEMS (Micro-Electro-Mechanical System, microelectromechanical systems) piezoelectric resonators are small electromechanical structures that vibrate at high frequencies and are commonly used for timing reference, signal filtering, mass sensing, biosensing, motion sensing, and other applications, with the rapid development of microelectromechanical technology, piezoelectric resonators are becoming increasingly popular.
The MEMS piezoelectric resonator is mostly a planar resonator, a cantilever connection beam and an anchor point, wherein in order to realize stable and efficient release of the resonator, etching Holes (Etch Holes) arranged in an array are also required to be designed on the surface of the resonator. However, for common piezoelectric resonator designs, the presence of etched holes will greatly reduce the effective area of the piezoelectric material on the resonator surface, thereby affecting the performance of the resonator. To avoid the impact of etching holes on the performance of conventional piezoelectric resonators, more complex process implementations, such as backside dry etching (DRIE) or Fusion Bonding (Fusion Bonding) of the device layer, are generally required, resulting in increased production costs.
Disclosure of Invention
The application mainly aims to provide a piezoelectric resonator and a preparation method thereof, which are used for solving the problems of complex structure and complex process of the piezoelectric resonator caused by improving the performance of the resonator in the related technology.
In order to solve the above-described problems, the present application provides a piezoelectric resonator device including a resonance region and a beam region distributed along an extension plane, the piezoelectric resonator including: the substrate comprises a cavity corresponding to the resonance area and the beam area and a through hole corresponding to the resonance area, and the through hole is communicated with the cavity and the external space; and the piezoelectric assembly is arranged on the substrate corresponding to the beam region.
In one embodiment, the substrate includes a substrate, an insulating layer, and a semiconductor layer sequentially stacked, the insulating layer includes a cavity corresponding to the resonant region and the beam region, the semiconductor layer includes a via corresponding to the resonant region, and the piezoelectric component is disposed on the semiconductor layer corresponding to the beam region.
In one embodiment, the number of beam regions is a plurality, and the plurality of beam regions are distributed around the resonance region.
In one embodiment, the resonant area is polygonal; the beam areas are symmetrically distributed on two opposite sides of the resonance area, which are parallel to each other, and are connected with one side of the resonance area and extend along the direction perpendicular to the two opposite sides of the resonance area and far away from the resonance area; or a plurality of beam areas are symmetrically distributed at two opposite angles of the resonance area along the diagonal line, and the beam areas are connected with one corner of the resonance area and extend along the diagonal line of the resonance area and away from the resonance area.
In an embodiment, the resonance region is an octagon comprising four long sides and four short sides alternately connected; the plurality of beam regions are symmetrically distributed on two opposite short sides of the resonance region, which are parallel to each other.
In one embodiment, the resonant area is circular; the beam areas are symmetrically distributed on two opposite sides of the resonance area along the diameter direction, are connected with the resonance area, and extend along the diameter of the resonance area and away from the resonance area.
In one embodiment, a piezoelectric assembly includes: a first electrode disposed on the substrate corresponding to the beam region; a piezoelectric structure disposed on the first electrode; and the second electrode is arranged on the piezoelectric structure.
In order to solve the above problems, the present application also provides a method of manufacturing a piezoelectric resonator including a resonance region and a beam region distributed along an extension plane, the method comprising: providing a substrate; forming a piezoelectric assembly on a substrate corresponding to the beam region; and forming a cavity on the substrate corresponding to the resonance area and the beam area, and forming a through hole on the substrate corresponding to the resonance area, wherein the through hole is communicated with the cavity and the external space.
In one embodiment, the base includes a substrate, an insulating layer, and a semiconductor layer stacked in this order, and the piezoelectric element is formed on the base corresponding to the beam region; forming a cavity on the substrate corresponding to the resonance region and the beam region, and forming a through hole on the substrate corresponding to the resonance region, the through hole communicating the cavity with an external space, comprising: forming a piezoelectric layer on the semiconductor layer; etching the piezoelectric layer to form at least one piezoelectric component on the semiconductor layer corresponding to the beam region; etching the semiconductor layer to form a plurality of through holes on the semiconductor layer corresponding to the resonance regions; the insulating layer is etched to form cavities on the insulating layer corresponding to the resonant region and the beam region.
The present application provides a piezoelectric resonator including a resonance region and a beam region distributed along an extension plane, the piezoelectric resonator including: the substrate comprises a cavity corresponding to the resonance area and the beam area and a through hole corresponding to the resonance area, and the through hole is communicated with the cavity and the external space; and the piezoelectric assembly is arranged on the substrate corresponding to the beam region. By the mode, the piezoelectric component of the piezoelectric resonator is only arranged in the beam structure area but not in the resonance area, so that the structure of the piezoelectric resonator is simplified, and the influence of the etching holes on the piezoelectric performance of the resonance structure is effectively reduced. In one embodiment, the substrate includes a substrate, an insulating layer and a semiconductor layer which are sequentially stacked, so that the substrate can be manufactured by an SOI process, and a standard SOI process flow is the earliest established and most mature process flow of a micro-electromechanical system foundry, university related profession and research institution.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic three-dimensional structure of an embodiment of a piezoelectric resonator according to the present application;
FIG. 2 is a schematic cross-sectional view of the structure of FIG. 1;
FIG. 3 is a schematic view of another cross-sectional structure corresponding to FIG. 1;
FIG. 4a is a schematic three-dimensional structure of another embodiment of a piezoelectric resonator according to the present application;
FIG. 4b is a top view of the piezoelectric resonator corresponding to FIG. 4 a;
FIG. 5a is a schematic three-dimensional structure of another embodiment of a piezoelectric resonator according to the present application;
FIG. 5b is a top view of the piezoelectric resonator corresponding to FIG. 5 a;
FIG. 6 is a schematic flow chart of an embodiment of a method for fabricating a piezoelectric resonator according to the present application;
FIG. 7 is a schematic diagram of the structure corresponding to step 61 in FIG. 6;
FIG. 8 is a schematic diagram illustrating a structure corresponding to step 621 in one embodiment;
FIG. 9 is a schematic diagram illustrating a structure corresponding to step 622 in an embodiment;
FIG. 10 is a schematic diagram illustrating a structure corresponding to step 631 in an embodiment;
fig. 11 is a schematic structural diagram corresponding to step 632 in an embodiment.
Reference numerals: 100. a piezoelectric resonator; 10. a substrate; 11. a substrate; 12. an insulating layer; 13. a semiconductor layer; 20. a piezoelectric assembly; 21. a first electrode; 22. a piezoelectric structure; 23. and a second electrode.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application.
In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on the drawings are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the apparatus or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Hereinafter, embodiments of the present application will be described with reference to the drawings.
Referring to fig. 1 and 2, fig. 1 is a schematic three-dimensional structure of an embodiment of a piezoelectric resonator according to the present application, and fig. 2 is a schematic cross-sectional structure corresponding to fig. 1, where the piezoelectric resonator 100 includes a resonance area a and a beam area B when distributed along an extended plane, and the piezoelectric resonator 100 includes a substrate 10 and a piezoelectric component 20 when viewed from a structural aspect.
Wherein the substrate 10 includes a cavity 12a corresponding to the resonance region a and the beam region B, and a through hole 13a corresponding to the resonance region a, the through hole 13a communicating the cavity 12a with an external space; the piezoelectric assembly 20 is disposed on the substrate 10 corresponding to the beam region B.
Alternatively, in an embodiment, the substrate 10 may include a substrate 11, an insulating layer 12 and a semiconductor layer 13 sequentially stacked, the insulating layer 12 including a cavity 12a corresponding to the resonance region a and the beam region B, the semiconductor layer 13 including a through hole 13a corresponding to the resonance region a, and the piezoelectric assembly 20 disposed on the semiconductor layer 13 corresponding to the beam region B.
Wherein the substrate 11 refers to a material to which a subsequent material layer may be added, and the substrate 11 may be a clean single crystal wafer for growing an epitaxial layer having a specific crystal plane and appropriate electrical, optical and mechanical properties. The substrate itself may be patterned. The material added to the substrate may be patterned or may remain unpatterned. Alternatively, the substrate 11 in this embodiment may be made of a silicon material, and in other embodiments, other semiconductor materials may be used, or a mixed material of multiple semiconductor materials, or other materials doped in the semiconductor materials, such as silicon, germanium, gallium arsenide, indium phosphide, and the like. Alternatively, the substrate may be made of a non-conductive material such as glass, plastic, or sapphire wafer.
The semiconductor layer 13 may be a silicon material, and in other embodiments, other semiconductor materials, or a mixed material of multiple semiconductor materials, or other materials doped in the semiconductor material, such as silicon, germanium, gallium arsenide, indium phosphide, etc. may be used.
Among them, the insulating layer 12 (which may also be called a dielectric layer) is mainly used to isolate the substrate 11 from the semiconductor layer 13, and the insulating layer 12 is typically made of silicon oxide, silicon oxynitride, chromium oxide, or the like.
Alternatively, in one embodiment, the base 10 may be made of Silicon-On-Insulator (SOI), which refers to the introduction of a buried oxide layer (i.e., insulating layer 12) between the top Silicon (i.e., semiconductor layer 13) and the backing substrate (i.e., substrate 11). Material by forming a semiconductor film on an insulator, SOI materials have advantages that are incomparable to bulk silicon: dielectric isolation of components in the integrated circuit can be realized, and parasitic latch-up effect in the bulk silicon CMOS circuit is thoroughly eliminated; the integrated circuit made of the material has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, and the like, and is particularly suitable for low-voltage and low-power consumption circuits, so that the SOI is likely to become a mainstream technology of deep submicron low-voltage and low-power consumption integrated circuits. In addition, SOI materials are also used to fabricate MEMS optical switches, such as with bulk micromachining techniques.
The standard SOI process flow is the earliest established and most mature process flow of a micro-electromechanical system foundry, related profession and research institutions of university, the manufacturing method of the piezoelectric resonator is based on the SOI standard process improvement, the MEMS piezoelectric resonator design with the piezoelectric structure layer arranged on the beam can be efficiently applied to the process flow, and the processing difficulty and cost are effectively reduced while the performance of the piezoelectric resonator is ensured.
Alternatively, in one embodiment, the thickness of the substrate 11 is 625-750 um and the thickness of the insulating layer 12 is 1-2 um. The thickness of the semiconductor layer 13 is 10 to 20um.
Alternatively, in an embodiment, as shown in fig. 3, fig. 3 is a schematic cross-sectional structure corresponding to fig. 1, the piezoelectric assembly 20 may include a first electrode 21, a piezoelectric structure 22, and a second electrode 23 sequentially stacked, where the first electrode 21 is disposed on the substrate 10 corresponding to the beam region B (i.e., on the semiconductor layer 13); the piezoelectric structure 22 is disposed on the first electrode 21; the second electrode 23 is disposed on the piezoelectric structure 22.
Wherein the first electrode 21 and the second electrode 23 are used to apply an electric field to the piezoelectric structure 22, in an embodiment the first electrode 21 and the second electrode 23 may be MO (molybdenum) material.
Wherein the piezoelectric structure 22 generates a piezoelectric effect, and if a pressure is applied to the piezoelectric structure from a certain fixed direction, a potential difference is generated inside the piezoelectric structure, and when the external force is removed, the piezoelectric structure returns to an uncharged state; when the direction of the applied external force changes, the polarity of the electric charge changes, and the electric charge amount generated by the piezoelectric structure 22 is proportional to the magnitude of the external force; conversely, when an electric field is applied to the piezoelectric structure 22, mechanical deformation occurs in some directions of the piezoelectric structure 22, and the deformation amount thereof is proportional to the strength of the applied external electric field, and is generally applied to the aspects of transducers, drivers, sensors, and the like by the characteristics of the piezoelectric structure.
The piezoelectric resonator 100 is a frequency control element, and has a higher operating frequency than a quartz crystal resonator with the development of micro-electro-mechanical, so that the piezoelectric resonator itself or a filter formed by the piezoelectric resonator is important in wireless communication system applications; the piezoelectric resonator 100 converts electric energy into mechanical energy through a piezoelectric material, and vibrates a resonator body therein at its natural resonant frequency, thereby causing a capacitance change thereof, and converts the change of the capacitance thereof into an output signal of a desired operating frequency, thereby obtaining a desired operating frequency.
The piezoelectric resonator provided by the present embodiment includes a resonance region and a beam region distributed along an extension plane, and includes: the substrate comprises a cavity corresponding to the resonance area and the beam area and a through hole corresponding to the resonance area, and the through hole is communicated with the cavity and the external space; and the piezoelectric assembly is arranged on the substrate corresponding to the beam region. Through the mode, the piezoelectric component of the piezoelectric resonator is only arranged in the beam structure area but not in the resonance area, so that the structure of the piezoelectric resonator is simplified, the influence of etching holes on the piezoelectric performance of the resonance structure and the processing difficulty and cost are effectively reduced, and the performance of the piezoelectric resonator is guaranteed.
The piezoelectric resonator 100 described above includes the resonance region a and the beam region B distributed along the extension plane, wherein the resonance region a is illustrated as a rectangle (rectangle), and in other embodiments, the shape and size of the resonance region a and the beam region B may be set according to actual requirements.
Alternatively, in an embodiment, as shown in fig. 4a and 4B, fig. 4a is a schematic three-dimensional structure of another embodiment of the piezoelectric resonator provided in the present application, and fig. 4B is a top view of the piezoelectric resonator corresponding to fig. 4a, where the piezoelectric resonator 100 includes a resonance area a and a beam area B when distributed along an extended surface, and the piezoelectric resonator 100 includes a substrate 10 and a piezoelectric component 20 when viewed from a structure.
The resonant area a is polygonal, the number of beam areas B is multiple, and the beam areas B are distributed around the resonant area a. The beam areas B are symmetrically distributed on two opposite sides of the resonance area A, which are parallel to each other, and are connected with one side of the resonance area A and extend along the direction perpendicular to the two opposite sides of the resonance area A and far away from the resonance area A; or a plurality of beam areas B are symmetrically distributed at two opposite angles of the resonance area A along the diagonal line, and the beam areas B are connected with one angle of the resonance area A and extend along the diagonal line of the resonance area A and away from the resonance area A.
The present embodiment is described taking the resonant area a as an octagon as an example, where the resonant area a includes four long sides and four short sides that are alternately connected, that is, "long side a-short side b-long side c-short side d-long side e-short side f-long side g-short side h-long side a" in a connection manner, two opposite long sides (such as long side a and long side e) are parallel to each other, two opposite short sides (such as short side b and short side e) are parallel to each other, specifically, four long sides are equal in length, four short sides are equal in length, and an included angle between the adjacent long sides and short sides is 135 °. The beam structure areas B are respectively arranged on four short sides, and extend in a direction away from the resonance area A along the center of the resonance area A.
It will be appreciated that the number of beam regions B on each short side may be set according to practical requirements, and in an embodiment, the number of beam regions B on each short side is two, and the octagonal resonant region a may correspond to 8 beam regions B (8 beam structures), that is, the piezoelectric resonator 100 includes 8 piezoelectric components 20. For example, the two beam areas B on each short side are symmetrically distributed at both ends of the short side.
It can be understood that, the above-mentioned resonant area a corresponds to the resonant body structure of the piezoelectric resonator 100, the beam area corresponds to the beam structure of the piezoelectric resonator 100, the size of the piezoelectric component 20 is slightly smaller than the size of the beam structure, the resonant body structure and the interior of the resonant body of the beam structure are provided with cavities, and the resonant body structure is provided with etching holes arranged in an array to communicate the cavities with the external space.
Alternatively, in an embodiment, as shown in fig. 5a and 5B, fig. 5a is a schematic three-dimensional structure of another embodiment of a piezoelectric resonator provided in the present application, and fig. 5B is a top view of the piezoelectric resonator corresponding to fig. 5a, where the piezoelectric resonator 100 includes a resonance area a and a beam area B when distributed along an extension plane, and the piezoelectric resonator 100 includes a substrate 10 and a piezoelectric component 20 when viewed from a structure.
The resonant area a is circular, the number of beam areas B is multiple, and the beam areas B are distributed around the resonant area a. The beam areas B are symmetrically distributed on two opposite sides of the resonance area A in the diameter direction, are connected with one side of the resonance area A, extend in the direction away from the resonance area A and are positioned on two opposite sides of the resonance area A in the diameter direction; or a plurality of beam regions B are distributed in a plurality of diametrical arrays and extend in a direction away from the resonance region a along diametrically opposite sides.
The present embodiment is described by taking a distribution in which the resonance area a is circular as an example, wherein the resonance area a is circular, wherein the beam structure areas B are disposed on opposite sides in the diametrical direction, and extend in the diametrical direction away from the resonance area a with the resonance area a as the center, specifically, wherein the beam structure areas are disposed on both ends in the diametrical direction, wherein the beam structure areas on either end are symmetrically disposed on the circular arcs in the diametrical direction, and extend in the direction away from the resonance area a along the opposite sides in the diametrical direction, and are distributed in four groups in a 90 ° array.
It will be appreciated that the number of beam regions B along any circular arc may be set according to practical requirements, and in an embodiment, the number of beam regions B at one end in each diameter direction is two, and the circular resonance region a may correspond to 8 beam regions B (8 beam structures), that is, the piezoelectric resonator 100 includes 8 piezoelectric elements 20. For example, the beam structure regions are arranged on circular arcs at both ends in the diameter direction, are distributed in four groups in a 90 ° array, each group includes two beam structure regions, are symmetrically distributed on both sides in the diameter direction, and extend in a direction away from the resonance region a along opposite sides in the diameter direction.
It can be understood that, the above-mentioned resonant area a corresponds to the resonant body structure of the piezoelectric resonator 100, the beam area corresponds to the beam structure of the piezoelectric resonator 100, the size of the piezoelectric component 20 is slightly smaller than the size of the beam structure, the resonant body structure and the interior of the resonant body of the beam structure are provided with cavities, and the resonant body structure is provided with etching holes arranged in an array to communicate the cavities with the external space.
Referring to fig. 6, fig. 6 is a schematic flow chart of an embodiment of a method for manufacturing a piezoelectric resonator according to the present application, where the method includes:
step 61: a substrate is provided.
Alternatively, as shown in fig. 7, fig. 7 is a schematic structural diagram corresponding to step 61 in fig. 6, and the base 10 includes a substrate 11, an insulating layer 12, and a semiconductor layer 13 stacked in this order.
Alternatively, in one embodiment, the base 10 may be fabricated using SOI (Silicon-On-Insulator), which refers to the introduction of a buried oxide layer (i.e., insulating layer 12) between the top Silicon (i.e., semiconductor layer 13) and the backing bottom (i.e., substrate 11). Material by forming a semiconductor film on an insulator, SOI materials have advantages that are incomparable to bulk silicon: dielectric isolation of components in the integrated circuit can be realized, and parasitic latch-up effect in the bulk silicon CMOS circuit is thoroughly eliminated; the integrated circuit made of the material has the advantages of small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, and the like, and is particularly suitable for low-voltage and low-power consumption circuits, so that the SOI is likely to become a mainstream technology of deep submicron low-voltage and low-power consumption integrated circuits. In addition, SOI materials are also used to fabricate MEMS optical switches, such as with bulk micromachining techniques.
Step 62: a piezoelectric assembly is formed on the substrate corresponding to the beam region.
As can be appreciated, the base 10 includes a substrate 11, an insulating layer 12, and a semiconductor layer 13 stacked in this order, and the step 62 may be specifically: a piezoelectric element is formed on the semiconductor layer 13 corresponding to the beam region.
Optionally, in an embodiment, step 62 may specifically include:
step 621: a piezoelectric layer is formed on the semiconductor layer.
Fig. 8 is a schematic structural diagram corresponding to step 621 in an embodiment, as shown in fig. 8. Alternatively, in an embodiment, the piezoelectric layer a may be deposited by physical vapor deposition, chemical vapor deposition, or vacuum sputtering. Alternatively, the piezoelectric layer a may include a first electrode layer, a piezoelectric material layer, and a second electrode layer, specifically, the first electrode layer is deposited on the semiconductor layer 13, then the piezoelectric material layer is deposited on the first electrode layer, and finally the second electrode layer is deposited on the piezoelectric material layer, wherein the materials of the first electrode layer and the second electrode layer may be metal Molybdenum (MO), the thickness may be 50-200 nm, the material of the piezoelectric material layer may be aluminum nitride (AlN), and the thickness may be 200-500 nm.
Step 622: the piezoelectric layer is etched to form at least one piezoelectric element on the semiconductor layer corresponding to the beam region.
As shown in fig. 9, fig. 9 is a schematic structural diagram corresponding to step 622 in an embodiment.
Alternatively, in an embodiment, based on fig. 8, a first photoresist layer may be obtained by applying a photoresist over the piezoelectric layer a, where the thickness may be 2um, and the length of the piezoelectric layer a on the beam region may be set to 10-20 um, the width may be set to 3-4 um, the overall size is slightly smaller than the structural size of the beam region, and the non-beam region portion of the piezoelectric layer a is removed by reactive ion etching, so as to obtain the piezoelectric component 20 on the beam region, and after the etching of the piezoelectric layer a is completed, the first photoresist layer remaining on the surface of the piezoelectric structure layer region is removed by Dry etching (Dry etching) or ash.
Step 63: and forming a cavity on the substrate corresponding to the resonance area and the beam area, and forming a through hole on the substrate corresponding to the resonance area, wherein the through hole is communicated with the cavity and the external space.
Optionally, in an embodiment, step 63 may include:
step 631: the semiconductor layer is etched to form a plurality of through holes on the semiconductor layer corresponding to the resonance region, and to obtain a beam region.
Fig. 10 is a schematic structural diagram corresponding to step 631 in an embodiment, as shown in fig. 10.
Optionally, in an embodiment, on the basis of fig. 9, a second photoresist layer is obtained by applying a glue over the piezoelectric component 20 and the exposed semiconductor layer 13, where the second photoresist layer may be a positive photoresist or a negative photoresist, and may have a thickness of 4-5 um, and the second photoresist layer is patterned to correspond to the resonant area a and the beam area B on the semiconductor layer 13, and a gap structure is formed on the second photoresist layer corresponding to the resonant area a, where the length of the beam area B may be designed to be 15-25 um, and the width may be designed to be 4-5 um, and each is slightly larger than the size of the piezoelectric component 20; the minimum gap size is 1-2 um, and the extreme requirement (generally <1 um) of electrostatic driving on the gap size is reduced by using a piezoelectric driving mode, so that the overall processing difficulty is reduced.
Further, through holes (etching holes) 13a are etched on the semiconductor layer 13 at positions corresponding to the gap structures through DRIE deep silicon etching (deep reactive ion etching), wherein the thickness of the semiconductor layer 13 can be 10-20 um, and etching is stopped until the insulating layer 12 is stopped, wherein the rate of DRIE deep silicon etching (deep reactive ion etching) is 200-500 nm/min, and the scalep size (etching side profile) <50nm.
Further, after the etching of the semiconductor layer 13 is completed, the second photoresist layer remaining on the surface is removed by Dry etching (Dry etching) or Ashing.
Step 632: the insulating layer is etched to form cavities on the insulating layer corresponding to the resonant region and the beam region.
As shown in fig. 11, fig. 11 is a schematic structural diagram corresponding to step 632 in an embodiment.
Alternatively, in one embodiment, the cavity 12a is formed by releasing the resonator structure by using VHF etching (vapor HF) of the insulating layer 12 on the basis of fig. 10, wherein the etching rate is 100 to 200nm/min.
Through the mode, the piezoelectric component of the piezoelectric resonator is only arranged in the beam structure area but not in the resonance area, so that the structure of the piezoelectric resonator is simplified, the extreme requirement (generally <1 um) of electrostatic drive on the gap size is reduced, the influence of etching holes on the piezoelectric performance of the resonance structure and the processing difficulty and cost are effectively reduced, and the performance of the piezoelectric resonator is guaranteed by utilizing the piezoelectric drive mode.
In an embodiment, the substrate includes a substrate, an insulating layer and a semiconductor layer which are sequentially stacked, so that the substrate can be manufactured by an SOI process, a standard SOI process flow is the earliest established and most mature process flow of a micro-electromechanical system foundry, university related profession and research institution, the manufacturing method of the piezoelectric resonator is based on the improvement of the SOI standard process, the design of the MEMS piezoelectric resonator with the piezoelectric structure layer arranged on the beam can be effectively applied to the process flow, and the processing difficulty and cost are effectively reduced while the performance of the piezoelectric resonator is ensured.
The foregoing has outlined rather broadly the more detailed description of embodiments of the application, wherein the principles and embodiments of the application are explained in detail using specific examples, the above examples being provided solely to facilitate the understanding of the method and core concepts of the application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, the present description should not be construed as limiting the present application.
Claims (9)
1. A piezoelectric resonator, the piezoelectric resonator comprising a resonance region and a beam region distributed along an extension plane, the piezoelectric resonator comprising:
the substrate comprises a cavity corresponding to the resonance area and the beam area and a through hole corresponding to the resonance area, and the through hole is communicated with the cavity and an external space;
a piezoelectric assembly disposed on the substrate corresponding to the beam region.
2. The piezoelectric resonator according to claim 1, characterized in that the base comprises a substrate, an insulating layer and a semiconductor layer stacked in this order, the insulating layer comprising the cavities corresponding to the resonance region and the beam region, the semiconductor layer comprising the through holes corresponding to the resonance region, the piezoelectric component being disposed on the semiconductor layer corresponding to the beam region.
3. The piezoelectric resonator according to claim 1, wherein the number of beam regions is plural, and a plurality of the beam regions are distributed around the resonance region.
4. A piezoelectric resonator according to claim 3, wherein the resonance region is polygonal;
the beam areas are symmetrically distributed on two opposite sides of the resonance area, which are parallel to each other, and the beam areas are connected with one side of the resonance area and extend along the direction perpendicular to the two opposite sides of the resonance area and far away from the resonance area; or (b)
The beam areas are symmetrically distributed at two opposite corners of the resonance area along a diagonal line, are connected with one corner of the resonance area, and extend along the diagonal line of the resonance area and away from the resonance area.
5. The piezoelectric resonator according to claim 4, wherein the resonance region is an octagon comprising four long sides and four short sides alternately connected;
the beam regions are symmetrically distributed on two opposite short sides of the resonance region, which are parallel to each other.
6. A piezoelectric resonator according to claim 3, wherein the resonance region is circular;
the beam areas are symmetrically distributed on two opposite sides of the resonance area along the diameter direction, are connected with the resonance area, and extend along the diameter of the resonance area and away from the resonance area.
7. The piezoelectric resonator according to claim 1, characterized in that the piezoelectric assembly comprises:
a first electrode disposed on the substrate corresponding to the beam region;
a piezoelectric structure disposed on the first electrode;
and the second electrode is arranged on the piezoelectric structure.
8. A method of manufacturing a piezoelectric resonator, the piezoelectric resonator including a resonance region and a beam region distributed along an extension plane, the method comprising:
providing a substrate;
forming a piezoelectric assembly on the substrate corresponding to the beam region;
a cavity is formed in the substrate corresponding to the resonance region and the beam region, and a through hole is formed in the substrate corresponding to the resonance region, the through hole communicating the cavity and an external space.
9. The method of manufacturing a piezoelectric resonator according to claim 8, wherein the base includes a substrate, an insulating layer, and a semiconductor layer laminated in this order, the piezoelectric element being formed on the base corresponding to the beam region; forming a cavity at the substrate corresponding to the resonance region and the beam region, and forming a through hole at the substrate corresponding to the resonance region, the through hole communicating the cavity and an external space, comprising:
forming a piezoelectric layer on the semiconductor layer;
etching the piezoelectric layer to form at least one piezoelectric component on the semiconductor layer corresponding to the beam region;
etching the semiconductor layer to form a plurality of through holes on the semiconductor layer corresponding to the resonance region;
the insulating layer is etched to form cavities on the insulating layer corresponding to the resonant region and the beam region.
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