CN116960900A - Integrated fault protection method for switching power supply IC - Google Patents

Integrated fault protection method for switching power supply IC Download PDF

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Publication number
CN116960900A
CN116960900A CN202311203850.7A CN202311203850A CN116960900A CN 116960900 A CN116960900 A CN 116960900A CN 202311203850 A CN202311203850 A CN 202311203850A CN 116960900 A CN116960900 A CN 116960900A
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power supply
frequency domain
attention
sequence
time
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CN116960900B (en
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朱欢
赵玉成
彭云武
傅青云
杜军
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Chengdu Cetc Xingtuo Technology Co ltd
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Chengdu Cetc Xingtuo Technology Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1203Circuits independent of the type of conversion
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1209Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for converters using only discharge tubes
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/36Means for starting or stopping converters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Power Conversion In General (AREA)

Abstract

The invention discloses a switching power supply Integrated Circuit (IC) integrated fault protection method, which relates to the field of power supply integrated circuits and comprises the following steps: collecting and analyzing the input voltage of a switching power supply IC; acquiring and enhancing the temperature data and the output electric data of the hybrid network through a recursion frequency domain to obtain fault probability; according to the light and heavy urgency, the PWM wave duty ratio of the driving power MOS tube is reduced to zero in three different times, so that the power supply is smoothly and flexibly turned off, and the situation that transient reverse high voltage occurs to inductive elements in the circuit and the circuit is damaged due to sudden hard shutdown is avoided. The invention discovers fault symptoms and turns off in advance, prevents the fault symptoms in advance, effectively protects electric equipment and a power supply IC, is integrated in the switching power supply IC, is easy for users to develop secondarily, and ensures that the power supply IC is safer and more reliable.

Description

Integrated fault protection method for switching power supply IC
Technical Field
The invention relates to the field of power integrated circuits, in particular to a switching power supply Integrated Circuit (IC) integrated fault protection method.
Background
With the development of battery technology and semiconductor material technology, new energy products such as LED (Light Emitting Diode ) lighting devices, electric vehicles and the like, which are highly dependent on power ICs (Integrated Circuit, integrated circuits), are widely popularized, and accordingly, public attention is paid to the electrical safety of the new energy products.
According to the past statistical study on faults of electric equipment, more than half of faults are sourced from an internal power supply, and 80% of faults of the LED lighting equipment are sourced from the power supply. Because the efficiency of the switching power supply is far ahead of that of a linear power supply due to the working mechanism of the switching power supply, most products such as electric automobiles, LED lighting equipment and the like adopt a switching power supply IC. Therefore, the fault protection of the switching power supply IC is a key to prevent major accidents such as electric shock and fire.
The traditional power protection method mainly uses hardware circuits such as detection and comparison on a printed circuit board to implement shutdown protection on faults such as overvoltage, undervoltage, overcurrent, undercurrent, overheat, transient impact and the like so as to avoid the expansion of fault loss. The method has the advantages of high protection speed, simplicity and feasibility, but has the disadvantages that: 1. failure symptoms cannot be found in advance, and partial loss is caused before shutdown; 2. switching of the hardware switch without situation can cause transient reverse high voltage of the inductive element in the circuit, so that the circuit is additionally damaged; 3. the fault protection mechanism and logic are not integrated in the power IC, increasing the secondary design difficulty for the user.
Disclosure of Invention
Aiming at the defects in the prior art, the integrated fault protection method for the switching power supply IC solves the problems that the traditional power supply protection method cannot find fault symptoms in advance, extra damage is caused to a circuit due to the fact that the circuit is powered off in an unbiased state, and a fault protection mechanism and logic are not integrated in the power supply IC.
In order to achieve the aim of the invention, the invention adopts the following technical scheme:
a switching power supply IC integrated fault protection method comprises the following steps:
s1, acquiring and analyzing input voltage of a switching power supply IC, and if the input voltage is overvoltage, in a first down-regulating time, decreasing the duty ratio of PWM waves (pulse width modulation, pulse width modulation waves) of a driving power MOS transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, metal-Oxide semiconductor field effect transistor) to zero; if the input voltage is under-voltage, in the second down-regulating time, the PWM wave duty ratio of the driving power MOS tube is reduced to zero; if the input voltage is normal, jumping to S2;
s2, acquiring temperature data and output electric data of a switching power supply IC, and if the temperature data and the output electric data are in a fault state, decreasing the PWM wave duty ratio of the driving power MOS tube to zero in a second down-regulating time; if the temperature data and the output electric data are not in the fault state, jumping to S3;
s3, analyzing temperature data and output electric data through a recursion frequency domain enhancement hybrid network to obtain fault probability, and if the fault probability is larger than a probability threshold value, decreasing the PWM wave duty ratio of the driving power MOS tube to zero in a third down-regulating time;
the first downturn time is shorter than a second downturn time, which is shorter than a third downturn time.
Further, the outputting electrical data includes: load current and output voltage.
Further, the condition for discriminating that the temperature data and the output electric data are in the fault state is any one or more of the following conditions:
the temperature data is greater than a high temperature threshold;
the output voltage is not in the closed regionInner part (S)>For the output voltage set point, ">A ripple threshold for the output voltage;
the load current is greater than the overcurrent threshold;
the load current ripple is greater than the load current ripple threshold.
Further, the recursive frequency domain enhancement hybrid network in S3 is integrated in a switching power supply IC with an ASIC (Application Specific Integrated Circuit ) as a logic medium.
Further, the recursive frequency domain enhanced hybrid network in S3 includes:
the self-attention recursion sub-network is used for obtaining a power supply output state transition sequence according to the temperature data and the output electric data through time recursion operation with a self-attention mechanism;
the discrete frequency domain attention enhancement sub-network is used for carrying out discrete time-frequency conversion on the power output state transition sequence, carrying out different coefficient enhancement on the obtained frequency domain series, and obtaining the frequency domain attention enhancement power output state transition sequence through inverse discrete time-frequency conversion;
and the full connection layer is used for enhancing the power output state transition sequence according to the frequency domain attention and calculating to obtain the fault probability.
Further, the expression of the self-attention recursive subnetwork is:
wherein ,is->Time power supply output state transition sequence, +.>Is->Time power supply output state transition sequence, +.>Is->Sequence of temperature data and output electrical data at time,/->Is->Output voltage at time, ">Is->Load current at time, ">Is->Temperature data of time of day, ">Is->Sequence of forgetting coefficients at time,/>Is->Time-of-day input weighting coefficient sequence,/>Outputting a gate parameter matrix for the self-attention recursive subnetwork,outputting a gate bias sequence for the self-attention recursive subnetwork,>for a self-attention recursive subnetwork forgetting gate parameter matrix,forgetting the gate bias sequence for the self-attention recursive subnetwork>The gate parameter matrix is input for the self-attention recursive subnetwork,inputting a gate bias sequence for a self-attention recursive subnetwork,>is made of-> and />Spliced sequence,/->Is made of->、/> and />Spliced sequence,/->Is a sigmoid function.
Further, the expression of the discrete frequency domain attention enhancement sub-network is:
wherein ,is->Frequency domain progression->The +.f. for the power output state transition sequence>Element(s)>Is natural constant (18)>Is an imaginary identifier->For the number of elements of the power output state transition sequence and the frequency domain series, +.>Is of circumference rate>For coefficient enhancement +.>Frequency domain progression->Is->Frequency domain enhancement coefficients>For the frequency domain enhancement coefficient sequence, < > is->For the frequency domain attention parameter matrix,/a matrix of attention parameters>For the power output state transition sequence, +.>For the frequency domain attention offset sequence,/a>The power output state transition sequence for frequency domain attention enhancement>The elements.
Further, the expression of the full connection layer is:
wherein ,for failure probability->For the full connection layer parameter sequence,/a. About.>For the full link layer bias vector,>the power output state transition sequence is enhanced for frequency domain attention.
The beneficial effects of the invention are as follows:
(1) Aiming at the power failure of light and heavy urgency, the PWM wave duty ratio of the switching power supply IC is gradually reduced by adopting different times, so that soft turn-off is realized stably, and the condition that transient reverse high voltage occurs to inductive elements in the circuit and the circuit is damaged due to sudden hard turn-off is avoided; the temperature data and the output electric data are analyzed through the neural network, the fault probability is predicted, the fault symptom is found, the fault symptom is turned off in advance, and the electric equipment and the power IC are effectively protected.
(2) The ASIC is used as a logic medium, a recursion frequency domain enhancement hybrid network is realized on the ASIC, the ASIC is integrated in a switching power supply IC, the secondary development is easy for a user, and the power supply IC is safer and more reliable.
(3) The overvoltage and undervoltage of the input and output voltage, the overheat temperature and the overcurrent of the load current are analyzed and protected, fluctuation of the output voltage and the load current is analyzed, and unstable factors in a circuit system are prevented.
(4) The self-attention recursion sub-network has the advantages that the forgetting coefficient and the input weighting coefficient can be adaptively adjusted according to the current input quantity and the output quantity at the last moment, and the self-attention recursion sub-network has an excellent self-attention mechanism, and the change characteristics of temperature data and output electric data in time are analyzed through time recursion, so that the change information of the power output state is obtained.
(5) The discrete frequency domain attention enhancement sub-network enhances attention on the frequency domain by carrying out discrete time-frequency transformation on the power output state transition sequence carrying the power output state change information and using the coefficient adaptively regulated by the power output state transition sequence, thereby improving the recognition degree of fault analysis.
Drawings
Fig. 1 is a flowchart of a switching power supply IC integrated fault protection method according to an embodiment of the present invention;
fig. 2 is a block diagram of a recursive frequency domain enhanced hybrid network in accordance with an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.
As shown in fig. 1, in one embodiment of the present invention, a switching power supply IC integrated fault protection method includes the steps of:
s1, acquiring and analyzing input voltage of a switching power supply IC, and if the input voltage is overvoltage, in a first down-regulating time, decreasing the duty ratio of PWM waves (pulse width modulation, pulse width modulation waves) of a driving power MOS transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, metal-Oxide semiconductor field effect transistor) to zero; if the input voltage is under-voltage, in the second down-regulating time, the PWM wave duty ratio of the driving power MOS tube is reduced to zero; if the input voltage is normal, the process jumps to S2.
The switching power supply IC generally drives the power MOS tube to change the output voltage or the power supply switching state of the circuit with PWM wave, which are background common knowledge and will not be described herein.
S2, collecting temperature data and output electric data of the switching power supply IC, wherein the output electric data comprises: load current and output voltage. If the temperature data and the output electric data are in a fault state, in the second down-regulating time, the PWM wave duty ratio of the driving power MOS tube is reduced to zero; if the temperature data and the output electrical data are not in a fault state, the process jumps to S3.
The distinguishing condition that the temperature data and the output electric data are in a fault state is any one or more of the following conditions:
the temperature data is greater than a high temperature threshold;
the output voltage is not in the closed regionInner part (S)>For the output voltage set point, ">A ripple threshold for the output voltage;
the load current is greater than the overcurrent threshold;
the load current ripple is greater than the load current ripple threshold.
The invention not only analyzes and protects the overvoltage and undervoltage of the input and output voltage, the overheat temperature and the overcurrent of the load current, but also analyzes the fluctuation of the output voltage and the load current and prevents unstable factors in a circuit system.
In this embodiment, the high temperature threshold, the overcurrent threshold, and the load current ripple threshold may be set according to multiple experiments or experiences, where the high temperature threshold is used to screen out excessive temperature data, the overcurrent threshold is used to screen out excessive load current, and the load current ripple threshold is used to screen out excessive load current ripple. When the temperature is too high, the current is too high and the ripple is too large, the invention is regarded as faults, and how to set the thresholds can be set according to the requirements of different specific devices.
S3, analyzing temperature data and output electric data through the recursion frequency domain enhancement hybrid network to obtain fault probability, and if the fault probability is larger than a probability threshold value, decreasing the PWM wave duty ratio of the driving power MOS tube to zero in a third down-regulating time.
In this embodiment, the setting of the probability threshold may be set according to multiple experiments or experiences, which are used to distinguish the degree of the fault, so as to adjust the PWM wave duty ratio of the driving power MOS transistor when the fault probability is too large.
The recursive frequency domain enhancement hybrid network uses ASIC (Application Specific Integrated Circuit ) as logic medium, integrated in a switching power supply IC, as shown in fig. 2, and includes:
the self-attention recursion sub-network is used for obtaining a power supply output state transition sequence according to temperature data and output electric data through time recursion operation with a self-attention mechanism, and the expression is as follows:
wherein ,is->Time power supply output state transition sequence, +.>Is->Time power supply output state transition sequence, +.>Is->Sequence of temperature data and output electrical data at time,/->Is->Output voltage at time, ">Is->Load current at time, ">Is->Temperature data of time of day, ">Is->Sequence of forgetting coefficients at time,/>Is->Time-of-day input weighting coefficient sequence,/>Outputting a gate parameter matrix for the self-attention recursive subnetwork,outputting a gate bias sequence for the self-attention recursive subnetwork,>for a self-attention recursive subnetwork forgetting gate parameter matrix,forgetting the gate bias sequence for the self-attention recursive subnetwork>The gate parameter matrix is input for the self-attention recursive subnetwork,inputting a gate bias sequence for a self-attention recursive subnetwork,>is made of-> and />Spliced sequence,/->Is made of->、/> and />And splicing the sequences.
The forgetting coefficient and the input weighting coefficient of the self-attention recursion sub-network can be adaptively adjusted according to the current input quantity and the output quantity at the last moment, and the self-attention mechanism is excellent, and the change characteristics of temperature data and output electric data in time are analyzed through time recursion, so that the change information of the power output state is obtained.
The discrete frequency domain attention enhancement sub-network is used for carrying out discrete time-frequency conversion on the power output state transition sequence, carrying out different coefficient enhancement on the obtained frequency domain series, and obtaining the frequency domain attention enhancement power output state transition sequence through inverse discrete time-frequency conversion, wherein the expression is as follows:
wherein ,is->Frequency domain progression->The +.f. for the power output state transition sequence>Element(s)>Is natural constant (18)>Is an imaginary identifier->For the number of elements of the power output state transition sequence and the frequency domain series, +.>Is of circumference rate>For coefficient enhancement +.>Frequency domain progression->Is->Frequency domain enhancement coefficients>For the frequency domain enhancement coefficient sequence, < > is->For the frequency domain attention parameter matrix,/a matrix of attention parameters>For the power output state transition sequence, +.>For the frequency domain attention offset sequence,/a>The power output state transition sequence for frequency domain attention enhancement>The elements. The discrete frequency domain attention enhancement sub-network of the invention enhances attention by carrying out discrete time-frequency conversion on the power output state transition sequence carrying the power output state change information and using the coefficient adaptively regulated by the power output state transition sequence on the frequency domain, thereby improving the recognition of fault analysis.
The full-connection layer is used for enhancing the power output state transition sequence according to the frequency domain attention, calculating to obtain the fault probability, and the expression is as follows:
wherein ,for failure probability->For the full connection layer parameter sequence,/a. About.>For the full link layer bias vector,>the power output state transition sequence is enhanced for frequency domain attention.
The first downturn time of this embodiment is shorter than the second downturn time, which is shorter than the third downturn time.
In conclusion, the invention aims at the light and heavy urgent power failure, adopts different time to gradually reduce the PWM wave duty ratio of the switching power supply IC, realizes soft turn-off stably, and avoids the condition that transient reverse high voltage occurs in inductive elements in the circuit and the circuit is damaged due to sudden hard turn-off; the temperature data and the output electric data are analyzed through the neural network, the fault probability is predicted, the fault symptom is found, the fault symptom is turned off in advance, and the electric equipment and the power IC are effectively protected. And the ASIC is used as a logic medium, a recursion frequency domain enhancement hybrid network is realized on the ASIC, and the ASIC is integrated in a switching power supply IC, so that the secondary development of a user is easy, and the power supply IC is safer and more reliable.
The principles and embodiments of the present invention have been described in detail with reference to specific examples, which are provided to facilitate understanding of the method and core ideas of the present invention; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Those of ordinary skill in the art will recognize that the embodiments described herein are for the purpose of aiding the reader in understanding the principles of the present invention and should be understood that the scope of the invention is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific modifications and combinations from the teachings of the present disclosure without departing from the spirit thereof, and such modifications and combinations remain within the scope of the present disclosure.

Claims (8)

1. The integrated fault protection method for the switching power supply IC is characterized by comprising the following steps of:
s1, acquiring and analyzing input voltage of a switching power supply IC, and if the input voltage is overvoltage, decreasing the PWM wave duty ratio of a driving power MOS tube to zero in a first down-regulating time; if the input voltage is under-voltage, in the second down-regulating time, the PWM wave duty ratio of the driving power MOS tube is reduced to zero; if the input voltage is normal, jumping to S2;
s2, acquiring temperature data and output electric data of a switching power supply IC, and if the temperature data and the output electric data are in a fault state, decreasing the PWM wave duty ratio of the driving power MOS tube to zero in a second down-regulating time; if the temperature data and the output electric data are not in the fault state, jumping to S3;
s3, analyzing temperature data and output electric data through a recursion frequency domain enhancement hybrid network to obtain fault probability, and if the fault probability is larger than a probability threshold value, decreasing the PWM wave duty ratio of the driving power MOS tube to zero in a third down-regulating time;
the first downturn time is shorter than a second downturn time, which is shorter than a third downturn time.
2. The switching power supply IC integrated fault protection method of claim 1, wherein said outputting electrical data comprises: load current and output voltage.
3. The switching power supply IC integration fault protection method according to claim 2, wherein the condition for discriminating that the temperature data and the output electric data are in the fault state is any one or more of the following conditions:
the temperature data is greater than a high temperature threshold;
the output voltage is not in the closed regionInner part (S)>For the output voltage set point, ">A ripple threshold for the output voltage;
the load current is greater than the overcurrent threshold;
the load current ripple is greater than the load current ripple threshold.
4. The integrated fault protection method of a switching power supply IC as claimed in claim 3, wherein said recursive frequency domain enhanced hybrid network in S3 is integrated in the switching power supply IC with ASIC as logic medium.
5. The switching power supply IC integrated fault protection method as claimed in claim 4, wherein said recursive frequency domain enhanced hybrid network in S3 comprises:
the self-attention recursion sub-network is used for obtaining a power supply output state transition sequence according to the temperature data and the output electric data through time recursion operation with a self-attention mechanism;
the discrete frequency domain attention enhancement sub-network is used for carrying out discrete time-frequency conversion on the power output state transition sequence, carrying out different coefficient enhancement on the obtained frequency domain series, and obtaining the frequency domain attention enhancement power output state transition sequence through inverse discrete time-frequency conversion;
and the full connection layer is used for enhancing the power output state transition sequence according to the frequency domain attention and calculating to obtain the fault probability.
6. The switching power supply IC integrated fault protection method of claim 5 wherein the expression of the self-attention recursive subnetwork is:
wherein ,is->Time power supply output state transition sequence, +.>Is->Time power supply output state transition sequence, +.>Is->Sequence of temperature data and output electrical data at time,/->Is->Output voltage at time, ">Is->Load current at time, ">Is->Temperature data of time of day, ">Is->Sequence of forgetting coefficients at time,/>Is->Time-of-day input weighting coefficient sequence,/>Outputting a gate parameter matrix for the self-attention recursive subnetwork,>outputting a gate bias sequence for the self-attention recursive subnetwork,>forgetting a gate parameter matrix for a self-attention recursive subnetwork,>forgetting the gate bias sequence for the self-attention recursive subnetwork>Inputting a gate parameter matrix for a self-attention recursive subnetwork,>recursive subnetwork input for self-attentionGate bias sequence->Is made of-> and />Spliced sequence,/->Is made of->、/> and />Spliced sequence,/->Is a sigmoid function.
7. The method of claim 6, wherein the discrete frequency domain attention enhancement sub-network is expressed as:
wherein ,is->Frequency domain progression->The +.f. for the power output state transition sequence>Element(s)>Is natural constant (18)>Is an imaginary identifier->For the number of elements of the power output state transition sequence and the frequency domain series, +.>Is of circumference rate>For coefficient enhancement +.>Frequency domain progression->Is->Frequency domain enhancement coefficients>For the frequency domain enhancement coefficient sequence, < > is->For the frequency domain attention parameter matrix,/a matrix of attention parameters>For the power output state transition sequence, +.>For the frequency domain attention offset sequence,/a>The power output state transition sequence for frequency domain attention enhancement>The elements.
8. The integrated fault protection method of a switching power supply IC of claim 7, wherein the expression of the fully connected layer is:
wherein ,for failure probability->For the full connection layer parameter sequence,/a. About.>For the full link layer bias vector,>the power output state transition sequence is enhanced for frequency domain attention.
CN202311203850.7A 2023-09-19 2023-09-19 Integrated fault protection method for switching power supply IC Active CN116960900B (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100054003A1 (en) * 2007-04-06 2010-03-04 Ruiping Zhu Output protection circuit of a power converter
CN103973102A (en) * 2013-02-04 2014-08-06 英飞凌科技奥地利有限公司 System and Method for a Power Supply Controller
US20170310111A1 (en) * 2016-04-22 2017-10-26 The Secretary, Department Of Atomic Energy High voltage dc power supply for high power radio frequency amplifiers
CN109600037A (en) * 2018-12-14 2019-04-09 陕西航空电气有限责任公司 The high power D C-DC converter and its health control method of double active bridge circuits based on aviation
CN111181370A (en) * 2019-12-30 2020-05-19 杭州士兰微电子股份有限公司 Switching power supply and control circuit and control method thereof
CN112366795A (en) * 2020-12-01 2021-02-12 上海交通大学 Power electronic intelligent battery unit
WO2022204948A1 (en) * 2021-03-30 2022-10-06 Suzhou Antrieb Intelligent Technology Co., Ltd Apparatus configured to receive power from power supply

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100054003A1 (en) * 2007-04-06 2010-03-04 Ruiping Zhu Output protection circuit of a power converter
CN103973102A (en) * 2013-02-04 2014-08-06 英飞凌科技奥地利有限公司 System and Method for a Power Supply Controller
US20170310111A1 (en) * 2016-04-22 2017-10-26 The Secretary, Department Of Atomic Energy High voltage dc power supply for high power radio frequency amplifiers
CN109600037A (en) * 2018-12-14 2019-04-09 陕西航空电气有限责任公司 The high power D C-DC converter and its health control method of double active bridge circuits based on aviation
CN111181370A (en) * 2019-12-30 2020-05-19 杭州士兰微电子股份有限公司 Switching power supply and control circuit and control method thereof
CN112366795A (en) * 2020-12-01 2021-02-12 上海交通大学 Power electronic intelligent battery unit
WO2022204948A1 (en) * 2021-03-30 2022-10-06 Suzhou Antrieb Intelligent Technology Co., Ltd Apparatus configured to receive power from power supply

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