CN116960142A - Optical sensor and preparation method thereof - Google Patents

Optical sensor and preparation method thereof Download PDF

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Publication number
CN116960142A
CN116960142A CN202310883046.1A CN202310883046A CN116960142A CN 116960142 A CN116960142 A CN 116960142A CN 202310883046 A CN202310883046 A CN 202310883046A CN 116960142 A CN116960142 A CN 116960142A
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China
Prior art keywords
layer
connection structure
optical sensor
interlayer
electric connection
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CN202310883046.1A
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Inventor
张耀辉
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Suzhou Huatai Electronics Co Ltd
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Suzhou Huatai Electronics Co Ltd
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Priority to CN202310883046.1A priority Critical patent/CN116960142A/en
Publication of CN116960142A publication Critical patent/CN116960142A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14636Interconnect structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof

Abstract

The embodiment of the application provides an optical sensor and a preparation method thereof, and relates to the technical field of semiconductors. The optical sensor includes: a first device layer at least comprising an image processing device and a first electrical connection structure, a second device layer at least comprising a pixel processing device and a second electrical connection structure, and a third device layer at least comprising a photoelectric conversion device, which are sequentially arranged on the surface of the bottom substrate layer from bottom to top; the first electric connection structure is electrically connected with the image processing device; the first interlayer through hole filled with conductive substances is electrically connected with the first electric connection structure and the second electric connection structure respectively; and the second interlayer through holes filled with conductive substances are respectively and electrically connected with the second electric connection structure and the connecting layer on the upper surface of the photoelectric sensor. The performance of the optical sensor is improved from five aspects of improving the integration level, photoelectric conversion efficiency, product yield, heat dissipation and reducing product noise, and the technical problem that the performance of the existing photoelectric sensor is poor is solved.

Description

Optical sensor and preparation method thereof
Technical Field
The application relates to the technical field of semiconductors, in particular to an optical sensor and a preparation method thereof.
Background
The CIS (Contact Image Sensor, contact image sensing device) is an optical sensor, and has the functions of converting an optical signal into an electrical signal, converting the electrical signal into a digital signal through a readout circuit, and is widely applied to the field of vision and is a core component of a camera module. The current process for preparing CIS optical sensors mainly includes two kinds:
first, in the FSI (Front-Side Illumination) process, referring to fig. 1, light first passes through the metal lines and the transistor structure layer of the image sensor and then reaches the pixel, so that light may be reflected and absorbed to some extent during transmission, resulting in light loss. This may reduce the light Quantum Efficiency (QE) of the image sensor, i.e. the efficiency of converting photons to electrons. The area through which the light passes becomes smaller and diffraction phenomena are enhanced, resulting in the colors in the image being mixed together. At the same time, the photosensitive charge of each pixel is stored in the substrate below the photosensitive region, and crosstalk effects between pixels may occur due to the electrical and optical coupling between the substrates. This may cause mutual interference of brightness, color or noise between adjacent pixels in the image sensor, affecting image quality.
Second, BSI (back-illuminated) processes, see fig. 2, require thinning of the substrate (silicon layer in fig. 2), device fabrication and optical design on the back side of the substrate, etc. during fabrication, which require highly accurate control and fabrication equipment, increasing fabrication cost and complexity; meanwhile, because of the need of device overturning and backside preparation, short circuit or fault easily occurs, the risk of device fault is increased, for example, when backside medium is injected or backside etching is performed, adverse effects may be caused on the characteristics and performances of the device.
Thus, the performance of the current photoelectric sensor is poor.
Disclosure of Invention
In order to solve the technical problems, an embodiment of the application provides an optical sensor and a preparation method thereof.
In a first aspect of an embodiment of the present application, there is provided an optical sensor including:
a first device layer at least comprising an image processing device and a first electrical connection structure, a second device layer at least comprising a pixel processing device and a second electrical connection structure, and a third device layer at least comprising a photoelectric conversion device, which are sequentially arranged on the surface of the bottom substrate layer from bottom to top; the first electric connection structure is electrically connected with the image processing device;
the first interlayer through holes filled with conductive substances are respectively and electrically connected with the first electric connection structure and the second electric connection structure;
and the second interlayer through holes filled with conductive substances are respectively and electrically connected with the second electric connection structure and the connecting layer on the upper surface of the photoelectric sensor.
In an alternative embodiment of the present application, the first device layer includes:
a first insulating layer;
an image processing device disposed on the first insulating layer;
the first electric connection structure is arranged on the first insulating layer, the first end of the first electric connection structure is electrically connected with the image processing device, and the second end of the first electric connection structure is electrically connected with the first end of the first interlayer through hole.
In an alternative embodiment of the present application, the first electrical connection structure comprises: the first tungsten through hole and the first metal interconnection line are mutually overlapped and connected; the first tungsten through hole extends along the horizontal direction of the optical sensor, and the first metal interconnection line extends along the vertical direction of the optical sensor.
In an alternative embodiment of the present application, the second device layer includes:
the thin silicon layer and the second insulating layer are sequentially arranged from bottom to top;
the pixel processing device is arranged on the second insulating layer;
the second electric connection structure is arranged on the second insulating layer, the first end of the second electric connection structure is electrically connected with the first interlayer through hole, and the second end of the second electric connection structure is electrically connected with the first end of the second interlayer through hole and is electrically connected with the pixel processing device.
In an alternative embodiment of the present application, the second device layer further comprises:
and the metal through hole is arranged on the second insulating layer and is used for connecting the pixel processing device with the second electric connection structure.
In an alternative embodiment of the present application, the second insulating layer is a low dielectric constant insulating layer.
In an alternative embodiment of the present application, the third device layer includes:
the third insulating layer is arranged on the surface of the second device layer;
the photosensitive device layer is arranged on the upper surface of the optical sensor and is used for collecting optical signals;
the photoelectric conversion layer is arranged on the third insulating layer, is in signal connection with the photosensitive device layer, is electrically connected with the second electric connection structure through the second interlayer through hole, and is used for converting optical signals into electric signals.
In an alternative embodiment of the application, the third insulating layer is a thick silicon layer having a thickness greater than the thin silicon layer in the second device layer.
In an alternative embodiment of the application, the thick silicon layer has a thickness of 10 to 25um.
In an alternative embodiment of the present application, the third device layer further comprises:
and the isolation deep groove penetrates through the photoelectric conversion layer and extends to the third insulating layer.
In an alternative embodiment of the present application, the isolation deep trench has an ohmic contact layer on the inner wall.
In an alternative embodiment of the present application, the third device layer further comprises:
the filter layer comprises a plurality of filter units, wherein the filter units correspond to the photosensitive devices in the photosensitive device layer in a one-to-one mode in the vertical direction, and are arranged at intervals with the isolation deep grooves.
In an alternative embodiment of the present application, the conductive material in the first interlayer via has a melting point higher than a first annealing temperature of the image processing device; and/or the melting point of the conductive substance in the second interlayer via is higher than the second annealing temperature of the pixel processing device.
In an alternative embodiment of the present application, the first and second interlayer vias are TSV tungsten vias or TSV copper vias.
In an alternative embodiment of the application, island isolation layers are arranged among the first device layer, the second device layer and the third device layer.
In a second aspect of the embodiments of the present application, there is provided a method for manufacturing an optical sensor, for manufacturing an optical sensor according to any one of the above, the method for manufacturing an optical sensor comprising:
preparing a first device layer comprising an image processing device and a first electrical connection structure on a bottom substrate layer;
forming an island isolation layer on the surface of the first device layer;
preparing a second device layer at least comprising a pixel processing device and a second electric connection structure, a third device layer at least comprising a photoelectric conversion device, and a first interlayer through hole and a second interlayer through hole filled with conductive substances on the surface of the island isolation layer by adopting a low thermal budget manufacturing process; the first interlayer through hole is respectively electrically connected with the first electric connection structure and the second electric connection structure, and the second interlayer through hole is respectively electrically connected with the second electric connection structure and the connecting layer on the upper surface of the photoelectric sensor.
In a first aspect, the embodiment of the present application sequentially includes, from bottom to top, a first device layer including at least an image processing device and a first electrical connection structure, a second device layer including at least a pixel processing device and a second electrical connection structure, and a third device layer including at least a photoelectric conversion device, where the first device layer includes at least a pixel processing device and a first electrical connection structure; the vertical stacking structure has higher integration level; in the second aspect, compared with the scheme that the image processing circuit and the photoelectric conversion circuit are arranged on the same wafer in the traditional mode, in the embodiment of the application, the photoelectric conversion device and the image processing device are respectively arranged on the third device layer and the second device layer and are mutually independent, the photosurface of the photoelectric conversion device is larger under the condition of a certain surface area, the acquisition and conversion efficiency of optical signals are higher, and the photoelectric conversion efficiency of the optical sensor can be greatly improved; in the third aspect, the optical sensor provided by the embodiment of the application has a stacked structure from bottom to top, and each on-chip device layer can be prepared from bottom to top in turn without overturning devices, so that the occurrence of device damage caused by overturning devices in the traditional FIS process is avoided, the process is more stable, and the yield of products can be further improved; meanwhile, the device layer in the chip can be prepared from bottom to top, no additional packaging is needed, the process is simpler, and the preparation cost is greatly saved; in the fourth aspect, because some signal metal wires may be laid in the image processing device and the second device layer where the image processing device is located, and the signal metal wires may affect the absorption of the optical signal in the photodiode to generate noise, the photoelectric conversion device and the image processing device in the optical sensor provided by the embodiment of the application are respectively located in the third device layer and the second device layer and are mutually independent, the influence of the signal metal wires in the image processing device on the photon absorption in the photoelectric conversion device is greatly reduced, so that the noise of the optical sensor is greatly reduced, and the performance of the optical sensor is improved; in a fifth aspect, the optical sensor provided by the embodiment of the application is in a stacked structure, and has a heat dissipation channel (formed by a first electrical connection structure, a second electrical connection structure, a first interlayer through hole and a second interlayer through hole) in a vertical direction, which is made of a high-temperature resistant material, so that the optical sensor has higher stability. In summary, the optical sensor provided by the embodiment of the application improves the integration level, improves the photoelectric conversion efficiency, improves the product yield, reduces the product noise, and improves the heat dissipation to improve the performance of the optical sensor, thereby solving the technical problem that the performance of the existing photoelectric sensor is poor, and achieving the technical effect of improving the performance of the photoelectric sensor.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute a limitation on the application. In the drawings:
FIG. 1 is a schematic diagram of a conventional FSI process for fabricating an optical sensor;
FIG. 2 is a schematic diagram of a conventional BSI process for fabricating an optical sensor;
FIG. 3 is a schematic diagram illustrating the structural comparison of an optical sensor (right) and a conventional optical sensor (left) according to an embodiment of the present application;
FIG. 4 is a schematic diagram of an optical sensor according to an embodiment of the present application;
FIG. 5 is a schematic flow chart of a method for manufacturing an optical sensor according to an embodiment of the present application;
FIG. 6 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during a manufacturing process;
FIG. 7 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during a manufacturing process;
FIG. 8 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during a manufacturing process;
FIG. 9 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during a manufacturing process;
FIG. 10 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during a manufacturing process;
FIG. 11 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during a manufacturing process;
FIG. 12 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during the manufacturing process;
FIG. 13 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during the manufacturing process;
FIG. 14 is a schematic cross-sectional view of an optical sensor according to an embodiment of the present application during the manufacturing process;
fig. 15 is a schematic cross-sectional structure of an optical sensor according to an embodiment of the present application in a manufacturing process.
Wherein: 1. a bottom substrate layer; 2. an image processing device; 3. a first low dielectric constant insulating layer; 4. a first tungsten via; 5. a first metal interconnection line; 6. a second low dielectric constant insulating layer; 7. an island isolation layer; 8. a thin silicon layer; 9. a first interlayer via; 10. a pixel processing device; 11. a second electrical connection structure; 12. a second insulating layer; 13. a third insulating layer; 14. isolating the deep trench; 15. an ohmic contact thin layer; 16. a photoelectric conversion layer; 17. an ALD silicon dioxide layer; 18. a second interlayer via; 19. a connection layer; 20. a protective layer; 21. a light filtering unit; 22. a photosensitive device layer.
Detailed Description
In carrying out the present application, applicants have found that current photosensors are all relatively poor in performance.
In view of the above problems, embodiments of the present application provide an optical sensor and a method for manufacturing the same. In order to make the objects, technical solutions and advantages of the present application more apparent, the following embodiments are used to further describe an optical sensor and a method for manufacturing the same in detail by referring to the accompanying drawings. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The term "coupled" as used herein includes both direct and indirect coupling (coupling), unless otherwise indicated. In the description of the present application, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the device or element in question must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
In the present application, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
Referring to fig. 3, the conventional photoelectric sensor is to arrange the photodiode and the pixel processing circuit on the same wafer (as shown in the left diagram of fig. 3), but the overall surface area of the photoelectric sensor is limited, and the pixel processing circuit is prepared on the same wafer, so that the laying area of the photodiode is greatly reduced, and the received optical signals are fewer, so that the overall photoelectric conversion efficiency of the photoelectric sensor is lower; the optical sensor provided by the embodiment of the application adopts a stacked type, namely, a photodiode, a pixel processing circuit and an image processing circuit are respectively and independently used as a wafer level and are positioned on different device layers, and the photodiode, the pixel processing circuit and the image processing circuit are communicated with each other in the vertical direction through an electric connection structure and an interlayer through hole.
Referring to fig. 4, an embodiment of the present application provides an optical sensor, including:
a first device layer at least comprising an image processing device 2 and a first electrical connection structure, a second device layer at least comprising a pixel processing device 10 and a second electrical connection structure 11, and a third device layer at least comprising a photoelectric conversion device, which are sequentially arranged from bottom to top on the surface of the bottom substrate layer 1; wherein the first electrical connection structure is electrically connected with the image processing device 2; the bottom substrate layer 1 may be an N-type silicon substrate.
The first interlayer through hole 9 filled with conductive substances is electrically connected with the first electric connection structure and the second electric connection structure 11 respectively;
the second interlayer via hole 18 filled with a conductive substance is electrically connected to the second electrical connection structure 11 and the connection layer 19 on the upper surface of the photosensor, respectively.
In a first aspect, the embodiment of the present application sequentially includes, from bottom to top, a first device layer including at least an image processing device 2 and a first electrical connection structure, a second device layer including at least a pixel processing device 10 and a second electrical connection structure 11, and a third device layer including at least a photoelectric conversion device, which are disposed on a surface of the bottom substrate layer 1; the vertical stacking structure has higher integration level; in the second aspect, compared with the scheme that the image processing circuit and the photoelectric conversion circuit are arranged on the same wafer in the traditional mode, in the embodiment of the application, the photoelectric conversion device and the image processing device 2 are respectively positioned in the third device layer and the second device layer and are mutually independent, the photosurface of the photoelectric conversion device is larger under the condition of a certain surface area, the acquisition and conversion efficiency of optical signals are higher, and the photoelectric conversion efficiency of the optical sensor can be greatly improved; in the third aspect, the optical sensor provided by the embodiment of the application has a stacked structure from bottom to top, and each on-chip device layer can be prepared from bottom to top in turn without overturning devices, so that the occurrence of device damage caused by overturning devices in the traditional FIS process is avoided, the process is more stable, and the yield of products can be further improved; meanwhile, the device layer in the chip can be prepared from bottom to top, no additional packaging is needed, the process is simpler, and the preparation cost is greatly saved; in the fourth aspect, since some signal metal wires may be laid in the image processing device 2 and the second device layer where the image processing device 2 is located, and these signal metal wires may affect the absorption of the optical signal in the photodiode to generate noise, the photoelectric conversion device and the image processing device 2 in the optical sensor provided in the embodiment of the present application are respectively located in the third device layer and the second device layer, and are independent from each other, the influence of the signal metal wires in the image processing device 2 on the photon absorption in the photoelectric conversion device is greatly reduced, so that the noise of the optical sensor is greatly reduced, and the performance of the optical sensor is improved; in a fifth aspect, the optical sensor provided in the embodiment of the present application is a stacked structure, and has a heat dissipation channel (including a first electrical connection structure, a second electrical connection structure 11, a first interlayer through hole 9, and a second interlayer through hole 18) in a vertical direction made of a high temperature resistant material, so that the stability of the optical sensor is higher. In summary, the optical sensor provided by the embodiment of the application improves the integration level, improves the photoelectric conversion efficiency, improves the product yield, reduces the product noise, and improves the heat dissipation to improve the performance of the optical sensor, thereby solving the technical problem that the performance of the existing photoelectric sensor is poor, and achieving the technical effect of improving the performance of the photoelectric sensor.
With continued reference to fig. 4, in an alternative embodiment of the present application, the first device layer includes: a first insulating layer, an image processing device 2, and a first electrical connection structure, wherein:
the image processing device 2 and the first electrical connection structure are both disposed on the first insulating layer, and a first end of the first electrical connection structure is electrically connected to the image processing device 2, and a second end of the first electrical connection structure is electrically connected to a first end of the first interlayer through hole 9. The first insulating layer may be an insulating layer made of a low dielectric constant material, and it should be explained that the low dielectric constant substance (low-k) refers to a dielectric material with a relatively low dielectric constant (k), for example, a dielectric material with a dielectric constant lower than silicon dioxide (k=3.9). The first insulating layer may be a layer, prepared by integration; the first insulating layer may also be formed by separately forming two low-k insulating layers in two steps, for example, in fig. 4, the first low-k insulating layer 3 may be formed first, then the image processing device 2 and a part of the first electrical connection structure may be formed in the first low-k insulating layer 3, after the formation, the second low-k insulating layer 6 may be formed on the basis of the first low-k insulating layer, and then the remaining first electrical connection structure may be formed in the second low-k insulating layer 6. The image processing device 2 may comprise an ISP (Image Signal Process, image signal processing) graphics processing circuit, or a graphics processing circuit employing other elixir.
The first electrical connection structure may be a metal connection line, a metal through hole or a combination of the metal connection structure and the metal through hole, which is not limited in the embodiment of the present application, and may be specifically selected according to practical situations. An embodiment of the present application provides an exemplary first electrical connection structure as in fig. 4, the first electrical connection structure comprising: a first tungsten via 4 and a first metal interconnection line 5 which are overlapped and connected with each other; wherein the first tungsten via 4 extends along the optical sensor in a horizontal direction and the first metal interconnect line 5 extends along the optical sensor in a vertical direction. Through which first tungsten via 4 and first metal interconnect 5 extend and are connected from the lateral and longitudinal directions, respectively, to communicate the first device layer with the second device layer. The number of the through holes 4 and the first metal interconnection lines 5 may be specifically set according to practical situations, for example, the first metal interconnection lines 5 having 7 or more layers, and the number of the through holes 4 is consistent with the internal level of the first insulating layer when the first insulating layer is prepared.
In the embodiment of the application, the metal interconnection line in the first electric connection structure is positioned in the first insulating layer, and the surface of the metal interconnection line is wrapped by the insulating material with low dielectric constant, so that the pollution and the interference of subsequent processes are not easy to receive in the preparation process, and the performance of the optical sensor is further improved.
In an alternative embodiment of the present application, the second device layer includes: thin silicon layer 8 arranged in sequence from bottom to top A second insulating layer 12, a pixel processing device 10, and a second electrical connection structure 11, and a metal via opening in the second insulating layer 12 for connecting the pixel processing device 10 and the second electrical connection structure 11, wherein:
in the embodiment of the application, the thickness of the thin silicon layer 8 is in a range of 180 nm to 220 nm. The thickness of the thin silicon layer 8 is much smaller than the thickness of the underlying substrate 1, but acts like a substrate, providing a basis for the preparation of the second device layer, so that the thick bottom of the thin silicon layer 8 cannot be too thin. In a practical manufacturing process, the thinner the thickness, the more difficult it is to produce the thin silicon layer 8. Therefore, the range of the thickness of the thin silicon layer 8 is not a simple range which is found at will, but the inventor considers various factors and performs a lot of creative labor and can be determined after a lot of simulation experiments and product tests are performed.
The pixel processing device 10 is arranged on the second insulating layer 12, and the pixel processing device 10 is communicated with the second electrical connection structure 11 through a metal through hole. The metal via may be a tungsten via, or may be a copper or other metal via, and is not specifically limited herein. The second electrical connection structure 11 is disposed on the second insulating layer 12, a first end of the second electrical connection structure 11 is electrically connected to the first interlayer via 9, and a second end of the second electrical connection structure 11 is electrically connected to a first end of the second interlayer via 18 and is electrically connected to the pixel processing device 10. The second electrical connection structure 11 and the pixel processing device 10 are both wrapped by the second insulating layer 12, so that the second electrical connection structure is not easy to be polluted and disturbed by subsequent processes in the preparation process, and the performance of the optical sensor is further improved. The second electrical connection structure 11 may be formed by one or more metal lines, or by interconnection of metal vias and metal lines.
The second insulating layer 12 is a low dielectric constant insulating layer, the second insulating layer 12 can be made of a silicon material, and the thickness of the second insulating layer 12 is in a range of 100 nm to 200 nm.
In an alternative embodiment of the present application, the third device layer includes: a third insulating layer 13, a photosensitive device layer 22, and a photoelectric conversion layer 16, wherein,
the third insulating layer 13 is disposed on the surface of the second device layer, and if the second insulating layer 12 is a silicon layer, the third insulating layer 13 is a silicon epitaxial layer. The third insulating layer 13 is used as a substrate for preparing a third device layer, and since the third device layer is also provided with the isolation deep groove 14, the isolation deep groove 14 penetrates through the photoelectric conversion layer 16 and extends to the third insulating layer 13, each photosensitive device can be isolated through the arrangement of the isolation deep groove 14, and mutual interference of optical signals received between two adjacent photosensitive devices or between two photosensitive devices with a relatively short distance is prevented, so that the imaging effect is more fidelity.
The deeper the thickness of the isolation deep trench 14, the better the isolation effect, and the more improved the photosensitivity effect, photoelectric conversion efficiency, and image quality of the third device layer. Therefore, the third insulating layer 13 is a thick silicon layer, the thickness of the thick silicon layer is greater than that of the thin silicon layer 8 in the second device layer, and the thickness of the thick silicon layer is 10-25 um, so that the influence among all photosensitive units can be reduced to the greatest extent on the premise of ensuring the performance of the optical sensor, and the photosensitive effect of the optical sensor in the embodiment of the application is further improved.
The inner wall of the isolation deep trench 14 has an ohmic contact thin layer 15, and the ohmic contact thin layer 15 may be formed by: a composite film layer of silicon oxide and silicon nitride is firstly formed on the inner surface of the isolation deep trench 14, then a photomask is used for covering the isolation deep trench 14 and the composite film layer on the inner surface, a BOSCH etching method is used for etching the second interlayer through hole 18, then Ti/TiN is used for forming an ohmic contact thin layer 15, and finally tungsten materials are filled in the second interlayer through hole 18. According to the embodiment of the application, through the ohmic contact effect formed between the silicon dioxide and the silicon nitride, potential barriers can be reduced, and the electron flow efficiency and the electron conversion efficiency are improved, so that the photosensitive efficiency and the photoelectric conversion efficiency of the optical sensor provided by the embodiment of the application are improved. The photosensitive device layer 22 is disposed on the upper surface of the optical sensor for collecting optical signals. The photosensitive device layer 22 includes a plurality of lenses arranged in a regular pattern, having a spherical surface and a mesh lens, and the photoelectric converter 16 collects light and photoelectrically converts the light into an electric signal when the light passes through the lens.
The photoelectric conversion layer 16 is disposed on the third insulating layer 13, is in signal connection with the photosensitive device layer 22, and is electrically connected with the second electrical connection structure 11 through the second interlayer via 18, and the photoelectric conversion layer 16 is used for converting an optical signal into an electrical signal. The photoelectric conversion layer 16 is provided with a plurality of photodiodes, and the photodiodes may be N-type injected PN photodiodes or other types of diodes such as PIN, which are not specifically limited, and may be specifically selected according to practical situations, and only needs to implement a function of converting an optical signal into an electrical signal.
With continued reference to fig. 4, in an alternative embodiment of the present application, the third device layer includes: the third device layer further includes: the filter layer, which may be ALD (atomic layer deposition, monoatomic layer deposition, also known as atomic layer deposition or atomic layer epitaxy (atomic layer epitaxy) silicon dioxide layer 17, is a chemical vapor deposition technique based on an ordered, surface self-saturation reaction) silicon dioxide layer. The filter layer includes a plurality of filter units 21, the filter units 21 are in one-to-one correspondence with the photosensitive device positions in the photosensitive device layer 22 in the vertical direction, and are spaced from the isolation deep trenches 14. The light received in the photosensitive device layer 22 can be split through the light filtering unit 21, and the Bayer array filter is formed through the photosensitive device layer 22, so that subsequent signal processing is more convenient, the signal processing efficiency is improved, and the working efficiency of the optical sensor in the embodiment of the application is further improved.
In an alternative embodiment of the present application, the melting point of the conductive substance in the first interlayer via 9 is higher than the first annealing temperature of the image processing device 2; and/or the melting point of the conductive substance within the second interlayer via 18 is higher than the second annealing temperature of the pixel processing device 10.
In forming the image processing device 2 in the first device layer or in the post-ion implantation annealing process and the stress relief annealing process of forming the pixel processing device 10 in the second device layer, a low thermal budget flash millisecond annealing process is employed, and the low thermal budget flash millisecond annealing process has an annealing temperature ranging from 750 ℃ to 1100 ℃. The first annealing temperature is lower than the melting point of the conductive material in the first interlayer through hole 9, and the second annealing temperature is lower than the melting point of the conductive material in the second interlayer through hole 18, so that the prepared image processing device 2 and pixel processing circuits can be effectively protected from being influenced due to too high temperature in the subsequent process preparation, and the product yield is improved.
The low thermal budget flash millisecond anneal process (Low Thermal Budget Flash Millisecond Annealing) is an anneal process for integrated circuits. It heats and rapidly cools the semiconductor device by flash millisecond annealing techniques in a short period of time to improve the performance and reliability of the device.
In an alternative embodiment of the present application, the first and second interlayer vias 9 and 18 are TSV tungsten vias or TSV copper vias. The interconnection between two adjacent device layers is realized through the interlayer through holes, the connection distance is shorter, the short-path electric connection is realized, the noise interference probability and the signal loss are reduced, and the performance of the optical sensor is further improved.
In an alternative embodiment of the application, island isolation layers 7 are provided between the first, second and third device layers.
The island isolation layer 7 can be made of silicon dioxide material, and the silicon dioxide island isolation layer 7 is arranged, and as the silicon dioxide island isolation layer 7 is arranged on the thin silicon layer 8 in the first device layer and the second device layer, the formed pixel processing device 10 is partially arranged in the thin silicon layer 8, and the leakage path can be cut off through the island isolation layer 7, so that no leakage is generated, and high-temperature annealing is not needed. And the use of high temperature anneals can damage devices in the bottom first device layer. High-temperature annealing is not needed, so that the damage to the functional devices of the first device layer during the preparation of the second device layer above is avoided, and the method is an important link in the preparation method of the optical sensor.
The island isolation layer 7 is formed in a wafer bonding mode, electric leakage between the first device layer and the second device layer above the three-dimensional integrated circuit is avoided, vertical arrangement of the first device layer and the second device layer above the three-dimensional integrated circuit is realized, a metal interconnection path between the first device layer and the second device layer above the first device layer is short, a corresponding signal transmission path is short, metal interconnection delay and power consumption can be managed and controlled better, and the overall performance and speed of the optical sensor are improved.
Referring to fig. 5, an embodiment of the present application provides a method for manufacturing an optical sensor, which is used for manufacturing an optical sensor according to any one of the above, and the method for manufacturing an optical sensor includes the following steps 501-503:
step 501, preparing a first device layer containing the image processing device 2 and a first electrical connection structure on the bottom substrate layer 1;
step 502, forming an island isolation layer 7 on the surface of the first device layer;
step 503, preparing a second device layer at least comprising a pixel processing device 10 and a second electrical connection structure 11, a third device layer at least comprising a photoelectric conversion device, and a first interlayer via 9 and a second interlayer via 18 filled with a conductive material on the surface of the island isolation layer 7 by using a low thermal budget manufacturing process; the first electrical connection structure is electrically connected with the image processing device 2, the first interlayer through hole 9 is electrically connected with the first electrical connection structure and the second electrical connection structure 11 respectively, and the second interlayer through hole 18 is electrically connected with the second electrical connection structure 11 and the connection layer 19 on the upper surface of the photoelectric sensor respectively.
The connection layer 19 is used for electrically connecting the optical sensor of the present application with an external device. The connection layer 19 may be made of any conductive material such as aluminum pad. A protection layer 20 may be further disposed on a part of the surface of the connection layer 19, and only a part of the connection layer 19 is exposed for connecting an external device through shielding of the protection layer 20, so as to reduce the risk of damaging the connection layer 19. The protective layer 20 may be made of a passive material such as polytetrafluoroethylene, carbon fiber, copper oxide, platinum, etc., that is, a protective layer 20 is formed.
According to the preparation method of the optical sensor, the first device layer, the second device layer and the third device layer are stacked in the vertical direction during manufacturing, and the first device layer and the second device layer are bonded through the island isolation layer 7, so that on one hand, connection between the first device layer and the second device layer above is achieved, and on the other hand, the first device layer and the second device layer above are effectively isolated, and electric leakage of the second device layer above and the third device layer to the first device layer is avoided.
The silicon dioxide island isolation layer 7 is an important link for realizing the integration of the first device layer and the second and third device layers above in the vertical direction. The first interlayer via 9 realizes the electrical connection between the first device layer and the second device layer, and the second interlayer via 18 realizes the connection between the second device layer and the third device layer, i.e. realizes the communication of the optical sensor in the vertical direction.
The preparation method of the optical sensor in the embodiment of the application is not used for forming a 3D packaging structure, but is used for preparing a real 3D structure, namely the stacked optical sensor. The whole optical sensor is provided with only one bottom substrate 1, so that the vertical height of the whole optical sensor can be smaller, and the size of the whole optical sensor is smaller; and simultaneously, the substrate cost of the optical sensor is lower.
In an optional embodiment of the application, the method for preparing the optical sensor further includes the following steps:
forming an island isolation layer 7 on the surface of the formed second device layer;
forming a third device layer containing at least a photoelectric conversion device and a second interlayer via 18 filled with a conductive substance on the surface of the island isolation layer 7;
the following describes the preparation process of the optical sensor provided in the embodiment of the present application in detail.
Referring to fig. 6, an image processing device 2 is prepared on an N-type silicon substrate, wherein the image processing device 2 includes an ISP graphic processing circuit;
referring to fig. 7, on the basis of the structure formed in fig. 6, a second low-dielectric-constant insulating layer 6, a first tungsten via 4, and a first metal interconnection line 5 are sequentially prepared; in an alternative embodiment, more than 7 layers of the first metal interconnect lines 5 may be sequentially prepared in a cyclic manner;
referring to fig. 8, on the basis of the structure formed in fig. 7, wafer bonding of SiO2 and SiO2 is performed on a bottom wafer, and then a low-temperature N-type thin silicon layer 8 is formed;
referring to fig. 9, a pixel processing device 10 is fabricated based on the structure formed in fig. 8;
referring to fig. 10, on the basis of the structure formed in fig. 9, a second insulating layer 12 and a first interlayer via hole 9 are fabricated;
referring to fig. 11, a second electrical connection structure 11 is fabricated based on the structure formed in fig. 10; the second electrical connection structure 11 is a metal interconnect, and in an alternative embodiment, more than 7 layers of metal interconnect can be sequentially and circularly prepared;
referring to fig. 12, on the basis of the structure formed in fig. 11, a third insulating layer 13 is bonded to the wafer structure in fig. 11 and is attached to the second insulating layer 12.
Referring to fig. 13, on the basis of the structure formed in fig. 12, an isolation deep trench 14 is fabricated, and an ohmic contact thin layer 15 is prepared in the isolation deep trench 14; the ohmic contact thin layer 15 is formed by filling a SiO2 and Si3N4 composite layer in the isolation deep trench 14 and filling SiO217 by atomic deposition;
referring to fig. 14, on the basis of the structure formed in fig. 13, N-type implantation is performed to form a photoelectric conversion layer 16, a second interlayer via 18 is formed, and then a connection layer 19 and a protection layer 20 are formed.
Referring to fig. 15, on the basis of the structure formed in fig. 14, a filter unit 21 and a photosensitive device layer 22 are fabricated.
In an alternative embodiment of the present application, the third insulating layer 13 is bonded to the wafer structure in fig. 10 by H ion implantation, and may be bonded by the following two methods:
in the first way, a silicon germanium (Si-Ge) stripping layer is formed on a donor silicon wafer (donor wafer), a thin silicon layer 8 is epitaxially formed on the silicon germanium stripping layer, and a silicon dioxide island isolation layer 7 is formed on the thin silicon layer 8;
the donor wafer is bonded to the device layer, i.e., handle wafer (fig. 11), upside down to form a silicon-on-insulator wafer (SO Iwafer), and then stripped at the sige lift-off layer by high pressure nitrogen to form a silicon dioxide island isolation layer 7 and a thin silicon layer 8 over the device layer.
Can be carried out at normal temperature, the surface of the thin silicon layer 8 can be very thin, the consistency (uniformity) of the silicon dioxide island isolation layer 7 is also better, the quality of the thin silicon layer 8 can be improved, and the manufacturing cost can be reduced
In a second way, the step of forming the island isolation layer 7 specifically includes:
a porous silicon (porius si) layer is made on a donor silicon wafer (donor wafer), a high-quality thin silicon layer 8 is epitaxially grown on the porous silicon layer, and a silicon dioxide island isolation layer 7 is formed on the thin silicon layer 8;
the donor silicon wafer is inversely bonded with a device layer, namely an operation silicon wafer (handle wafer), the donor silicon wafer (donor wafer) is peeled off by high-pressure water flow, the porous silicon layer is etched by Hydrogen Fluoride (HF) and hydrogen peroxide (H2O 2), the surface of the porous silicon layer is flattened by high-temperature 1150 ℃ hydrogen annealing, and a silicon dioxide island isolation layer 7 and a thin silicon layer 8 are formed on the device layer formed in FIG. 11, so that the quality of the thin silicon layer 8 can be improved, and the manufacturing cost can be reduced.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims (16)

1. An optical sensor, comprising:
a first device layer at least comprising an image processing device and a first electrical connection structure, a second device layer at least comprising a pixel processing device and a second electrical connection structure, and a third device layer at least comprising a photoelectric conversion device, which are sequentially arranged on the surface of the bottom substrate layer from bottom to top; wherein the first electrical connection structure is electrically connected with the image processing device;
the first interlayer through hole is filled with conductive substances and is respectively and electrically connected with the first electric connection structure and the second electric connection structure;
and the second interlayer through holes filled with conductive substances are respectively and electrically connected with the second electric connection structure and the connecting layer on the upper surface of the photoelectric sensor.
2. The optical sensor of claim 1, wherein the first device layer comprises:
a first insulating layer;
an image processing device disposed on the first insulating layer;
the first electric connection structure is arranged on the first insulating layer, the first end of the first electric connection structure is electrically connected with the image processing device, and the second end of the first electric connection structure is electrically connected with the first end of the first interlayer through hole.
3. The optical sensor of claim 2, wherein the first electrical connection structure comprises: the first tungsten through hole and the first metal interconnection line are mutually overlapped and connected; the first tungsten through hole extends along the horizontal direction of the optical sensor, and the first metal interconnection line extends along the vertical direction of the optical sensor.
4. The optical sensor of claim 1, wherein the second device layer comprises:
the thin silicon layer and the second insulating layer are sequentially arranged from bottom to top;
a pixel processing device disposed on the second insulating layer;
the second electric connection structure is arranged on the second insulating layer, the first end of the second electric connection structure is electrically connected with the first interlayer through hole, and the second end of the second electric connection structure is electrically connected with the first end of the second interlayer through hole and is electrically connected with the pixel processing device.
5. The optical sensor of claim 4, wherein the second device layer further comprises:
and the metal through hole is arranged on the second insulating layer and is used for connecting the pixel processing device with the second electric connection structure.
6. The optical sensor of claim 4, wherein the second insulating layer is a low dielectric constant insulating layer.
7. The optical sensor of claim 1, wherein the third device layer comprises:
the third insulating layer is arranged on the surface of the second device layer;
the photosensitive device layer is arranged on the upper surface of the optical sensor and is used for collecting optical signals;
the photoelectric conversion layer is arranged on the third insulating layer, is in signal connection with the photosensitive device layer, and is electrically connected with the second electric connection structure through the second interlayer through hole, and the photoelectric conversion layer is used for converting the optical signal into an electric signal.
8. The optical sensor of claim 7, wherein the third insulating layer is a thick silicon layer having a thickness greater than a thin silicon layer in the second device layer.
9. The optical sensor of claim 8, wherein the thick silicon layer has a thickness of 10-25 um.
10. The optical sensor of claim 7, wherein the third device layer further comprises:
and isolating deep trenches penetrating through the photoelectric conversion layer and extending to the third insulating layer.
11. The optical sensor of claim 10, wherein the isolated deep trench has an ohmic contact layer on an inner wall.
12. The optical sensor of claim 10, wherein the third device layer further comprises:
the filter layer comprises a plurality of filter units, wherein the filter units correspond to the photosensitive devices in the photosensitive device layer in a one-to-one mode in the vertical direction, and are arranged at intervals with the isolation deep grooves.
13. The optical sensor of claim 1, wherein a melting point of the conductive substance within the first interlayer via is higher than a first annealing temperature of the image processing device; and/or the melting point of the conductive substance in the second interlayer through hole is higher than the second annealing temperature of the pixel processing device.
14. The optical sensor of claim 1, wherein the first and second inter-layer vias are TSV tungsten vias or TSV copper vias.
15. The optical sensor of any one of claims 1-14, wherein island isolation layers are disposed between the first, second, and third device layers.
16. A method of manufacturing an optical sensor according to any one of claims 1 to 15, comprising:
preparing a first device layer comprising an image processing device and a first electrical connection structure on a bottom substrate layer;
forming an island isolation layer on the surface of the first device layer;
preparing a second device layer at least comprising a pixel processing device and a second electric connection structure, a third device layer at least comprising a photoelectric conversion device, and a first interlayer through hole and a second interlayer through hole filled with conductive substances on the surface of the island isolation layer by adopting a low thermal budget manufacturing process; the first interlayer through hole is respectively electrically connected with the first electric connection structure and the second electric connection structure, and the second interlayer through hole is respectively electrically connected with the second electric connection structure and the connecting layer on the upper surface of the photoelectric sensor.
CN202310883046.1A 2023-07-18 2023-07-18 Optical sensor and preparation method thereof Pending CN116960142A (en)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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CN116960142A true CN116960142A (en) 2023-10-27

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