CN116956795A - Connection signal grouping method based on distance distribution - Google Patents

Abstract

The invention discloses a connection signal grouping method based on distance distribution, which comprises the following steps: selectively splitting the connection signals according to different FPGAs where the load nodes of the connection signals are located so as to split the connection signals where the load nodes are located in the same FPGA; calculating the distance between every two split connecting signals; and selecting the connection signal with the least total number of the driving node and the load node as an anchor signal to be placed in the constructed container, iteratively updating the gravity center of the container, and continuously placing the connection signal with the closest gravity center in the container until the container capacity is reached, so as to realize the grouping of the connection signals. The invention can reduce the use of cable between FPGAs and save cable resources by selectively splitting signals; and wiring resources at die cross positions in the FPGA, which are consumed by signals classified into the same group, are fewer, so that the wiring difficulty is reduced, and the use efficiency of the wiring resources is improved.

Description

Connection signal grouping method based on distance distribution

Technical Field

The invention belongs to the technical field of integrated circuits, and particularly relates to a connection signal grouping method based on distance distribution.

Background

At present, the scale of a user design circuit often needs a plurality of FPGAs (Field Programmable Gate Array, field programmable gate arrays) to be accommodated, so that the user design circuit must be integrally divided into a plurality of sub-parts to complete prototype verification, and the sub-parts need to communicate through physical cables (cables) between FPGAs, and signals communicated between FPGAs are called connection signals. The interior of each FPGA can be further subdivided into a plurality of SLRs (Super Logic Region, super logic areas, also called Die), that is, the FPGA is formed by combining a plurality of SLRs into a certain topological shape (linear structures are common), and the physical cable between the FPGAs is specifically embodied as connection between some SLRs of two FPGAs.

The connection signals represent communication signals between a pair of FPGAs, and because the number of the cable between the FPGAs is very limited and is often larger than that of the cable, the connection signals need to be grouped according to a certain proportion, and each group shares one cable.

The connection signal is usually only one driving node (transmitting node), but there may be multiple load nodes (receiving nodes), and in the connection signal grouping process in the prior art, the connection signal is first split completely, that is, the load node and the driving node which are originally connected by the same connection signal are split into different connection signals according to the number of the load nodes, and each split signal has only one driving node and one load node, as shown in fig. 1, the splitting method has the following disadvantages: (1) The complete splitting of the signals of the multiple load nodes may cause waste of cable resources although the original logic of the circuit is not affected, as shown in the left diagram of fig. 1, 3 signals need to be transmitted after the complete splitting (the three signals may be separated into the same signal group or different signal groups, but the load of the cable is increased). In essence, when part of load nodes of a connection signal are in the same FPGA, the connection signal of the part can share a net (circuit connection), as shown in the right diagram in fig. 1, load nodes a and B are divided in FPGA2, and load node C is divided in FPGA3, so that the connection signal only needs to be split into two parts.

(2) In the prior art, signal combination is performed on connection signals with minimum distances between two sides of a driving node and a load node by using an approximation method, a current algorithm gradually searches for connection signals with minimum sum of distances between two ends (the driving node and the load node) from Die of the edge where the driving node is located, if the number of signals in each group is more than or equal to 3, more than or equal to 3 signals are needed, the sum of distances between the driving node and the load node is minimum, and then the current seed signals need to traverse through the rest signals and select all combination conditions of other two signals. This consumes a lot of time, and as the proportion of packets increases gradually, the efficiency problem becomes more and more serious, eventually becoming a time bottleneck for the overall process flow, and no longer acceptable.

(3) In addition, a connection signal may have multiple load nodes, and the load nodes may exist on the transmitting end FPGA where the driving node is located, or may also exist on the receiving end FPGA at the same time, as shown in fig. 2. When the distance between the connection signals is calculated, the distance calculation is carried out in the mode of a shortest path between the points by the existing method, the distance result is inaccurate, the distance result is larger than the actual value, the grouping is inaccurate, and finally more waste of wiring resources in the FPGA is caused.

Disclosure of Invention

In order to solve the problems in the prior art, the invention provides a connection signal grouping method based on distance distribution. The technical problems to be solved by the invention are realized by the following technical scheme:

the invention provides a connection signal grouping method based on distance distribution, which comprises the following steps:

s1: selectively splitting the connection signals according to different FPGAs where the load nodes of the connection signals are located so as to split the connection signals where the load nodes are located in the same FPGA;

s2: calculating the distance between every two connecting signals split together in the step S1;

s3: and selecting the connection signal with the least total number of the driving node and the load node as an anchor signal to be placed in a constructed container, iteratively updating the gravity center of the container, and continuously placing the connection signal with the closest gravity center in the container until the container capacity is reached, so as to realize the grouping of the connection signals.

In one embodiment of the present invention, the S1 includes:

classifying the directions of the connection signals according to the FPGA positions of the connection signal driving nodes, and determining the positions of the driving nodes of the connection signals and each load node; and then, according to whether the FPGAs where the load nodes of the connection signals are located are identical, selectively splitting the connection signals, namely, splitting the connection signals of different FPGAs where the load nodes are located, wherein the connection signals of the same FPGA where the load nodes are located are not split, so that the split connection signals comprise connection signals of which the drive nodes are located on the same transmitting end FPGA, the load nodes are all located on the same receiving end FPGA, the split connection signals also comprise connection signals of which the drive nodes are located on the same transmitting end FPGA, part of the load nodes are located on the same receiving end FPGA, and part of the load nodes are located on the current transmitting end FPGA.

In one embodiment of the present invention, the connection signals split together in step S1 include connection signals in which the driving nodes are located in the same transmitting end FPGA and the load nodes are all located in the same receiving end FPGA; the system further comprises a driving node located on the same transmitting end FPGA, a load node located on the same receiving end FPGA and a connecting signal located on the transmitting end FPGA.

In one embodiment of the present invention, when the driving nodes of the two connection signals are both located in the same transmitting end FPGA and the load nodes are both located in the same receiving end FPGA, the distance between the two connection signals is equal to the distance between the driving nodes of the connection signals plus the distance between the two nearest load nodes of the two connection signals.

In one embodiment of the invention, when the driving nodes of the two connection signals are both located in the same transmitting end FPGA and the load nodes are both located in the same receiving end FPGA, the load nodes of the same connection signal in the receiving end FPGA are divided into the same area, and the distance between the two connection signals is equal to the distance between the driving nodes of the connection signals plus the distance between different areas in the receiving end FPGA.

In one embodiment of the invention, when the driving nodes of the two connection signals are both located in the same transmitting end FPGA, and the load node of at least one connection signal of the two connection signals is not only located in the receiving end FPGA but also in the current transmitting end FPGA, the driving node and the load node of the same connection signal in the transmitting end FPGA are divided into the same area, the load node of the same connection signal in the receiving end FPGA is divided into the same area, and the distance between the two connection signals is equal to the distance between different areas in the transmitting end FPGA plus the distance between different areas in the receiving end FPGA.

In one embodiment of the present invention, the S3 includes:

s3.1: in the connection signals split together in the step S1, selecting the connection signal with the least total number of the driving node and the load node as an anchor signal;

s3.2: constructing a container Grp for placing connection signals divided into a group, and placing the selected anchor signals in the container Grp, wherein the upper capacity limit of the container Grp is the maximum number of the connection signals divided into the group;

s3.3: updating the gravity Center point of the container Grp, wherein the gravity Center point comprises a gravity center_L of the container Grp on a transmitting end FPGA and a gravity center_R on a receiving end FPGA;

s3.4: traversing the connection signals of other unfinished packets, and calculating the distance between each connection signal and the gravity Center point by utilizing the step S2, wherein the gravity Center point is equivalent to the connection signal of one driving node at center_L and the load node at center_R; adding a connection Signal Signal_min_d closest to the gravity center point into the container Grp;

s3.5: if the number of the connection signals in the container Grp reaches the upper limit M of the number, completing a grouping, and jumping to the step S3.1; if the connection signals of the remaining outstanding packets are less than M, grouping all the remaining signals into one group; if the number of signals in the container Grp does not reach M, the step S3.3 is skipped, and the connection signals meeting the conditions are continuously added until the number reaches M.

In one embodiment of the present invention, the S3.1 includes:

traversing all connection signals, recording the number of connection signal endpoints, and taking the connection signal with the minimum endpoint number as an anchor signal, wherein the endpoints comprise a driving node and a load node; if the number of endpoints of the plurality of connection signals is the same, the connection signals with more concentrated endpoint distribution are taken as anchor signals, wherein the meaning of more concentrated endpoint distribution is as follows: the driving node of the FPGA at the transmitting end and the sum ds1 of the two-by-two distances of all the load nodes are equal, the sum ds2 of the two-by-two distances of all the load nodes on the FPGA at the receiving end is equal, and the distribution of connecting signal endpoints with smaller ds1+ds2 is more concentrated.

In one embodiment of the present invention, the expression of Center of gravity center_l and Center of gravity center_r is:

wherein pos_l (i, j) represents a position coordinate of a j-th endpoint of the i-th connection signal in the container Grp in the transmitting end FPGA, pos_r (i, j) represents a position coordinate of a j-th endpoint of the i-th connection signal in the container Grp in the receiving end FPGA, ni is a total number of endpoints of the i-th connection signal in the transmitting end FPGA, and Pi is a total number of endpoints of the i-th connection signal in the receiving end FPGA.

Compared with the prior art, the invention has the beneficial effects that:

1. according to the connection signal grouping method based on distance distribution, connection signals to be transmitted between FPGAs are selectively split, so that the use of physical cables (cables) between the FPGAs can be reduced, and precious cable resources are saved; the signal distance calculation method considers the wiring factors of the driving node and the load node and the wiring factors of the load node and the load node, provides more accurate basis for determining which signals form a group, and is more accurate in grouping; the signal grouping method can lead the signals which are divided into the same group to be concentrated in distance from the transmitting end FPGA or the receiving end FPGA, so that the wiring resources at the die cross (gaps between adjacent die in the FPGA) in the FPGA consumed by the signals which are divided into the same group are fewer, the wiring difficulty is reduced, and the use efficiency of the wiring resources is improved.

2. The connection signal grouping method based on distance distribution uses a gravity center method to group signals, specifically constructs a container for placing connection signals which are divided into a group, continuously updates the key points of the container, adds the connection signal which is closest to the gravity center into the container, and thus obtains the signal which is closest to the gravity center as a group.

The present invention will be described in further detail with reference to the accompanying drawings and examples.

Drawings

FIG. 1 is a diagram showing the comparison of traces of different connection signal splitting modes in the prior art;

FIG. 2 is a schematic diagram of node distribution of connection signals of multiple load nodes;

fig. 3 is a flowchart of a connection signal grouping method based on distance distribution according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of selective splitting and signal line placement according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of a calculation process for selecting a point-to-point shortest distance in split according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of a calculation process of a point-to-point shortest distance between a sending end and a receiving end in a selective splitting process according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of a region distance calculation process in selection splitting according to an embodiment of the present invention;

fig. 8 is a schematic diagram of a connection region distance calculation method according to an embodiment of the present invention.

Detailed Description

In order to further describe the technical means and effects adopted by the present invention to achieve the preset purpose, a connection signal grouping method based on distance distribution according to the present invention is described in detail below with reference to the accompanying drawings and the detailed description.

The foregoing and other features, aspects, and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments when taken in conjunction with the accompanying drawings. The technical means and effects adopted by the present invention to achieve the intended purpose can be more deeply and specifically understood through the description of the specific embodiments, however, the attached drawings are provided for reference and description only, and are not intended to limit the technical scheme of the present invention.

It should be noted that in this document relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in an article or apparatus that comprises the element.

Referring to fig. 3, fig. 3 is a flowchart of a connection signal grouping method based on distance distribution according to an embodiment of the present invention. The connection signal grouping method comprises the following steps:

s1: and selectively splitting the connection signals according to different FPGAs where the load nodes of the connection signals are located so as to split the connection signals where the load nodes are located in the same FPGA.

For all connection signals between a pair of FPGAs, first, the connection signals are divided into two parts according to signal directions, because only connection signals in the same direction can share one cable, and connection signals in opposite directions cannot share the cable. Specifically, the direction classification of the connection signals is performed according to the positions of the FPGA (called a transmitting end FPGA) where the driving nodes of the connection signals are located, and the positions of the driving nodes of the connection signals and each load node are determined, because all signals are transmitted from the driving nodes to the load nodes; then, according to whether the FPGAs where the load nodes of the connection signals are located (referred to as receiving end FPGAs) are identical, the connection signals are selectively split, namely, the connection signals of the same FPGAs where the load nodes are located are not split, the connection signals of different FPGAs where the load nodes are located are split, the split connection signals are output from different pin pins, and a plurality of load nodes in the same FPGA are interconnected by using connection lines inside the FPGAs, as shown in fig. 4.

In this step, the split connection signals include connection signals in which the driving nodes are located in the same transmitting end FPGA, the load nodes are all located in the same receiving end FPGA, and further include connection signals in which the driving nodes are located in the same transmitting end FPGA, the load nodes are partially located in the same receiving end FPGA, and the load nodes are partially located in the transmitting end FPGA, as shown in fig. 6 and fig. 7.

S2: the distance between every two split connection signals is calculated.

The step provides three distance calculation methods, which are specifically as follows:

(1) After the selective splitting of the signals by using step S1 of this embodiment, there may be a plurality of load nodes for some connection signals, and the driving nodes for two connection signals are all located in the same transmitting end FPGA, and the plurality of load nodes are all located in the same receiving end FPGA, where the distance between two connection signals is: the distance between the driving nodes of the two connection signals plus the distance between the nearest load nodes of the two connection signals. The load nodes are calculated according to the shortest distance because all load nodes of one connection signal must be connected via the internal signal lines of the FPGA, so that the nearest distance between the load nodes of two connection signals can represent the distance between the two connection signals when calculating the distance. Referring to fig. 5, fig. 5 is a schematic diagram illustrating a process of selecting and splitting a point-to-point shortest distance calculation according to an embodiment of the present invention. Fig. 5 includes two connection signals signal1 and signal2, wherein the driving node S1 of signal1 and the driving node S2 of signal2 are located in Die1 and Die3 in FPGA1 (transmitting FPGA), respectively; signal1 comprises a load node a, signal2 comprises two load nodes B, C, load node a of signal1 and load node B, C of signal2 are located in Die1, die2 and Die4, respectively, of FPGA2 (receiving end FPGA), so that the distance between two connection signals signal1 and signal2 is equal to the sum of the distance d1 between drive nodes S1, S2 and the distance d2 between load nodes A, B, and the distance d1 between drive nodes S1, S2 is equal to the distance between Die1 and Die4 in FPGA1, i.e. the number of Die correlation (slots) 2 between Die1 and Die3 in FPGA 1; the distance d2 between the load nodes A, B is equal to the distance between Die1 and Die2 in FPGA2, i.e. the number of Die correlation between Die1 and Die3 in FPGA2 is 1, and at this time, the distance between signal1 and signal2 is expressed as:

Distance(signal1,signal2)＝d1+d2＝2+1＝3。

(2) After the selective splitting of the signals in step S1 of this embodiment, there may be a plurality of load nodes connected to the signals, and these load nodes may exist not only on the receiving end FPGA but also on the transmitting end FPGA, and similarly, for the load nodes and/or the driving nodes located on the transmitting end FPGA, the connection should be performed via the FPGA internal connection lines anyway, so when calculating the distance between the two connection signals in the transmitting end FPGA, the shortest distance between the driving nodes and the load nodes should be also calculated according to the two connection signals in the transmitting end FPGA. That is, when the driving nodes of the two connection signals are both located in the same transmitting end FPGA, and the load node of at least one connection signal of the two connection signals is located not only in the receiving end FPGA but also in the current transmitting end FPGA, the distance between the two connection signals is equal to the nearest distance between the driving nodes and/or the load nodes of different connection signals on the transmitting end FPGA plus the nearest distance between the load nodes of different connection signals on the receiving end FPGA. In other words, on the transmitting end FPGA, the distance between the two connection signals may be the distance between the two driving nodes of the different connection signals, or may be the distance between the driving node of the different connection signals and the load node, and the shortest distance may be taken.

Referring to fig. 6, fig. 6 is a schematic diagram of a calculation process of a point-to-point shortest distance between a transmitting end and a receiving end in a selection splitting process according to an embodiment of the invention. Fig. 6 includes two connection signals signal1 and signal2, wherein the driving node S1 of signal1 and the driving node S2 of signal2 are located in Die1 and Die3 in FPGA1, respectively; signal1 includes two load nodes A, B and signal2 includes two load nodes C, D; the load node a of signal1 is located at Die2 in FPGA1 (transmitting end FPGA), the load node B of signal1 is located at Die1 in FPGA2, the load node C of signal2 is located at Die4 in FPGA1, and the load node D of signal2 is located at Die3 in FPGA2 (receiving end FPGA), so that the distance between two connection signals signal1 and signal2 is equal to the distance between the drive node S2 and load node a in the same FPGA (FPGA 1) plus the distance between the load node B and load node D in the same FPGA (FPGA 2), that is,

the distance between signal1 and signal2 is expressed as:

Distance(signal1,signal2)＝d1+d2＝1+2＝3。

(3) Further, after the selective splitting of the signals in step S1 of the present embodiment, there may be a plurality of load nodes for some connection signals, and these load nodes may exist not only in the receiving FPGA but also in the transmitting FPGA, and since the driving node and the load node of the same connection signal in the transmitting FPGA are connected by connecting lines anyway, all the load nodes of the connection signal in the receiving FPGA are connected by connecting lines anyway. Therefore, the connection signals can be communicated by the connection lines at any place where the connection lines pass through, and further, the calculation of the distance can be performed according to the area where the connection lines pass through. If the areas overlap, the distance is 0, and if the areas do not overlap, the shortest distance between the two areas is obtained. That is, when the driving nodes of the two connection signals are both located in the same transmitting end FPGA, and the load node of at least one connection signal of the two connection signals is not only located in the receiving end FPGA but also located in the current transmitting end FPGA, the driving node and the load node of the same connection signal in the transmitting end FPGA are divided into the same area, the load node of the same connection signal in the receiving end FPGA is divided into the same area, and the distance between the two connection signals is equal to the distance between different areas in the transmitting end FPGA plus the distance between different areas in the receiving end FPGA.

Referring to fig. 7, fig. 7 is a schematic diagram of a region distance calculation process in selection splitting according to an embodiment of the invention. Fig. 7 includes two connection signals signal1 and signal2, wherein the driving node S1 of signal1 and the driving node S2 of signal2 are located in Die1 and Die3 in FPGA1, respectively; signal1 includes three load nodes A, B, C and signal2 includes three load nodes D, E, F. The load node A of the signal1 is positioned in a Die3 in an FPGA1 (a transmitting end FPGA), the load nodes B and C of the signal1 are respectively positioned in a Die1 and a Die2 in an FPGA2 (a receiving end FPGA), the load node E of the signal2 is positioned in a Die2 in the FPGA1, the load node D, F of the signal2 is respectively positioned in a Die3 and a Die4 in the FPGA2, and according to the region division rule, the driving node S1 and the load node A of the signal1 are divided into a first region and the driving node S2 and the load node E of the signal2 are divided into a second region in the FPGA 1; similarly, the load node B, C of signal1 is divided into a third region and the load node D, F of signal2 is divided into a fourth region, where the distance between two connection signals signal1 and signal2 is the distance d1 between the first region and the second region plus the distance d2 between the third region and the fourth region, and a portion of the first region and the second region are located in the same Die, i.e., have overlapping regions, and therefore, the distance between signal1 and signal2 is expressed by:

Distance(signal1,signal2)＝d1+d2＝0+1＝1。

in the embodiment, the minimum distance between the driving node and the load node connecting area of two connecting signals is used as the distance between the two signals, so that the inaccuracy that the shortest distance between the points is the distance in the prior art is improved. Specifically, referring to fig. 8, fig. 8 is a schematic diagram of a connection area distance calculating method provided by the embodiment of the present invention, assuming that a signal shown by a dash-dot line has been routed, no matter where load nodes a and B are located, a signal line must pass through Die2 and Die3 of FPGA2 between a and B, for a signal shown by a dash-dot line, if it forms a signal group with a signal shown by a dash-dot line and passes through the same cable by time division multiplexing, the signal shown by a dash-dot line is separated from the signal shown by a dash-dot line at any position of a connection area of the signal shown by a dash-dot line, and for the signal shown by a dash-dot line, because the signal shown by a dash-dot line itself has a connection hardness requirement, the signal can be connected by taking any position of a connection line between a and B, and compared with calculating a shortest distance between a node C and a or a node B, more accurate.

Specifically, when the driving nodes of the two connection signals are both located in the same transmitting end FPGA and the load nodes are both located in the same receiving end FPGA, the load nodes of the same connection signal in the receiving end FPGA are divided into the same area, and the distance between the two connection signals is equal to the distance between the driving nodes of the connection signals plus the distance between different areas in the receiving end FPGA.

S3: and selecting the connection signal with the least total number of the driving node and the load node as an anchor signal to be placed in a constructed container, iteratively updating the gravity center of the container, and continuously placing the connection signal with the closest gravity center in the container until the container capacity is reached, so as to realize the grouping of the connection signals.

Assuming that n connection signals are shared in a certain transmission direction (from left to right) between a certain pair of FPGAs, the preset grouping proportion is M, namely n signals are divided into n/M groups, and if the remainder exists, the last group shares a cable. In this embodiment, the grouping process specifically includes the following steps:

s3.1: and in the connection signals split together in the step S1, selecting the connection signal with the least total number of the driving node and the load node as an anchor signal.

Specifically, firstly traversing all connection signals, recording the number of connection signal endpoints (including a driving node and a load node), and taking the connection signal with the minimum endpoint number; if the number of the endpoints of the plurality of connection signals is the same, connection signals with more concentrated endpoint distribution are taken, the specific meaning of endpoint distribution concentration is that the sum ds1 of the two-by-two distances between the driving node and all the load nodes of the sending end FPGA, the sum ds2 of the two-by-two distances between all the load nodes on the receiving end FPGA, and the endpoint distribution of the connection signals with smaller ds1+ds2 is more concentrated. And selecting the result of the process, namely, taking a certain connection signal as an anchor signal, namely, taking the connection signal as a starting point, and gradually searching M-1 other signals in the group.

S3.2: a container Grp is constructed for placing the connection signals grouped together and the selected anchor signals are placed in the container Grp.

Specifically, the selected anchor signals are placed in a Vector container, where the container is used to place all connection signals to be grouped, M is the upper capacity limit in the container, i.e. the maximum number of connection signals that can be included, and the container is denoted by Grp.

S3.3: center_l of gravity of the Grp is updated, wherein center_l represents the Center of gravity of the container on the transmitting end FPGA, center_r represents the Center of gravity of the container on the receiving end FPGA, and the center_r method is the same, taking center_l as an example:

the pos_l (i, j) represents the position coordinate of the j-th endpoint of the i-th connection signal in the container Grp in the transmitting end FPGA, pos_r (i, j) represents the position coordinate of the j-th endpoint of the i-th connection signal in the container Grp in the receiving end FPGA, the coordinate defining methods of the transmitting end FPGA and the receiving end FPGA need to be consistent, for linear Die, the position of one Die (usually the first one of the Die arranged in a row) can be set to 1 in the same direction, and then the coordinates of other adjacent dies are gradually increased by 1.Ni is the total number of endpoints of the ith connection signal at the sending end FPGA, and Pi is the total number of endpoints of the ith connection signal at the receiving end FPGA.

S3.4: traversing the connection signals of other unfinished packets, and obtaining the distance between each connection signal and the gravity Center point according to the distance calculation method in the step S2, wherein the gravity Center point is equivalent to the connection signal of one driving node at center_L and one loading node at center_R, but note that the center_L or the center_R may be decimal, but the calculation method is unchanged. The connection Signal signal_min_d closest to the center of gravity is taken and added to the container Grp.

S3.5: if the number of the connection signals in the container Grp reaches the upper limit M of the number, completing a grouping, and jumping to the step S3.1; if the connection signals of the remaining outstanding packets are less than M, grouping all the remaining signals into one group; if the number of signals in the container Grp has not reached M, the process jumps to step S3.13, and the signal is added continuously.

Further, the connection signal grouping method of the present embodiment further includes: after the connection signal grouping is finished, the connection signals of the same group are transmitted by using the same calbe, and the signals in the group sequentially pass through the calbe by adopting time division multiplexing.

According to the connection signal grouping method based on distance distribution, connection signals to be transmitted between FPGAs are selectively split, so that the use of physical cables (cables) between the FPGAs can be reduced, and precious cable resources are saved; the signal distance calculation method considers the wiring factors of the driving node and the load node and the wiring factors of the load node and the load node, provides more accurate basis for determining which signals form a group, and is more accurate in grouping; the signal grouping method can lead the signals which are divided into the same group to be concentrated in distance from the transmitting end FPGA or the receiving end FPGA, so that the wiring resources at the die cross (gaps between adjacent die in the FPGA) in the FPGA consumed by the signals which are divided into the same group are fewer, the wiring difficulty is reduced, and the use efficiency of the wiring resources is improved.

In addition, the connection signal grouping method of the invention uses the gravity center method to carry out signal grouping, specifically constructs a container for placing connection signals which are divided into a group, continuously updates the key points of the container, adds the connection signal which is closest to the gravity center into the container, thereby obtaining the signal which is closest to the gravity center as a group.

A further embodiment of the present invention provides a storage medium having stored therein a computer program for executing the steps of the distance distribution based connection signal grouping method described in the above embodiment. A further aspect of the invention provides an electronic device comprising a memory, in which a computer program is stored, and a processor, which when calling the computer program in the memory, implements the steps of the distance distribution based connection signal grouping method according to the above embodiments. In particular, the integrated modules described above, implemented in the form of software functional modules, may be stored in a computer readable storage medium. The software functional module is stored in a storage medium and includes instructions for causing an electronic device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to perform part of the steps of the methods described in the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.

Claims (9)

1. A method for grouping connection signals based on distance distribution, comprising:

s1: selectively splitting the connection signals according to different FPGAs where the load nodes of the connection signals are located so as to split the connection signals where the load nodes are located in the same FPGA;

s2: calculating the distance between every two connecting signals split together in the step S1;

s3: and selecting the connection signal with the least total number of the driving node and the load node as an anchor signal to be placed in a constructed container, iteratively updating the gravity center of the container, and continuously placing the connection signal with the closest gravity center in the container until the container capacity is reached, so as to realize the grouping of the connection signals.

2. The distance distribution-based connection signal grouping method according to claim 1, wherein the S1 includes:

classifying the directions of the connection signals according to the FPGA positions of the connection signal driving nodes, and determining the positions of the driving nodes of the connection signals and each load node; and then, according to whether the FPGAs where the load nodes of the connection signals are located are identical, selectively splitting the connection signals, namely, splitting the connection signals of different FPGAs where the load nodes are located, wherein the connection signals of the same FPGA where the load nodes are located are not split, so that the split connection signals comprise connection signals of which the drive nodes are located on the same transmitting end FPGA, the load nodes are all located on the same receiving end FPGA, the split connection signals also comprise connection signals of which the drive nodes are located on the same transmitting end FPGA, part of the load nodes are located on the same receiving end FPGA, and part of the load nodes are located on the current transmitting end FPGA.

3. The connection signal grouping method based on distance distribution according to claim 2, wherein the connection signals split together through step S1 include connection signals in which driving nodes are located in the same transmitting end FPGA and load nodes are all located in the same receiving end FPGA; the system further comprises a driving node located on the same transmitting end FPGA, a load node located on the same receiving end FPGA and a connecting signal located on the transmitting end FPGA.

4. The distance distribution-based connection signal grouping method according to claim 1, wherein when the driving nodes of two connection signals are both located in the same transmitting end FPGA and the load nodes are both located in the same receiving end FPGA, the distance between the two connection signals is equal to the distance between the driving nodes of the connection signals plus the distance between two nearest load nodes of the two connection signals.

5. The distance distribution-based connection signal grouping method according to claim 1, wherein when the driving nodes of two connection signals are both located in the same transmitting end FPGA and the load nodes are both located in the same receiving end FPGA, the load nodes of the same connection signal in the receiving end FPGA are divided into the same area, and the distance between the two connection signals is equal to the distance between the driving nodes of the connection signals plus the distance between different areas in the receiving end FPGA.

6. The distance distribution-based connection signal grouping method according to claim 1, wherein when the driving nodes of two connection signals are both located in the same transmitting end FPGA, and the load node of at least one connection signal of the two connection signals is located not only in the receiving end FPGA but also in the current transmitting end FPGA, the driving node and the load node of the same connection signal in the transmitting end FPGA are divided into the same area, the load node of the same connection signal in the receiving end FPGA is divided into the same area, and the distance between the two connection signals is equal to the distance between different areas in the transmitting end FPGA plus the distance between different areas in the receiving end FPGA.

7. The distance distribution-based connection signal grouping method according to claim 1, wherein the S3 includes:

s3.1: in the connection signals split together in the step S1, selecting the connection signal with the least total number of the driving node and the load node as an anchor signal;

s3.2: constructing a container Grp for placing connection signals divided into a group, and placing the selected anchor signals in the container Grp, wherein the upper capacity limit of the container Grp is the maximum number of the connection signals divided into the group;

s3.3: updating the gravity Center point of the container Grp, wherein the gravity Center point comprises a gravity center_L of the container Grp on a transmitting end FPGA and a gravity center_R on a receiving end FPGA;

s3.4: traversing the connection signals of other unfinished packets, and calculating the distance between each connection signal and the gravity Center point by utilizing the step S2, wherein the gravity Center point is equivalent to the connection signal of one driving node at center_L and the load node at center_R; adding a connection Signal Signal_min_d closest to the gravity center point into the container Grp;

s3.5: if the number of the connection signals in the container Grp reaches the upper limit M of the number, completing a grouping, and jumping to the step S3.1; if the connection signals of the remaining outstanding packets are less than M, grouping all the remaining signals into one group; if the number of signals in the container Grp does not reach M, the step S3.3 is skipped, and the connection signals meeting the conditions are continuously added until the number reaches M.

8. The distance distribution-based connection signal grouping method according to claim 7, wherein the S3.1 includes:

traversing all connection signals, recording the number of connection signal endpoints, and taking the connection signal with the minimum endpoint number as an anchor signal, wherein the endpoints comprise a driving node and a load node; if the number of endpoints of the plurality of connection signals is the same, the connection signals with more concentrated endpoint distribution are taken as anchor signals, wherein the meaning of more concentrated endpoint distribution is as follows: the driving node of the FPGA at the transmitting end and the sum ds1 of the two-by-two distances of all the load nodes are equal, the sum ds2 of the two-by-two distances of all the load nodes on the FPGA at the receiving end is equal, and the distribution of connecting signal endpoints with smaller ds1+ds2 is more concentrated.

9. The distance distribution-based connection signal grouping method of claim 7, wherein the expression of the Center of gravity center_l and the Center of gravity center_r is:

wherein pos_l (i, j) represents a position coordinate of a j-th endpoint of the i-th connection signal in the container Grp in the transmitting end FPGA, pos_r (i, j) represents a position coordinate of a j-th endpoint of the i-th connection signal in the container Grp in the receiving end FPGA, ni is a total number of endpoints of the i-th connection signal in the transmitting end FPGA, and Pi is a total number of endpoints of the i-th connection signal in the receiving end FPGA.