CN116918252A - Method for impedance matching, impedance matching arrangement and plasma system - Google Patents
Method for impedance matching, impedance matching arrangement and plasma system Download PDFInfo
- Publication number
- CN116918252A CN116918252A CN202280018122.6A CN202280018122A CN116918252A CN 116918252 A CN116918252 A CN 116918252A CN 202280018122 A CN202280018122 A CN 202280018122A CN 116918252 A CN116918252 A CN 116918252A
- Authority
- CN
- China
- Prior art keywords
- impedance
- matching
- inter
- stages
- model
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 51
- 238000004590 computer program Methods 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 claims description 4
- 238000003860 storage Methods 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 description 13
- 238000005259 measurement Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000005328 architectural glass Substances 0.000 description 2
- 238000004422 calculation algorithm Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/38—Impedance-matching networks
- H03H7/40—Automatic matching of load impedance to source impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32174—Circuits specially adapted for controlling the RF discharge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32174—Circuits specially adapted for controlling the RF discharge
- H01J37/32183—Matching circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32917—Plasma diagnostics
- H01J37/32926—Software, data control or modelling
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Plasma Technology (AREA)
- Networks Using Active Elements (AREA)
Abstract
The invention relates to a method for impedance matching by means of an impedance matching network (2) having an input (3) for connecting an HF power generator (5) and an output (4) for connecting to a load (6), the impedance matching network having at least a first and a second series-connected matching stage (10, 12), each of which has a variable reactance (XP, XS), the method comprising the following steps: a) Measuring input impedance (Z) in ) B) determining the intermediate impedance (Z) from the measured input impedance (Zin) and at least one current state value of at least one of the matching stages inter ) C) is formed from the intermediate impedance (Z inter ) And a model of the impedance matching network (2) for determining a desired value of the change in at least one reactance (XP, XS) for the matching stage (10, 12)(dXP, dXS), d) changing the state of at least one of the matching stages (10, 12) based on the change expectation value (dXP, dXS), e) repeating the steps a) to d).
Description
Technical Field
The invention relates to a method for impedance matching by means of an impedance matching network having an input for connecting an HF power generator and an output for connecting to a load, the impedance matching network having at least one first and one second matching stage connected in series, each of the matching stages having a variable reactance. Furthermore, the invention relates to an impedance matching arrangement, a computer program product and a non-volatile storage medium. The invention also relates to a plasma system with such an impedance matching arrangement or with such an impedance matching network.
Background
The load may be a plasma processing device, in particular an HF-excited plasma processing device, i.e. a device for performing a plasma process. Impedance matching networks are often used in HF-excited plasma processes. An arrangement designed for a method for impedance matching and/or having such an impedance matching network and a plasma processing apparatus connected thereto is referred to hereinafter as a plasma system. The frequency is typically 1MHz or more, in particular in the range from 1MHz to 200 MHz. HF-excited plasma processes are used, for example, for coating (sputtering) and/or etching substrates in the production of architectural glass, semiconductors, photovoltaic elements, flat panel displays, displays and the like. The impedance in such processes typically changes very rapidly and, therefore, impedance matching should typically be matched very rapidly (in milliseconds or less). The electrical power supplied to such processes is typically several hundred W, for example 300W and above, but is also not as low as kW or above, and is typically 10kW or above. With such power, the voltage within the impedance matching component is typically several hundred V, e.g., 300V and above, and not as low as 1000V and above. The current in such a circuit may be several amperes, typically 10A or more, and may be 100A or more. Achieving impedance matching components with such voltages and currents has been a great challenge. This rapid variability of reactance in an impedance matching network is an additional, very high challenge. Examples of such impedance matching networks are disclosed, for example, in DE 10 2015 220 847 A1, DE 10 2011 076 404 A1, DE 10 200901 355a1, DE 10 2011 007 598 A1, DE 10 2011 007 597 A1, DE 10 2014209 469a1, DE 20 2021 100 710 U1 or in DE 20 2020 103 539 U1.
An impedance matching network is typically used to match the impedance of the load to the impedance of the motor. Typically, the impedance matching network is used to transform the impedance of the load to 50 ohms. The impedance matching network may have one or more varactors, such as capacitors, for example in an L configuration. The capacitance of the capacitor may be varied by motor driving. The input impedance of the impedance matching network can be determined by the measuring device. The matching algorithm attempts to find the correct motor position or switch position or other control possibilities in order to achieve impedance matching.
Impedance matching through an impedance matching network often proves difficult when the load is a load whose impedance changes, especially rapidly. In order to find a target position for the driving of the capacitor, it is known to adjust the magnitude and phase of the input impedance. However, these two parameters are related to the capacitance value of the capacitor. This may lead to slow adjustment. The sign change of the impedance, and likewise the sign change of the correlation dPhase/dC, d| (Z) |/dC, dRe (Z)/dC, or dIm (Z)/dC for the two capacitors, may cause instability. Where C is capacitance, Z is impedance, re () is real, im () is imaginary, and | (Z) | is the magnitude of the complex variable in brackets.
Disclosure of Invention
The object of the present invention is therefore to provide a method for impedance matching, by means of which impedance matching can be performed quickly and reliably.
According to the invention, this object is achieved by a method for impedance matching by means of an impedance matching network having an input for connection to an HF power generator and an output for connection to a load, in particular to an HF-excited plasma processing device, the impedance matching network having at least one first and one second series-connected matching stage, each of which has a variable reactance, the method having the following steps:
a) Measuring input impedance Z in ；
b) From the measured input impedance Z in And at least one current state value of at least one of the matching stages to determine an intermediate impedance Z inter Wherein the intermediate impedance is in particular an impedance that occurs between the matching stages;
c) From the intermediate impedance Z inter And a model of the impedance matching network to find a change expectation for at least one reactance of the matching stage;
d) Changing the state of at least one matching stage based on the change expectation value;
e) Repeating steps a) to d).
The variable reactance may be configured as an inductance and/or a capacitance. Capacitance is preferred because it is simple to manufacture and to operate. For example, the matching stage may have a series connection of an inductance and a capacitance. The matching stage acts both capacitively and inductively.
Measuring input impedance Z in It may mean that the impedance of the input into the impedance matching network is measured. The impedance may be detected from magnitude, phase and/or real and imaginary parts.
Measuring input impedance Z in It can also mean that the reflection coefficient is measured and then Z is derived in 。
The intermediate impedance is the measured impedance into the matching stage located before the output of the impedance matching network. The intermediate impedance may also be measured or determined by magnitude, phase and/or real and imaginary parts.
The model of the impedance matching network also means a model for each of the matching stages, since the models of these matching stages are each part of the model of the impedance matching network.
By means of this method, a faster and more robust adjustment of the mechanical and/or electronic impedance matching network can be achieved. Known algorithms often do not converge and therefore do not lead to a desired point or are not able to fully exploit the mechanical power of the drive used.
The above steps a) to d) may be repeated until the input impedance is above or below a predetermined value. It has been found that significantly fewer iterations are required with the method according to the invention than with conventional methods. Thus enabling faster impedance matching.
The position of the mechanical variable reactance or the circuit state of the electronic variable reactance may be detected as a state value. For example, the position of the drive of the mechanically variable capacitor can be detected as a state.
The intermediate impedance may be determined based on the state-dependent assignment of the input impedance to the intermediate impedance. The assignment can be determined from the detected state during calibration. In particular, a look-up table for each matching stage can be generated during calibration in this way. The calibration and creation of the look-up table for each matching stage is preferably performed independently of one or more other matching stages.
When based on the expected value Z of the intermediate impedance intersoll Advantages may result when the change expectations are found. To compensate for variations or inaccuracies in the look-up table, it is advantageous to calculate relatively. For example, if for Z inter The detected value j40Ohm of the imaginary part of j45Ohm is found to be the intermediate impedance expected value of j5Ohm, the value greater than j5Ohm can be looked up from the entries of the current lookup table. This is then the target position or the desired value is changed, and has the advantage that: thereby compensating for offset errors and the closer to the desired match, the smaller the scaling error.
In the case of a mechanical impedance matching network, the input impedance is measured several orders of magnitude faster than the motor speed of the capacitor drive. The determination of the intermediate impedance is inaccurate due to various errors (model, measurement, variable plasma impedance). However, this determination may initially provide a rough target position for the drive. These drives can thus be fully accelerated. During the reactance change, Z in And Z inter The determination of (2) is continuously carried out, and Z is corrected thereby intersoll 。
Can be based on at least one predefined boundary condition, for example the real part Z in =50 Ohm to find the intermediate impedance expected value. Such boundary conditions simplify the determination of the desired value of the intermediate impedance.
The change of state of at least one of the matching stages may be performed with or in the direction of a change of the desired value. As already described, it is advantageous to perform the matching relatively. Therefore, it is not necessary to find the absolute value of the changed state. It is sufficient to determine how much the state of the matching stage has to be changed, so that the state of the other matching stages can be changed in this way, so that a match can be made. This can be done by means of an intermediate impedance.
The states of the two matching stages may be changed simultaneously. Thereby enabling to accelerate the impedance matching.
The circuit model may be used as a model of an impedance matching network. This has particular advantages if the impedance matching network is simply constructed, for example having an L configuration.
Alternatively, a transmission parameter model, a scattering parameter model or a parameter model which can be derived from the transmission parameter model or the scattering parameter model can be used as a model of the impedance matching network. For example, the Z parameter, Y parameter, M parameter, and X parameter can be obtained from the scattering parameter.
An L-configuration, a T-configuration, an inverse L-configuration, or pi-configuration may be used as the impedance matching network. A particularly fast impedance matching can be achieved by means of the L configuration. This configuration can also be relatively simply deduced in the model.
The change expectations are determined for the reactance of the two matching stages separately from the intermediate impedance and the model of each of the matching stages. The states of the two matching stages may be changed based on the change expectation value.
The changing of the desired value may be linearly independent. It is thereby achieved that the matching is performed independently of each other in the matching stage.
Within the scope of the invention is furthermore an impedance matching arrangement having
a) An impedance matching network having an input for connection to an HF power generator and an output for connection to a load, in particular an HF-excited plasma processing device, has at least two matching stages, each having a variable reactance,
b) The model of the impedance matching network,
c) Impedance measuring means for measuring the input impedance,
d) At least one look-up table containing values allowing to infer from the input impedance an intermediate impedance, in particular an impedance occurring between said matching stages,
f) Means for determining an intermediate impedance from the measured input impedance and the look-up table, and for determining at least one change expectation value of at least one reactance of the matching stage from a model of the intermediate impedance and the impedance matching network,
g) Setting means for changing the state of at least one matching stage in accordance with the change expected value obtained.
The look-up table preferably has only one dimension. In the simplest case, the look-up table has a settable impedance value of the reactance. By means of a model, in particular a circuit model, an intermediate impedance can be calculated from this impedance by means of pressure distribution calculations.
In the case of a T parameter model, for example, at least part of the T parameter of the matching stage may be saved in a look-up table. It is sufficient to save part of the T parameter if symmetry observations can be performed. Otherwise, it is also conceivable to save all T parameters of the matching stage in a look-up table. With the T parameter (depending on the state of the matching stage) and the input impedance, the intermediate impedance can be deduced.
The model and/or look-up table of the impedance matching network may be stored in memory as a digital model.
Within the scope of the invention is further a computer program product for controlling an impedance matching network having an input for connection to an HF power generator and an output for connection to a load, the impedance matching network having at least a first and a second matching stage connected in series, said matching stages each having a variable reactance, the computer program product comprising instructions which, when executed by a computer, carry out the method steps of:
a) An intermediate impedance is determined from the measured input impedance and at least one current state value of at least one of the matching stages, wherein the intermediate impedance is in particular an impedance occurring between the matching stages,
b) A modified expected value of at least one reactance for the matching stage is found from the model of the intermediate impedance and the impedance matching network,
c) A signal for changing the state of at least one of the matching stages is output based on the change expectation value,
d) Repeating steps a) to c).
Furthermore, within the scope of the present invention is a non-volatile storage medium having instructions stored thereon for implementation by means of a processor or for configuration of a programmable logic module, such as an FPGA, for performing steps a) to d) of the computer program product.
In data processing, a nonvolatile storage medium (non-volatile, non-transparent) is a variety of data stores whose stored information can be kept permanently, i.e., even when the computer is not in operation or is not powered.
According to the inventive arrangement, a model of the impedance matching network is created. This is used to split the two-dimensional problem into two one-dimensional (tuning-) problems. With knowledge about the (measured) input impedance and the state of the matching stages, it is possible to determine the complex load impedance (intermediate impedance) between the two matching stages by application of the model. At this intermediate impedance, the mappable impedance traces of the matching stage must intersect in order to achieve matching. From this condition, the target position (intermediate impedance expected value) can be determined.
According to the invention, the setting parameters of the reactance of the matching stage are set in such a way that a match is set at the input of the impedance matching network, depending on the determined input impedance and the current state of the matching stage. A look-up table can be determined for each matching stage by a suitable calibration procedure, which contains the respective impedances of the variable reactance in relation to the current state of the matching stage.
The change in the respective reactance results from the impedance of the input of the corresponding matching stage in a line/trace in the impedance plane, the admittance plane or the reflection coefficient plane. During matching, the impedance at the input of the second matching stage is found from the input impedance of the first matching stage and the set point of the first variable reactance in combination with a look-up table and a matching stage model that is part of the model of the impedance matching network. This is here the intermediate impedance. From the model it is known on which track the intermediate impedance has to lie, whereby the first matching stage is able to convert the impedance to a target value, for example 50Ohm. In the case of a parallel capacitor as reactance, for example, the inverse of all the matchable impedances of the intermediate impedances must have a real part of 0.02S. Now, the intermediate impedance may be displaced on a defined trajectory due to the variation of the second reactance of the second matching stage. In the case of series elements of the L topology, the trajectory is described by a constant real part and a varying imaginary part of the intermediate impedance. Thus, the change in reactance of the second matching stage can now be set such that the intermediate impedance lies on the trajectory of the first reactance. The new intermediate impedance forms the intersection of the two traces. It is also predictable which position (state) the first matching stage has to take in order to match the new intermediate impedance.
In the case of an L configuration of the impedance matching network, calibration, in particular the generation of a look-up table, can be performed in the following way. The first matching stage is a parallel resonant circuit with a variable capacitance and the second matching stage is a resonant circuit in series with the output of the impedance matching network. To calibrate the look-up table, the output of the impedance matching network is first disabled in idle operation. Only the impedance of the parallel element is then measured at the input of the impedance matching network. By means of a change in the capacitor, it can be changed and the values stored in the table. For this table of series elements, the output is shorted and the parallel element is set to a minimum (highest impedance). The parallel connection of the parallel element and the series element is measured at the input of the impedance matching network. Since the impedance of the parallel element is known, the series element can be calculated and a table can be calculated for it.
The intermediate impedance may be calculated directly from the input impedance of the first matching stage and the look-up table of parallel elements. The ideal capacitor only changes the imaginary part of the admittance at the input of the impedance matching network. Thus, 1/Z inter It is necessary to have a real part of 0.02S in order to be able to match. The series element allows to directly vary the imaginary part of the intermediate impedance. An ellipse is derived in the admittance plane. The ellipse potentially intersects the 0.02S line (according to the set range of the capacitor) at two points. The quadratic equation is set identically accordingly, thus yielding a new series impedance. From this, the complete new intermediate impedance can also be calculated. In combination with the current value of the parallel impedance, it can be determined how much has to be changed in order to reach an input impedance of 50Ohm.
Furthermore, within the scope of the invention, a plasma system is provided, which is designed for a method for impedance matching and/or has an impedance matching arrangement as described above and has a plasma processing device, in particular an HF-excited plasma processing device, as a load, i.e. a device for carrying out a plasma process. The plasma processing apparatus is preferably used for coating and/or etching a substrate. The plasma processing apparatus is preferably suitable for use in the production of architectural glass, semiconductors, photovoltaic elements, flat panel displays or displays.
The high frequency of the high frequency power signal may be 1MHz or more, particularly in the range of 1MHz to 200 MHz.
The electrical power required to supply the plasma process may be 300W and above, in particular 1 kw and above, the power supply being designed to provide the plasma process.
The plasma processing apparatus may be configured for connection to further power supplies, for example one or more of the following power supplies may be used: HF power supplies with the same or different high frequencies.
DC power supply device, in particular pulsed DC power supply device
-MF power supply having a frequency of less than 1 MHz.
Drawings
Other features and advantages of the invention will be apparent from the following detailed description of the embodiments of the invention, from the drawings, which show details essential to the invention, and from the claims. The features shown therein should be understood to be not necessarily drawn to scale and are shown as such: so that the special features according to the invention are clearly visible. In a variant of the invention, the different features can be implemented per se, individually or in any combination of a plurality.
Embodiments of the invention are shown in the schematic drawings and explained in the following description.
Showing:
fig. 1: impedance matching arrangement
Fig. 2: an admittance plane for illustrating the method according to the present invention;
fig. 3: admittance planes for illustrating the first method steps of the method according to the present invention;
fig. 4: an admittance plane for illustrating the second method step of the method according to the present invention;
fig. 5: admittance planes for illustrating the third method steps of the inventive process;
fig. 6: for illustrating a block diagram of a method according to the invention.
Detailed Description
Fig. 1 shows an impedance matching arrangement 1 with an impedance matching network 2 having an input 3 and an output 4. An HF power generator 5 can be connected to the input 3 and a load 6, in particular a plasma processing device, can be connected to the output 4. The HF power generator 5 may generate high frequency power having a frequency of 1MHz or more, particularly in the range of 1MHz to 200 MHz.
The input impedance Z of the impedance matching network 2 at the input 3 in Can be detected by impedance measuring means 7. The impedance measuring means 7 may be designed for complex input impedance Z in Is a measurement of (a). For example, the impedance measuring device 7 can be configured as a V/I-sampler, i.e. for the measurement of voltages and currents, in particular for the measurement of voltages and currents, including their phase dependence on each other.
The impedance matching network 2 shown has an L-configuration with a first matching stage 10 and a second matching stage 12 arranged in series therewith. The first matching stage 10 has a variable reactance XP, which in the illustrated embodiment is configured as a capacitor. The variable reactance XP is arranged in series with the inductance L1.
The second matching stage 12 likewise has a variable reactance XS in the form of a capacitor. Which is turned on in series with inductor L2.
Intermediate impedance Z inter Is the impedance at the input of the second matching stage 12.
The input impedance Z of the impedance matching network 2 can be measured by the impedance measuring means 7 in . Measured input impedance Z in Can be used by the determination means 14 for determining the input impedance Z from the measured input impedance in And at least one look-up table 16, 18 for finding the intermediate impedance Z inter . The look-up tables 16, 18 have been created during the calibration process. The look-up tables 16, 18 may contain impedance values of the settable reactances XP, XS for different states of the reactances XP, XS and thus also different states of the matching stages 10, 12.
The determination device 14 is also designed to determine the intermediate impedance Z inter And a model 20 of the impedance matching network 2 to find at least one modified expected value of the at least one reactance XP, XS for the matching stage 10, 12.
The setting device 22 is designed to change the state of at least one matching stage 10, 12 as a function of the determined change setpoint value.
FIG. 2 shows the admittance plane of the input admittance, i.e. 1/Z in 。Z in Representing the impedance Z measured at the input of the impedance matching network 2 in . By means of Z intarget Indicating the admittance that should be achieved by impedance matching. By varying the reactance XP of the first matching stage 10, it is possible toOnly the imaginary part of the input admittance can be changed, as indicated by the vertical double arrow 30.
The reactance XS of the second matching stage 12 enables the input admittance to move on an elliptical trajectory, which is illustrated by arrow 32.
As can be seen from fig. 3, the input admittance (Z in With a known XP value), the intermediate impedance Z can be determined on the basis of the look-up table 16 (knowing the current state of the second matching stage 12, i.e. in particular the motor position of the drive of the reactance XP) inter . It follows on which ellipse the admittance change is made due to the change in reactance XS.
It is now possible to determine how much the reactance XS has to be changed so that the ellipse or trajectory T intersects the target line ZL, i.e. Z inter The real part of (2) takes the value 0.02S. From this, a change target value dXS is derived.
In a further step, which is illustrated in accordance with fig. 4, it can now be found how much the XP has to be changed in order to reach Z intarget . Thus yielding an additional change expectation dXP.
The method according to the invention is further explained with reference to the block diagram of fig. 6. In step 100, the input impedance Z of the impedance matching network is measured in . Subsequently, in step 101, the measured input impedance Z in And at least one current state value of at least one of the matching stages of the impedance matching network.
In step 102, a change expectation for at least one reactance of the matching stage is determined from the model of the intermediate impedance and the impedance matching network.
In step 103, the state of at least one of the matching stages is changed based on the change expectation value. In step 104, it is checked whether the input impedance determined is above or below a predefined value. If not, the value is above or below the predetermined value, then the process returns to step 100. Otherwise, matching is realized.
Claims (17)
1. Method for impedance matching by means of an impedance matching network (2) having an input (3) for connection to an HF power generator (5) and an output (4) for connection to a load (6), in particular to an HF-excited plasma processing device, the impedance matching network having at least one first and second matching stage (10, 12) connected in series, each having a variable reactance (XP, XS), the method having the steps of:
a) Measuring input impedance (Z) in )，
b) From the measured input impedance (Z in ) And at least one current state value of at least one of the matching stages to determine an intermediate impedance (Z inter ) Wherein the intermediate impedance (Z inter ) Is the impedance that occurs between the matching stages (10, 12),
c) From the intermediate impedance (Z inter ) And a model of the impedance matching network (2) for determining a change expectation (dXP, dXS) for at least one reactance (XP, XS) of the matching stage (10, 12),
d) Changing the state of at least one of the matching stages (10, 12) based on the change expectation value (dXP, dXS),
e) Repeating said steps a) to d).
2. The method according to claim 1, characterized in that the steps 1 a) to 1 d) are repeated until the input impedance (Z in ) Above or below a predetermined value.
3. A method according to any of the preceding claims, characterized in that the position of the mechanical variable reactance (XP, XS) or the circuit state of the electronic variable reactance is detected as a state value.
4. Method according to any of the preceding claims, characterized in that the impedance (Z in ) To the intermediate impedance (Z inter ) To determine the intermediate impedance (Z inter )。
5. A method according to any of the preceding claims, characterized in that the impedance is based on the intermediate impedance desired value (Z intersoll ) To find the change expectation value (dXP, dXS).
6. Method according to claim 5, characterized in that the desired value (Z intersoll )。
7. A method according to any of the preceding claims, characterized in that the change of state of at least one of the matching stages is performed with or in the direction of the change desired value.
8. A method according to any of the preceding claims, characterized in that the states of the two matching stages (10, 12) are changed simultaneously.
9. Method according to any of the preceding claims, characterized in that a circuit model is used as a model of the impedance matching network (2).
10. Method according to any of the preceding claims 1 to 8, characterized in that a transmission parameter model, a scattering parameter model or a parameter model derivable from a transmission parameter model or a scattering parameter model is used as a model of the impedance matching network (2).
11. The method according to any of the preceding claims, characterized in that an L-configuration, a T-configuration, an inverse L-configuration or a pi-configuration is used as the impedance matching network (2).
12. The method according to any of the preceding claims, characterized in that the impedance (Z inter ) And a model of each of the matching stages (10, 12) for determining the change expectations for the reactance (XP, XS) of the two matching stages (10, 12) respectivelyValues (dXP, dXS) and changing the states of the two matching stages (10, 12) based on said changing expected values (dXP, dXS).
13. A method according to claim 12, characterized in that the changing expectations (dXS, dXP) are linearly independent.
14. An impedance matching arrangement (1) having
a. An impedance matching network (2) having an input (3) for connection to an HF power generator (5) and an output (4) for connection to a load (6), in particular to an HF-excited plasma processing device, having at least two matching stages (10, 12) each having a variable reactance (XP, XS),
b. a model (2) of the impedance matching network,
c. impedance measuring means for measuring said input impedance,
d. at least one look-up table (16, 18) comprising the following values: the value allows to be determined by the input impedance (Z in ) Inferring intermediate impedance (Z) inter ) Wherein the intermediate impedance (Z inter ) Is the impedance that occurs between the matching stages (10, 12),
e. a determination device (14) for determining the impedance (Z) based on the measured input impedance in ) Find the intermediate impedance (Z) inter ) And for being defined by said intermediate impedance (Z inter ) And a model of the impedance matching network (2) to determine at least one modified expected value (dXP, dXS) for at least one reactance (XP, XS) of the matching stage (10, 12),
f. -setting means (22) for changing the state of at least one matching stage (10, 12) in dependence on the determined change expectation value (dXP, dXS).
15. A computer program product for controlling an impedance matching network (2) having an input (3) for connection to an HF power generator (5) and an output (4) for connection to a load (6), the impedance matching network having at least a first and a second matching stage (10, 12) connected in series, the first and second matching stage having variable reactance (XP, XS) respectively, the computer program product comprising instructions which, when implemented by a computer, implement the method steps of:
a) From the measured input impedance (Z in ) And at least one current state value of at least one of the matching stages (10, 12) to determine an intermediate impedance (Z inter ) Wherein the intermediate impedance (Z inter ) Is the impedance that occurs between the matching stages (10, 12),
b) From the intermediate impedance (Z inter ) And a model of the impedance matching network (2) for determining a change expectation (dXP, dXS) for at least one reactance (XP, XS) of the matching stage (10, 12),
c) Outputting a signal for changing the state of at least one of the matching stages (10, 12) based on the change expectation value (dXP, dXS),
d) Repeating said steps a) to c).
16. A non-volatile storage medium having instructions stored thereon for implementation by a processor or for configuration of a programmable logic module to perform steps a) to d) of claim 15.
17. Plasma system designed for a method for impedance matching according to any one of claims 1 to 13 and/or with an impedance matching arrangement according to claim 14 and with a plasma process apparatus, in particular an HF-excited plasma process apparatus, as a load (6).
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102021201937.4 | 2021-03-01 | ||
| DE102021201937.4A DE102021201937A1 (en) | 2021-03-01 | 2021-03-01 | Impedance matching method, impedance matching arrangement and plasma system |
| PCT/EP2022/055151 WO2022184713A1 (en) | 2021-03-01 | 2022-03-01 | Method for impedance matching, impedance matching arrangement and plasma system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116918252A true CN116918252A (en) | 2023-10-20 |
Family
ID=80952307
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202280018122.6A Pending CN116918252A (en) | 2021-03-01 | 2022-03-01 | Method for impedance matching, impedance matching arrangement and plasma system |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20240006156A1 (en) |
| EP (1) | EP4302399A1 (en) |
| JP (1) | JP2024508031A (en) |
| KR (1) | KR20230145182A (en) |
| CN (1) | CN116918252A (en) |
| DE (1) | DE102021201937A1 (en) |
| WO (1) | WO2022184713A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117538616B (en) * | 2024-01-09 | 2024-04-23 | 深圳市瀚强科技股份有限公司 | Impedance detection method, impedance detection circuit and impedance detection device |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102009001355B4 (en) | 2009-03-05 | 2015-01-22 | TRUMPF Hüttinger GmbH + Co. KG | Impedance matching circuit and method for impedance matching |
| DE102011007598B4 (en) | 2011-04-18 | 2014-06-26 | TRUMPF Hüttinger GmbH + Co. KG | Method and apparatus for impedance matching |
| DE102011007597B4 (en) | 2011-04-18 | 2014-07-10 | TRUMPF Hüttinger GmbH + Co. KG | Method for impedance matching and high-frequency power supply |
| DE102011076404B4 (en) | 2011-05-24 | 2014-06-26 | TRUMPF Hüttinger GmbH + Co. KG | A method of impedance matching the output impedance of a high frequency power supply arrangement to the impedance of a plasma load and high frequency power supply arrangement |
| WO2014037994A1 (en) * | 2012-09-04 | 2014-03-13 | パイオニア株式会社 | Impedance matching device and method, and computer program |
| KR101544975B1 (en) * | 2013-09-30 | 2015-08-18 | 주식회사 플라즈마트 | Impedance Matching Method And Impedance Matching System |
| DE102014209469A1 (en) | 2014-05-19 | 2015-11-19 | TRUMPF Hüttinger GmbH + Co. KG | Control arrangement, control system and high-frequency power generation device |
| DE102015220847A1 (en) | 2015-10-26 | 2017-04-27 | TRUMPF Hüttinger GmbH + Co. KG | A method of impedance matching a load to the output impedance of a power generator and impedance matching arrangement |
| US11114280B2 (en) * | 2017-07-10 | 2021-09-07 | Reno Technologies, Inc. | Impedance matching with multi-level power setpoint |
| JP7094179B2 (en) * | 2018-08-28 | 2022-07-01 | 東京エレクトロン株式会社 | Impedance matching method and impedance matching device |
| DE202020103539U1 (en) | 2020-06-19 | 2020-06-29 | TRUMPF Hüttinger GmbH + Co. KG | Switchable reactance unit, changeable reactance, high-frequency generator and impedance matching arrangement with a switchable reactance unit |
| DE202021100710U1 (en) | 2021-02-12 | 2021-02-19 | TRUMPF Hüttinger GmbH + Co. KG | Power supply device and plasma system |
-
2021
- 2021-03-01 DE DE102021201937.4A patent/DE102021201937A1/en active Pending
-
2022
- 2022-03-01 CN CN202280018122.6A patent/CN116918252A/en active Pending
- 2022-03-01 WO PCT/EP2022/055151 patent/WO2022184713A1/en active Application Filing
- 2022-03-01 EP EP22712893.1A patent/EP4302399A1/en active Pending
- 2022-03-01 KR KR1020237031501A patent/KR20230145182A/en unknown
- 2022-03-01 JP JP2023553127A patent/JP2024508031A/en active Pending
-
2023
- 2023-08-30 US US18/458,177 patent/US20240006156A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE102021201937A1 (en) | 2022-09-01 |
| US20240006156A1 (en) | 2024-01-04 |
| WO2022184713A1 (en) | 2022-09-09 |
| KR20230145182A (en) | 2023-10-17 |
| JP2024508031A (en) | 2024-02-21 |
| EP4302399A1 (en) | 2024-01-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6084417B2 (en) | Impedance adjustment device | |
| KR101222583B1 (en) | Impedance transforming equipment | |
| KR100870121B1 (en) | Impedance Matching Methods And Systems Performing The Same | |
| CN111433883A (en) | Matched source impedance drive system and method of operating the same | |
| WO2009024051A1 (en) | Method of realizing the impedance matching of rf and rf impedance matching system | |
| JP2018006294A (en) | High frequency power supply device and control method of high frequency power supply device | |
| US20240006156A1 (en) | Method for impedance matching, impedance matching arrangement and plasma system | |
| US11538662B2 (en) | Impedance matching network and method with reduced memory requirements | |
| CN113811980B (en) | Method and system for automatic frequency tuning of a Radio Frequency (RF) signal generator for multi-stage RF power pulses | |
| KR20150039125A (en) | Control of etch rate using modeling, feedback and impedance match | |
| WO2022010686A1 (en) | Systems and methods for extracting process control information from radiofrequency supply system of plasma processing system | |
| JP6084418B2 (en) | Impedance adjustment device | |
| TW202025281A (en) | Impedance matching method and impedance matching device | |
| US20210335576A1 (en) | Control Method of Driving Frequency of Pulsed Variable Frequency RF Generator | |
| US20240006155A1 (en) | Power supply device and plasma system | |
| US20230104096A1 (en) | Plasma generation systems with multi-dimensional impedance matching networks | |
| JP6485924B2 (en) | Method for adjusting impedance of high-frequency matching system | |
| JP6430561B2 (en) | Method for adjusting impedance of high-frequency matching system | |
| TW202310681A (en) | Systems and methods for variable gain tuning of matching networks | |
| JP6485923B2 (en) | Method for adjusting impedance of high-frequency matching system | |
| US12009181B2 (en) | Match efficiency-variation compensation | |
| JP6463786B2 (en) | Method for adjusting impedance of high-frequency matching system | |
| US20230253185A1 (en) | Systems and Methods for Radiofrequency Signal Generator-Based Control of Impedance Matching System | |
| KR20230120165A (en) | Plasma generation apparatus and its control method | |
| JP2007174198A (en) | Impedance matching unit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |