CN116916660A - Magnetic memory structure and manufacturing method thereof - Google Patents
Magnetic memory structure and manufacturing method thereof Download PDFInfo
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- H—ELECTRICITY
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10B61/10—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having two electrodes, e.g. diodes or MIM elements
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- H—ELECTRICITY
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
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Abstract
The invention relates to a magnetic memory structure and a manufacturing method thereof, wherein the magnetic memory structure comprises: a magnetic tunnel junction comprising a free layer, a barrier layer, a reference layer, and a pinned layer; the spin Hall layer is coated on the outer side of the free layer along the circumferential direction of the free layer; and the oxide layer is clamped between the free layer and the spin Hall layer. The spin Hall layer is coated on the side wall of the free layer, the spin Hall layer is not damaged in the process of etching to form a magnetic tunnel junction, the current shunt or short circuit of the spin Hall layer is not caused, the etching difficulty is reduced, meanwhile, the spin Hall layer is coated on the side wall of the free layer, spin polarization in the vertical direction is generated, the non-magnetic field writing of a PMA device can be realized, and the complexity of the manufacturing process of the device is not increased due to the preparation of the spin Hall layer coated on the side wall of the free layer.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing technology, and in particular, to a magnetic memory structure and a method for manufacturing the same.
Background
Spin-orbit is apart from the device structure of the magnetic memory (SOT-MRAM) in order to connect the ferromagnetic metal film of the free layer of the Magnetic Tunnel Junction (MTJ) and SOT layer formed of non-magnetic metal. When a current is injected into the SOT layer, a self-rotational flow is generated under the action of spin orbit coupling, and the magnetization direction of the adjacent free layer is promoted to be changed. SOT-MRAM devices generally adopt a top pinned structure, i.e. a reference layer is above a free layer, and the SOT layer is at the lowest, because the SOT layer is very thin, usually about 5nm, the etching end point is difficult to control, excessive etching can cause SOT disconnection, resulting in device disconnection, insufficient etching can cause current shunting or short circuit of the SOT layer, thus the etching difficulty is high, in addition, the Perpendicular Magnetic Anisotropy (PMA) device can realize the writing of the device by applying an in-plane auxiliary field, and in order to realize the non-magnetic field writing of data, the current scheme mainly adopts the top magnetic layer to generate an in-plane auxiliary field or manufacture a wedge-shaped bottom electrode structure, but the complexity of the manufacturing process of the device can be increased.
Disclosure of Invention
Accordingly, it is desirable to provide a magnetic memory structure and a method for fabricating the same that can reduce the etching difficulty, and can realize data magnetic field-free writing without increasing the device fabrication complexity.
The present invention provides a magnetic memory structure comprising:
a magnetic tunnel junction comprising a free layer, a barrier layer, a reference layer, and a pinned layer;
the spin Hall layer is coated on the outer side of the free layer along the circumferential direction of the free layer;
and the oxide layer is clamped between the free layer and the spin Hall layer.
In one embodiment, the spin hall device further comprises a first electrode and a second electrode, wherein the first electrode is arranged at one end of the magnetic tunnel junction, which is opposite to the free layer, and the second electrode is connected with the spin hall layer.
In one embodiment, the magnetic memory structure further comprises an insulating dielectric layer wrapped around the outside of the magnetic tunnel junction and between the spin hall layer and the first electrode, and a lead-out wire connected to the first electrode through the insulating dielectric layer.
The invention also provides a manufacturing method of the magnetic memory structure, which is used for manufacturing the magnetic memory structure, and comprises the following steps:
manufacturing a magnetic tunnel junction on a first electrode, wherein a free layer of the magnetic tunnel junction faces away from the first electrode;
depositing an insulating medium layer, cleaning the insulating medium layer on the side wall of the free layer, and oxidizing the side wall of the free layer;
depositing a spin Hall layer, and stripping each layer above the magnetic tunnel junction to expose the free layer;
and exposing, developing and etching the spin Hall layer to manufacture a second electrode.
In one embodiment, the fabricating a magnetic tunnel junction on the first electrode includes:
depositing a pinning layer, a reference layer, a barrier layer and a free layer on the first electrode;
and reserving a photoresist layer on the magnetic tunnel junction formed after exposure, development and etching.
In one embodiment, the depositing the insulating dielectric layer, cleaning the insulating dielectric layer on the sidewall of the free layer, and oxidizing the sidewall of the free layer includes:
depositing an insulating dielectric layer to cover the first electrode, the magnetic tunnel junction and the photoresist layer;
etching the insulating dielectric layer by adopting an ion beam until the side wall of the free layer is completely exposed;
an oxide layer is formed on the free layer sidewall by oxidation.
In one embodiment, the spin hall layer is deposited, and the layers above the magnetic tunnel junction are stripped to expose the free layer, which includes:
depositing a spin Hall layer to cover the insulating dielectric layer, the oxide layer and the photoresist layer;
etching the spin Hall layer until the side wall of the photoresist layer is exposed;
the photoresist layer is stripped to expose the free layer.
The invention also provides a manufacturing method of the magnetic memory structure, which is used for manufacturing the magnetic memory structure, and comprises the following steps:
manufacturing a magnetic tunnel junction on the first electrode by adopting a photoetching process and reserving a photoresist layer on the top of the magnetic tunnel junction;
depositing an insulating medium layer, cleaning the insulating medium layer on the side wall of the free layer, and oxidizing the side wall of the free layer to form an oxide layer;
and depositing a spin Hall layer, exposing, developing and etching the spin Hall layer to manufacture a second electrode.
In one embodiment, the depositing the spin hall layer, exposing, developing and etching the spin hall layer to make a second electrode, includes:
depositing a spin Hall layer to cover the insulating dielectric layer, the photoresist layer and the oxide layer;
controlling the etching angle of the ion beam to remove the spin Hall layer on one side corresponding to the ion beam;
and carrying out photoetching and etching process treatment on the reserved spin Hall layer to manufacture a second electrode.
In one embodiment, the depositing the spin hall layer, exposing, developing and etching the spin hall layer to make a second electrode, includes:
controlling the deposition angle of the spin Hall layer to cover the insulating dielectric layer, the photoresist layer and the oxide layer on one side corresponding to the deposition angle;
and manufacturing a second electrode after photoetching and etching the spin Hall layer.
According to the magnetic memory structure and the manufacturing method thereof, the spin Hall layer is coated on the side wall of the free layer, the spin Hall layer is not damaged in the process of etching to form the magnetic tunnel junction, the current shunt or short circuit of the spin Hall layer is not caused, the etching difficulty is reduced, meanwhile, the spin Hall layer is coated on the side wall of the free layer to generate spin polarization in the vertical direction, the non-magnetic field writing of a PMA device can be realized, and the complexity of the manufacturing process of the device is not increased due to the preparation of the spin Hall layer coated on the side wall of the free layer.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, a brief description will be given below of the drawings used in the embodiments or the description of the prior art, it being obvious that the drawings in the following description are some embodiments of the invention and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a magnetic memory structure according to one embodiment of the present invention;
FIG. 2 is a top view of the magnetic memory structure of FIG. 1;
FIG. 3 is a schematic diagram of a magnetic memory structure according to another embodiment of the present invention;
FIG. 4 is a top view of the magnetic memory structure of FIG. 3;
FIG. 5 is a schematic diagram of a magnetic memory structure according to yet another embodiment of the present invention;
FIG. 6 is a flow chart of a method for fabricating a magnetic memory structure according to an embodiment of the invention;
FIG. 7 is a process diagram of a magnetic memory structure according to an embodiment of the invention;
FIG. 8 is a flow chart of a method for fabricating a magnetic memory structure according to another embodiment of the present invention;
FIG. 9 is a process diagram of a magnetic memory structure according to another embodiment of the invention;
FIG. 10 is a process diagram of a magnetic memory structure according to yet another embodiment of the invention.
Reference numerals:
110. a magnetic tunnel junction; 120. a spin hall layer; 130. an oxide layer; 140. a first electrode; 150. a second electrode; 160. an insulating dielectric layer; 170. a lead-out wire; 180. an insulating layer; 190. and (3) a photoresist layer.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It will be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or intervening elements may also be present. When a component is considered to be "connected" to another component, it can be directly connected to the other component or intervening components may also be present. The terms "vertical", "horizontal", "upper", "lower", "left", "right" and the like are used in the description of the present invention for the purpose of illustration only and do not represent the only embodiment.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In the present invention, unless expressly stated or limited otherwise, a first feature "up" or "down" on a second feature may be that the first feature is in direct contact with the second feature, or that the first feature and the second feature are in indirect contact through intermedial media. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely under the second feature, or simply indicating that the first feature is less level than the second feature.
Unless defined otherwise, all technical and scientific terms used in the specification of the present invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used in the description of the present invention includes any and all combinations of one or more of the associated listed items.
The magnetic memory (Magnetic RandomAccess Memory, MRAM) has the advantages of almost zero static power consumption, rapid read-write speed, compatibility with a metal oxide semiconductor (CMOS) process, and the like, has been commercially applied in the fields of aerospace, wearable equipment and the like, and is considered as one of the most promising next-generation memories.
The magnetic tunnel junction is a basic memory cell of the magnetic random access memory, and is composed of an ultrathin multi-layer film structure composed of ferromagnetic metal materials and metal oxides. The core structure is usually a sandwich structure of a ferromagnetic layer (free layer)/a tunneling layer (barrier layer)/a ferromagnetic layer (reference layer). The magnetic tunnel junction has both high and low resistance states due to the existence of the tunneling magnetoresistance effect, and can be used to store binary 0 and 1 information. To write information, it is necessary to switch the magnetic moments of the two layers from parallel to anti-parallel or vice versa by changing the direction of the magnetic field to achieve storage of the information.
The development of MRAM has undergone a total of three generations of revolution, depending on the data writing mechanism. The spin-orbit torque magnetic memory (SOT-MRAM) is a three-terminal device, and the characteristic of separation of read and write paths of the SOT-MRAM essentially solves the problems of read errors, tunnel junction aging and the like caused by high write current, and becomes a research hot spot of the next-generation magnetic memory. The device structure of the SOT-MRAM is to connect a ferromagnetic metal film forming a free layer of a Magnetic Tunnel Junction (MTJ) with a conductive line (SOT layer formed of a nonmagnetic metal) formed of a strong spin-orbit coupling metal such as platinum, tantalum, tungsten (SOT material), etc. When a current is injected into the nonmagnetic metal wire, spin accumulation is generated under the action of spin-orbit coupling, causing the magnetization direction of the adjacent free layer to change.
In general, the SOT-MRAM device adopts a top pinned structure, i.e., a reference layer is above a free layer, and an SOT layer (spin Hall layer) is at the lowest, and the SOT layer is very thin, usually about 5nm, so that the etching endpoint is difficult to control, excessive etching can cause the device to be disconnected, and insufficient etching can cause current diversion or short circuit of the SOT layer. On the other hand, regarding a Perpendicular Magnetic Anisotropy (PMA) device, an in-plane auxiliary field needs to be applied to realize writing of the device, and the current scheme is to use a top magnetic layer to generate the in-plane auxiliary field or to manufacture a wedge-shaped bottom electrode structure to realize non-magnetic field writing of data, and the two modes can cause magnetic field crosstalk of an array device and complicated manufacturing process, so that the array device is difficult to integrate and apply. Aiming at the problems, the invention designs an SOT-MRAM device structure, adopts bottom pinning to reduce the risk in the device etching process, and the SOT layer is coated on the side wall of the free layer, so that the non-magnetic field writing of a PMA device can be realized, and the manufacturing process of the structure is provided.
The magnetic memory structure and method of fabrication of the present invention are described below in conjunction with FIGS. 1-10.
As shown in fig. 1, 2, 3 and 4, in one embodiment, a magnetic memory structure includes a magnetic tunnel junction 110, a spin hall layer 120 oxide layer 130.
The magnetic tunnel junction 110 includes a free layer, a barrier layer, a reference layer, and a pinned layer, the free layer being located on top of the magnetic tunnel junction.
Wherein the free layer and the reference layer are magnetic materials, and can be Fe, co and FeB, coB, coFe, coFeB, WCoFeB, coFeBTa. The barrier layer is an insulating material such as MgO, alOx, mgAlOx, mgGaOx, mgTiOx. The pinning layer is a magnetic material, and can be antiferromagnetic such as IrMn, ptMn, feMn, or ferromagnetic with strong anisotropy such as [ Co/Pd ] multilayer film, [ Co/Pt ] multilayer film, and [ Co/Ni ] multilayer film.
Specifically, the free layer is located on top of the magnetic tunnel junction 110. The pinned layer, the reference layer, the barrier layer, and the free layer of the magnetic tunnel junction 110 are sequentially stacked.
The spin hall layer 120 is coated on the outer side of the free layer in the circumferential direction of the free layer.
The spin hall layer 120 is a layer with strong spin orbit coupling effect, also called heavy metal layer, and is made of heavy metal material, and the spin hall angle of the spin hall layer may be positive, such as Pt, pd, hf, au, auPt, ptHf, ptCr, ptMn, feMn, niMn, etc.; the spin hall angle can be negative, such as Ta, W, hf, ir, irMn, W, WOx, WN, W (O, N), taN, taB and other materials; topological insulators, e.g. using Bi x Se 1-x ，Bi x Sb 1-x ，(Bi,Sb) 2 Te 3 And the like; a multilayer film structure comprising a combination of two or more of the above materials is also possible. The above-mentioned materials are not limited to the listed element ratios, and for example, antiferromagnetic IrMn may be IrMn or IrMn3, and CoFeB may be Co20Fe60B20 or Co40Fe40B 20.
Specifically, the spin hall layer 120 may cover the free layer for one week, i.e. completely cover the side wall of the free layer, to form a ring-shaped spin hall layer, see fig. 1 and 2. The half-loop spin hall layer may also be formed by partially cladding the sidewalls of the free layer, see fig. 3 and 4, for example, cladding 1/2 of the sidewalls along the sidewalls of the free layer. When the spin hall layer 120 wraps the free layer for one circle, an insulating layer 180 is disposed between the start end and the end of the spin hall layer 120, so as to avoid short circuit between the start end and the end when current is applied.
The oxide layer 130 is sandwiched between the free layer and the spin hall layer 120.
Specifically, the oxide layer 130 may completely encapsulate the free layer sidewall, or may only encapsulate the free layer sidewall at a portion having the spin hall layer 120, but in the actual manufacturing process, to reduce the process complexity of the oxide layer 130, the oxide layer 130 is generally formed to completely encapsulate the free layer sidewall. The oxide layer 130 is mainly used for preventing the spin hall layer 120 from shunting current into the free layer when current is supplied, and plays a role in isolating the free layer from the spin hall layer 120.
In the magnetic memory structure of this embodiment, the spin hall layer 120 is coated on the side wall of the free layer, so that the spin hall layer is damaged in the process of etching to form the magnetic tunnel junction 110, and the current shunt or short circuit of the spin hall layer is avoided, so that the etching difficulty is reduced, meanwhile, the spin hall layer 120 is coated on the side wall of the free layer, so that spin polarization in the vertical direction is generated, no magnetic field writing of the PMA device can be realized, and the complexity of the device manufacturing process is not increased due to the preparation of the spin hall layer 120 coated on the side wall of the free layer.
It should be noted that the free layer of the magnetic tunnel junction 110 may be located at the top or at the bottom. The present invention will be described in detail primarily with reference to the free layer being located at the bottom of the magnetic tunnel junction 110.
As shown in FIG. 5, in one embodiment, the magnetic memory structure further includes a first electrode 140, a second electrode 150, an insulating dielectric layer 160, and a lead-out line 170, the first electrode 140 being disposed at an end of the magnetic tunnel junction 110 facing away from the free layer, the second electrode 150 being connected to the spin Hall layer 120. An insulating dielectric layer 160 is wrapped around the outside of the magnetic tunnel junction 110 and between the spin hall layer 120 and the first electrode 140, and a lead-out wire 170 is connected to the first electrode 140 through the insulating dielectric layer 160.
Specifically, the second electrode 150 is disposed on a side of the spin hall layer 120 facing away from the free layer, and the head end and the tail end of the spin hall layer 120 are respectively connected to different second electrodes 150. The insulating dielectric layer 160 is used to carry the spin hall layer 120, the oxide layer 130, and the second electrode 150, and is used to protect the magnetic tunnel junction 110. One end of the lead-out wire 170 is connected to the first electrode 140 through the insulating dielectric layer 160, and the other end is led out as a device port, which can be used to connect a transistor.
In addition, the invention also provides a manufacturing method of the magnetic memory structure, which is used for manufacturing the magnetic memory structure of the embodiment of fig. 1-5.
As shown in fig. 6 and 7, in one embodiment, a method for fabricating a magnetic memory structure includes the steps of:
in step S610, a magnetic tunnel junction is fabricated on the first electrode with a free layer of the magnetic tunnel junction facing away from the first electrode.
First, a pinned layer, a reference layer, a barrier layer, and a free layer are deposited on the first electrode 140.
And secondly, reserving a photoresist layer on the magnetic tunnel junction formed after exposure, development and etching.
After the deposition process on the first electrode 140 is completed, a photolithography and etching process is used to fabricate the magnetic tunnel junction 110 and the photoresist layer 190 remains. The magnetic tunnel junction 110 includes a pinned layer, a reference layer, a barrier layer, and a free layer that are sequentially stacked, the pinned layer and the free layer being located at a bottom end and a top end of the magnetic tunnel junction 110, respectively.
Step S620, depositing an insulating dielectric layer, and oxidizing the side wall of the free layer after cleaning the insulating dielectric layer on the side wall of the free layer.
First, an insulating dielectric layer 160 is deposited to cover the first electrode 140, the magnetic tunnel junction 110, and the photoresist layer 190.
The insulating dielectric layer 160 is made of an insulating material, and the first electrode 140 is at one end far away from the spin hall layer 120, that is, at the bottom end of the magnetic memory structure, which is equivalent to the top electrode of the conventional SOT-MRAM, in order to facilitate connection of the first electrode 140, an outgoing line 170 is provided, so that one end of the outgoing line 170 penetrates through the insulating dielectric layer 160 to be connected with the first electrode 140, and the other end is led out as a device port, which can be used for connecting a transistor. The retention of photoresist layer 190 facilitates subsequent lift-off of layers above photoresist layer 190.
And etching the insulating dielectric layer by using an ion beam until the side wall of the free layer is completely exposed.
Specifically, an Ion Beam (IBE) etching method is used to clean the insulating medium on the side wall of the magnetic tunnel junction 110, and the etched stop layer is a barrier layer to completely expose the side wall of the free layer.
Finally, an oxide layer is formed on the free layer sidewall by oxidation.
The oxide layer 130 on the sidewall of the free layer can be formed by oxidizing the exposed sidewall of the free layer in oxygen, or by generating a layer of easily oxidized metal, and then placing the layer in an oxygen environment to generate the oxide layer 130, the oxide layer 130 can prevent the current of the spin hall layer 120 from being shunted, and plays a role in isolating the spin hall layer 120 from the free layer. The oxide layer 130 is a metal oxide layer, and is located between the spin hall layer 120 and the free layer, and may also function as a barrier layer.
And step S630, depositing a spin Hall layer, and stripping the layers above the magnetic tunnel junction to expose the free layer.
First, a spin hall layer is deposited to cover the dielectric layer, oxide layer and photoresist layer.
Specifically, after the oxide layer 130 is formed, the spin hall layer 120 needs to be formed outside the oxide layer 130. A heavy metal layer, i.e., the spin hall layer 120, is deposited by deposition.
And etching the spin Hall layer until the side wall of the photoresist layer is exposed.
Specifically, the side wall is cleaned by etching until the side wall of the photoresist layer 190 is exposed, and then the etching is stopped so as to avoid damaging the oxide layer. Therefore, the photoresist layer 190 has the function of facilitating the subsequent process to peel off the layers above the photoresist layer 190, and serving as a stop layer or buffer layer for the etching process during the formation of the spin hall layer 120, so as to avoid etching damage to the oxide layer.
Finally, the photoresist layer is stripped to expose the free layer.
Specifically, after the photoresist layer 190 is stripped, the insulating dielectric layer 160 and the heavy metal layer on top of the photoresist layer 190 are stripped, and the top of the free layer is exposed. Alternatively, the photoresist layer 190 may not be stripped, and the top of the free layer may be protected by the photoresist layer 190.
And step S640, exposing, developing and etching the spin Hall layer to manufacture a second electrode.
Specifically, after the photoresist layer 190 is stripped, the spin hall layer 120 remains to cover the insulating dielectric layer 160, which is large in size, and thus requires further processing. The spin hall layer 120 that remains is processed using photolithography and etching processes, leaving a spin hall layer 120 of smaller dimensions. A second electrode 150 is then fabricated on the outside of the spin hall layer 120, the second electrode 150 being connected to the spin hall layer 120, corresponding to the bottom electrode of a conventional SOT-MRAM device.
In the method for manufacturing the magnetic memory structure of the present embodiment, when the magnetic tunnel junction 110 is manufactured, the spin hall layer 120 is wrapped on the side wall of the free layer, unlike the case that the free layer of the conventional SOT-MRAM device is located at the bottom of the magnetic tunnel junction 110 and contacts with the SOT layer, the spin hall layer 120 is not disconnected due to excessive etching of the free layer, and current split or short circuit caused by insufficient etching does not occur. Meanwhile, the spin hall layer 120 coated on the outer side of the free layer does not need a complicated process, spin polarization in the vertical direction can be generated, and magnetic field-free writing of the PMA device can be realized.
As shown in fig. 8 and 9, in one embodiment, a method for fabricating a magnetic memory structure includes the steps of:
and step S810, manufacturing a magnetic tunnel junction on the first electrode by adopting a photoetching and etching process, and reserving a photoresist layer on the top of the magnetic tunnel junction.
The fabrication of the magnetic tunnel junction 110 and the retention of the photoresist layer 190 are the same as in the embodiments of fig. 6 and 7.
Step S820, depositing an insulating dielectric layer, cleaning the insulating dielectric layer on the side wall of the free layer, and oxidizing the side wall of the free layer to form an oxide layer.
Wherein the deposition of the insulating dielectric layer 160, the cleaning of the free layer sidewall, and the formation of the oxide layer 130 are the same as in the embodiments of fig. 6 and 7.
And step S830, depositing a spin Hall layer, and manufacturing a second electrode after exposing, developing and etching the spin Hall layer.
First, a spin hall layer is deposited to cover the insulating dielectric layer, photoresist layer and oxide layer.
And secondly, controlling the etching angle of the ion beam to remove the spin Hall layer on the side corresponding to the ion beam.
Specifically, when the spin hall layer 120 is etched, the fabrication of the magnetic memory structure shown in fig. 3 can be completed by controlling the bombardment angle of the ion beam to the spin hall layer 120.
And finally, carrying out photoetching and etching process treatment on the reserved spin Hall layer to manufacture a second electrode.
The fabrication of the second electrode after the spin hall layer is subjected to photolithography and etching processes is the same as that of the embodiment of fig. 6 and 7.
For step S830, referring to fig. 10, in another embodiment, a spin hall layer is deposited, and a second electrode is fabricated after exposing, developing and etching the spin hall layer, including the steps of:
first, the deposition angle of the spin hall layer is controlled to cover the insulating dielectric layer, the photoresist layer and the oxide layer on the side corresponding to the deposition angle.
Specifically, the fabrication of the magnetic memory structure shown in fig. 3 can be accomplished by controlling the deposition angle of the spin hall layer 120.
And secondly, manufacturing a second electrode after photoetching and etching processes of the spin Hall layer.
The fabrication of the second electrode after the spin hall layer is subjected to photolithography and etching processes is the same as that of the embodiment of fig. 6 and 7.
In the magnetic memory structure and the method for manufacturing the same, when the magnetic tunnel junction 110 is manufactured, the spin hall layer 120 is coated on the side wall of the free layer, unlike the situation that the free layer of the conventional SOT-MRAM device is positioned at the bottom of the magnetic tunnel junction 110 and is in contact with the SOT layer, the problem of insufficient etching or excessive etching of the free layer is avoided, if the free layer is positioned at the top of the magnetic tunnel junction 110, the problem of shunt or short circuit of the spin hall layer 120 is avoided even if the pinning layer is insufficient, the difficulty in controlling the etching endpoint is reduced, and if the free layer is positioned at the bottom of the magnetic tunnel junction 110, the situation that the spin hall layer 120 is broken due to excessive etching or the spin hall layer 120 is in current shunt or short circuit due to insufficient etching is avoided, meanwhile, the manufacturing of the spin hall layer 120 coated at the outer side of the free layer does not need a complex process, spin polarization in the vertical direction can be generated, and the PMA device can be written without a magnetic field.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit of the invention, which are within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. A magnetic memory structure comprising:
a magnetic tunnel junction comprising a free layer, a barrier layer, a reference layer, and a pinned layer;
the spin Hall layer is coated on the outer side of the free layer along the circumferential direction of the free layer;
and the oxide layer is clamped between the free layer and the spin Hall layer.
2. The magnetic memory structure of claim 1 further comprising a first electrode disposed at an end of the magnetic tunnel junction opposite the free layer and a second electrode connected to the spin hall layer.
3. The magnetic memory structure of claim 2 further comprising an insulating dielectric layer wrapped around the outside of the magnetic tunnel junction between the spin hall layer and the first electrode and a lead-out wire connected to the first electrode through the insulating dielectric layer.
4. A method of fabricating a magnetic memory structure, the method comprising:
manufacturing a magnetic tunnel junction on a first electrode, wherein a free layer of the magnetic tunnel junction faces away from the first electrode;
depositing an insulating medium layer, cleaning the insulating medium layer on the side wall of the free layer, and oxidizing the side wall of the free layer;
depositing a spin Hall layer, and stripping each layer above the magnetic tunnel junction to expose the free layer;
and exposing, developing and etching the spin Hall layer to manufacture a second electrode.
5. The method of fabricating a magnetic memory structure of claim 4, wherein fabricating a magnetic tunnel junction on the first electrode comprises:
depositing a pinning layer, a reference layer, a barrier layer and a free layer on the first electrode;
and reserving a photoresist layer on the magnetic tunnel junction formed after exposure, development and etching.
6. The method of claim 5, wherein depositing the dielectric layer, cleaning the dielectric layer on the free layer sidewall, and oxidizing the free layer sidewall comprises:
depositing an insulating dielectric layer to cover the first electrode, the magnetic tunnel junction and the photoresist layer;
etching the insulating dielectric layer by adopting an ion beam until the side wall of the free layer is completely exposed;
an oxide layer is formed on the free layer sidewall by oxidation.
7. The method of claim 6, wherein the depositing a spin hall layer and the lift-off processing of the layers above the magnetic tunnel junction to expose the free layer comprises:
depositing a spin Hall layer to cover the insulating dielectric layer, the oxide layer and the photoresist layer;
etching the spin Hall layer until the side wall of the photoresist layer is exposed;
the photoresist layer is stripped to expose the free layer.
8. A method of fabricating a magnetic memory structure, the method comprising:
manufacturing a magnetic tunnel junction on the first electrode by adopting a photoetching process and reserving a photoresist layer on the top of the magnetic tunnel junction;
depositing an insulating medium layer, cleaning the insulating medium layer on the side wall of the free layer, and oxidizing the side wall of the free layer to form an oxide layer;
and depositing a spin Hall layer, exposing, developing and etching the spin Hall layer to manufacture a second electrode.
9. The method of claim 8, wherein depositing the spin hall layer, exposing, developing and etching the spin hall layer to form a second electrode, and further comprising:
depositing a spin Hall layer to cover the insulating dielectric layer, the photoresist layer and the oxide layer;
controlling the etching angle of the ion beam to remove the spin Hall layer on one side corresponding to the ion beam;
and carrying out photoetching and etching process treatment on the reserved spin Hall layer to manufacture a second electrode.
10. The method of claim 8, wherein depositing the spin hall layer, exposing, developing and etching the spin hall layer to form a second electrode, and further comprising:
controlling the deposition angle of the spin Hall layer to cover the insulating dielectric layer, the photoresist layer and the oxide layer on one side corresponding to the deposition angle;
and manufacturing a second electrode after photoetching and etching the spin Hall layer.
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