CN116913989A

CN116913989A - Solar cell and photovoltaic module

Info

Publication number: CN116913989A
Application number: CN202310905072.XA
Authority: CN
Inventors: 金井升; 张彼克; 廖光明
Original assignee: Zhejiang Jinko Solar Co Ltd; Jinko Solar Haining Co Ltd
Current assignee: Zhejiang Jinko Solar Co Ltd; Jinko Solar Haining Co Ltd
Priority date: 2023-07-21
Filing date: 2023-07-21
Publication date: 2023-10-20

Abstract

The embodiment of the application relates to a solar cell and a photovoltaic module, wherein the solar cell comprises: a substrate having a first surface; a semiconductor conductive layer on the first surface; the passivation layer is positioned on the surface of the semiconductor conductive layer far away from the substrate; at least one electrode located on a surface of the passivation layer remote from the substrate and in electrical contact with the semiconductor conductive layer through the passivation layer, each electrode including a first sub-electrode and a second sub-electrode in electrical contact with each other, the first sub-electrode having an extension in the semiconductor conductive layer that is less than an extension of the second sub-electrode in the semiconductor conductive layer in a direction perpendicular to the first surface. At least the carrier collection loss of the solar cell is reduced, and the photoelectric conversion efficiency of the solar cell is improved.

Description

Solar cell and photovoltaic module

Technical Field

The embodiment of the application relates to the technical field of solar cells, in particular to a solar cell and a photovoltaic module.

Background

The fossil energy has the advantages of air pollution and limited reserves, and solar energy has the advantages of cleanness, no pollution, abundant resources and the like, so the solar energy is gradually becoming a core clean energy for replacing the fossil energy, and the solar cell becomes the development center of gravity for the utilization of the clean energy due to the good photoelectric conversion efficiency of the solar cell.

In the conventional solar cell, the electrode is composed of a main grid and a sub grid, most of carriers generated by the solar cell are collected by the sub grid through transverse transmission of the semiconductor conductive layer, and then the carriers collected on the sub grid are transmitted to the main grid for further collection and output. The loss of the current carrier in the process of being collected by the auxiliary grid has a great influence on the electrical performance of the solar cell, in order to reduce the difficulty and loss of the current carrier moving to the auxiliary grid, the common mode is to shorten the interval between adjacent auxiliary grids, and the photoelectric conversion efficiency of the cell is improved in a dense grid mode. However, the current solution is prone to large shadowing effects and mold opening damage.

Disclosure of Invention

The embodiment of the application provides a solar cell and a photovoltaic module, which are at least beneficial to reducing the carrier collection loss of the solar cell and improving the photoelectric conversion efficiency of the solar cell.

The embodiment of the application provides a solar cell, which comprises: a substrate having a first surface; a semiconductor conductive layer on the first surface; a passivation layer on a surface of the semiconductor conductive layer remote from the substrate; at least one electrode located on a surface of the passivation layer remote from the substrate and in electrical contact with the semiconductor conductive layer through the passivation layer, each of the electrodes including a first sub-electrode and a second sub-electrode in electrical contact with each other, the first sub-electrode having an extension in the semiconductor conductive layer that is less than an extension of the second sub-electrode in the semiconductor conductive layer in a direction perpendicular to the first surface.

In some embodiments, the electrode includes a second sub-electrode array including one second sub-electrode group or a plurality of the second sub-electrode groups sequentially arranged along the first direction, and each of the second sub-electrode groups includes one of the second sub-electrodes or a plurality of the second sub-electrodes spaced apart along the second direction.

In some embodiments, the electrode includes a second sub-electrode array, where the second sub-electrode array includes one second sub-electrode group or a plurality of second sub-electrode groups sequentially arranged along the first direction, each second sub-electrode group includes a plurality of second sub-electrodes sequentially arranged along the second direction, and at least part of two adjacent second sub-electrodes are in contact connection along the second direction.

In some embodiments, in the same electrode, the total area of orthographic projection of the first sub-electrode on the first surface is larger than the total area of orthographic projection of the second sub-electrode on the first surface.

In some embodiments, the second sub-electrode has a width in the first direction of 0.1 μm to 5 μm.

In some embodiments, in the same electrode, the ratio of the sum of the areas of the orthographic projections of each of the second sub-electrodes on the first surface to the area of the orthographic projections of the electrode on the first surface is 0.1% to 2%.

In some embodiments, a ratio of a difference in extension length of the second sub-electrode and the first sub-electrode within the semiconductor conductive layer to a length of the first sub-electrode in a direction perpendicular to the first surface is 0.1 to 2.

In some embodiments, the second sub-electrode has an extension length within the semiconductor conductive layer in a direction perpendicular to the first surface of 0.05 μm to 5 μm.

In some embodiments, a portion of the semiconductor conductive layer facing the first sub-electrode has a first thickness and a portion of the semiconductor conductive layer facing the second sub-electrode has a second thickness in a direction perpendicular to the first surface, and a ratio of the first thickness to the second thickness is 0.1 to 0.9.

In some embodiments, the second thickness is 30nm to 100nm.

In some embodiments, the first thickness is 60nm to 150nm.

In some embodiments, the surface of the semiconductor conductive layer contacted with the first sub-electrode is provided with a first crystal grain, the surface of the semiconductor conductive layer contacted with the second sub-electrode is provided with a second crystal grain, and the maximum interval between any two points of the surface of the first crystal grain is larger than the maximum interval between any two points of the surface of the second crystal grain.

In some embodiments, the maximum spacing between any two points on the first grain surface is 30nm to 200nm.

In some embodiments, the maximum separation between any two points on the surface of the second die is 20nm to 100nm.

In some embodiments, a third grain is on the first surface facing the first sub-electrode in a direction perpendicular to the first surface, and a fourth grain is on the first surface facing the second sub-electrode, the third grain having a distribution density less than a distribution density of the fourth grain.

In some embodiments, the semiconductor conductive layer includes a carrier transport layer, a doped conductive layer, or an emitter.

In some embodiments, the electrodes extend along a third direction, the first direction being parallel or perpendicular to the third direction.

The corresponding embodiment of the application also provides a photovoltaic module, which comprises: the battery string is formed by connecting a plurality of solar batteries; an encapsulation layer for covering the surface of the battery string; and the cover plate is used for covering the surface, far away from the battery strings, of the packaging layer.

The technical scheme provided by the embodiment of the application has at least the following advantages:

In the solar cell provided by the embodiment of the application, in the process of arranging the electrode penetrating through the passivation layer and electrically contacting with the semiconductor conductive layer arranged on the first surface of the substrate, the electrode is arranged to be composed of the first sub-electrode and the second sub-electrode which are electrically contacted with each other, and the extension length of the second sub-electrode in the semiconductor conductive layer is larger than the extension length of the first sub-electrode in the semiconductor conductive layer along the direction vertical to the first surface. The first sub-electrode and the second sub-electrode which are in electric contact with each other and have different extension lengths in the semiconductor conductive layer are utilized to form an electrode, the second sub-electrode which is formed on the semiconductor conductive layer and has larger extension length is utilized to shorten the interval between the electrode and partial carriers to be collected, the transmission distance required by the carriers to reach the electrode through the semiconductor conductive layer is reduced, the carrier collection loss of the electrode is reduced, and the contact area between the electrode and the semiconductor conductive layer is increased due to the fact that the extension length of the second sub-electrode on the semiconductor conductive layer is larger, so that the contact resistance between the electrode and the semiconductor conductive layer is reduced, the carrier collection loss of the electrode is further reduced, and the photoelectric conversion efficiency of the solar cell is improved.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, which are not to be construed as limiting the embodiments unless specifically indicated otherwise.

Fig. 1 is a cross-sectional view of a solar cell according to an embodiment of the present application;

FIG. 2 is a top view of an electrode according to an embodiment of the present application;

FIG. 3 is a top view of another electrode according to an embodiment of the present application;

FIG. 4 is a top view of yet another electrode according to an embodiment of the present application;

FIG. 5 is a top view of yet another electrode according to an embodiment of the present application;

FIG. 6 is a schematic view of a surface topography of a semiconductor conductive layer according to an embodiment of the present application;

FIG. 7 is a schematic view of a surface topography of a portion of a semiconductor conductive layer according to another embodiment of the present application;

fig. 8 is a schematic structural diagram of a photovoltaic module according to another embodiment of the present application.

Detailed Description

As known from the background art, in the current solar cell, carrier collection is performed through an electrode electrically contacted with a semiconductor conductive layer, in order to reduce carrier collection loss, a grid line is generally arranged in a dense grid manner, that is, the interval between adjacent auxiliary grids is arranged in a relatively small range, so that the transmission distance required by carrier transmission to the electrode in the carrier collection process is reduced. Due to the increase of the mold opening damage and the incident light shielding effect in the dense gate state, the improvement of photoelectric conversion efficiency in the dense gate mode is limited.

An embodiment of the present application provides a solar cell in which electrodes are disposed to be composed of a first sub-electrode and a second sub-electrode that are in electrical contact with each other in an electrode disposing process that penetrates a passivation layer and is in electrical contact with a semiconductor conductive layer disposed on a first surface of a substrate, and such that an extension length of the second sub-electrode in the semiconductor conductive layer is greater than an extension length of the first sub-electrode in the semiconductor conductive layer in a direction perpendicular to the first surface. The first sub-electrode and the second sub-electrode which are in electric contact with each other and have different extension lengths in the semiconductor conductive layer are utilized to form an electrode, the second sub-electrode which is formed in the semiconductor conductive layer and has larger extension length is utilized to shorten the interval between the electrode and partial carriers to be collected, the transmission distance required by the carriers to reach the electrode through the semiconductor conductive layer is reduced, the carrier collection loss of the electrode is reduced, and the second sub-electrode has larger extension length in the semiconductor conductive layer, so that the contact area of the electrode and the semiconductor conductive layer is increased, the contact resistance of the electrode and the semiconductor conductive layer is further reduced, the carrier collection loss of the electrode is further reduced, and the photoelectric conversion efficiency of the solar cell is improved.

Embodiments of the present application will be described in detail below with reference to the attached drawings. However, it will be understood by those of ordinary skill in the art that in various embodiments of the present application, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, the claimed technical solution of the present application can be realized without these technical details and various changes and modifications based on the following embodiments.

An embodiment of the present application provides a solar cell, referring to fig. 1 and 2, wherein fig. 1 is a schematic diagram of the overall structure of the solar cell, and fig. 2 is a top view of any electrode.

The solar cell includes: a substrate 101, the substrate 101 having a first surface; a semiconductor conductive layer 102, the semiconductor conductive layer 102 being located on the first surface; a passivation layer 103, the passivation layer 103 being located on a surface of the semiconductor conductive layer 102 remote from the substrate 101; at least one electrode 104, the electrode 104 being located on a surface of the passivation layer 103 remote from the substrate 101 and being in electrical contact with the semiconductor conductive layer 102 through the passivation layer 103, each electrode 104 comprising a first sub-electrode 141 and a second sub-electrode 142 in electrical contact with each other, the first sub-electrode 141 having an extension in the semiconductor conductive layer 102 that is smaller than the extension of the second sub-electrode 142 in the semiconductor conductive layer 102 in a direction perpendicular to the first surface.

In the process of manufacturing the optical solar cell, the electrode 104 penetrating the passivation layer 103 and in ohmic contact with the semiconductor conductive layer 102 is configured to be composed of the first sub-electrode 141 and the second sub-electrode 142 in electrical contact with each other, and the extension length of any one of the first sub-electrodes 141 in the semiconductor conductive layer 102 is made smaller than the extension length of any one of the second sub-electrodes 142 in the semiconductor conductive layer 102. By using the second sub-electrode 142 with larger extension length in the semiconductor conductive layer 102, a thin conductive layer with smaller distance from the electrode 104 and a thick conductive layer with larger distance from the electrode 104 are formed in the semiconductor conductive layer 102, so that the transmission distance required for at least part of carriers to reach the electrode 104 through the semiconductor conductive layer 102 is shortened, the loss in the carrier collection process of the electrode 104 is reduced, and the side surface of the second sub-electrode 142 is also contacted with the semiconductor conductive layer 102 due to the larger extension distance of the second sub-electrode 142 in the semiconductor conductive layer 102, thereby increasing the contact area of the electrode 104 and the semiconductor conductive layer 102, reducing the contact resistance of the electrode 104 and the semiconductor conductive layer 102, further reducing the carrier collection loss of the electrode 104, and improving the photoelectric conversion efficiency of the solar cell.

In some embodiments, the material of the substrate 101 may be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, which may be silicon or silicon, for example. The elemental semiconductor material may be in a single crystal state, a polycrystalline state, an amorphous state, or a microcrystalline state (a state having both a single crystal state and an amorphous state, referred to as a microcrystalline state), and for example, silicon may be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

The material of the substrate 101 may also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanium, silicon carbide, gallium arsenide, indium gallium, perovskite, cadmium telluride, copper indium selenium, and the like. The substrate 101 may also be a sapphire substrate, a silicon-on-insulator substrate, or a germanium-on-insulator substrate.

The substrate 101 may be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type doping element, which may be any of v group elements such As phosphorus (P) element, bismuth (Bi) element, antimony (Sb) element, and arsenic (As) element. The P-type semiconductor substrate is doped with a P-type element, and the P-type doped element may be any one of group iii elements such as boron (B) element, aluminum (Al) element, gallium (Ga) element, and indium (In) element.

In some embodiments, the shape of the orthographic projection of any one of the second sub-electrodes 142 on the first surface includes a circle, an ellipse, a polygon, etc., and for ease of understanding, the orthographic projection of the second sub-electrode 142 on the first surface is illustrated as a circle in the embodiment of the present application. In the process of forming the second sub-electrode 142, considering that the main function of the second sub-electrode 142 is to shorten the interval between the carriers and the electrode 104 and to increase the contact area between the electrode 104 and the semiconductor conductive layer 102, the second sub-electrode 142 may be configured as a columnar sub-electrode having a larger surface area and a circular or elliptical cross-sectional shape, so as to increase the contact area between the electrode 104 and the semiconductor conductive layer 102 as much as possible and reduce the carrier collection loss of the electrode 104. The second sub-electrode 142 may be configured as a pyramid-shaped or pyramid-like sub-electrode with a regular polygon cross section, and the smaller the cross section is, the more the pyramid-shaped or pyramid-like sub-electrode is located closer to the substrate 101, and the second sub-electrode 142 is used to enhance the reflection capability of the solar cell on the light to be emitted, thereby improving the light absorption capability and the photoelectric conversion efficiency of the solar cell.

In the case where a plurality of the second sub-electrodes 142 are included in one electrode 104, the cross-sectional shapes of the second sub-electrodes 142 on the same electrode 104 may be the same or different, and the cross-sectional shapes of the second sub-electrodes 142 on different electrodes 104 may be the same or different.

Referring to fig. 1 and 3 in combination, fig. 3 is another top view of an electrode, wherein the X direction is a first direction and the Y direction is a second direction. In some embodiments, the electrode 104 includes a second sub-electrode array 140, the second sub-electrode array 140 including one second sub-electrode group 143 or a plurality of second sub-electrode groups 143 sequentially arranged along the first direction, each second sub-electrode group 143 including one second sub-electrode 142 or a plurality of second sub-electrodes 142 spaced apart along the second direction.

In the process of disposing the electrode 104, in order to make the electrode 104 have similar collection capacities for carriers in each region of the semiconductor conductive layer 102 opposite to the electrode 104, a distribution region and an arrangement manner of the second sub-electrodes 142 included in the electrode 104 may be planned in advance. In forming the electrode 104, a second sub-electrode group 143 is configured by one second sub-electrode 142 or a plurality of second sub-electrodes 142 arranged in a second direction, and then, in a case where the second sub-electrode group 143 is a plurality, the second sub-electrode group 143 is arranged in the first direction such that the electrode 104 includes a second sub-electrode array 140 configured by uniformly distributed second sub-electrodes 142. The electrodes 104 are composed of the first sub-electrodes 141 and the second sub-electrodes 142, and the second sub-electrodes 142 in the second sub-electrode array 140 are arranged at intervals, so that a region between two adjacent second sub-electrodes 142 arranged at intervals can be filled with the first sub-electrodes 141.

By forming the second sub-electrode array 140 formed by the second sub-electrodes 142 regularly arranged in the form in the electrode 104, the electrode 104 has good collection capability on carriers in each region in the semiconductor conductive layer 102 opposite to the electrode 104, so that the carriers generated in each region in the solar cell can be collected efficiently, and the photoelectric conversion efficiency of the solar cell is greatly improved.

The number of the second sub-electrodes 142 included in the different second sub-electrode groups 143 in the same electrode 104 may be the same or different, and the number of the second sub-electrode groups 143 included in the different electrodes 104 may be the same or different.

The first direction X and the second direction Y may be perpendicular to each other, or may have an included angle smaller than 90 degrees, for example, 60 degrees, 45 degrees, 30 degrees, or the like, and the first direction X and the second direction Y may not be the same direction. For convenience of explanation and understanding, the embodiment uses the case that the first direction X and the second direction Y are perpendicular to each other as an example, and in a specific application, the angle between the first direction X and the second direction Y may be adjusted according to the actual needs and the application scenario, which is not limited in this embodiment.

In some embodiments, the interval between adjacent two second sub-electrodes 142 in the second direction is 10 μm to 500 μm. In the case where the number of the second sub-electrodes 142 included in one second sub-electrode group 143 is plural, in order to ensure uniform arrangement of the second sub-electrodes 142 and an effect of improving the carrier collecting ability of the counter electrode 104, it is necessary to control the interval between two second sub-electrodes 142 adjacent in the second direction, for example, the interval between two second sub-electrodes 142 adjacent in the second direction may be set to 12.5 μm, 15 μm, 20 μm, 35 μm, 50 μm, 75 μm, 100 μm, 150 μm, 200 μm, 300 μm, 450 μm, or the like. By setting the interval between two adjacent second sub-electrodes 142 in the second direction within a proper range, the problem of too high preparation cost of the electrode 104 due to too tight arrangement of the second sub-electrodes 142 is avoided, and meanwhile, the carrier collecting capability of the electrode 104 to different regions can be effectively improved.

Referring to fig. 1 and 4 in combination, fig. 4 is another top view of the electrode 104. In some embodiments, the electrode 104 includes a second sub-electrode array 140, the second sub-electrode array 140 includes one second sub-electrode group 143 or a plurality of second sub-electrode groups 143 sequentially arranged along the first direction, each second sub-electrode group 143 includes one second sub-electrode 142 or a plurality of second sub-electrodes 142 spaced apart along the second direction, and at least part of adjacent two second sub-electrodes 142 are in contact connection along the second direction.

In the process of arranging the electrodes 104, when a plurality of second sub-electrodes 142 are arranged at intervals along the second direction to form a second sub-electrode group 143, at least two adjacent second sub-electrodes 142 can be arranged in a contact connection mode, and the contact area of the electrodes 104 and a part of the semiconductor conductive layer 102 in a region is further increased by using the contact-connected second sub-electrodes 142, so that the carrier collecting capacity of the electrodes 104 in the semiconductor conductive layer 102 opposite to the contact-connected second sub-electrodes 142 is greatly improved, and the carrier collecting capacity of the electrodes 104 in a specific region of the semiconductor conductive layer 102 is further enhanced. For example, in the extending direction of the electrode 104, a structure composed of at least two second sub-electrodes 142 connected in contact may be provided at the edge region of the electrode 104, so as to enhance the collecting ability of carriers of the electrode 104 to the edge region of the solar cell.

In addition, the structure formed by the contact connection between two adjacent second sub-electrodes 142 may be disposed in the middle area and other areas of the electrode 104 along the extending direction, or each of the current second sub-electrodes 142 may be replaced by a structure formed by the contact connection between at least two adjacent second sub-electrodes 142, which is not limited in the embodiment of the present application.

Referring to fig. 1 and 5 in combination, fig. 5 is yet another top view of electrode 104. When the electrodes 104 are disposed, not only the partially adjacent second sub-electrodes 142 in the electrodes 104 may be disposed in a contact connection structure, but also the electrodes 104 may be directly disposed in a first electrode region and a second electrode region alternately arranged in the first direction and electrically contacting each other. The first electrode region is composed of a plurality of first sub-electrodes 141 sequentially arranged in the second direction, and the second electrode region is composed of a plurality of second sub-electrodes 142 sequentially arranged in the second direction, and contact-connected between adjacent sub-electrodes in the second direction. By arranging the electrodes 104 to be the first electrode regions and the second electrode regions which are alternately arranged along the first direction and are in electrical contact with each other, the contact area of the electrodes 104 to the whole semiconductor conductive layer 102 opposite to the electrodes 104 is greatly increased, the contact resistance between the electrodes 104 and the semiconductor conductive layer 102 is greatly reduced, the electrodes 104 can have good collection efficiency on carriers in all regions of the whole semiconductor conductive layer 102 opposite to the electrodes 104, and the photoelectric conversion efficiency of the solar cell is further improved.

In some embodiments, the total area of the orthographic projections of the first sub-electrode 141 on the first surface is greater than the total area of the orthographic projections of the second sub-electrode 142 on the first surface in the same electrode 104.

In the process of disposing the electrode 104, the larger the orthographic projection area of the second sub-electrode 142 on the first surface along the first direction, the larger the area of the thinner region of the semiconductor conductive layer 102 facing the electrode 104, and although the contact resistance between the electrode 104 and the semiconductor conductive layer 102 is greatly reduced, the damage to the semiconductor conductive layer 102 is easily caused, and the overall photoelectric conversion efficiency of the battery is affected. Therefore, in the process of disposing the electrode 104, the total area of the orthographic projection of the first sub-electrode 141 on the first surface is larger than the total area of the orthographic projection of the second sub-electrode 142 on the first surface in the same electrode 104 through the adjustment of the sub-electrode selection. The damage to the semiconductor conductive layer 102 is reduced while the contact resistance between the electrode 104 and the semiconductor conductive layer 102 is effectively reduced, so that the rise of the recombination loss of the solar cell is as small as possible.

Referring to fig. 1 and 2 in combination, in some embodiments, the width of the second sub-electrode 142 in the first direction is 0.1 μm to 5 μm.

The width of the second sub-electrode 142 refers to a spacing w1 between one side edge and the opposite side edge of the second sub-electrode 142 in the first direction. The main function of the second sub-electrode 142 is to shorten the transmission distance between a part of carriers and the electrode 104, and to reduce the contact resistance between the electrode 104 and the semiconductor conductive layer 102. When the width of the second sub-electrode 142 is too small, the surface area of the second sub-electrode 142 itself is small, the contact resistance between the second sub-electrode 142 and the semiconductor conductive layer 102 is too large, and the loss of the second sub-electrode 142 collecting carriers is too large due to the contact resistance between the second sub-electrode 142 and the semiconductor conductive layer 102. In the process of collecting the carriers by the electrode 104, the influence of the second sub-electrode 142 on the carrier collection efficiency of the electrode 104 is set to be less than the influence of the contact resistance of the second sub-electrode 142 on the carrier collection efficiency of the electrode 104, so that the carrier collection efficiency of the electrode 104 cannot be improved. In the case where the width of the second sub-electrode 142 is excessively large, since the width of the electrode 104 itself is constant, that is, the interval between one side edge of the electrode 104 and the opposite side edge in the first direction is constant. In the case that the width of the second sub-electrode 142 is too large, the width of the electrode 104 that the first sub-electrode 141 can occupy is too small, and the orthographic projection area of each second sub-electrode 142 on the first surface is easily too large, so that the damage of the semiconductor conductive layer 102 is too large, and the recombination loss of the solar cell is greatly increased.

Accordingly, in performing the disposing of the electrode 104, the width of the second sub-electrode 142 in the first direction may be set in a range of 0.1 μm to 5 μm, for example, the width of the second sub-electrode 142 may be set to 0.15 μm, 0.25 μm, 0.5 μm, 0.8 μm, 1 μm, 1.25 μm, 1.5 μm, 2.25 μm, 3 μm, 4.25 μm, or the like. By setting the width of the second sub-electrode 142 in the first direction within a suitable range, the contact area between the electrode 104 and the semiconductor conductive layer 102 is increased, the contact resistance between the electrode 104 and the semiconductor conductive layer 102 is reduced, and meanwhile, the damage of the second sub-electrode 142 to the semiconductor conductive layer 102 is controlled within a smaller range, so that the occurrence of larger composite loss rise of the solar cell is avoided, and the photoelectric conversion efficiency of the solar cell is effectively increased.

It should be understood that the width of each second sub-electrode 142 in the first direction may be the same or different in the same electrode 104, and the width of each second sub-electrode 142 in the first direction may be the same or different in different electrodes 104.

In some embodiments, the ratio of the area of the orthographic projection of any one of the second sub-electrodes 142 on the first surface to the area of the orthographic projection of the electrode 104 on the first surface in the first direction is 0.1% to 2%.

As mentioned above. One of the main functions of the second sub-electrode 142 is to shorten the transmission distance between a part of carriers and the electrode 104, and to improve the carrier collection efficiency of the electrode 104. In the case that the orthographic projection area of the second sub-electrode 142 on the first surface is too small, the contact area between the second sub-electrode 142 and the semiconductor conductive layer 102 is too small, the contact resistance between the second sub-electrode 142 and the semiconductor conductive layer 102 is too large, and in the case that the contact resistance between the second sub-electrode 142 and the semiconductor conductive layer 102 is too large, the carrier collection efficiency of the second sub-electrode 142 and the electrode 104 is affected, and the carrier collection efficiency of the electrode 104 cannot be effectively improved. In the case where the orthographic projection area of the second sub-electrode 142 on the first surface is too large, since the orthographic projection total area of the first sub-electrode 141 on the first surface is larger than the orthographic projection total area of the second sub-electrode 142 on the first surface, the number of the second sub-electrodes 142 that can be provided is small, the electrode 104 cannot have good collection capability for carriers in each region in the semiconductor conductive layer 102 facing the electrode 104, and the improvement of the carrier collection efficiency of the electrode 104 is limited.

Therefore, in the process of disposing the electrode 104, the ratio of the orthographic projection area of any one of the second sub-electrodes 142 on the first surface to the orthographic projection area of the electrode 104 on the first surface may be controlled to be in the range of 0.1% to 2%, for example, the ratio of the two may be set to 0.15%, 0.25%, 0.5%, 0.8%, 1%, 1.25%, 1.5% or 1.75%, etc. By setting the ratio of the orthographic projection area of the second sub-electrode 142 on the first surface to the orthographic projection area of the electrode 104 on the first surface within a suitable range, the contact resistance between the electrode 104 and the semiconductor conductive layer 102 is effectively reduced, and the carrier collection efficiency of the electrode 104 is improved.

Referring to fig. 1, in some embodiments, a ratio of a difference in extension lengths of the second sub-electrode 142 and the first sub-electrode 141 within the semiconductor conductive layer 102 to a length of the first sub-electrode 141 in a direction perpendicular to the first surface is 0.1 to 2.

The extension length of the second sub-electrode 142 in the direction perpendicular to the first surface refers to the maximum spacing L1 between any point on the surface of the sub-electrode facing the substrate 101 and the surface of the semiconductor conductive layer 102 facing away from the substrate 101, and the extension length of the second sub-electrode 142 in the direction perpendicular to the first surface refers to the maximum spacing L2 between any point on the surface of the sub-electrode facing the substrate 101 and the surface of the semiconductor conductive layer 102 facing away from the substrate 101. The length of the first sub-electrode 141 in the direction perpendicular to the first surface refers to a maximum interval L3 between any point on the surface of the first sub-electrode 141 remote from the substrate 101 and the surface of the first sub-electrode 141 facing the substrate 101 in the direction perpendicular to the first surface.

When the electrode 104 is disposed, in the case where the ratio between the difference in the extension lengths of the second sub-electrode 142 and the first sub-electrode 141 in the semiconductor conductive layer 102 and the length of the first sub-electrode 141 is too small, the length of the second sub-electrode 142 that additionally extends in the semiconductor conductive layer 102 is short, and the effect of shortening the transmission distance between the carriers in the region facing the second sub-electrode 142 and the electrode 104 by the second sub-electrode 142 is limited, so that the carrier collection efficiency of the electrode 104 cannot be effectively improved. In the case where the ratio between the difference in the extension lengths of the second sub-electrode 142 and the first sub-electrode 141 within the semiconductor conductive layer 102 and the length of the first sub-electrode 141 is too large, the additional extension length of the second sub-electrode 142 within the semiconductor conductive layer 102 is too large, and the thickness of the semiconductor conductive layer 102 between the second sub-electrode 142 and the substrate 101 is too thin, which easily causes additional defects to be generated in the semiconductor conductive layer 102 and thus causes excessive lifting of carrier recombination losses.

Accordingly, in performing the disposing of the electrode 104, a ratio of a difference in extension length of the second sub-electrode 142 and the first sub-electrode 141 within the semiconductor conductive layer 102 to a length of the first sub-electrode 141 may be set in a range of 0.1 to 2, for example, 0.15, 0.25, 0.4, 0.5, 0.75, 1, 1.25, 1.5, or 1.8, or the like. By setting the additional extension length of the second sub-electrode 142 within a proper range, the second sub-electrode 142 is ensured to be capable of effectively shortening the distance between at least part of carriers and the electrode 104, meanwhile, the second sub-electrode 142 is prevented from being set to cause excessive damage to the semiconductor conductive layer 102, and the promotion of carrier composite damage caused by the second sub-electrode 142 is controlled within a smaller range, so that the photoelectric conversion efficiency of the solar cell is improved.

Referring to fig. 1, in some embodiments, the second sub-electrode 142 extends from 0.05 μm to 5 μm in length within the semiconductor conductive layer 102 in a direction perpendicular to the first surface.

As described above, the extension length of the second sub-electrode 142 in the direction perpendicular to the first surface at the semiconductor conductive layer 102 refers to the maximum interval L1 between any point on the surface of the sub-electrode facing the substrate 101 and the surface of the semiconductor conductive layer 102 facing away from the substrate 101. The second sub-electrode 142 cannot effectively improve the carrier collection efficiency of the electrode 104 when the extension length of the second sub-electrode 142 in the semiconductor conductive layer 102 is too small, and the second sub-electrode 142 easily causes additional defects in the semiconductor conductive layer 102 when the extension length of the second sub-electrode is too large in the semiconductor conductive layer 102, thereby causing excessive improvement of carrier recombination loss.

Accordingly, the extension length of the second sub-electrode 142 within the semiconductor conductive layer 102 may be set in a range of 0.05 μm to 5 μm, for example, the extension length of the second sub-electrode 142 may be set to 0.055 μm, 0.06 μm, 0.075 μm, 0.1 μm, 0.2 μm, 0.4 μm, 0.75 μm, 1 μm, 1.5 μm, 2.75 μm, 3.5 μm, 4.25 μm, or the like. The carrier collection efficiency of the electrode 104 is effectively improved, meanwhile, the excessive increase of the carrier recombination loss of the solar cell is avoided, and the photoelectric conversion efficiency of the solar cell is improved.

Referring to fig. 1, in some embodiments, a portion of the semiconductor conductive layer 102 facing the first sub-electrode 141 has a first thickness in a direction perpendicular to the first surface, and a portion of the semiconductor conductive layer 102 facing the second sub-electrode 142 has a second thickness, and a ratio of the second thickness to the first thickness is 0.1 to 0.9.

After the electrode 104 including the first sub-electrode 141 and the second sub-electrode 142 is disposed, since the electrode 104 penetrates the passivation layer 103 having the passivation antireflection function and makes ohmic contact with the semiconductor conductive layer 102, the electrode 104 and the semiconductor conductive layer 102 of the substrate 101 include portions having different thicknesses. The thickness of the portion of the semiconductor conductive layer 102 opposite to the first sub-electrode 141 in the direction perpendicular to the first surface, that is, the first thickness refers to the interval H1 between the surface of the first sub-electrode 141 facing the substrate 101 and the surface of the semiconductor conductive layer 102 in contact with the substrate 101; the thickness of the portion of the semiconductor conductive layer 102 facing the second sub-electrode 142, i.e., the second thickness, refers to the interval H2 between the surface of the second sub-electrode 142 facing the substrate 101 and the surface of the semiconductor conductive layer 102 contacting the substrate 101.

In the case where the ratio between the second thickness and the first thickness is too large, the difference between the thickness of the semiconductor conductive layer 102 between the first sub-electrode 141 and the substrate 101 and the thickness of the semiconductor conductive layer 102 between the second sub-electrode 142 and the substrate 101 is too small, and the second sub-electrode 142 cannot effectively shorten the transmission distance between the carriers in the semiconductor conductive layer 102 facing the second sub-electrode 142 and the electrode 104. In the case that the ratio between the second thickness and the first thickness is too small, the difference between the thickness of the semiconductor conductive layer 102 between the first sub-electrode 141 and the substrate 101 and the thickness of the semiconductor conductive layer 102 between the second sub-electrode 142 and the substrate 101 is too large, the thickness of the semiconductor conductive layer 102 facing the second sub-electrode 142 is too thin, and thus, excessive defects are generated in the semiconductor conductive layer 102, and the carrier recombination loss of the solar cell is greatly increased.

Accordingly, in the direction perpendicular to the first surface, the ratio of the second thickness to the first thickness may be set in the range of 0.1 to 0.9, for example, the ratio of the second thickness to the first thickness may be set to 0.15, 0.2, 0.25, 0.35, 0.5, 0.6, 0.75, 0.8, or the like. By setting the ratio of the second thickness to the first thickness in a suitable range, the second sub-electrode 142 can effectively improve the carrier collection efficiency of the electrode 104, and avoid introducing excessive defects into the semiconductor conductive layer 102, so that the carrier recombination loss growth of the solar cell is controlled in a smaller range, and the photoelectric conversion efficiency of the solar cell is effectively improved.

In some embodiments, the second thickness is 30nm to 100nm.

In the process of manufacturing the solar cell, in order to simultaneously form the first sub-electrode 141 and the second sub-electrode 142, selective etching may be performed on the formed semiconductor conductive layer 102 in advance. According to the design of the electrode 104 and the second sub-electrode 142, the semiconductor conductive layer 102 is selectively etched from the surface of the semiconductor conductive layer 102 remote from the substrate 101 in the direction perpendicular to the first surface, forming the semiconductor conductive layer 102 having a thickness different from the thickness of the portion facing the second sub-electrode 142 and the thickness of the portion facing the first sub-electrode 141. Then, the electrode 104 composed of the first sub-electrode 141 and the second sub-electrode 142 is formed by sintering or the like of the electrode paste.

In the semiconductor conductive layer 102, the thickness of the portion facing the second sub-electrode 142, that is, the second thickness refers to the interval H2 between the surface of the second sub-electrode 142 facing the substrate 101 and the surface of the semiconductor conductive layer 102 contacting the substrate 101, and in the case where the second thickness is too large, the interval between the second sub-electrode 142 and the surface of the semiconductor conductive layer 102 facing the substrate 101 is large, and the interval between the carriers of the portion facing the second sub-electrode 142 and the electrode 104 of the semiconductor conductive layer 102 cannot be effectively shortened by the second sub-electrode 142. In the case where the second thickness is too small, the thickness of the portion of the semiconductor conductive layer 102 facing the second sub-electrode 142 is too small, and new defects are easily generated or introduced into the semiconductor conductive layer 102, thereby causing a great increase in carrier recombination loss of the solar cell.

Accordingly, in the process of performing solar cell production, the portion of the semiconductor conductive layer 102 facing the second sub-electrode 142 may be set to a thickness in the direction perpendicular to the first surface in the range of 30nm to 100nm, for example, the portion of the semiconductor conductive layer 102 facing the second sub-electrode 142 may be set to a thickness of 32.5nm, 35nm, 40nm, 45nm, 50nm, 57.5nm, 65nm, 75nm, 90nm, or the like. By setting the thickness of the portion of the semiconductor conductive layer 102 facing the second sub-electrode 142 within a proper range, excessive defects of the semiconductor conductive layer 102 due to the arrangement of the second sub-electrode 142 are avoided, carrier recombination loss of the solar electrode is reduced, meanwhile, the distance from carriers in the semiconductor conductive layer 102 to the second sub-electrode 142 is obviously reduced, and carrier collection efficiency of the electrode 104 and photoelectric conversion efficiency of the solar cell are improved.

The selective etching of the semiconductor conductive layer 102 may be performed by printing an electrode pattern with a hole design on the semiconductor conductive layer 102, and then forming a slot opposite to the second sub-electrode 142 by chemical cleaning, so that the thickness of the portion of the semiconductor conductive layer 102 opposite to the second sub-electrode 142 is thinned.

In some embodiments, the first thickness is 60nm to 150nm.

Similarly to the description of the second thickness, in the case where the thickness of the portion of the semiconductor conductive layer 102 facing the first sub-electrode 141 is excessively large, the collection efficiency of carriers in the portion of the semiconductor conductive layer 102 facing the first sub-electrode 141 by the electrode 104 is greatly reduced, and the carrier collection loss of the electrode 104 is excessively large; if the thickness of the portion of the semiconductor conductive layer 102 facing the first sub-electrode 141 is too small, the overall thickness of the semiconductor conductive layer 102 is low, and excessive defects are likely to occur, which results in excessive carrier recombination loss in the solar cell.

Accordingly, the thickness of the portion of the semiconductor conductive layer 102 facing the first sub-electrode 141 may be set in a range of 60nm to 150nm in a direction perpendicular to the first surface, for example, the thickness of the portion of the semiconductor conductive layer 102 facing the first sub-electrode 141 may be set to 65nm, 70nm, 75nm, 85nm, 100nm, 115nm, 125nm, 140nm, or the like. By setting the thickness of the portion of the semiconductor conductive layer 102 facing the second sub-electrode 142 within a proper range, defects in the semiconductor conductive layer 102 are reduced, carrier recombination loss of the solar electrode is reduced, and the overall carrier collection efficiency of the electrode 104 and the photoelectric conversion efficiency of the solar cell are improved.

In some embodiments, the surface of the semiconductor conductive layer 102 contacting the first sub-electrode 141 has a first grain, the surface of the semiconductor conductive layer 102 contacting the second sub-electrode 142 has a second grain, and the maximum interval between any two points on the surface of the first grain is greater than the maximum interval between any two points on the surface of the second grain.

After the electrode 104 constituted by the first sub-electrode 141 and the second sub-electrode 142 is formed, since the extension lengths of the second sub-electrode 142 and the first sub-electrode 141 within the semiconductor conductive layer 102 are different, the semiconductor conductive layer 102 facing the second sub-electrode 142 has been selectively etched in advance. Accordingly, the first grains may be formed on the surface of the semiconductor conductive layer 102 in contact with the first sub-electrode 141 and the second grains may be formed on the surface of the semiconductor conductive layer 102 in contact with the second sub-electrode 142 by sintering the electrode paste such that the maximum interval between any two points on the surface of the first grains is greater than the maximum interval between any two points on the surface of the second grains. Under the same magnification condition, the topography of the surface of the semiconductor conductive layer 102 contacting the second sub-electrode 142 may be referred to as fig. 6, and the topography of the surface of the semiconductor conductive layer 102 contacting the first sub-electrode 141 may be referred to as fig. 7.

Since the ability of ions in the electrode paste to react with ions in the semiconductor conductive layer 102 is limited, in the case where the size of the first crystal grains is larger than that of the second crystal grains, the arrangement density of the second crystal grains on the surface of the second sub-electrode 142 contacting the semiconductor conductive layer 102 is larger than that of the first crystal grains on the surface of the first sub-electrode 141 contacting the semiconductor conductive layer 102. Further, the arrangement of the second sub-electrode 142 increases the area of the portion between the electrode 104 and the semiconductor conductive layer 102, which is contacted by the crystal grains having conductivity, reduces the contact resistance between the electrode 104 and the semiconductor conductive layer 102, and improves the carrier collecting capability of the electrode 104.

It is to be understood that the surface of the semiconductor conductive layer 102 in contact with the first sub-electrode 141 refers to a surface of the semiconductor conductive layer 102 in contact with a side surface of the first sub-electrode 141 extending into the semiconductor conductive layer 102 toward the top surface of the substrate 101 and the extension exposed in the semiconductor conductive layer 102. The surface of the semiconductor conductive layer 102 in contact with the second sub-electrode 142 refers to a surface of the semiconductor conductive layer 102 in contact with a top surface of the extension portion of the second sub-electrode 142 extending into the semiconductor conductive layer 102 toward the substrate 101 and a side surface of the extension portion exposed in the semiconductor conductive layer 102.

It should be noted that the electrode 104 may be a metal electrode with good conductivity, for example, a copper electrode, a silver electrode, or an aluminum electrode, etc., and may be formed of other conductive materials with good conductivity, for example, a graphene electrode or a superconductor electrode. The first crystal grains and the second crystal grains refer to particles formed of ions having good conductivity in the electrode 104. Taking a silver electrode as an example, the first crystal grain and the second crystal grain are both silver crystal grains.

In some embodiments, the maximum separation between any two points on the surface of the first grain is 30nm to 200nm.

The larger the maximum spacing between any two points on the surface of the first die, the smaller the arrangement density of the first die on the surface of the semiconductor conductive layer 102 in contact with the first sub-electrode, which tends to decrease the area of the electrode 104 in contact with the semiconductor conductive layer 102 through the die having conductivity. Since the size of the first grain, that is, the maximum interval between any two points on the surface of the first grain is related to the sintering temperature of the electrode paste during the formation of the electrode 104, when the maximum interval between any two points on the surface of the first grain is too small, the sintering temperature of the electrode paste is too low, which is easy to cause uneven sintering of the electrode paste, and the electrode 104 has a problem of poor contact.

Therefore, the maximum interval between any two points on the surface of the first crystal grain can be controlled within a range of 30nm to 200nm, for example, 35nm, 45nm, 50nm, 60nm, 75nm, 90nm, 100nm, 115nm, 130nm, 150nm, 175nm, or the like, by controlling the electrode slurry and the sintering temperature. Thereby ensuring a good contact of the electrode 104 and a sufficiently large area of contact between the electrode 104 and the semiconductor conductive layer 102 via the first die.

In some embodiments, the maximum separation between any two points on the surface of the second particle is 20nm to 100nm.

Similar to the description about the first crystal grain, by controlling the maximum interval between any two points on the surface of the second crystal grain to be in the range of 20nm to 100nm, for example, setting the maximum interval between any two points on the surface of the second crystal grain to be 25nm, 30nm, 40nm, 50nm, 65nm, 75nm, 90nm, or the like, the area where the electrode 104 and the semiconductor conductive layer 102 are contacted through the second crystal grain is effectively increased while ensuring good contact between different portions of the electrode 104, improving the carrier collecting ability of the electrode 104.

In some embodiments, the first surface facing the first sub-electrode 141 has third grains thereon in a direction perpendicular to the first surface, and the second surface facing the second sub-electrode 142 has fourth grains thereon, and the distribution density of the third grains is smaller than the distribution density of the fourth grains.

Since the conductive ions in the electrode 104 have good mobility, grains composed of the conductive ions in the electrode 104 are formed on the first surface of the substrate 101, and since the second sub-electrode 142 is provided, the density of the fourth grains formed on the portion of the first surface of the substrate 101 facing the second sub-electrode 142 is greater than the density of the third grains formed on the portion facing the first sub-electrode 141.

By constructing the electrode 104 composed of the first sub-electrode 141 and the second sub-electrode 142, particles having a higher density and good conductivity are formed on the first surface opposite to the second sub-electrode 142, so that the contact area of the semiconductor conductive layer 102 with the substrate 101 through the third crystal grain and the fourth crystal grain having good conductivity is increased, the carrier capacity of the semiconductor conductive layer 102 for transmitting carriers generated by the substrate 101 is increased, and further, the photoelectric conversion efficiency of the solar cell is increased.

In some embodiments, the semiconductor conductive layer 102 includes a carrier transport layer, a doped conductive layer, or an emitter.

The scheme in which the electrode 104 is composed of the first sub-electrode 141 and the second sub-electrode 142 may be applied to various solar cells, for example, a TOPCON cell (Tunnel Oxide Passivated Contact, tunnel oxide passivation contact cell), a PERC cell (passivation emitter and back cell, passivated emitter and real cell), an IBC cell (cross back electrode contact cell, interdigitated Back Contact), or a perovskite thin film solar cell, etc.

The electrodes 104 may be disposed on both the front and back sides of the solar cell other than the IBC cell, and thus, the electrodes 104 may be in contact with the semiconductor conductive layer 102 on the front side of the solar cell or may be in contact with the semiconductor conductive layer 102 on the back side of the solar cell. The front side and the back side of the solar cell refer to two opposite surfaces on the solar cell, and in the case that the solar cell is a single-sided cell, the front side can be regarded as a light receiving surface for receiving incident light, and the back side can be regarded as a back side surface; when the solar cell is a double-sided cell, the surface on the side where the receiving degree of the incident light is weak may be regarded as the back surface, and the surface on the side where the receiving degree of the incident light is strong may be regarded as the front surface.

Taking TOPCON cells as an example, the semiconductor conductive layer 102 is an emitter when the electrode 104 is disposed on the front surface, and the semiconductor conductive layer 102 is a doped conductive layer formed of doped polysilicon when the electrode 104 is disposed on the back surface. In the case where the solar cell is a perovskite thin film solar cell, the semiconductor conductive layer 102 may be a hole transport layer and/or an electron transport layer among carrier transport layers.

In some embodiments, the electrode 104 extends along a third direction, the first direction being parallel or perpendicular to the third direction.

The electrodes 104 extend along the third direction, and the plurality of second sub-electrode groups 143 arranged along the first direction may be arranged along a direction parallel to the extending direction of the electrodes 104, or may be arranged along a direction perpendicular to the extending direction of the electrodes 104, and the different arrangement modes of the second sub-electrode groups 143 may selectively enhance the carrier collecting capability of the electrodes 104 in different areas of the semiconductor conductive layer 102, so as to improve the applicability of the electrodes 104 to different requirements.

In summary, the embodiment of the present application provides a solar cell, in which the electrode 104 is disposed to be composed of the first sub-electrode 141 and the second sub-electrode 142 which are electrically contacted with each other in the process of disposing the electrode 104 penetrating the passivation layer 103 and electrically contacted with the semiconductor conductive layer 102 disposed on the first surface of the substrate 101, and such that the extension length of the second sub-electrode 142 in the semiconductor conductive layer 102 is longer than the extension length of the first sub-electrode 141 in the semiconductor conductive layer 102 in the direction perpendicular to the first surface. The first sub-electrode 141 and the second sub-electrode 142 which are in electrical contact with each other and have different extension lengths in the semiconductor conductive layer 102 are used for forming the electrode 104, the second sub-electrode 142 which is formed on the semiconductor conductive layer 102 and has larger extension lengths shortens the interval between the electrode 104 and partial carriers to be collected, reduces the transmission distance required for the carriers to reach the electrode 104 through the semiconductor conductive layer 102, reduces the carrier collection loss of the electrode 104, increases the contact area between the electrode 104 and the semiconductor conductive layer 102 due to the fact that the second sub-electrode 142 has larger extension lengths in the semiconductor conductive layer 102, further reduces the contact resistance between the electrode 104 and the semiconductor conductive layer 102, further reduces the carrier collection loss of the electrode 104, and improves the photoelectric conversion efficiency of the solar cell.

The embodiment of the application also provides a photovoltaic module, referring to fig. 8, including: a battery string 801, the battery string 801 being formed by connecting a plurality of solar cells described above; an encapsulation layer 802, wherein the encapsulation layer 802 is used for covering the surface of the battery string 801; a cover plate 803, the cover plate 803 is used to cover the surface of the encapsulation layer 802 away from the battery string 801. The solar cells are electrically connected in whole or multiple pieces to form a plurality of cell strings 802, and the plurality of cell strings 802 are electrically connected in series and/or parallel.

In some embodiments, the plurality of battery strings 802 may be electrically connected by a conductive strap 804. The encapsulant layer 802 covers the front and back sides of the solar cell, and specifically, the encapsulant layer 802 may be an organic encapsulant film such as an ethylene-vinyl acetate copolymer (EVA) film, a polyethylene octene co-elastomer (POE) film, or a polyethylene terephthalate (PET) film. In some embodiments, the cover 803 may be a cover 803 having a light transmitting function, such as a glass cover, a plastic cover, or the like. The surface of the cover plate 803 facing the encapsulation layer 802 may be a concave-convex surface, thereby increasing the utilization of incident light.

While the application has been described in terms of the preferred embodiment, it is not intended to limit the scope of the claims, and any person skilled in the art can make many variations and modifications without departing from the spirit and scope of the application, so that the scope of the application shall be defined by the claims.

Claims

1. A solar cell, comprising:

a substrate having a first surface;

a semiconductor conductive layer on the first surface;

a passivation layer on a surface of the semiconductor conductive layer remote from the substrate;

at least one electrode located on a surface of the passivation layer remote from the substrate and in electrical contact with the semiconductor conductive layer through the passivation layer, each of the electrodes including a first sub-electrode and a second sub-electrode in electrical contact with each other, the first sub-electrode having an extension in the semiconductor conductive layer that is less than an extension of the second sub-electrode in the semiconductor conductive layer in a direction perpendicular to the first surface.

2. The solar cell according to claim 1, wherein the electrode comprises a second sub-electrode array comprising one second sub-electrode group or a plurality of the second sub-electrode groups sequentially arranged along the first direction, each of the second sub-electrode groups comprising one of the second sub-electrodes or a plurality of the second sub-electrodes spaced apart along the second direction.

3. The solar cell according to claim 1, wherein the electrode comprises a second sub-electrode array comprising one second sub-electrode group or a plurality of the second sub-electrode groups sequentially arranged along the first direction, each of the second sub-electrode groups comprising a plurality of the second sub-electrodes sequentially arranged along the second direction, and at least part of adjacent two of the second sub-electrodes are in contact connection in the second direction.

4. A solar cell according to claim 2 or 3, wherein the total area of orthographic projections of the first sub-electrodes on the first surface is larger than the total area of orthographic projections of the second sub-electrodes on the first surface in the same electrode.

5. The solar cell according to claim 4, wherein the width of the second sub-electrode is 0.1 μm to 5 μm in the first direction.

6. The solar cell according to claim 4, wherein the ratio of the area of orthographic projection of any one of the second sub-electrodes on the first surface to the area of orthographic projection of the electrode on the first surface is 0.1% to 2%.

7. The solar cell according to claim 1, wherein a ratio of a difference in extension length of the second sub-electrode and the first sub-electrode within the semiconductor conductive layer to a length of the first sub-electrode in a direction perpendicular to the first surface is 0.1 to 2.

8. The solar cell according to claim 7, wherein an extension length of the second sub-electrode within the semiconductor conductive layer in a direction perpendicular to the first surface is 0.05 μm to 5 μm.

9. The solar cell according to claim 1, wherein a thickness of a portion of the semiconductor conductive layer facing the first sub-electrode is a first thickness, a thickness of a portion of the semiconductor conductive layer facing the second sub-electrode is a second thickness, and a ratio of the second thickness to the first thickness is 0.1 to 0.9 in a direction perpendicular to the first surface.

10. The solar cell of claim 9, wherein the second thickness is 30nm to 100nm.

11. The solar cell of claim 9, wherein the first thickness is 60nm to 150nm.

12. The solar cell according to claim 1, wherein a surface of the semiconductor conductive layer in contact with the first sub-electrode has a first crystal grain, a surface of the semiconductor conductive layer in contact with the second sub-electrode has a second crystal grain, and a maximum interval between any two points of a surface of the first crystal grain is larger than a maximum interval between any two points of a surface of the second crystal grain.

13. The solar cell of claim 12, wherein a maximum spacing between any two points on the surface of the first die is 30nm to 200nm.

14. The solar cell according to claim 12, wherein a maximum spacing between any two points on the surface of the second wafer is 20nm to 100nm.

15. The solar cell according to claim 1, wherein a third crystal grain is provided on the first surface facing the first sub-electrode in a direction perpendicular to the first surface, and a fourth crystal grain is provided on the first surface facing the second sub-electrode, and a distribution density of the third crystal grain is smaller than a distribution density of the fourth crystal grain.

16. The solar cell of claim 1, wherein the semiconductor conductive layer comprises a carrier transport layer, a doped conductive layer, or an emitter.

17. The solar cell according to claim 1, wherein the electrode extends along a third direction, the first direction being parallel or perpendicular to the third direction.

18. A photovoltaic module, comprising:

a cell string formed by connecting a plurality of solar cells according to any one of claims 1 to 17;

an encapsulation layer for covering the surface of the battery string;

and the cover plate is used for covering the surface, far away from the battery strings, of the packaging layer.