CN116864346A

CN116864346A - Relay driving circuit and electronic equipment

Info

Publication number: CN116864346A
Application number: CN202310946880.0A
Authority: CN
Inventors: 杨成立
Original assignee: Shenzhen Daotong Hechuang Digital Energy Co ltd
Current assignee: Shenzhen Daotong Hechuang Digital Energy Co ltd
Priority date: 2023-07-28
Filing date: 2023-07-28
Publication date: 2023-10-10

Abstract

The invention relates to the technical field of electronic circuits, and discloses a relay driving circuit and electronic equipment. The relay driving circuit comprises a driving control circuit and a driving module, wherein the driving control circuit comprises a first node and a second node, the driving control circuit can respond to a first level type signal, the voltage of the first node is controlled to be a first voltage, the voltage of the second node is controlled to be a second voltage, the voltage of the second node is controlled to be a first voltage in response to a second level type signal, the driving module is respectively electrically connected with the driving control circuit at the first node and the second node and is electrically connected with a coil of the relay, and the first voltage can be controlled to be applied to the coil of the relay for a preset duration according to the first voltage and the second voltage so as to drive the relay to be in a first working state or a second working state. Therefore, the embodiment can meet the driving requirement of the relay for a certain pulse duration without setting the pulse duration of the control signal on software.

Description

Relay driving circuit and electronic equipment

Technical Field

The invention relates to the technical field of electronic circuits, in particular to a relay driving circuit and electronic equipment.

Background

The magnetic latching relay is a novel relay developed in recent years and is also an automatic switch. Like other electromagnetic relays, the electromagnetic relay has automatic on-off function on the circuit, except that the normally closed or normally open state of the magnetic latching relay is completely dependent on the action of permanent magnet steel, and the switching of the switching state is completed by triggering by pulse electric signals with a certain width.

The magnetic latching relay is kept in the contact-off and attraction state by the magnetic force generated by the permanent magnet at ordinary times. When the contacts of the magnetic latching relay are required to be opened or closed, the coil is only excited by positive direct current pulse voltage or reverse direct current pulse voltage, and the magnetic latching relay can complete the state conversion of closing instantly. When the magnetic latching relay is in an open or a suction state, the coil of the magnetic latching relay does not need to be continuously electrified when the contact is in a holding state, and the state of the magnetic latching relay can be maintained unchanged only by the magnetic force of the permanent magnet.

At present, the magnetic latching relay is usually driven by an H bridge, the pulse duration of a control signal is generally set by using software, so that a coil is excited by applying a positive direct current pulse voltage or an inverse direct current pulse voltage in the pulse duration, and the magnetic latching relay is in a suction or disconnection state.

Disclosure of Invention

An object of an embodiment of the present invention is to provide a relay driving circuit and an electronic apparatus, which can overcome the drawbacks of the prior art.

In a first aspect, an embodiment of the present invention provides a relay driving circuit including:

the driving control circuit comprises a first node and a second node, and is used for responding to an input control signal to control the voltages of the first node and the second node, wherein when the control signal is a first level type signal, the voltage of the first node is a first voltage, the voltage of the second node is a second voltage, and when the control signal is a second level type signal, the voltage of the first node is a second voltage, and the voltage of the second node is a first voltage;

the driving module is respectively and electrically connected with the driving control circuit at the first node and the second node and is electrically connected with the coil of the relay and used for controlling the first voltage to be continuously applied to the coil of the relay for a preset time period according to the first voltage and the second voltage so as to drive the relay to be in a first working state or a second working state.

Optionally, the driving module comprises a first driving circuit and a second driving circuit;

The first driving circuit is electrically connected with the driving control circuit at the first node and is electrically connected with the first end of the coil of the relay, and the second driving circuit is electrically connected with the driving control circuit at the second node and is electrically connected with the second end of the coil of the relay;

the first driving circuit is used for controlling the first voltage of the first node to be applied to the first end of the coil of the relay for a preset duration according to the first voltage of the first node, and the second driving circuit is used for controlling the driving control circuit, the first driving circuit, the coil of the relay and the second driving circuit to form a current loop according to the second voltage of the second node so as to drive the relay to be in a first working state;

the second driving circuit is further used for controlling the first voltage of the second node to be applied to the second end of the coil of the relay for a preset duration according to the first voltage of the second node, and the first driving circuit is further used for controlling the driving control circuit, the second driving circuit, the coil of the relay and the first driving circuit to form a current loop according to the second voltage of the first node so as to drive the relay to be in a second working state.

Optionally, the first driving circuit includes:

the first voltage lifting circuit is electrically connected with the drive control circuit at the first node and comprises a third node for lifting the voltage of the third node according to the first voltage of the first node;

the first switch circuit is respectively electrically connected with the first voltage lifting circuit at the third node and the first node and the second node, is also electrically connected with the first end of the coil of the relay, and is used for controlling the first voltage of the first node to be applied to the first end of the coil of the relay in a closed state in response to the voltage of the third node in the voltage lifting process of the third node, and controlling the first voltage of the first node to stop being applied to the first end of the coil of the relay in response to the voltage of the third node after delaying for a preset time period, and controlling the driving control circuit, the second driving circuit, the coil of the relay and the first switch circuit to form a current loop according to the second voltage of the first node when the first voltage of the coil of the relay is applied for the preset time period.

Optionally, the first voltage lifting circuit includes a first diode, a first resistor, a second resistor, and a first capacitor;

the anode of the first diode is electrically connected with the driving control circuit and the first switching circuit at the first node respectively, the cathode of the first diode is electrically connected with one end of the first resistor, the other end of the first resistor is electrically connected with one end of the second resistor and one end of the first capacitor at the third node respectively, and the other end of the second resistor and the other end of the first capacitor are electrically connected with the driving control circuit at the second node.

Optionally, the first switching circuit includes:

the source electrode of the first PMOS tube is electrically connected with the drive control circuit at the first node, the drain electrode of the first PMOS tube is used for being electrically connected with the first end of the coil of the relay, and the grid electrode of the first PMOS tube is electrically connected with the first voltage lifting circuit at the third node.

Optionally, the second driving circuit includes:

the second driving circuit includes:

the second voltage lifting circuit is electrically connected with the drive control circuit at the second node and comprises a fourth node for lifting the fourth node voltage according to the first voltage of the second node;

The second switch circuit is electrically connected with the second voltage lifting circuit at the fourth node and the first node and the second node and is also electrically connected with the second end of the coil of the relay, and is used for controlling the first voltage of the second node to be applied to the second end of the coil of the relay in a disconnection state in response to the voltage of the fourth node in the voltage lifting process of the fourth node, and controlling the first voltage of the second node to stop being applied to the second end of the coil of the relay in response to the voltage of the fourth node after delaying for a preset time period, and controlling the drive control circuit, the first drive circuit, the coil of the relay and the second switch circuit to form a current loop according to the second voltage of the second node when the first voltage of the coil of the relay is applied for the preset time period.

Optionally, the first voltage lifting circuit includes a second diode, a third resistor, a fourth resistor, and a second capacitor;

the anode of the second diode is electrically connected with the driving control circuit and the second switching circuit at the second node respectively, the cathode of the second diode is electrically connected with one end of the third resistor, the other end of the third resistor is electrically connected with one end of the fourth resistor and one end of the second capacitor at the fourth node respectively, and the other end of the fourth resistor and the other end of the second capacitor are electrically connected with the driving control circuit at the first node.

Optionally, the second switching circuit includes:

the source electrode of the second PMOS tube is electrically connected with the drive control circuit at the second node, the drain electrode of the second PMOS tube is used for being electrically connected with the second end of the coil of the relay, and the grid electrode of the second PMOS tube is electrically connected with the second voltage lifting circuit at the fourth node.

Optionally, the drive control circuit includes:

the first push-pull circuit is electrically connected with the driving module at the first node and is used for responding to an input control signal and controlling the voltage of the first node;

and the second push-pull circuit is electrically connected with the driving module at the second node and is used for responding to the control signal and controlling the voltage of the second node.

In a second aspect, an embodiment of the present invention provides an electronic device including a relay driving circuit as described above.

The relay driving circuit comprises a driving control circuit and a driving module, wherein the driving control circuit comprises a first node and a second node, the voltage of the first node and the voltage of the second node can be controlled in response to an input control signal, when the control signal is a first level type signal, the voltage of the first node is a first voltage, the voltage of the second node is a second voltage, when the control signal is a second level type signal, the voltage of the first node is a second voltage, the voltage of the second node is a first voltage, the driving module is electrically connected with the driving control circuit at the first node and the second node respectively and is electrically connected with a coil of a relay, and the first voltage can be controlled to be continuously applied to the coil of the relay for a preset duration according to the first voltage and the second voltage so as to drive the relay to be in a first working state or a second working state. Therefore, the embodiment does not need to set the pulse duration of the driving signal on software, and can apply the direct current pulse voltage with a certain duration to excite the coil of the relay, thereby meeting the driving requirement of the relay for a certain pulse duration and being capable of conveniently driving the relay.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the drawings are not to be taken in a limiting sense, unless otherwise indicated.

Fig. 1 is a schematic structural diagram of a relay driving system according to an embodiment of the present invention;

fig. 2 is a schematic diagram of an operating state of a relay driving system according to an embodiment of the present invention;

FIG. 3 is a schematic view illustrating an operating state of a relay driving system according to another embodiment of the present invention;

fig. 4 is a schematic structural diagram of a relay driving circuit according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of a relay driving circuit according to another embodiment of the present invention;

fig. 6 is a schematic structural diagram of a relay driving circuit according to another embodiment of the present invention;

fig. 7 is a schematic circuit diagram of a relay driving circuit according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

It should be noted that, if not in conflict, the features of the embodiments of the present invention may be combined with each other, which is within the protection scope of the present invention. In addition, while functional block division is performed in a device diagram and logical order is shown in a flowchart, in some cases, the steps shown or described may be performed in a different order than the block division in the device, or in the flowchart. Furthermore, the words "first," "second," "third," and the like as used herein do not limit the order of data and execution, but merely distinguish between identical or similar items that have substantially the same function and effect.

The embodiment of the invention provides a relay driving system. Referring to fig. 1, a relay driving system 100 includes a relay 11, a load circuit 12, and a relay driving circuit 13.

Referring to fig. 2 and 3, the relay 11 includes a coil 111, a core 112, a first electromagnet 113, a second electromagnet 114, a permanent magnet 115, an armature 116, and a contact 117.

The contact 117 is electrically connected to the load circuit 12, the contact 117 is operable in an engaged state or an open state, the operating state of the contact 117 determines the operating state of the load circuit 12, as shown in fig. 2, when the contact 117 is in the engaged state, the load circuit 12 is in the on state, as shown in fig. 3, and when the contact 117 is in the open state, the load circuit 12 is in the off state.

The coil 111 includes a coil first end 111a and a coil second end 111b.

The relay driving circuit 13 is electrically connected to the coil first end 111a and the coil second end 111b of the coil 111, respectively, and is configured to apply a positive dc pulse voltage or an inverse dc pulse voltage to the coil 111 to drive the contact 117 to be in the on state or the off state.

When the relay driving circuit 13 applies a positive dc pulse voltage to the coil 111, that is, the voltage at the first end 111a of the coil is positive and the voltage at the second end 111b of the coil is negative, the first electromagnet 113 and the second electromagnet 114 generate magnetic force, so that the permanent magnet 115 is driven to drive the armature 116 to move so as to push the contact 117 to be in the attraction state, and the load circuit 12 is in the on state.

When the relay driving circuit 13 stops supplying power to the coil 111 while the contact 117 is in the attracted state, the magnetic force of the first electromagnet 113 and the second electromagnet 114 is lost, the permanent magnet 115 attracts the iron core 112, the contact 117 is kept in the attracted state, and the load circuit 12 is kept in the on state.

When the relay driving circuit 13 applies an inverse direct current pulse voltage to the coil 111, that is, the voltage at the first end 111a of the coil is negative and the voltage at the second end 111b of the coil is positive, the magnetic poles of the first electromagnet 113 and the second electromagnet 114 are changed, so that the permanent magnet 115 is driven to drive the armature 116 to move reversely to push the contact 117 to be in the open state, and the load circuit 12 is in the open state.

When the contact 117 is in the off state, if the relay driving circuit 13 stops supplying power to the coil 111, the magnetic forces of the first electromagnet 113 and the second electromagnet 114 are eliminated, the permanent magnet 115 attracts the iron core 112, the contact 117 is kept in the off state, and the load circuit 12 is kept in the off state.

In some embodiments, referring to fig. 4, the relay driving circuit 13 includes a driving control circuit 131 and a driving module 132.

The driving control circuit 131 includes a first node 131a and a second node 131b, and the driving control circuit 131 may control voltages of the first node 131a and the second node 131b in response to an input control signal, where the control signal includes a first level type signal and a second level type signal, and the first level type signal and the second level type signal are different level type signals, for example, the first level type signal is a high level signal, the second level type signal is a low level signal, or the first level type signal is a low level signal, and the second level type signal is a high level signal.

When the control signal is a first level type signal, for example, a high level signal, the driving control circuit 131 responds to the first level type signal to control the voltage of the first node 131a to be a first voltage and the voltage of the second node 131b to be a second voltage.

When the control signal is a second level type signal, for example, a low level signal, the driving control circuit 131 responds to the first level type signal to control, the voltage of the first node 131a is a first voltage, and the voltage of the second node 131b is a second voltage.

The first voltage is different from the second voltage, for example, the first voltage is 12V and the second voltage is 0V.

The driving module 132 is electrically connected to the driving control circuit 131 at the first node 131a and the second node 131b, and is electrically connected to the first end 111a and the second end 111b of the coil 11, respectively, and the driving module 132 can control the first voltage to be applied to the coil 111 of the relay 11 for a preset duration according to the first voltage and the second voltage, so as to drive the relay 11 to be in the first working state or the second working state.

The first operating state and the second operating state are different operating states, for example, if the first operating state is the contact 117 of the relay 11 in the engaged state, the second operating state is the contact 117 of the relay 11 in the open state, and if the first operating state is the contact 117 of the relay 11 in the open state, the second operating state is the contact 117 of the relay 11 in the engaged state.

For example, when the voltage of the first node 131a is the first voltage and the voltage of the second node 131b is the second voltage, the driving module 132 controls the first voltage of the first node 131a to be applied to the first end 111a of the coil of the relay 11 for a preset period of time according to the first voltage of the first node 131a and the second voltage of the second node 131b, so as to drive the contact 117 to be in the attraction state.

When the voltage of the first node 131a is the second voltage and the voltage of the second node 131b is the first voltage, the driving module 132 controls the first voltage of the second node 131b to be applied to the coil second end 111b of the relay 11 for a preset period of time according to the second voltage of the first node 131a and the first voltage of the second node 131b, so as to drive the contact 117 to be in an open state.

In this embodiment, the preset duration may be adjusted on circuit hardware according to actual requirements, and the preset duration is not limited herein.

Therefore, in the embodiment, only the duration of the direct current pulse voltage for exciting the coil of the relay is required to be set on circuit hardware, the pulse duration of the driving signal is not required to be set on software, and the coil of the relay can be excited by applying the direct current pulse voltage with a certain duration, so that the relay is conveniently driven.

In some embodiments, referring to fig. 5, the driving control circuit 131 includes a first push-pull circuit 1311 and a second push-pull circuit 1312.

The first push-pull circuit 1311 is electrically connected to the driving module 132 at the first node 131a, and is capable of controlling the voltage of the first node 131a in response to an input control signal.

When the control signal is a first level type signal, the first push-pull circuit 1311 controls the voltage of the first node 131a to be a first voltage in response to the first level type signal.

When the control signal is a second level type signal, the first push-pull circuit 1311 controls the voltage of the first node 131a to be a second voltage in response to the second level type signal.

In some embodiments, referring to fig. 7, the first push-pull circuit 1311 includes a first NMOS transistor NM1, a second NMOS transistor NM2, a third PMOS transistor PM3, a fourth PMOS transistor PM4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8.

The gate of the first NMOS transistor NM1, the gate of the third PMOS transistor PM3, one end of the fifth resistor R5, and one end of the sixth resistor R6 may be applied with control signals, the source of the first NMOS transistor NM1 and the other end of the fifth resistor R5 are grounded, the drain of the first NMOS transistor NM1 is electrically connected to the gate of the fourth PMOS transistor PM4 and one end of the seventh resistor R7, the other end of the seventh resistor R7 is electrically connected to the source of the fourth PMOS transistor PM4 and the input power supply (12V), the drain of the fourth PMOS transistor PM4 is electrically connected to the drain of the second NMOS transistor NM2 and the driving module 132 at the first node 131a, the gate of the second NMOS transistor NM2 is electrically connected to the drain of the third PMOS transistor PM3 and one end of the eighth resistor R8, the source of the fourth PMOS transistor PM4 and the other end of the eighth resistor R8 are grounded, and the source of the third PMOS transistor PM3 is electrically connected to the other end of the sixth resistor R6 and the input power supply (12V).

When the control signal is a high level signal, the first NMOS transistor NM1 is turned on in response to the high level signal, the fourth PMOS transistor PM4 is also turned on, the third PMOS transistor PM3 is turned off in response to the high level signal, the second NMOS transistor NM2 is also turned off, and the input power (12V) is applied to the first node 131a through the fourth PMOS transistor PM4, and at this time, the voltage of the first node 131a is the first voltage (12V).

When the control signal is a low level signal, the first NMOS transistor NM1 is turned off in response to the low level signal, the fourth PMOS transistor PM4 is turned off, the third PMOS transistor PM3 is turned on in response to the low level signal, the second NMOS transistor NM2 is turned on, and the second NMOS transistor NM2 pulls the voltage of the first node 131a to ground, and at this time, the voltage of the first node 131a is the second voltage (0V).

In this embodiment, the fifth resistor R5 is used for preventing the first NMOS transistor NM1 from being turned on by mistake, the sixth resistor R6 is used for preventing the third PMOS transistor PM3 from being turned on by mistake, the seventh resistor R7 is used for preventing the fourth PMOS transistor PM4 from being turned on by mistake, and the eighth resistor R8 is used for preventing the second NMOS transistor NM2 from being turned on by mistake.

The second push-pull circuit 1312 is electrically connected to the driving module 132 at the second node 131b, and is capable of controlling the voltage of the second node 131b in response to the input control signal.

When the control signal is a first level type signal, the second push-pull circuit 1312 controls the voltage of the second node 131b to be a second voltage in response to the first level type signal.

When the control signal is a second level type signal, the second push-pull circuit 1312 controls the voltage of the second node 131b to be the first voltage in response to the second level type signal.

In some embodiments, referring to fig. 7, the second push-pull circuit 1312 includes a third NMOS transistor NM3, a fifth PMOS transistor PM5, a ninth resistor R9, and a tenth resistor R10.

The gate of the third NMOS transistor NM3, the gate of the fifth PMOS transistor PM5, one end of the ninth resistor R9, and one end of the tenth resistor R10 may be applied with control signals, the source of the fifth PMOS transistor PM5 is electrically connected to the other end of the ninth resistor R9 and the input power supply (12V), the drain of the fifth PMOS transistor PM5 is electrically connected to the drain of the third NMOS transistor NM3 and the driving module 132 at the second node 131b, and the source of the third NMOS transistor NM3 and the other end of the tenth resistor R10 are grounded.

When the control signal is a high level signal, the fifth PMOS PM5 is turned off in response to the high level signal, and the third NMOS NM3 is turned on in response to the high level signal, so that the third NMOS NM3 pulls the voltage of the second node 131b to ground, and the voltage of the second node 131b is the second voltage (0V).

When the control signal is a low level signal, the fifth PMOS transistor PM5 is turned on in response to the low level signal, and the third NMOS transistor NM3 is turned off in response to the low level signal, so that the input power is applied to the second node 131b through the fifth PMOS transistor PM5, and the voltage of the second node 131b is the first voltage (12V).

In this embodiment, the ninth resistor R9 is used for preventing the fifth PMOS transistor PM5 from being turned on by mistake, and the tenth resistor R10 is used for preventing the third NMOS transistor NM3 from being turned on by mistake.

In the conventional H-bridge driving circuit, the relay is usually controlled by two paths of control signals, but in this embodiment, only the voltages of the first node 131a and the second node 131b are controlled, and the voltages of the first node 131a and the second node 131b are only converted between the first voltage and the second voltage, so that the embodiment only needs to use a single control signal for control, for example, when the driving relay is required to be in the on state, the relay is required to be controlled by using a high level signal, and when the driving relay is required to be in the off state, the relay is required to be driven conveniently.

In some embodiments, referring to fig. 5, the driving module 132 includes a first driving circuit 1321 and a second driving circuit 1322.

The first driving circuit 1321 is electrically connected to the first end 111a of the coil of the relay 11, and the first node 131a is electrically connected to the driving control circuit 131, so that the first voltage of the first node 131a can be controlled to be applied to the first end 111a of the coil of the relay 11 for a preset period according to the first voltage of the first node 131a, and at the same time, the second driving circuit 1322 can control the driving control circuit 131, the first driving circuit 1321, the coil 111 of the relay 11 and the second driving circuit 1322 to form a current loop according to the second voltage of the second node 131b, so as to drive the relay 11 to be in the first working state.

The second driving circuit 1322 can control the first voltage of the second node 131b to be applied to the second end 111b of the coil of the relay 11 for a preset period of time according to the first voltage of the second node 131b, and at the same time, the first driving circuit 1321 can control the driving control circuit 131, the second driving circuit 1322, the coil 111 of the relay 11 and the first driving circuit 1321 to form a current loop according to the second voltage of the first node 131a, so as to drive the relay 11 to be in the second working state.

In some embodiments, referring to fig. 6, the first driving circuit 1321 includes a first voltage boost circuit 13211 and a first switching circuit 13212.

The first voltage boosting circuit 13211 is electrically connected to the driving control circuit 131 at a first node 131a, the first voltage boosting circuit 13211 includes a third node 132a, and can boost the voltage of the third node 132a according to the first voltage of the first node 131 a.

In some embodiments, referring to fig. 7, the first voltage boost circuit 13211 includes a first diode D1, a first resistor R1, a second resistor R2, and a first capacitor C1.

The anode of the first diode D1 is electrically connected to the first switch circuit 13212 and the driving control circuit 131 at the first node 131a, the cathode of the first diode D1 is electrically connected to one end of the first resistor R1, the other end of the first resistor R1 is electrically connected to one end of the second resistor R2, one end of the first capacitor C1 and the first switch circuit 13212 at the third node 132a, and the other end of the second resistor R2 and the other end of the first capacitor C1 are electrically connected to the driving control circuit 131 at the second node 131 b.

When the voltage of the first node 131a is the first voltage and the voltage of the second node 131b is the second voltage, the first voltage of the first node 131a charges the first capacitor C1 through the first diode D1 and the first resistor R1, and the voltage of the third node 132a is continuously raised during the charging process of the first capacitor C1.

By adjusting the resistance value of the first resistor R1 and the capacitance value of the first capacitor C1, the charging speed of the first capacitor C1 can be adjusted, so that the voltage lifting speed of the third node 132a can be adjusted.

The second resistor R2 is a discharging resistor, and is used for discharging the charge stored in the first capacitor C1 when the first capacitor C1 is not being charged, so that the voltage of the third node 132a is continuously raised from 0V when the first capacitor C1 is being charged next time.

The first switch circuit 13212 is electrically connected to the first voltage raising circuit 13211 at the third node 132a, and electrically connected to the drive control circuit 131 at the first node 131a and the second node 131b, respectively, and is further configured to be electrically connected to the coil first end 111a of the relay 11.

In the process of continuously raising the voltage of the third node 132a, the first switch circuit 13212 may respond to the voltage of the third node 132a to be in a closed state, and at this time, the first switch circuit 13212 may control the first voltage of the first node 131a to be applied to the first end 111a of the coil of the relay 11, and at the same time, the second drive circuit 1322 may control the drive control circuit 131, the second drive circuit 1322, the coil 111 of the relay 11 and the first switch circuit 13212 to form a current loop according to the second voltage of the second node 131b, so as to drive the relay 11 to be in the first working state.

When the first switch circuit 13212 is in the closed state and the voltage of the third node 132a rises to a certain value after a preset time, the first switch circuit 13212 responds to the voltage of the third node 132a to be in the open state, so that the first switch circuit 13212 controls the first voltage of the first node 131a to stop being applied to the first end 111a of the coil of the relay 11, and the relay 11 is still in the first working state.

It can be appreciated that, as described above, since the voltage rising speed of the third node 132a can be adjusted by adjusting the resistance value of the first resistor R1 and the capacitance value of the first capacitor C1, the preset duration can be adjusted by adjusting the resistance value of the first resistor R1 and the capacitance value of the first capacitor C1.

Therefore, in this embodiment, only when the voltage of the first node 131a is the first voltage and the voltage of the second node 131b is the second voltage, the duration of the dc pulse voltage (the first voltage) for exciting the coil 111 of the relay 11 is set on the hardware, and the pulse duration of the control signal is not set on the software, so that the relay 11 can be conveniently driven to be in the first working state.

In some embodiments, referring to fig. 7, the first switch circuit 13212 includes a first PMOS transistor PM1.

The source of the first PMOS tube PM1 is electrically connected to the drive control circuit 131 at the first node 131a, the drain of the first PMOS tube PM1 is electrically connected to the coil first end 111a of the relay 11, and the gate of the first PMOS tube PM1 is electrically connected to the first voltage raising circuit 13211 at the third node 132 a.

As described above, when the voltage of the first node 131a is the first voltage and the voltage of the second node 131b is the second voltage, during the continuous rising of the voltage of the third node 132a, if the voltage of the third node 132a meets the conduction condition of the first PMOS tube PM1, the first PMOS tube PM1 is in the conduction state, at this time, the first voltage of the first node 131a is applied to the first coil end 111a of the relay 11 through the first PMOS tube PM1, after the delay for a preset period of time, the voltage of the third node 132a rises until the conduction condition of the first PMOS tube PM1 is not met, the first PMOS tube PM1 is in the off state, at this time, the first PMOS tube PM1 blocks the current path between the first voltage of the first node 131a and the first coil end 111a of the relay 11.

When the voltage of the first node 131a is the second voltage and the voltage of the second node 131b is the first voltage, the second driving circuit 1322 controls the first voltage of the second node 131b to be applied to the second end 111b of the coil of the relay 11 for a preset period according to the first voltage of the second node 131b, and meanwhile, the body diode of the first PMOS tube PM1 is in a conductive state due to the voltage of the first node 131a being the second voltage, so that the driving control circuit 131, the second driving circuit 1322, the coil 111 of the relay 11 and the body diode of the first PMOS tube PM1 form a current loop at this time, thereby driving the relay 11 in the second operating state.

In some embodiments, referring to fig. 6, the second driving circuit 1322 includes a second voltage boost circuit 13221 and a second switching circuit 13222.

The second voltage boost circuit 13221 is electrically connected to the driving control circuit 131 at the second node 131b, the second voltage boost circuit 13221 includes a fourth node 132b, and can boost the voltage of the fourth node 132b according to the first voltage of the second node 131 b.

In some embodiments, referring to fig. 7, the second voltage boost circuit 13221 includes a second diode D2, a third resistor R3, a fourth resistor R4, and a second capacitor C2.

The anode of the second diode D2 is electrically connected to the second switching circuit 13222 and the driving control circuit 131 at the second node 131b, the cathode of the second diode D2 is electrically connected to one end of the third resistor R3, the other end of the third resistor R3 is electrically connected to one end of the fourth resistor R4, one end of the second capacitor C2 and the second switching circuit 13222 at the fourth node 132b, and the other end of the fourth resistor R4 and the other end of the second capacitor C2 are electrically connected to the driving control circuit 131 at the first node 131 a.

When the voltage of the first node 131a is the second voltage and the voltage of the second node 131b is the first voltage, the first voltage of the second node 131b charges the second capacitor C2 through the second diode D2 and the third resistor R3, and the voltage of the fourth node 132b is continuously raised during the charging process of the second capacitor C2.

By adjusting the resistance of the third resistor R3 and the capacitance of the second capacitor C2, the charging speed of the second capacitor C2 can be adjusted, so that the voltage rising speed of the fourth node 132b can be adjusted.

The fourth resistor R4 is a discharging resistor, and is used for discharging the charge stored in the second capacitor C2 when the second capacitor C2 is not being charged, so that the voltage of the fourth node 132b is continuously raised from 0V when the second capacitor C2 is being charged next time.

The second switch circuit 13222 is electrically connected to the second voltage raising circuit 13221 at the fourth node 132b, and is electrically connected to the drive control circuit 131 at the first node 131a and the second node 131b, and is further electrically connected to the coil second end 111b of the relay 11.

In the process of continuously raising the voltage of the fourth node 132b, the second switch circuit 13222 may respond to the voltage of the fourth node 132b to be in a closed state, and at this time, the second switch circuit 13222 may control the first voltage of the second node 131b to be applied to the second end 111b of the coil of the relay 11, and at the same time, the first driving circuit 1321 controls the driving control circuit 131, the first driving circuit 1321, the coil 111 of the relay 11 and the second switch circuit 13222 to form a current loop according to the second voltage of the first node 131a, so as to drive the relay 11 to be in the second working state.

When the second switch circuit 13222 is in the closed state and the voltage of the fourth node 132b rises to a certain value after a preset time, the second switch circuit 13222 responds to the voltage of the fourth node 132b to be in the open state, so that the second switch circuit 13222 controls the first voltage of the second node 131b to stop being applied to the coil second end 111b of the relay 11, and the relay 11 is still in the second working state.

It can be appreciated that, as described above, since the voltage rising speed of the fourth node 132b can be adjusted by adjusting the resistance of the third resistor R3 and the capacitance of the second capacitor C2, the preset duration can be adjusted by adjusting the resistance of the third resistor R3 and the capacitance of the second capacitor C2.

Therefore, in this embodiment, only when the voltage of the first node 131a is the second voltage and the voltage of the second node 131b is the first voltage, the duration of the dc pulse voltage (the first voltage) for exciting the coil 111 of the relay 11 is set on the hardware, and the pulse duration of the control signal is not set on the software, so that the relay 11 can be conveniently driven to be in the second working state.

In some embodiments, referring to fig. 7, the second switch circuit 13222 includes a second PMOS transistor PM2.

The source of the second PMOS tube PM2 is electrically connected to the drive control circuit 131 at the second node 131b, the drain of the second PMOS tube PM2 is electrically connected to the coil second end 111b of the relay 11, and the gate of the second PMOS tube PM2 is electrically connected to the second voltage boost circuit 13221 at the fourth node 132 b.

As described above, when the voltage of the first node 131a is the second voltage and the voltage of the second node 131b is the first voltage, during the continuous rising of the voltage of the fourth node 132b, if the voltage of the fourth node 132b meets the conduction condition of the second PMOS transistor PM2, the second PMOS transistor PM2 is in the conduction state, at this time, the first voltage of the second node 131b is applied to the coil second end 111b of the relay 11 through the second PMOS transistor PM2, after the delay for a preset period of time, the voltage of the fourth node 132b rises until the voltage does not meet the conduction condition of the second PMOS transistor PM2, and the second PMOS transistor PM2 is in the off state, at this time, the second PMOS transistor PM2 blocks the current path between the first voltage of the second node 131b and the coil first end 111a of the relay 11.

When the voltage of the first node 131a is the first voltage and the voltage of the second node 131b is the second voltage, the first driving circuit 1321 controls the first voltage of the first node 131a to be applied to the first end 111a of the coil of the relay 11 for a preset period of time according to the first voltage of the first node 131a, and meanwhile, the body diode of the second PMOS tube PM2 is in a conductive state due to the voltage of the second node 131b being the second voltage, so that the driving control circuit 131, the first driving circuit 1321, the coil 111 of the relay 11 and the body diode of the second PMOS tube PM2 form a current loop at this time, thereby driving the relay 11 in the first operating state.

In order to further describe the working principle of the relay driving circuit 13 according to the embodiment of the present invention, the following description will be made with reference to fig. 7.

When the control signal is a high level signal, the first NMOS transistor NM1 is in an on state in response to the high level signal, the fourth PMOS transistor PM4 is also in an on state, the third PMOS transistor PM3 is in an off state in response to the high level signal, the second NMOS transistor NM2 is also in an off state, and then 12V is applied to the first node 131a through the fourth PMOS transistor PM4, and at this time, the voltage of the first node 131a is 12V.

Meanwhile, the fifth PMOS PM5 is turned off in response to the high signal, and the third NMOS NM3 is turned on in response to the high signal, so that the third NMOS NM3 pulls the voltage of the second node 131b to ground, and the voltage of the second node 131b is 0V.

Since the voltage of the first node 131a is 12V at this time, the first capacitor C1 is charged by the 12V voltage of the first node 131a through the first diode D1 and the first resistor R1, so that the voltage of the third node 132a is continuously raised, and during the voltage raising process of the third node 132a, the first PMOS tube PM1 is turned on, so that the first voltage of the first node 131a is applied to the first end 111a of the coil of the relay 11 through the first PMOS tube PM 1.

Since the voltage of the second node 131b is 0V at this time, the 12V voltage, the fourth PMOS tube PM4, the first PMOS tube PM1, the coil 111 of the relay 11, the body diode of the second PMOS tube PM2, and the third NMOS tube NM3 form a current loop to drive the relay 11 in the first operating state.

After a predetermined delay time, the voltage at the third node 132a is raised to 12V-V _d1 -V _th1 (V _d1 For the conduction voltage drop of the first diode D1, V _th1 The threshold voltage of the first PMOS tube PM 1), the first PMOS tube PM1 is in an off state, blocking the current path between the 12V voltage and the coil first end 111a of the relay 11, so that the relay 11 maintains the first operating state.

When the control signal is a low level signal, the first NMOS transistor NM1 is turned off in response to the low level signal, the fourth PMOS transistor PM4 is also turned off, the third PMOS transistor PM3 is turned on in response to the low level signal, the second NMOS transistor NM2 is also turned on, and the second NMOS transistor NM2 pulls the voltage of the first node 131a to ground, where the voltage of the first node 131a is 0V.

Meanwhile, the fifth PMOS PM5 is turned on in response to the low level signal, and the third NMOS NM3 is turned off in response to the low level signal, so that the voltage of 12V is applied to the second node 131b, and the voltage of the second node 131b is 12V.

Since the voltage of the second node 131b is 12V at this time, the 12V voltage of the second node 131b charges the second capacitor C2 through the second diode D2 and the third resistor R3, so that the voltage of the fourth node 132b is continuously raised, and during the voltage raising process of the fourth node 132b, the second PMOS tube PM2 is turned on, so that the 12V voltage of the second node 131b is applied to the coil second end 111b of the relay 11 through the second PMOS tube PM 2.

Since the voltage of the first node 131a is 0V, the 12V voltage, the fifth PMOS PM5, the second PMOS PM2, the coil 111 of the relay 11, the body diode of the first PMOS PM1, and the second NMOS NM2 form a current loop to drive the relay 11 in the second operating state.

After a predetermined delay time, the voltage at the fourth node 132b is raised to 12V-V _d2 -V _th2 (V _d2 For the conduction voltage drop of the second diode D2, V _th2 The threshold voltage of the second PMOS transistor PM 2), the second PMOS transistor PM2 is in an off state, blocking the current path between the 12V voltage and the coil second end 111b of the relay 11, so that the relay 11 maintains the second operating state.

As another aspect of the embodiment of the present invention, the embodiment of the present invention also provides an electronic apparatus including the relay driving circuit 13 as described above.

Finally, it is to be noted that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein, which are not to be construed as additional limitations on the scope of the invention, but rather as providing for a more thorough understanding of the present invention. And under the idea of the invention, the technical features described above are continuously combined with each other, and many other variations exist in different aspects of the invention as described above, which are all considered as the scope of the description of the invention; further, modifications and variations of the present invention may be apparent to those skilled in the art in light of the foregoing teachings, and all such modifications and variations are intended to be included within the scope of this invention as defined in the appended claims.

Claims

1. A relay driving circuit, comprising:

2. The relay driving circuit according to claim 1, wherein the driving module comprises a first driving circuit and a second driving circuit;

3. The relay driving circuit according to claim 2, wherein the first driving circuit includes:

4. The relay driving circuit according to claim 3, wherein the first voltage boost circuit comprises a first diode, a first resistor, a second resistor, and a first capacitor;

5. The relay driving circuit according to claim 3, wherein the first switching circuit includes:

6. The relay driving circuit according to claim 2, wherein the second driving circuit includes:

7. The relay driving circuit of claim 6, wherein the first voltage boost circuit comprises a second diode, a third resistor, a fourth resistor, and a second capacitor;

8. The relay driving circuit according to claim 6, wherein the second switching circuit includes:

9. The relay driving circuit according to claim 1, wherein the driving control circuit includes:

10. An electronic device comprising the relay driving circuit according to any one of claims 1 to 9.