CN116846826A - High-reliability self-adaptive network-on-chip router micro-architecture - Google Patents
High-reliability self-adaptive network-on-chip router micro-architecture Download PDFInfo
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- CN116846826A CN116846826A CN202310803465.XA CN202310803465A CN116846826A CN 116846826 A CN116846826 A CN 116846826A CN 202310803465 A CN202310803465 A CN 202310803465A CN 116846826 A CN116846826 A CN 116846826A
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- 238000013523 data management Methods 0.000 claims description 15
- 238000004364 calculation method Methods 0.000 claims description 13
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/60—Router architectures
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/12—Shortest path evaluation
- H04L45/125—Shortest path evaluation based on throughput or bandwidth
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/12—Avoiding congestion; Recovering from congestion
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Abstract
The invention relates to a router micro-architecture of a high-reliability self-adaptive network-on-chip, which comprises a data monitoring unit and an arbitration management unit. The data monitoring unit comprises a data checking unit and an error data processing unit to ensure high reliability of data transmission; the arbitration management unit comprises a virtual channel management unit, a cross switch management unit and a self-adaptive path calculator, wherein the virtual channel management unit records the occupation state of a virtual channel in the router, the cross switch management unit distributes cross switch ports to the virtual channel, the utilization efficiency and throughput of an interconnection network are improved, deadlock can be avoided, the self-adaptive path calculator adopts a link state routing algorithm to select out the shortest path to solve the problem of unreasonable bandwidth distribution of each path of the network in transmission, congestion is prevented, and the data transmission efficiency is improved.
Description
Technical Field
The invention relates to a router micro-architecture, in particular to a high-reliability self-adaptive network-on-chip router micro-architecture, belonging to the field of design of interconnection network structures on integrated circuit chips.
Background
Since the 90 s of the 20 th century, multi-core technology has been continuously developed, and is widely applied to the fields of high-end servers, smart phones, internet of things, AI and the like, and on-chip interconnection networks have become an important and continuously developed research field as a key technology in multi-core chips. With the increasing number of cores of a multi-core processor, a conventional bus type interconnection structure cannot meet the requirements of large bandwidth and high core utilization of the multi-core processor, and efficient communication between a plurality of computing units and a plurality of cores becomes one of key factors for improving the performance of a many-core system.
The router, as a node in the on-chip interconnection network, has its microarchitecture design affecting performance metrics such as throughput, delay, reliability, etc. of the interconnection network. At present, the SoC design mainly comprises multiple cores, namely 8 cores, 16 cores, 32 cores and 64 cores and even hundreds of cores, the single cross switch type bus design can not meet the requirements of a plurality of cores on indexes such as throughput, bandwidth and the like, the possibility of deadlock of an interconnection network is caused by the increase of the quantity of transmission data and the complexity of the network, the reliability transmission of the data is greatly influenced due to different application scenes, and the data can be overturned due to electromagnetic interference in the transmission process or transmission errors are caused due to other interference.
In processor design, requirements for interconnect structure performance, power consumption, and reliability due to application diversification need to be satisfied. Therefore, there is a need for improvements in the design of high reliability low latency interconnect structures that increase the reliability, bandwidth, and transmission efficiency of data transmission.
Disclosure of Invention
The technical solution of the invention is that: the router micro-architecture of the high-reliability self-adaptive network-on-chip is provided for overcoming the defects of the existing network-on-chip interconnection structure.
The technical scheme of the invention is as follows: a router micro-architecture of a high-reliability self-adaptive network on chip, wherein the network comprises a plurality of routers, namely nodes, with a data transmission hierarchy relation, and a single router micro-architecture comprises a data monitoring unit and an arbitration management unit;
the data monitoring unit receives the data packet sent by the previous stage node and ensures the reliable transmission of the received data packet;
the arbitration management unit caches the data packets received by the data monitoring unit through the virtual channels, adaptively selects an optimal transmission path through the occupation condition of the intercommunication virtual channels with the adjacent nodes, and transmits the corresponding data packets in the virtual channels to the next-stage nodes according to the hierarchical relation in the network.
Preferably, the data monitoring unit comprises a data checking subunit and an error data management subunit;
the data verification subunit comprises a data decoding and data verification module and an input controller;
the input controller is used for exchanging signals with the router at the upper level and is used for controlling flow of the data link; the data decoding and data checking module performs decoding checking on a data frame part in an input data packet, and because a certain time expenditure is brought to the data decoding and checking process, the input data can flow into a data decoding unit and a virtual channel at the same time, and data checking and arbitration are performed at the same time; when the verification is wrong, the wrong data management subunit sends a data retransmission request to the upper node, sends an invalidation signal to the arbitration unit, and invalidates the data stored in the virtual channel; after receiving the retransmission request, the error data management subunit of the upper node sends a data retransmission signal to the arbitration management unit of the upper node; meanwhile, the error data management subunit of the current node also needs to process the retransmission signal sent by the next node, transmit the retransmission signal to the arbitration management unit, and raise the priority of the retransmission data.
Preferably, the arbitration management unit comprises a plurality of virtual channels, a virtual channel management unit, a crossbar switch management unit and an adaptive route calculator;
the data packet sent by the corresponding upper node in each virtual channel temporary storage network determines the output of the channel by the gating of the cross switch connected with the data packet;
the virtual channel management unit sends the occupation condition of the virtual channel of the current node to the previous node, receives and stores the occupation information of the virtual channel of the next node, and realizes the intercommunication of the occupation condition of the virtual channel between the adjacent nodes;
the self-adaptive route calculator carries out real-time self-adaptive path calculation according to the occupation condition of the virtual channel received by the virtual channel management unit, and reasonably distributes the bandwidth of each path of the network in transmission;
the cross switch management unit performs arbitration gating on the cross switch through the self-adaptive path calculation result calculated by the self-adaptive route calculator and the virtual channel occupation information of the next stage.
Preferably, the adaptive path calculation includes:
and the initial router node packages the initial address coordinates and the destination address coordinates of the primary data transmission into a data frame header, the intermediate node judges two directions to be transmitted according to the address information in the data frame header, and finally selects a transmission direction from the shortest transmission path according to the two-direction virtual channel occupation condition values stored in the virtual channel management unit.
Preferably, a path with the lowest congestion degree is selected from the shortest transmission paths, wherein the transmission direction of the path is the shortest path, and the lowest congestion degree is the least occupied virtual channels of all nodes in the shortest path.
Preferably, the implementing the intercommunication of the occupation situations of the virtual channels between the adjacent nodes includes:
the current node sends out a group of data to the next node, the spare number of the corresponding channel is reduced by 1 in the virtual channel management unit of the current node, at the moment, the group of data is stored in the virtual channel of the next node, and when the next node sends out the group of data, a feedback signal is sent to the current node, and the spare number of the corresponding channel in the virtual channel management unit of the current node is added back.
Preferably, the last virtual channel or multiple virtual channels in the arbitration management unit are set as anti-deadlock emergency channels, and when deadlock occurs, the emergency channels are opened for data transmission.
Preferably, when the data in the virtual channel of one node is full, the timer starts to count, if no data transmission is performed within a preset time, it is determined that a loop deadlock occurs in the interconnection network, the node is in a deadlock loop, at this time, the anti-deadlock flag bit in the virtual channel management unit is pulled up and transmitted to surrounding nodes, when two adjacent nodes are pulled up simultaneously, it is determined that a data link between the two nodes is in a deadlock loop, an emergency virtual channel of the data link between the nodes in the deadlock loop is opened, and priority of data transmission of the node in the loop is pulled Gao Sisuo.
Compared with the prior art, the invention has the beneficial effects that:
(1) The invention provides a router micro-architecture of a high-reliability self-adaptive network-on-chip, which is characterized in that: the data monitoring unit is used for ensuring high reliability of data transmission; the arbitration management unit is used for improving the data transmission efficiency, improving the utilization rate and throughput of the interconnection network, reducing congestion in the transmission of the interconnection network and avoiding deadlock.
(2) The invention provides an error timely detection processing method, which comprises the steps of adding a check error detection mechanism into a router micro-architecture, adding a small number of check bits, carrying out error check on data, immediately transmitting feedback to the previous stage and requesting retransmission if errors are found, ensuring the timely processing of data transmission errors, and avoiding error transmission.
(3) When a calculation unit of a certain node needs to transmit data, a router node packages a transmitted initial address and a destination address into a frame head of one frame of data, does not prescribe a data transmission path, and selects a transmission direction from a transmission shortest path according to a virtual channel occupation condition value of a next node stored in a virtual channel management unit in the data transmission process. The path calculation method effectively solves the problem of unreasonable bandwidth allocation of each path of the network in transmission, prevents congestion and improves data transmission efficiency.
(4) The invention provides a virtual channel congestion information transmission method, a virtual channel management unit receives and stores virtual channel occupation information of a later node, provides virtual channel occupation conditions for an arbitration management unit, and sends the occupation conditions of the virtual channel of the current node to a previous node so as to realize intercommunication of the occupation conditions of the virtual channels between adjacent nodes.
(5) The invention provides a virtual channel deadlock prevention method, which takes the last virtual channel or a plurality of virtual channels as an emergency channel for deadlock prevention, judges that the deadlock of an interconnected network loop occurs at the moment when the data in the virtual channels are full and no data is output for a period of time, pulls up an internal deadlock mark and transmits the internal deadlock mark to surrounding nodes, and opens a standby virtual channel for data transmission at the moment and preferentially provides data transmission support for the internal nodes of the deadlock loop, thereby solving the deadlock problem.
Drawings
FIG. 1 is a block diagram of a router microarchitecture of a highly reliable adaptive network-on-chip of the invention;
FIG. 2 is a schematic diagram of a data monitoring unit according to the present invention;
FIG. 3 is a schematic diagram of an adaptive route calculation unit according to the present invention;
FIG. 4 is a schematic diagram of a virtual channel management method according to the present invention;
FIG. 5 is a schematic diagram of virtual channel deadlock prevention in accordance with the present invention;
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in FIG. 1, the micro-architecture of the high-reliability self-adaptive network-on-chip router of the present invention mainly comprises a data monitoring unit and an arbitration management unit.
The data monitoring unit mainly comprises a data checking unit and a data error processing unit, so that high reliability of data is ensured; the arbitration management unit comprises a virtual channel management unit, a cross switch management unit and a self-adaptive path calculator, so that the utilization efficiency and throughput of the interconnection network are improved, and the congestion and deadlock of a transmission channel are avoided; the data monitoring unit comprises a data checking subunit and an error data management subunit;
in a preferred embodiment, the invention performs reliability error correction and detection design through two aspects of a data link layer and a protocol layer, the data link layer adopts a CRC check code and a parity check mode to check data, the protocol layer adopts a point-to-point error detection retransmission mode of primary coding to strengthen a network fault tolerance mechanism, a data check subunit only decodes and checks a data packet, if the check result is correct, the data packet is transmitted into a next-stage route, and if the check result is incorrect, an error data management subunit transmits a retransmission request to a previous-stage node and invalidates the currently stored data packet. .
In a preferred embodiment of the present invention, the arbitration management unit includes a plurality of virtual channels, a virtual channel management unit, a crossbar management unit, and an adaptive routing calculator;
the data packet sent by the corresponding upper node in each virtual channel temporary storage network determines the output of the channel by the gating of the cross switch connected with the data packet;
the virtual channel management unit sends the occupation condition of the virtual channel of the current node to the previous node, receives and stores the occupation information of the virtual channel of the next node, and realizes the intercommunication of the occupation condition of the virtual channel between the adjacent nodes;
the self-adaptive route calculator carries out real-time self-adaptive path calculation according to the occupation condition of the virtual channel received by the virtual channel management unit, and reasonably distributes the bandwidth of each path of the network in transmission;
the cross switch management unit performs arbitration gating on the cross switch through the self-adaptive path calculation result calculated by the self-adaptive route calculator and the virtual channel occupation information of the next stage.
Fig. 2 is a schematic diagram of the data monitoring unit according to the present invention, which is composed of data decoding, data checking, input control and error data management modules. The input controller is mainly used for exchanging signals with the router at the upper level and used for controlling flow of the data link. The data decoding and data checking unit performs decoding checking on the data frame part in the transmission data packet, and the error data management unit is used for controlling data retransmission. Because the data decoding and checking process can bring a certain time overhead, the input data can flow into the data decoding unit and the virtual channel at the same time, that is, the data checking and arbitration are performed at the same time. When the check is wrong, the wrong data management unit sends a data retransmission request to the upper node, and sends an invalidation signal to the arbitration unit to invalidate the data stored in the virtual channel. And after receiving the retransmission request, the error data management unit of the upper node sends a data retransmission signal to the arbitration unit of the upper node. Meanwhile, the error data management unit also needs to process the retransmission signal sent by the next node, transmit the retransmission signal to the arbitration module, and raise the priority of the retransmission data.
As shown in fig. 3, the adaptive route calculation unit (i.e. the adaptive route calculator in fig. 1) of the present invention is structured schematically, the present invention adopts a local adaptive route calculation method, the initial router node packages the initial address coordinates and destination address coordinates of a data transmission into the frame header of the data, and the intermediate node decodes only the transmitted data frame header because the data decoding consumes a lot of time and hardware resources, the decoding unit determines the shortest path direction to be transmitted according to the address information in the data frame header, then gates the MUX, and finally selects the transmission direction in the comparator according to the occupation condition of the virtual channel stored in the virtual channel management unit. The local self-adaptive route calculation method not only avoids excessive resource and power consumption expenditure caused by complex algorithm logic of the global self-adaptive route, but also effectively solves the problem of unreasonable bandwidth allocation of each path of the network in transmission, prevents congestion and improves data transmission efficiency.
Fig. 4 is a schematic diagram of a virtual channel management method, in which a virtual channel management unit stores the number of virtual channels in the next node, the virtual channel management unit is connected with a crossbar switch management unit, and is used for detecting the data output condition of the node, sending the virtual channel occupation condition of the current node to a previous node, and implementing the interworking of the virtual channel occupation conditions between adjacent nodes.
FIG. 5 is a schematic diagram of the anti-deadlock method according to the present invention, in which the problem of loop deadlock is solved by means of escape virtual channel flow control. A. B, C, D four nodes have data transmission requirements mutually at the same time, virtual channels of each transmission requirement are all occupied, at the moment, a waiting node B leaves a virtual channel after outputting data, node B waits node C, node C waits node D, node D waits node A, which causes the problem of loop deadlock of an on-chip interconnection network. For example, in the figure, when the virtual channel of the node A is occupied and no data is output in a preset time, the node A pulls up the deadlock zone bit and sends anti-deadlock signals to surrounding nodes, if the node B is just in a deadlock state, the anti-deadlock signals of the node B are broadcast to the surrounding, at the moment, the node A receives the deadlock signals of the node B, the node B can also receive the deadlock signals of the node A at the same time, and then the data communication links among the node AB are judged to be in a deadlock loop, and similarly, the links of the nodes BC, CD and DA in the figure are also in the deadlock loop. At the moment, an emergency virtual channel VCn of a data link among nodes in the deadlock loop is opened for data transmission, the priority of data transmission of the nodes in the deadlock loop is improved, and after the deadlock is released, the deadlock signal is pulled down to release the data link, so that the problem of loop deadlock is solved.
The invention is not described in detail in part as being well known in the art.
Claims (8)
1. A router microarchitecture of a highly reliable adaptive network on chip, the network comprising a plurality of routers or nodes having a hierarchical relationship of data transmission, characterized in that: the single router micro-architecture comprises a data monitoring unit and an arbitration management unit;
the data monitoring unit receives the data packet sent by the previous stage node and ensures the reliable transmission of the received data packet;
the arbitration management unit caches the data packets received by the data monitoring unit through the virtual channels, adaptively selects an optimal transmission path through the occupation condition of the intercommunication virtual channels with the adjacent nodes, and transmits the corresponding data packets in the virtual channels to the next-stage nodes according to the hierarchical relation in the network.
2. The router micro-architecture of a highly reliable adaptive network-on-chip of claim 1, wherein the data monitoring unit comprises a data verification subunit, an error data management subunit;
the data verification subunit comprises a data decoding and data verification module and an input controller;
the input controller is used for exchanging signals with the router at the upper level and is used for controlling flow of the data link; the data decoding and data checking module performs decoding checking on a data frame part in an input data packet, and because a certain time expenditure is brought to the data decoding and checking process, the input data can flow into a data decoding unit and a virtual channel at the same time, and data checking and arbitration are performed at the same time; when the verification is wrong, the wrong data management subunit sends a data retransmission request to the upper node, sends an invalidation signal to the arbitration unit, and invalidates the data stored in the virtual channel; after receiving the retransmission request, the error data management subunit of the upper node sends a data retransmission signal to the arbitration management unit of the upper node; meanwhile, the error data management subunit of the current node also needs to process the retransmission signal sent by the next node, transmit the retransmission signal to the arbitration management unit, and raise the priority of the retransmission data.
3. The router micro-architecture of a highly reliable adaptive network on chip of claim 2, wherein the arbitration management unit comprises a plurality of virtual lanes, a virtual lane management unit, a crossbar management unit, an adaptive routing calculator;
the data packet sent by the corresponding upper node in each virtual channel temporary storage network determines the output of the channel by the gating of the cross switch connected with the data packet;
the virtual channel management unit sends the occupation condition of the virtual channel of the current node to the previous node, receives and stores the occupation information of the virtual channel of the next node, and realizes the intercommunication of the occupation condition of the virtual channel between the adjacent nodes;
the self-adaptive route calculator carries out real-time self-adaptive path calculation according to the occupation condition of the virtual channel received by the virtual channel management unit, and reasonably distributes the bandwidth of each path of the network in transmission;
the cross switch management unit performs arbitration gating on the cross switch through the self-adaptive path calculation result calculated by the self-adaptive route calculator and the virtual channel occupation information of the next stage.
4. The router micro-architecture of a highly reliable adaptive network on chip of claim 3, wherein the adaptive path computation comprises:
and the initial router node packages the initial address coordinates and the destination address coordinates of the primary data transmission into a data frame header, the intermediate node judges two directions to be transmitted according to the address information in the data frame header, and finally selects a transmission direction from the shortest transmission path according to the two-direction virtual channel occupation condition values stored in the virtual channel management unit.
5. The router micro-architecture of the high reliability adaptive network on chip of claim 4, wherein the path with the lowest congestion level is selected from the shortest paths, and the transmission direction is the shortest path, and the lowest congestion level is the least occupied virtual channels of all nodes in the shortest path.
6. The router micro-architecture of a highly reliable adaptive network on chip of claim 3, wherein said implementing virtual channel occupancy interworking between neighboring nodes comprises:
the current node sends out a group of data to the next node, the spare number of the corresponding channel is reduced by 1 in the virtual channel management unit of the current node, at the moment, the group of data is stored in the virtual channel of the next node, and when the next node sends out the group of data, a feedback signal is sent to the current node, and the spare number of the corresponding channel in the virtual channel management unit of the current node is added back.
7. A router micro-architecture of a highly reliable adaptive network on chip as claimed in claim 3, characterized in that the last virtual channel or channels in the arbitration management unit are set as anti-deadlock emergency channels, which are opened for data transmission when a deadlock occurs.
8. The router micro-architecture of the highly reliable adaptive network-on-chip of claim 7, wherein when data in a node virtual channel is full, a timer starts to count, if data transmission is not performed within a preset time, it is determined that a loop deadlock occurs in the interconnection network, the node is in a deadlock loop, at this time, an internal deadlock prevention flag bit of the virtual channel management unit is pulled high, the virtual channel management unit transmits the deadlock prevention flag bit to surrounding nodes, when two adjacent nodes simultaneously pull high the deadlock prevention flag bit, it is determined that a data link between the two nodes is in the deadlock loop, an emergency virtual channel of the data link between the nodes in the deadlock loop is opened, and a priority of data transmission of the node in the loop is pulled Gao Sisuo.
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| CN117156006A (en) * | 2023-11-01 | 2023-12-01 | 中电科申泰信息科技有限公司 | Data route control architecture of network on chip |
| CN117156006B (en) * | 2023-11-01 | 2024-02-13 | 中电科申泰信息科技有限公司 | Data route control architecture of network on chip |
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