CN116844455A - Display driving circuit and display device - Google Patents

Abstract

Display drive circuit and display device relate to and show technical field. The display driving circuit includes: a substrate, and a power module, a processing module and a control module which are arranged on one side of the substrate; the power supply module is respectively connected with the processing module and the control module and is used for supplying power to the processing module and the control module; the processing module is also connected with the control module and used for providing display signals for the control module; the control module is used for controlling the display panel to display according to the display signal; the power module and the processing module are positioned at two opposite sides of the control module.

Description

Display driving circuit and display device

Technical Field

The disclosure relates to the field of display technologies, and in particular, to a display driving circuit and a display device.

Background

With the development of display technology, requirements of resolution and refresh rate of display screens are increasing. The resolution is the number of pixels contained in the display screen, and the higher the resolution is, the better the definition of the display image is. The refresh rate is the number of times the display screen display is updated per second, and the higher the refresh rate, the better the stability of the display.

Disclosure of Invention

The present disclosure provides a display driving circuit including: a substrate, and a power module, a processing module and a control module which are arranged on one side of the substrate;

the power supply module is respectively connected with the processing module and the control module and is used for supplying power to the processing module and the control module;

the processing module is also connected with the control module and used for providing display signals for the control module;

the control module is used for controlling the display panel to display according to the display signal;

the power module and the processing module are positioned at two opposite sides of the control module.

In some embodiments, the processing module includes a system-on-chip, a graphics card assembly, and an adapter board connecting the system-on-chip and the graphics card assembly, the control module includes a timing controller and a backlight driver, and the power module includes a high-power panel and a low-power panel;

the high-power panel comprises a first output interface and a second output interface, wherein the first output interface is connected with the backlight driver, the second output interface is connected with the system-in-chip, the system-in-chip is also connected with the time sequence controller, and the high-power panel is used for supplying power to the backlight driver, the system-in-chip and the time sequence controller; the method comprises the steps of carrying out a first treatment on the surface of the

The low-power panel comprises a third output interface, the third output interface is connected with the adapter plate, and the low-power panel is used for supplying power to the adapter plate and the display card assembly;

the system-in-chip is also connected with the backlight driver and is used for providing the display signal for the time schedule controller and providing a backlight driving signal for the backlight driver;

the time sequence controller is also connected with the backlight driver and is used for controlling the display panel to display according to the display signal, generating picture brightness information according to the display signal and sending the picture brightness information to the backlight driver;

the backlight driver is used for driving the backlight module to provide backlight for the display panel according to the backlight driving signal and the picture brightness information.

In some embodiments, the low-power board is located at a side of the high-power board away from the control module, the first output interface, the second output interface, and the third output interface are disposed near a first edge of the substrate, the timing controller is located at a side of the backlight driver away from the first edge, the system-in-chip is located at a side of the display card assembly away from the first edge, and the adapter board is located between the display card assembly and the backlight driver and near the display card assembly.

In some embodiments, the system on chip and the timing controller are connected through a plurality of display signal lines spaced apart from each other, the display signal lines are used for transmitting display signals, and transmission path lengths of the plurality of display signal lines are substantially the same.

In some embodiments, the display signal line includes a first substrate layer, a first wire layer, a first protective layer, and a first shielding layer sequentially stacked along a first direction, the first substrate layer is disposed close to the substrate, the first shielding layer is disposed away from the substrate, and the first direction is perpendicular to the substrate.

In some embodiments, the plurality of display signal lines includes a first display signal line and a second display signal line, the first display signal line being located on a side of the second display signal line that is proximate to the system on chip and the timing controller; and is also provided with

The first display signal line comprises a first extension line, a folding structure and a second extension line which are sequentially connected, wherein the first extension line is positioned on one side, close to the system-level chip, of the folding structure and is connected with the system-level chip, the second extension line is positioned on one side, close to the time schedule controller, of the folding structure and is connected with the time schedule controller, the folding structure comprises a plurality of laminated layers which are sequentially laminated along a first direction, and double-sided adhesive conductive foam is arranged between two adjacent laminated layers.

In some embodiments, the backlight driver is connected to the timing controller through a first signal line, the first signal line intersects the display signal line, the first signal line includes a second substrate layer, a second conductive line layer, a second protective layer, and a second shielding layer that are sequentially stacked, and the second shielding layer is disposed near the display signal line;

the backlight driver is connected with the system-in-chip through a second signal wire, the second signal wire is intersected with the display signal wire, the second signal wire comprises a plurality of transmission wires, a third protection layer and a third shielding layer, the transmission wires comprise wires and insulating layers which are coated on the surfaces of the wires, the third protection layer is arranged on the periphery of the plurality of transmission wires, and the third shielding layer is arranged between the wires and the insulating layers or between the plurality of transmission wires and the third protection layer.

In some embodiments, the first signal line is located between the substrate and the display signal line, and the second signal line is located on a side of the display signal line facing away from the substrate;

the display driving circuit further comprises a third signal line, the third signal line is intersected with the display signal line, and the third signal line is located at one side, far away from the substrate, of the display signal line.

In some embodiments, the system on chip and the graphics card assembly are provided separately; and is also provided with

The display card assembly comprises a first shell, a display card and a cooling fan, wherein the display card and the cooling fan are arranged in the first shell, the cooling fan is located at one side, deviating from the substrate, of the display card, the first shell comprises a shell top surface, the shell top surface is located at one side, far away from the display card, of the cooling fan, and a first cooling hole is formed in the shell top surface.

In some embodiments, the first housing further includes two first housing side surfaces disposed opposite to each other along the second direction, the first housing side surfaces are provided with a concave table and a fixing portion protruding toward a side facing away from the graphics card, a surface of the concave table facing away from the substrate is lower than the housing top surface, the fixing portion is provided with a first fixing hole penetrating the fixing portion along a direction perpendicular to the second direction, and the concave table is located on a side of the fixing portion facing toward the adapter plate;

the display driving circuit further includes: the fixing bracket is positioned between the display card assembly and the base plate and comprises a base plate and a plurality of side plates connected with the edge of the base plate, the base plate is fixed on the base plate, the side plates comprise two first side plates and two second side plates which are oppositely arranged along a second direction, the first side plates and the second side plates are positioned on one side, far away from the display card, of the side surface of the first shell, and the first side plates are positioned on one side, close to the adapter plate, of the second side plates;

The first side plate is far away from one end of the bottom plate is provided with a first bending part which bends towards the display card assembly, the first bending part is used for limiting the concave table, one end of the second side plate, which is far away from the first side plate, is provided with a second bending part which bends towards one side of the display card assembly, the second bending part is provided with a second fixing hole which penetrates through the second bending part along a direction perpendicular to the second direction, and the second fixing hole and the first fixing hole are used for being connected with the fixing support and the display card assembly through rigid connecting pieces.

In some embodiments, the display driving circuit further includes:

and a rear case disposed at one side of the processing module, the control module, and the power module facing away from the substrate, the rear case including:

the avoidance hole corresponds to the position of the display card assembly, and the display card assembly protrudes out of the rear shell at the avoidance hole;

the second heat dissipation holes correspond to the positions of the system-on-chip;

a third heat dissipation hole corresponding to a second edge position of the high-power panel and partially overlapping the high-power panel, wherein the first output interface and the second output interface are arranged on the second edge; and

And the fourth radiating hole is arranged close to a third edge of the high-power supply board and is not overlapped with the high-power supply board, and the third edge and the second edge are two edges opposite to the high-power supply board.

In some embodiments, the rear case has two second case sides disposed opposite to each other in the second direction, wherein a first bar-shaped hole is disposed on one of the second case sides, and a second bar-shaped hole is disposed on the other second case side, and the first bar-shaped hole and the second bar-shaped hole are used for forming convection heat dissipation.

In some embodiments, the display driving circuit further includes:

the power input interface is arranged on one side of the low-power panel, far away from the high-power panel, and is arranged close to a fourth edge of the low-power panel, wherein the fourth edge is the edge of the low-power panel, far away from the third output interface;

the high-power panel further comprises a first input interface, the low-power panel further comprises a second input interface, and the first input interface and the second input interface are connected with the same power input interface in parallel and are arranged close to the same power input interface.

The present disclosure provides a display device including:

a display driving circuit as described in any one of the embodiments; and

and the display panel is connected with the display driving circuit and used for displaying under the control of the display driving circuit.

In some embodiments, the control module includes a backlight driver, and the display device further includes:

the backlight module is positioned at the backlight side of the display panel, connected with the backlight driver and used for providing backlight for the display panel under the drive of the backlight driver;

the backlight module comprises: the lamp strips are parallel to each other and are distributed along the row direction, each lamp strip comprises a plurality of lamp strings which are connected in parallel and distributed along the column direction, each lamp string comprises a plurality of lamp beads which are connected in series and distributed along the column direction, each lamp strip is divided into a plurality of lamp strip groups, each lamp strip group comprises a plurality of lamp strips which are distributed continuously, the lamp strips which are located in the same lamp strip group are connected to the same first printed circuit board, and the first printed circuit board is connected with the backlight driver.

In some embodiments, the control module includes a timing controller, and the display device further includes:

The second printed circuit boards are positioned on one side, close to the time schedule controller, of the display driving circuit, are connected with the display panel, are connected with the middle area of the display panel, and are also respectively connected with the time schedule controller and the second printed circuit board connected with the edge area of the display panel.

The foregoing description is merely an overview of the technical solutions of the present disclosure, and may be implemented according to the content of the specification in order to make the technical means of the present disclosure more clearly understood, and in order to make the above and other objects, features and advantages of the present disclosure more clearly understood, the following specific embodiments of the present disclosure are specifically described.

Drawings

In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the related art, a brief description will be given below of the drawings required for the embodiments or the related technical descriptions, and it is obvious that the drawings in the following description are some embodiments of the present disclosure, and other drawings may be obtained according to the drawings without any inventive effort for a person of ordinary skill in the art. It should be noted that the scale in the drawings is merely schematic and does not represent actual scale.

Fig. 1 exemplarily shows a schematic structural diagram of a display driving circuit provided by the present disclosure;

fig. 2 exemplarily shows still another structural schematic diagram of a display driving circuit provided by the present disclosure;

fig. 3a exemplarily shows a schematic structural diagram of a display signal line provided by the present disclosure;

FIG. 3b schematically illustrates a folded schematic of a display signal line provided by the present disclosure;

fig. 4 exemplarily shows a schematic structural diagram of a second signal line provided by the present disclosure;

fig. 5 exemplarily shows a schematic structural view of a transmission line provided by the present disclosure;

FIG. 6 schematically illustrates a schematic structure of a graphics card assembly provided by the present disclosure;

FIG. 7 schematically illustrates yet another structural diagram of the graphics card assembly provided by the present disclosure;

fig. 8 exemplarily illustrates a rear case structure schematic diagram of a display device provided by the present disclosure;

fig. 9 exemplarily shows still another structural schematic diagram of a rear case of the display device provided by the present disclosure;

FIG. 10a schematically illustrates a display panel provided by the present disclosure; the method comprises the steps of carrying out a first treatment on the surface of the

Fig. 10b exemplarily shows a schematic structural view of a display device provided by the present disclosure;

fig. 11 exemplarily shows a schematic structural diagram of a backlight module provided by the present disclosure;

Fig. 12a exemplarily shows a display effect diagram of a display device in the related art;

fig. 12b exemplarily shows a display effect schematic diagram of the display device provided by the present disclosure.

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without inventive effort, based on the embodiments in this disclosure are intended to be within the scope of this disclosure.

Referring to fig. 1 and 2, fig. 1 and 2 exemplarily show a schematic structural diagram of a display driving circuit 11 provided by the present disclosure, and as shown in fig. 1 and 2, the display driving circuit 11 includes: a substrate 110, and a power module 111, a process module 112, and a control module 113 disposed at one side of the substrate 110.

The power module 111 is connected with the processing module 112 and the control module 113 respectively, and is used for supplying power to the processing module 112 and the control module 113;

The processing module 112 is also connected with the control module 113 and is used for providing display signals for the control module 113;

the control module 113 is configured to control the display panel 12 to display according to the display signal.

Wherein the power module 111 and the processing module 112 are located at two opposite sides of the control module 113.

According to the power supply module 111 and the processing module 112 are arranged on two opposite sides of the control module 113, so that the power supply module 111 containing a high-voltage circuit is separated from the processing module 112 composed of a low-voltage signal circuit, and then the high-voltage circuit and the low-voltage circuit are separated, high-voltage signal crosstalk and low-voltage signal crosstalk are avoided, the display stability of the whole machine is ensured, meanwhile, the wiring difficulty of a driving circuit can be reduced, and more arrangement space is provided for wiring.

Illustratively, as shown in fig. 1 and 2, the control module 113 is located in the middle, the power module 111 and the processing module 112 are located at opposite sides of the control module 113 along the long side direction of the substrate 110, for example, the power module 111 is located at the right side of the control module 113, and the processing module 112 is located at the left side of the control module 113. Thus, the distance between the high-voltage line and the low-voltage line can be further increased, and the high-voltage signal crosstalk and the low-voltage signal crosstalk are further reduced.

In some embodiments, as shown in fig. 1 and 2, the processing module 112 includes a system-on-chip 1121, a graphics card assembly 1122, and an interposer 1123 connecting the system-on-chip 1121 and the graphics card assembly 1122; the control module 113 includes a timing controller 1131 and a backlight driver 1132; the power module 111 includes a high power panel 1111 and a low power panel 1112.

Illustratively, as shown in fig. 2, the power module 111 may further include a power bracket 1113, where the power bracket 1113 is used to secure the high-power supply board 1111 and the low-power supply board 1112. The high-power panel 1111 and the low-power panel 1112 may be fixed by screws or by buckles, which is not limited herein.

In some embodiments, as shown in fig. 1 and 2, the high-power board 1111 includes a first output interface 101 and a second output interface 102, the first output interface 101 is connected to the backlight driver 1132, the second output interface 102 is connected to the system-in-chip 1121, the system-in-chip 1121 is further connected to the timing controller 1131, and the high-power board 1111 is configured to supply power to the backlight driver 1132, the system-in-chip 1121, and the timing controller 1131.

Illustratively, as shown in fig. 1 and 2, the first output interface 101 and the second output interface 102 are low voltage output interfaces, such as 5V, 12V, 24V, 19V, and the like.

As illustrated in fig. 1 and 2, the high-power board 1111 may include two first output interfaces 101, and the two first output interfaces 101 and the backlight driver 1132 are connected through different backlight driving power lines (1). The second output interface 102 is connected to the system on chip 1121 through a system on chip power line (2).

As such, the high power board 1111 directly powers the backlight driver 1132 and the system on chip 1121, and indirectly powers the timing controller 1131.

In some embodiments, as shown in fig. 1 and 2, the low power board 1112 includes a third output interface 103, the third output interface 103 is connected to the adapter board 1123, and the low power board 1112 is configured to supply power to the adapter board 1123 and the graphics card assembly 1122.

Illustratively, as shown in fig. 1 and 2, the third output interface 103 is a low voltage output interface, such as 5V, 12V, 24V, 19V, etc. The third output interface 103 of the low power supply board 1112 is connected to a corresponding interface of the patch panel 1123 through the graphics card power cord (3).

In this manner, low power supply board 1112 directly supplies power to adapter plate 1123, and as adapter plate 1123 is connected to graphics card assembly 1122, power is supplied to graphics card assembly 1122.

In some embodiments, as shown in fig. 1 and 2, the system-on-chip 1121 is further connected to a backlight driver 1132 for providing display signals to the timing controller 1131 and backlight driving signals to the backlight driver 1132.

Illustratively, as shown in fig. 1 and 2, the system-on-chip 1121 and the backlight driver 1132 are connected through a second signal line (4). As such, the system-in-chip 1121 provides backlight driving signals, such as an enable signal and a power pulse width adjustment signal, to the backlight driver 1132 to adjust the switching and overall brightness of a backlight assembly (BLU). The backlight driver 1132 feeds back an enable signal that the BLU is turned on to the system on chip 1121 to inform the system on chip 1121 that the BLU is turned on, and can display a picture and audio/video signals to the display panel. Next, the system-in-chip 1121 transmits a display signal to the timing controller 1131.

In some embodiments, as shown in fig. 1 and 2, the timing controller 1131 is further connected to the backlight driver 1132, and is configured to control the display panel 12 to display according to the display signal, generate the screen brightness information according to the display signal, and send the screen brightness information to the backlight driver 1132.

The backlight driver 1132 is configured to drive the backlight module 13 to provide backlight for the display panel 12 according to the backlight driving signal and the frame brightness information.

Illustratively, as shown in fig. 1 and 2, the timing controller 1131 is connected with the backlight driver 1132 through a first signal line (5).

In this way, the timing controller 1131 controls the display panel 12 to display according to the display signal provided by the system-in-chip 1121, generates the screen brightness information based on the display condition, and sends the screen brightness information to the backlight driver 1132. The frame brightness information may include brightness distribution information in the backlight module 13 under each display frame.

In some embodiments, as shown in fig. 1 and 2, the low power board 1112 is located on a side of the high power board 1111 away from the control module 113, the first output interface 101, the second output interface 102, and the third output interface 103 are disposed near the first edge B1 of the substrate 110, the timing controller 1131 is located on a side of the backlight driver 1132 away from the first edge B1, the system-in-chip 1121 is located on a side of the display card assembly 1122 away from the first edge B1, the adapter board 1123 is located between the display card assembly 1122 and the backlight driver 1132, and is disposed near the display card assembly 1132.

Illustratively, as shown in fig. 1 and 2, the first edge B1 of the substrate 110 may be an upper edge of the substrate 110.

The implementation mode can ensure that lines are crossed as little as possible, reduce the interference of a high-voltage line magnetic field to a low-voltage line signal, the interference of a high-frequency line magnetic field to a low-frequency line signal, the interference of the high-voltage line magnetic field to the high-frequency line signal and the mutual interference of the high-frequency line magnetic field signals, and is favorable for realizing high refresh rate and high brightness display.

In some embodiments, as shown in fig. 1 and 2, the system-in-chip 1121 and the timing controller 1131 are connected through a plurality of display signal lines (6) spaced apart from each other, the display signal lines (6) are used to transmit display signals, and the transmission path lengths of the plurality of display signal lines (6) are substantially the same.

Illustratively, as shown in fig. 1 and 2, the system-on-chip 1121 and the timing controller 1131 may be connected by two display signal lines (6), the transmission path lengths of the two signal lines (6) being substantially the same and parallel to each other and not intersecting each other. The display signal line (6) can be a V-By-One signal line.

Therefore, the display signal transmission of 32 channels is realized through the two display signal lines (6), so that the high-resolution and high-refresh rate high-speed signal transmission of 5K and 144Hz is realized, the point-to-point playing of pictures and video signals is realized, the better display effect is achieved, and the higher performance requirement is met. Because the display signal wires (6) are internally provided with high-frequency signals, an electromagnetic field is generated on the surface of the wire in the transmission process, and the two display signal wires (6) are parallel to each other and do not cross each other, so that electromagnetic interference between the two display signal wires (6) is avoided.

In some embodiments, as shown in fig. 3, the display signal line (6) includes a first substrate layer 201, a first conductive line layer 202, a first protective layer 203, and a first shielding layer 204 sequentially stacked along a first direction F1, the first substrate layer 201 is disposed close to the substrate 110, the first shielding layer 204 is disposed away from the substrate 110, and the first direction F1 is perpendicular to the substrate 110.

Illustratively, since the distance between the two display signal lines (6) is short, the first shielding layer 204 needs to be provided for the display signal lines (6) to perform shielding treatment in order to prevent electromagnetic interference. The material of the first shielding layer 204 may be a conductive material film such as Al foil, cu foil, or tin foil, and Al foil or tin foil is generally used for economical reasons.

As illustrated in fig. 3a and 3b, the display signal line (6) may further include a first mylar layer 205 and/or a second mylar layer 206, where the first mylar layer 205 may be disposed on a side of the first shielding layer 204 away from the substrate 110 and the second mylar layer 206 may be disposed on a side of the first substrate layer 201 near the substrate 110. The first polyester film layer 205 and the second polyester film layer 206 serve to protect the display signal line (6), prevent surface scratch, and prevent breakage of the internal wiring layer due to perforation. Wherein the arrangement of the first mylar layer and the second mylar layer may be omitted, either or both.

Illustratively, as shown in fig. 3a and 3b, the thickness of the first substrate layer 201, the first wire layer 202, the first protective layer 203, the first shielding layer 204, the first mylar layer 205, and the second mylar layer 206 is 0.012mm to 0.2mm.

In some embodiments, as shown in fig. 1 and 2, the plurality of display signal lines (6) includes a first display signal line (6) -1 and a second display signal line (6) -2, the first display signal line (6) -1 being located on a side of the second display signal line (6) -2 proximate to the system-on-chip 1121 and the timing controller 1131.

In some embodiments, as shown in fig. 3b, the first display signal line (6) -1 includes a first extension line 301, a folding structure 302 and a second extension line 303 sequentially connected, where the first extension line 301 is located on a side of the folding structure 302 near the system-in-chip 1121 and is connected to the system-in-chip 1121, and the second extension line 303 is located on a side of the folding structure 302 near the timing controller 1131 and is connected to the timing controller 1131, and the folding structure 302 includes a plurality of stacked layers a sequentially stacked along the first direction F1, and a double-sided glued conductive foam 304 is disposed between two adjacent stacked layers.

Illustratively, as shown in FIG. 3b, the first extension line 301 and the second extension line 303 are parallel to each other. Because the distance between the two display signal wires (6) is short, in order to prevent the redundant wires from winding and affecting signal transmission, the redundant wires need to be folded and shielding treatment is carried out between the laminated layers. Illustratively, as shown in fig. 3b, the thickness of the double-sided glued conductive foam 304 between two adjacent stacks may be 1 mm-10 mm to support the display signal line (6) and prevent the first wire layer 202 from breaking due to the stack being too close to the small folding radius. In addition, the double-sided adhesive conductive foam 304 between the first laminate and the second laminate can also play a role in shielding due to the absence of the first shielding layer 204 between the first laminate and the first conductive wire layer 202 of the second laminate, which connects the first extension wire 301. Thus, the signal input direction and the output direction are consistent through the double-folding structure of the display signal line (6).

In some embodiments, as shown in fig. 1 and 2, the backlight driver 1132 is connected to the timing controller 1131 through a first signal line (5), the first signal line (5) is intersected with the display signal line (6), the first signal line (5) includes a second substrate layer 411, a second conductive line layer 412, a second protective layer 413 and a second shielding layer 414 which are sequentially stacked, and the second shielding layer 414 is disposed near the display signal line (6).

As illustrated in fig. 1 and 2, the first signal line (5) may be a Local Dimming line (Local Dimming), for example. Since the first signal line (5) inevitably crosses the display signal line (6), it is also necessary to provide the first signal line (5) with a shielding layer, that is, a second shielding layer 414, for shielding treatment. By disposing the second shielding layer 414 at a position close to the display signal line (6), an effect of shielding electromagnetic interference between the first signal line (5) and the display signal line (6) is achieved.

In some embodiments, as shown in fig. 1, the backlight driver 1132 is further connected to the display panel 12 through a plurality of fourth signal lines (9) to ensure a transmission path of the backlight information. The fourth signal line (9) may be a flexible flat cable (Flexible Flat Cable, FFC).

In some embodiments, as shown in fig. 1 and fig. 2 and fig. 4, the backlight driver 1132 is connected to the system-in-chip 1121 through a second signal line (4), the second signal line (4) is intersected with the display signal line (6), and the second signal line (4) includes a plurality of transmission lines 421, a third protection layer 422, and a third shielding layer 423.

The second signal line (4) may be a PWM/BL-EN line, as illustrated in fig. 1, 2 and 4, for example. Since the second signal line (4) inevitably crosses the display signal line (6), a shielding layer, that is, a third shielding layer 423 is required for the second signal line (4) to perform shielding treatment, so as to achieve the effect of shielding electromagnetic interference between the second signal line (4) and the display signal line (6).

In some embodiments, as shown in fig. 5, the transmission line 421 includes a conductive line 424 and an insulating layer 425 coated on a surface of the conductive line 424, the third protective layer 422 is disposed on an outer periphery of the plurality of transmission lines 421, and the third shielding layer 423 is disposed between the conductive line 424 and the insulating layer 425 (as shown in a left diagram in fig. 5) or between the plurality of transmission lines 421 and the third protective layer 422 (as shown in a right diagram in fig. 5).

Illustratively, as shown in fig. 5, one transmission line 421 may include three conductors 424, which are a ground conductor, a restart conductor, and a backlight current identification conductor, respectively. The outer peripheral surface of each wire 424 is covered with an insulating layer 425, and the third protective layer 422 covers the wires 424.

The third shielding layer 423 may be disposed in the following two cases: : in a first case, as shown in the left diagram of fig. 5, the third shielding layer 423 is disposed between the wires 424 and the insulating layer 425, in which case, a third shielding layer 423 is disposed between each wire 424 and its corresponding insulating layer 425 to individually shield each wire 424. And a second case: as shown in the right diagram of fig. 5, a third shielding layer 423 is provided between the plurality of transmission lines 421 and the third protective layer 422 to shield the transmission lines 421 as a whole. The above two setting cases can be selected based on actual requirements, and are not limited herein.

In some embodiments, as shown in fig. 1 and 2, the first signal line (5) is located between the substrate 110 and the display signal line (6), and the second signal line (4) is located on a side of the display signal line (6) facing away from the substrate 110.

In some embodiments, as shown in fig. 1 and 2, the display driving circuit 11 provided in the present disclosure further includes a third signal line (7), the third signal line (7) intersects the display signal line (6), and the third signal line (7) is located on a side of the display signal line (6) away from the substrate 110.

As shown in fig. 1 and 2, the third signal line (7) may be, for example, a signal line connecting the system-in-chip 1121 and the interposer 1123, or may be a signal line connecting the system-in-chip 1121 and the timing controller 1131 in addition to the display signal line (6).

In the embodiments of the present disclosure, to ensure high refresh rate and high brightness, a high power high voltage power supply and a high frequency display signal line are required. In order to reduce signal interference, on one hand, the lines are ensured to cross as little as possible, and on the other hand, the lines which inevitably cross are shielded.

In some embodiments, as shown in FIG. 6, the system on chip 1121 and the graphics card assembly 1122 are provided separately.

In some embodiments, as shown in fig. 6, the display card assembly 1122 includes a first housing 501, and a display card and a heat dissipation fan disposed in the first housing 501, the heat dissipation fan is located on a side of the display card facing away from the substrate, the first housing 501 includes a top shell surface 511, the top shell surface 511 is located on a side of the heat dissipation fan facing away from the display card, and the top shell surface 511 is provided with a first heat dissipation hole 512.

Illustratively, the thickness of the heat dissipation fan is about 12mm, so that the thickness of the display card assembly 1122 after the heat dissipation fan is increased from 30mm to 42mm of the common display card assembly is higher than the height of the whole machine support hanging column 803.

The system-level chip 1121 and the display card component 1122 are arranged in a split mode, so that different system-level chips 1121 and display card components 1122 can be replaced according to different application scenes, one of the system-level chips 1121 and the display card components 1122 can be developed for the second time independently, more performance requirements are met, and flexibility and universality are improved. In addition, the graphics card component 1122 includes an independent graphics card, which improves processing capability compared with an integrated graphics card, and the chip provided by the present disclosure is integrated with a DSC data compression protocol, supporting the HDMI201 48G transmission speed, so as to achieve the display effect of high brightness and high refresh rate.

In some embodiments, as shown in fig. 6 and 7, the first housing 501 further includes two first housing side faces 5011 disposed opposite to each other along the second direction F2, the first housing side faces 5011 are provided with a recess 513 and a fixing portion 514 protruding toward a side facing away from the graphics card 502, a surface of the recess 513 facing away from the substrate 110 is lower than the housing top face 511, the fixing portion 514 is provided with a first fixing hole 701 penetrating the fixing portion 514 along a direction perpendicular to the second direction F2, and the recess 513 is located on a side of the fixing portion 514 facing the adapter plate 1123.

Illustratively, as shown in fig. 6, the first housing 501 further includes a housing top surface 511, the housing top surface 511 is located between two first housing side surfaces 5011, and the first fixing hole 701 is used for fixing the first housing 501, and the first housing 501 protects the graphics card 502.

As shown in fig. 6, the first housing 501 further includes an interface side 5013, wherein the interface side 5013 is perpendicular to the first housing side 5011, and an HDMI2.1 interface and a DP1.4 interface are disposed thereon to increase the transmission rate of the display signal, thereby ensuring the high resolution display effect.

In some embodiments, as shown in fig. 6 and 7, the display driving circuit 11 provided in the present disclosure further includes: the fixing bracket 601 is located between the display card assembly 1122 and the substrate 110, and comprises a bottom plate 602 and a plurality of side plates 603 connected with the edge of the bottom plate 602, the bottom plate 602 is fixed on the substrate 110, the plurality of side plates 603 comprise two first side plates 611 and two second side plates 612 which are oppositely arranged along the second direction F2, the first side plates 611 and the second side plates 612 are located on one side, away from the display card 502, of the first shell side face 5011, and the first side plates 611 are located on one side, close to the adapter plate 1123, of the second side plates 612.

Illustratively, as shown in fig. 7, the graphic card assembly 1122 is fixed in a space defined by a bottom plate 602 and a plurality of side plates 603, wherein the plurality of side plates 603 are parallel to each other, and the bottom plate 602 is perpendicular to the side plates 603.

In some embodiments, as shown in fig. 7, an end of the first side plate 611 away from the bottom plate 602 has a first bending portion 621 bending towards the display card assembly 1122, the first bending portion 621 is used for limiting the concave table 513, an end of the second side plate 612 away from the first side plate 611 has a second bending portion 622 bending towards a side away from the display card assembly 1122, the second bending portion 622 has a second fixing hole 702 penetrating the second bending portion 622 along a direction perpendicular to the second direction F2, and the second fixing hole 702 and the first fixing hole 701 are used for connecting the fixing bracket 601 and the display card assembly 1122 through a rigid connection piece.

As shown in fig. 6 and 7, the display card assembly 1122 is inserted into the fixing bracket 601 from left to right like a drawer, and the first bending portion 621 is used to limit the display card assembly 1122 in the Y direction (i.e., the second direction F2) and the Z direction (i.e., the direction perpendicular to the substrate 110), and after the limiting, the end of the display card assembly 1122 is connected to the adapter plate 1123. The display card assembly 1122 is further limited in the X direction by fixing the first fixing hole 701, the second fixing hole 702, and the rigid connection member to the fixing bracket 601. The second fixing hole 702 and the first fixing hole 701 may be circular, and the rigid connection member may be a screw.

In some embodiments, as shown in fig. 8, the display driving circuit 11 provided in the present disclosure further includes: the rear case 114 is disposed at a side of the processing module 112, the control module 113, and the power module 111 facing away from the substrate 110.

In some embodiments, as shown in fig. 8, the rear housing 114 includes: the relief hole 1141 corresponds to a position of the graphics card assembly 1122, and the graphics card assembly 1122 protrudes out of the rear housing 114 at the relief hole 1141.

In some embodiments, as shown in fig. 8, the rear housing 114 includes: the second heat dissipation hole 1142 corresponds to the position of the system on chip 1121.

In some embodiments, as shown in fig. 8, the rear housing 114 includes: the third heat dissipation hole 1143 corresponds to a position of the second edge B2 of the high-power supply board 1111, and partially overlaps the high-power supply board 1111, the second edge B2 having the first output interface 101 and the second output interface 102 provided thereon, and a fourth heat dissipation hole 1144 disposed near a third edge B3 of the high-power supply board 1111, and not overlapping the high-power supply board 1111, the third edge B3 and the second edge B2 being opposite edges of the high-power supply board 1111.

Illustratively, as shown in fig. 1 and 2, the second edge B1 of the high-power panel 1111 may be an upper edge of the high-power panel 1111 near the first edge B1 of the substrate 110, and the third edge B3 of the high-power panel 1111 may be a lower edge far from the first edge B1 of the substrate 110. The system-in-chip 1121 is cooled by the second cooling hole 1142, and the power module 111 is cooled by the third cooling hole 1143 and the fourth cooling hole 1144.

Illustratively, as the thickness of the graphics card assembly 1122 increases due to the increase in the cooling fan of the graphics card assembly 1122, a protrusion is formed on the outer surface of the rear housing 114, and thus the rear housing 114 is provided with a relief hole 1141 to make room for the graphics card assembly 1122. The surface of the graphic card assembly 1122 facing away from the substrate 110 is higher than the surface of the rear case 114 facing away from the substrate 110, and even higher than the surface of the rear case 114 facing away from the substrate 110 at the support hanging post 803, so that the graphic card assembly 1122 forms a protrusion on the outer surface of the rear case 114.

In some embodiments, as shown in fig. 9, the rear case 114 has two second case sides 1145 disposed opposite to each other along the second direction F2, wherein a first bar hole 801 is disposed on one of the second case sides 1145, and a second bar hole 802 is disposed on the other second case side 1145, and the first bar hole 801 and the second bar hole 802 are used to form convective heat dissipation.

Illustratively, as shown in fig. 9, the extending directions of the first bar-shaped hole 801 and the second bar-shaped hole 802 are perpendicular to each other, for example, the first bar-shaped hole 801 may be a horizontal bar-shaped hole and the second bar-shaped hole 802 may be a vertical bar-shaped hole. During the heat dissipation process, cold air enters from the second strip-shaped holes 802, and hot air is discharged from the first strip-shaped holes 801, so that natural convection is formed to dissipate heat for all components inside.

In some embodiments, as shown in fig. 1 and 2, the display driving circuit 11 provided in the present disclosure further includes:

the power input interface 115 is disposed on a side of the low-power board 1112 far from the high-power board 1111 and near a fourth edge B4 of the low-power board 1112, where the fourth edge B4 is an edge of the low-power board 1112 far from the third output interface 103.

For convenience of plugging in the power source, the power input interface 115 is disposed at the lower right corner of the substrate 110, as illustrated in fig. 1 and 2.

In some embodiments, as shown in fig. 1 and 2, the high power board 1111 further includes a first input interface 1151, the low power board 1111 further includes a second input interface 1152, and the first input interface 1151 and the second input interface 1152 are connected in parallel to the same power input interface 115 and disposed close to the same power input interface 115.

Illustratively, as shown in fig. 1 and 2, the first input interface 1151 is disposed at the lower right corner of the high-power panel 1111, and the second input interface 1152 is disposed at the lower right corner of the low-power panel 1111. The first input interface 1151 and the second input interface 1152 are high voltage input ports, e.g., 220V, 110V. The supply voltage enters the first input interface 1151 and the second input interface 1152 in parallel through the power input interface 115.

The present disclosure also provides a display device 1000, as shown in fig. 1, 2, 10a and 10b, comprising: the display driving circuit 11 as provided in any one of the embodiments; and a display panel 12 connected to the display driving circuit 11 for performing display under the control of the display driving circuit 11.

In some embodiments, the display device 1000 provided in the present disclosure, as shown in fig. 2, 10a and 10b, further includes: the backlight module 13 is located at the backlight side of the display panel 12, and connected to the backlight driver 1132, and is configured to provide backlight to the display panel 12 under the driving of the backlight driver 1132.

As shown in fig. 11, the backlight module 13 includes: the plurality of light bars 131 that are parallel to each other and arranged along the row direction, the light bars 131 include a plurality of light strings 132 that are connected in parallel and arranged along the column direction, the light strings 132 include a plurality of light beads 133 that are connected in series and arranged along the column direction, the plurality of light bars 131 are divided into a plurality of light bar groups 134, each light bar group 134 includes a plurality of light bars 131 that are arranged in succession, the plurality of light bars 131 that are located in the same light bar group 134 are connected to the same first printed circuit board 14, and the first printed circuit board 14 is connected with the backlight driver 1132.

As shown in fig. 11, the backlight module 13 is connected to the backlight driver 1132 through an LED flexible flat cable (Flexible Flat Cable, FFC), the timing controller 1131 transmits the brightness distribution information of the display screen to the backlight driver 1132, and the backlight driver 1132 performs Local Dimming on the BLU in the backlight module 13 according to the backlight driving signal sent by the system-in-chip 1121 and the resolution of 5K2K, so that the brightness of the BLU is matched with the brightness of the display screen, so that the brightness contrast of the display screen of the backlight module 13 is larger, and the screen color is richer. Therefore, the display brightness of the display device can reach 500nit, the power consumption of the BLU is reduced, the picture contrast is improved, and the image quality effect is improved.

As shown in fig. 11, the backlight module 13 may include 4 light bar groups 1134, one light bar group 1134 may include 6 light bars 131, one light bar group 1134 is correspondingly connected to one first printed circuit board 14, and a plurality of first printed circuit boards 14 are connected to the backlight driver 1132. Each light bar may include 6 strings 132 connected in parallel and arranged along the column direction, and each string 132 includes 2 light beads 133 connected in series and arranged along the column direction. The backlight driver 1132 can individually control the brightness of any of the light strings 132 so that the brightness thereof matches the brightness of the corresponding position of the display screen. For example, in a region where the display screen is brighter, the brightness of the light string at the corresponding position is higher; in the darker area of the display screen, the brightness of the light string at the corresponding position is lower. Therefore, the image contrast is improved and the image quality effect is improved while the BLU power consumption is reasonably reduced.

In some embodiments, the display device 1000 provided in the present disclosure, as shown in fig. 1 and 2, further includes:

the plurality of second printed circuit boards 15 are positioned on one side of the display driving circuit 11 near the timing controller 1131, the second printed circuit boards 15 are connected with the display panel 12, the second printed circuit boards 15 connected with the middle area of the display panel 12, and the second printed circuit boards 15 connected with the timing controller 1131 and the edge area of the display panel 12 respectively.

As illustrated in fig. 1 and 2, the display device 1000 provided in the present disclosure may include 4 second printed circuit boards 15, which are divided into 2 middle second printed circuit boards 151 and 2 edge second printed circuit boards 152, and the second printed circuit boards 15 connected to the middle area of the display panel 12, that is, the 2 middle second printed circuit boards 151 are connected to the adjacent edge second printed circuit boards 152 through flexible circuit boards (Flexible Printed Circuit, FPCs) or FFCs, respectively. In addition, the intermediate second printed circuit board 151 is also connected to the timing controller 1131 through 4 FPCs (8).

Illustratively, as shown in fig. 1 and 2, a plurality of second printed circuit boards 15 are also connected to the display panel 12 to ensure a transmission path of the display signals.

In some embodiments, as shown in fig. 12a and 12b, the display device 1000 provided in the present disclosure has a horizontal-vertical display ratio of 21:9, the whole size is 81inch, the resolution ratio is 5K2K, the high refresh rates of 144Hz and 120Hz are supported, and compared with the traditional display device, the display effect is remarkably improved.

Illustratively, as in FIG. 12a, the width A of the display is 1886.208mm, the height B is 795.744mm, and the ratio is about 21:9; the peripheral frame C of the display picture is 17+/-2 mm. Resolution is 5120 x 2160, reaching a high resolution of 5K 2K.

The present disclosure also provides a source driver including a display driving circuit 11 as provided in any one of the embodiments.

As will be appreciated by those skilled in the art, the source driver provided by the present disclosure has the advantages of the display driving circuit 11 described above.

The present disclosure also provides a display device 1000 including: a display panel 12; and a source driver as provided in any of the embodiments, wherein the source driver is connected to the display panel 12 and is used for driving the display panel 12 to display a picture.

It will be appreciated by those skilled in the art that the display device 1000 provided by the present disclosure has the advantages of the source driver or display driving circuit 11 described above.

The display device provided by the present disclosure may be: display module, cell phone, tablet computer, television, display, notebook computer, digital photo frame, vehicle display device, smart watch, exercise wristband, personal digital assistant, etc.

In the present disclosure, the meaning of "a plurality of" means two or more, and the meaning of "at least one" means one or more, unless specifically defined otherwise.

In the present disclosure, the orientation or positional relationship indicated by the terms "upper", "lower", etc. are based on the orientation or positional relationship shown in the drawings, and are merely for convenience of description and to simplify the description, rather than to indicate or imply that the apparatus or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present disclosure.

The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.

Reference herein to "one embodiment," "some embodiments," "an exemplary embodiment," "one or more embodiments," "an example," "one example," "some examples," etc., is intended to mean that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

In describing some embodiments, the expressions "coupled" and "connected" may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. As another example, the term "coupled" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled (communicatively coupled)" may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. The embodiments disclosed herein are not necessarily limited to the disclosure herein.

At least one of "A, B and C" has the same meaning as at least one of "A, B or C," both include the following combinations of A, B and C: a alone, B alone, C alone, a combination of a and B, a combination of a and C, a combination of B and C, and a combination of A, B and C.

"A and/or B" includes the following three combinations: only a, only B, and combinations of a and B.

As used herein, the term "if" is optionally interpreted to mean "when … …" or "at … …" or "in response to a determination" or "in response to detection" depending on the context. Similarly, the phrase "if determined … …" or "if detected [ stated condition or event ]" is optionally interpreted to mean "upon determining … …" or "in response to determining … …" or "upon detecting [ stated condition or event ]" or "in response to detecting [ stated condition or event ]" depending on the context.

The use of "for" or "configured to" herein is meant to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

The use of "based on" or "according to" herein is meant to be open and inclusive. A process, step, calculation, or other action based on one or more of the conditions or values may be based on other conditions or beyond the values in practice. A process, step, calculation, or other action based on one or more of the conditions or values may be based on other conditions or values in practice.

As used herein, "about," "approximately" or "approximately" includes the stated values as well as average values within an acceptable deviation range of the particular values as determined by one of ordinary skill in the art in view of the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system).

As used herein, "parallel", "perpendicular", "equal", "flush" includes the stated case and an approximation to the stated case, the range of which is within an acceptable deviation range as determined by one of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, "parallel" includes absolute parallel and approximately parallel, where the acceptable deviation range for approximately parallel may be, for example, a deviation within 5 °; "vertical" includes absolute vertical and near vertical, where the acceptable deviation range for near vertical may also be deviations within 5 °, for example. "equal" includes absolute equal and approximately equal, where the difference between the two, which may be equal, for example, is less than or equal to 5% of either of them within an acceptable deviation of approximately equal. "flush" includes absolute flush and near flush, where the distance between the two, which may be flush, for example, is less than or equal to 5% of either dimension within an acceptable deviation of near flush.

It will be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present between the layer or element and the other layer or substrate.

Exemplary embodiments are described herein with reference to cross-sectional and/or plan views as idealized exemplary figures. In the drawings, the thickness of layers and regions are exaggerated for clarity. Thus, variations from the shape of the drawings due to, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments. Unless otherwise specified, the film thickness refers to the dimension of the film in its normal direction.

Finally, it should be noted that: the above embodiments are merely for illustrating the technical solution of the present disclosure, and are not limiting thereof; although the present disclosure has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present disclosure.

Claims (16)

1. A display driving circuit, comprising: a substrate, and a power module, a processing module and a control module which are arranged on one side of the substrate;

the power supply module is respectively connected with the processing module and the control module and is used for supplying power to the processing module and the control module;

the processing module is also connected with the control module and used for providing display signals for the control module;

the control module is used for controlling the display panel to display according to the display signal;

the power module and the processing module are positioned at two opposite sides of the control module.

2. The display driver circuit of claim 1, wherein the processing module comprises a system on chip, a graphics card assembly, and an adapter plate connecting the system on chip and the graphics card assembly, the control module comprises a timing controller and a backlight driver, and the power module comprises a high power supply board and a low power supply board;

the high-power panel comprises a first output interface and a second output interface, wherein the first output interface is connected with the backlight driver, the second output interface is connected with the system-in-chip, the system-in-chip is also connected with the time sequence controller, and the high-power panel is used for supplying power to the backlight driver, the system-in-chip and the time sequence controller; the method comprises the steps of carrying out a first treatment on the surface of the

The low-power panel comprises a third output interface, the third output interface is connected with the adapter plate, and the low-power panel is used for supplying power to the adapter plate and the display card assembly;

the system-in-chip is also connected with the backlight driver and is used for providing the display signal for the time schedule controller and providing a backlight driving signal for the backlight driver;

the time sequence controller is also connected with the backlight driver and is used for controlling the display panel to display according to the display signal, generating picture brightness information according to the display signal and sending the picture brightness information to the backlight driver;

the backlight driver is used for driving the backlight module to provide backlight for the display panel according to the backlight driving signal and the picture brightness information.

3. The display driving circuit of claim 2, wherein the low power supply board is located at a side of the high power supply board away from the control module, the first output interface, the second output interface, and the third output interface are disposed near a first edge of the substrate, the timing controller is located at a side of the backlight driver away from the first edge, the system-in-chip is located at a side of the display card assembly away from the first edge, and the adapter board is located between the display card assembly and the backlight driver and is disposed near the display card assembly.

4. The display driving circuit according to claim 2, wherein the system on chip and the timing controller are connected through a plurality of display signal lines spaced apart from each other, the display signal lines are for transmitting display signals, and transmission path lengths of the plurality of display signal lines are substantially the same.

5. The display driving circuit according to claim 4, wherein the display signal line includes a first base material layer, a first wiring layer, a first protective layer, and a first shielding layer which are sequentially stacked in a first direction, the first base material layer is disposed close to the substrate, the first shielding layer is disposed away from the substrate, and the first direction is perpendicular to the substrate.

6. The display drive circuit of claim 5, wherein the plurality of display signal lines includes a first display signal line and a second display signal line, the first display signal line being located on a side of the second display signal line that is proximate to the system-in-chip and the timing controller; and is also provided with

The first display signal line comprises a first extension line, a folding structure and a second extension line which are sequentially connected, wherein the first extension line is positioned on one side, close to the system-level chip, of the folding structure and is connected with the system-level chip, the second extension line is positioned on one side, close to the time schedule controller, of the folding structure and is connected with the time schedule controller, the folding structure comprises a plurality of laminated layers which are sequentially laminated along a first direction, and double-sided adhesive conductive foam is arranged between two adjacent laminated layers.

7. The display driving circuit according to claim 4, wherein the backlight driver is connected to the timing controller through a first signal line intersecting the display signal line, the first signal line including a second base material layer, a second wire layer, a second protective layer, and a second shielding layer disposed in order, the second shielding layer being disposed close to the display signal line;

the backlight driver is connected with the system-in-chip through a second signal wire, the second signal wire is intersected with the display signal wire, the second signal wire comprises a plurality of transmission wires, a third protection layer and a third shielding layer, the transmission wires comprise wires and insulating layers which are coated on the surfaces of the wires, the third protection layer is arranged on the periphery of the plurality of transmission wires, and the third shielding layer is arranged between the wires and the insulating layers or between the plurality of transmission wires and the third protection layer.

8. The display drive circuit according to claim 7, wherein the first signal line is located between the substrate and the display signal line, and the second signal line is located on a side of the display signal line facing away from the substrate;

The display driving circuit further comprises a third signal line, the third signal line is intersected with the display signal line, and the third signal line is located at one side, far away from the substrate, of the display signal line.

9. The display driver circuit of any one of claims 2 to 8, wherein the system on chip and the graphics card assembly are provided separately; and is also provided with

The display card assembly comprises a first shell, a display card and a cooling fan, wherein the display card and the cooling fan are arranged in the first shell, the cooling fan is located at one side, deviating from the substrate, of the display card, the first shell comprises a shell top surface, the shell top surface is located at one side, far away from the display card, of the cooling fan, and a first cooling hole is formed in the shell top surface.

10. The display driving circuit according to claim 9, wherein the first housing further comprises two first housing side surfaces disposed opposite to each other in the second direction, a recess table and a fixing portion protruding toward a side facing away from the graphic card are disposed on the first housing side surfaces, a surface of the recess table facing away from the substrate is lower than the housing top surface, a first fixing hole penetrating the fixing portion in a direction perpendicular to the second direction is formed in the fixing portion, and the recess table is disposed on a side of the fixing portion facing toward the adapter plate;

The display driving circuit further includes: the fixing bracket is positioned between the display card assembly and the base plate and comprises a base plate and a plurality of side plates connected with the edge of the base plate, the base plate is fixed on the base plate, the side plates comprise two first side plates and two second side plates which are oppositely arranged along a second direction, the first side plates and the second side plates are positioned on one side, far away from the display card, of the side surface of the first shell, and the first side plates are positioned on one side, close to the adapter plate, of the second side plates;

the first side plate is far away from one end of the bottom plate is provided with a first bending part which bends towards the display card assembly, the first bending part is used for limiting the concave table, one end of the second side plate, which is far away from the first side plate, is provided with a second bending part which bends towards one side of the display card assembly, the second bending part is provided with a second fixing hole which penetrates through the second bending part along a direction perpendicular to the second direction, and the second fixing hole and the first fixing hole are used for being connected with the fixing support and the display card assembly through rigid connecting pieces.

11. The display drive circuit of claim 9, wherein the display drive circuit further comprises:

And a rear case disposed at one side of the processing module, the control module, and the power module facing away from the substrate, the rear case including:

the avoidance hole corresponds to the position of the display card assembly, and the display card assembly protrudes out of the rear shell at the avoidance hole;

the second heat dissipation holes correspond to the positions of the system-on-chip;

a third heat dissipation hole corresponding to a second edge position of the high-power panel and partially overlapping the high-power panel, wherein the first output interface and the second output interface are arranged on the second edge; and

and the fourth radiating hole is arranged close to a third edge of the high-power supply board and is not overlapped with the high-power supply board, and the third edge and the second edge are two edges opposite to the high-power supply board.

12. The display driving circuit according to claim 11, wherein the rear case has two second case sides disposed opposite to each other in the second direction, wherein one of the second case sides is provided with a first bar-shaped hole, and the other second case side is provided with a second bar-shaped hole, and the first bar-shaped hole and the second bar-shaped hole are used for forming convection heat dissipation.

13. The display drive circuit according to any one of claims 2 to 8, wherein the display drive circuit further comprises:

the power input interface is arranged on one side of the low-power panel, far away from the high-power panel, and is arranged close to a fourth edge of the low-power panel, wherein the fourth edge is the edge of the low-power panel, far away from the third output interface;

the high-power panel further comprises a first input interface, the low-power panel further comprises a second input interface, and the first input interface and the second input interface are connected with the same power input interface in parallel and are arranged close to the same power input interface.

14. A display device, comprising:

a display driving circuit according to any one of claims 1 to 13; and

and the display panel is connected with the display driving circuit and used for displaying under the control of the display driving circuit.

15. The display device of claim 14, wherein the control module comprises a backlight driver, the display device further comprising:

the backlight module is positioned at the backlight side of the display panel, connected with the backlight driver and used for providing backlight for the display panel under the drive of the backlight driver;

The backlight module comprises: the lamp strips are parallel to each other and are distributed along the row direction, each lamp strip comprises a plurality of lamp strings which are connected in parallel and distributed along the column direction, each lamp string comprises a plurality of lamp beads which are connected in series and distributed along the column direction, each lamp strip is divided into a plurality of lamp strip groups, each lamp strip group comprises a plurality of lamp strips which are distributed continuously, the lamp strips which are located in the same lamp strip group are connected to the same first printed circuit board, and the first printed circuit board is connected with the backlight driver.

16. The display device of claim 14 or 15, wherein the control module comprises a timing controller, the display device further comprising:

the second printed circuit boards are positioned on one side, close to the time schedule controller, of the display driving circuit, are connected with the display panel, are connected with the middle area of the display panel, and are also respectively connected with the time schedule controller and the second printed circuit board connected with the edge area of the display panel.