CN116827385B - Power information fusion device for DC-DC converter power control loop disturbance - Google Patents

Abstract

The invention provides a power information fusion device for power control loop disturbance of a DC-DC converter, which comprises a direct current voltage source, a band-pass filter, a driving circuit, a modulation module and N source Boost converters as power sources. Compared with the prior communication mode, the transmitting converter does not need a baseband signal generating circuit and a coupling circuit, the receiving converter only needs a simple sampling and filtering circuit, and the control chip MCU completes signal demodulation, so that hardware cost is greatly reduced.

Description

Power information fusion device for DC-DC converter power control loop disturbance

Technical field

The present invention relates to the field of power electronics networking technology, and in particular to a power information fusion device for DC-DC converter power control loop disturbance.

Background technique

In the context of the dual-carbon strategic goals, power electronic equipment, as one of the core hubs in building the energy Internet, has put forward higher requirements for its own digitalization and intelligence. Research on power electronics technology often focuses on power conversion and pays less attention to communication technology between devices. With the urgent need for information exchange in power electronic equipment, scholars continue to integrate power electronic technology and information technology. It is foreseeable that power electronic equipment with deep integration of power/data will become a new trend.

The communication technologies currently used between power electronic equipment mainly include wireless communication, control LAN bus communication and power line carrier communication. Wireless communication has low cost, is susceptible to external interference, is not suitable for long-distance transmission, is easy to be invaded, and has low security; the control LAN bus communication rate is high, requires additional communication cables, and is low in cost performance; power line carrier communication relies on power lines for data Transmission, high reliability and low cost, but requires additional hardware circuits to generate baseband signals, and then couple the signals to the power lines through impedance matching circuits.

The above communication technologies cannot achieve a good balance in terms of noise immunity, real-time performance and cost. Therefore, combining the characteristics of power electronic equipment, exploring a new communication method has become a research direction for scholars. As a branch of electronic technology, power electronics technology realizes the controllable conversion of electric energy. The electric energy before and after conversion is converted into analog quantities. The form exists, but there is a discretized state in the process of digital control of power electronic equipment, which provides the possibility of integrating modern digital communication technology.

Contents of the invention

The purpose of the present invention is to solve the problems existing in the prior art.

In order to achieve the above purpose, the present invention adopts the following technical solution: a power information fusion device for DC-DC converter power control loop disturbance, including: DC voltage source, band-pass filter, drive circuit, modulation module, source Boost converter as The power source and the load Buck converter serve as the load, and the DC bus; the output end of the Boost converter and the input end of the Buck converter share a DC bus, and the source Boost converter and the load Buck converter are both connected through the DC bus, The drive circuit is connected to the source Boost converter switch tube and the gate of the load Buck converter switch tube, and the band-pass filter is connected to the DC bus;

When the modulation module does not send data, the communication switch of the modulation module is turned off and traditional power conversion is performed. The power modulation amount vm(t) is directly compared with the triangular carrier vc(t) to generate pulse width modulation (Pulse Width Modulation, PWM). The signal, with a duty cycle of δ (t), controls the on and off of the switch tube of the source Boost converter and the switch tube of the load Buck converter;

The modulation module sends data, the communication switch is turned on, and the source Boost converter modulates the baseband signal vs(t) that needs to be transmitted through the MSK of the modulation module into a high-frequency signal vd(t), and then superimposes it onto the original power modulation amount. On vm(t), a composite power/data modulation quantity ve(t) is generated, which is compared with the triangular carrier vc(t) to generate a PWM signal.

As a preferred implementation, the source Boost converter includes: a first DC voltage source E1, a first inductor L1, a first capacitor C1, a first switching tube Q1 and a second switching tube Q2. The positive electrode of the DC voltage source E1 is connected to one end of the first inductor L1, the negative electrode of the first DC voltage source E1 is connected to the source electrode of the first switching tube Q1, and the other end of the first inductor L1 is connected to the first switching tube _Q1 . The drain of Q ₁ is connected to the source of the second switch Q ₂ ; one end of the first capacitor C ₁ is connected to the positive pole of the DC bus, and the other end of the first capacitor C ₁ is connected to the negative pole of the DC bus; the The drain of the first switch Q1 is connected to the first inductor L1 , the gate of the first switch Q1 is connected to _the drive circuit, and the source of _the first switch Q1 is connected _to the negative electrode of the DC bus _{; The} drain of the second switch Q2 is connected to the _first capacitor C1 , the gate of _the second switch Q2 is connected to _the drive circuit, and the source of the _second switch Q2 is connected to the first inductor L1 Both are connected to the drain of _the first switch Q1 .

As a preferred implementation, the bandpass filter includes: a first resistor R ₁ , a second resistor R ₂ , a third resistor R ₃ , a fourth resistor R ₄ , a fifth resistor R ₅ , and a first capacitor C _5. The second capacitor C ₆ , the third capacitor C ₇ and the operational amplifier. One end of the first resistor R ₁ is connected to the first capacitor C ₅ , and the other end of the first resistor R ₁ is connected to the second capacitor C ₆ and C 5 . The third capacitor C ₇ is connected to the fourth resistor R ₄ ; one end of the second resistor R ₂ and the third resistor R ₃ are connected to the inverting input end of the operational amplifier, and the other end of the second resistor R 2 is connected to ground; the third resistor R ₂ is connected to the inverting input end of the operational amplifier. One end of the resistor R ₃ and the fourth resistor R ₄ are connected to the output end of the operational amplifier; the other end of the third resistor R ₃ and the second resistor R ₂ are connected to the inverting input end of the operational amplifier; one end of the fourth resistor R ₄ is connected to the third Resistor R ₃ and the output end of the operational amplifier, the other end of the fourth resistor R ₄ is connected to the first resistor R ₁ and the second capacitor C ₆ is connected to the third capacitor C ₇ ; one end of the fifth resistor R ₅ is connected to the third capacitor C ₇ and the non-inverting input terminal of the operational amplifier, the other end of the fifth resistor R ₅ is connected to ground; one end of the first capacitor C ₅ is connected to the positive pole of the DC bus voltage, and the other end of the first capacitor C ₅ is connected to the first resistor R ₁ , so The first capacitor C ₅ performs DC blocking processing on the DC bus voltage to obtain its AC component; the second capacitor C ₆ has one end connected to the first resistor R ₁ , the fourth resistor R ₄ and the third capacitor C ₇ . The other end of the second capacitor C ₆ is connected to ground; one end of the third capacitor C ₇ is connected to the first resistor R ₁ , the fourth resistor R ₄ and the second capacitor C ₆ , and the other end of the third capacitor C ₇ is connected to the fifth resistor R ₅ and the non-inverting input terminal of the operational amplifier; the positive power supply terminal of the operational amplifier is connected to the positive DC voltage, the negative power supply terminal of the operational amplifier is connected to the negative DC voltage, and the non-inverting input terminal of the operational amplifier is connected to the fifth resistor R ₅ and the third capacitor C ₇ , the inverting input terminal of the operational amplifier is connected to the second resistor R ₂ and the third resistor R3 , the output terminal of the operational amplifier is connected to the third resistor R ₃ , the fourth resistor R ₄ and MCU.

As a preferred implementation, the load Buck converter includes: a third inductor L ₃ , a third capacitor C ₃ , a fifth switching tube Q ₅ and a sixth switching tube Q ₆ . The third inductor One end _of L3 is connected to the third capacitor C3 , _the other end of the third inductor L3 is connected to the source of the fifth switch Q5 and _the drain of _the sixth switch Q6 , and one end of _the third capacitor C3 is connected _to The third inductor L ₃ is connected, and the other end of the third capacitor C ₃ is connected to the negative electrode of the DC bus and the source of the sixth switching tube Q ₆ ; the drain of the fifth switching tube Q ₅ is connected to the positive electrode of the DC bus, and the The _gate of the fifth switch Q5 is connected to the drive circuit, _the source of _{the fifth switch Q5} is connected with the drain of the third inductor L3 and the _sixth switch Q6 ; the drain _of the sixth switch Q6 The pole of the sixth switch Q6 is connected to the source of the third inductor L3 _and the fifth switch _Q5 , _the gate of the sixth switch Q6 is connected to the drive circuit, and the source of _the sixth switch Q6 is connected to the negative pole of the DC bus and the third Three capacitors C ₃ are connected.

As a preferred embodiment, the driving signals of _the first switching tube Q1 and _{the second switching tube Q2} are complementary, and the driving signals _{of the fifth switching tube Q5} and the _sixth switching tube Q6 are complementary.

Compared with the existing technology, the advantages and positive effects of the present invention are:

1. The present invention utilizes the power electronic converter to have the ability to transmit data during power conversion, "embeds" digital communication during power conversion, and superimpose minimum frequency shift keying modulation on the power modulation amount in the original power control loop. The carrier wave is used as a disturbance signal, and then the composite modulation amount of power/data is compared with the triangular carrier wave to generate a duty cycle that integrates data information. Finally, the DC bus voltage is demodulated to realize communication between power electronic converters. Compared with previous communication methods, the transmitting converter does not require baseband signal generation circuits and coupling circuits, while the receiving converter only needs simple sampling and filtering circuits, and the control chip MCU completes signal demodulation, thus greatly reducing hardware costs.

Description of drawings

Figure 1 is a schematic diagram of the DC-DC converter power control loop disturbance source Boost and load Buck circuit diagram system of the present invention;

Figure 2 is a band-pass filter circuit diagram;

Figure 3 is a block diagram of the modulation module based on power control loop perturbation;

Figure 4 is a data demodulation block diagram.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

Example

Please refer to Figures 1-4. The present invention provides a technical solution: a power information fusion device for DC-DC converter power control loop disturbance, including: DC voltage source, band-pass filter, drive circuit, modulation module, source Boost The converter serves as the power supply, the load Buck converter serves as the load, and the DC bus; the output end of the Boost converter and the input end of the Buck converter share a DC bus, and both the source Boost converter and the load Buck converter pass a DC bus. Bus connection, the drive circuit is connected to the source Boost converter switch tube and the gate of the load Buck converter switch tube, and the band-pass filter is connected to the DC bus;

When the modulation module does not send data, the communication switch of the modulation module is turned off and traditional power conversion is performed. The power modulation amount vm(t) is directly compared with the triangular carrier vc(t) to generate pulse width modulation (Pulse Width Modulation, PWM). The signal, with a duty cycle of δ (t), controls the on and off of the switch tube of the source Boost converter and the switch tube of the load Buck converter;

The modulation module sends data, the communication switch is turned on, and the source Boost converter modulates the baseband signal vs(t) that needs to be transmitted through the MSK of the modulation module into a high-frequency signal vd(t), and then superimposes it onto the original power modulation amount. On vm(t), a composite power/data modulation quantity ve(t) is generated, which is compared with the triangular carrier vc(t) to generate a PWM signal. The sending converter is either a source Boost converter or a load Buck converter, and the switch "Tube" is a fully controlled switching device, such as MOSFET, IGBT, SiC, and GaN, which can all be switching tubes. Figure 1 in the accompanying drawings of the manual uses MOSFET, and the specific model is Infineon's BSC070N10NS.

As shown in Figures 1 to 4, the source Boost converter increases the DC voltage source to supply power to the downstream load Buck converter. It also acts as a data transceiver, completing power conversion and information exchange at the same time. The source Boost converter It includes: a first DC voltage source E ₁ , a first inductor L ₁ , a first capacitor C ₁ , a first switching tube Q ₁ and a second switching tube Q ₂ . The anode of the first DC voltage source E ₁ is connected to the first switching tube Q 2 . One end of the inductor L ₁ is connected, the cathode of the first DC voltage source E ₁ is connected to the source of the first switch Q ₁ , and the other end of the first inductor L ₁ is connected to the drain of the first switch Q ₁ The source of the second switch Q2 is connected; one end of the first capacitor C1 is connected to the positive pole of the DC bus, and _the other _end of _the first capacitor C1 is connected to the negative pole of the DC bus; the first switch Q ₁ The drain is connected to the first inductor L ₁ , the gate of the first switch Q ₁ is connected to the drive circuit, the source of the first switch Q ₁ is connected to the negative electrode of the DC bus; the second switch The drain of tube Q2 is connected to the first capacitor C1 , the gate of _the second switching tube Q2 is connected to _the driving circuit, the source of the second switching tube _Q2 and the first inductor L1 are both connected to the _first switching tube The drain of Q1 is connected, and the dead time is inserted, in which the first DC voltage source E ₁ , the first inductor L ₁ , the first capacitor C ₁ , the first switching tube Q ₁ and the second switching tube Q ₂ are equivalent to the figure. In Boost converter #2 in 1, there is a first DC voltage source E ₂ , a first inductor L ₂ , a first capacitor C ₂ , a first switching tube Q3 and a second switching tube Q4.

As shown in Figures 1 to 4, the load Buck converter reduces the voltage of the DC bus, supplies power to the load at its output end, and also acts as a data transceiver. The load Buck converter includes: a third inductor L ₃ , The third capacitor C ₃ , the fifth switching tube Q ₅ and the sixth switching tube Q ₆ . One end of the third inductor L ₃ is connected to the third capacitor C 3 , and the other end of the third inductor L ₃ is connected to the fifth switching tube _Q 6 . The source of the switching tube Q5 and the drain of _the sixth switching tube _Q6 are connected. One end of the third _capacitor C3 is connected with the third inductor L3 . The other _{end of} the third capacitor C3 is connected with the negative pole of the DC bus and the sixth The source of the switch Q6 is connected; _the drain of the fifth switch Q5 is connected with the positive electrode of the DC bus, _the gate of the fifth switch Q5 is connected with the drive circuit, and the source _of the _fifth switch Q5 is connected with The drains of the third inductor L ₃ and the sixth switching tube Q ₆ are connected; the drain of the sixth switching tube Q ₆ is connected to the sources of the third inductor L ₃ and the fifth switching tube Q5. The gate of Q6 is connected to the drive circuit, and the source of the sixth switch Q6 is connected to the negative electrode of the DC bus and the third capacitor C3. Dead time is also inserted. For power conversion, the voltage of the DC bus is reduced to its output terminal. Load power supply; for communication, it also acts as a data transceiver. The third inductor L3, the third capacitor C3, the fifth switching tube Q5 and the sixth switching tube Q6 are equivalent to the third inductor L4, the third capacitor C4, the fifth Switching tube Q7 and sixth switching tube Q8.

As shown in Figures 1 to 4, the bandpass filter is a second-order Butterworth type and is implemented using a sallen-key circuit. The bandpass filter includes: a first resistor R ₁ , a second resistor R ₂ , and a third resistor R 2 . Resistor R ₃ , fourth resistor R ₄ , fifth resistor R ₅ , first capacitor C ₅ , second capacitor C ₆ , third capacitor C ₇ and operational amplifier, one end of the first resistor R ₁ is connected to the first capacitor C ₅ , the other end of the first resistor R ₁ and the second capacitor C ₆ and the third capacitor C ₇ are connected to the fourth resistor R ₄ ; one end of the second resistor R ₂ and the third resistor R ₃ are connected to the operational amplifier. The inverting input end, the other end of the second resistor R ₂ is connected to ground; one end of the third resistor R ₃ and the fourth resistor R ₄ are connected to the output end of the operational amplifier, and the other end of the third resistor R ₃ is connected to the second resistor R ₂ is connected to the inverting input end of the operational amplifier; one end of the fourth resistor R ₄ is connected to the third resistor R ₃ and the output end of the operational amplifier, and the other end of the fourth resistor R ₄ is connected to the first resistor R ₁ and the second capacitor C ₆ connected to the third capacitor C ₇ ; one end of the fifth resistor R ₅ is connected to the third capacitor C ₇ and the non-inverting input terminal of the operational amplifier, the other end of the fifth resistor R ₅ is connected to ground; one end of the first capacitor C ₅ is connected to the DC bus voltage The positive electrode, the other end of the first capacitor C ₅ is connected to the first resistor R ₁ , the first capacitor C ₅ performs DC blocking processing on the DC bus voltage to obtain its AC component; one end of the second capacitor C ₆ is connected to the first resistor R 1 A resistor R ₁ , a fourth resistor R ₄ and a third capacitor C ₇ , the other end of the second capacitor C ₆ is connected to ground; one end of the third capacitor C ₇ is connected to the first resistor R ₁ , the fourth resistor R ₄ and The second capacitor C ₆ and the other end of the third capacitor C ₇ are connected to the fifth resistor R ₅ and the non-inverting input terminal of the operational amplifier; the positive power supply terminal of the operational amplifier is connected to a positive DC voltage, and the negative power supply terminal of the operational amplifier is connected to a negative DC voltage. voltage, the non-inverting input terminal of the operational amplifier is connected to the fifth resistor R ₅ and the third capacitor C ₇ , and the inverting input terminal of the operational amplifier is connected to the second resistor R ₂ and the third resistor R ₃ , so The output terminal of the operational amplifier is connected to the third resistor R ₃ , the fourth resistor R ₄ and the MCU. The MCU can complete power conversion, data modulation and demodulation algorithms. It does not specifically refer to a specific type of microcontroller here. In this implementation, the operational amplifier selects RS8752XM from Runshi Technology, adopts dual power supply mode, and the band-pass filter gain is selected as 4. The MCU superimposes the minimum frequency shift keying signal as a disturbance on the power modulation amount of the original power control loop. Make the frequency of the DC bus voltage ripple contain the characteristics of data information; for power conversion, it is necessary to ensure that the duty cycle remains unchanged within the unit period; for communication, the data carrier modulated by minimum frequency shift keying must be guaranteed to be within one symbol period Strictly orthogonal; in this implementation, the MCU selects ST's STM32F407, with a main frequency of 168MHz.

As _shown in Figures 1 to 4, the driving signals of the first switching tube Q1 _and the second switching tube Q2 are complementary, and the driving signals of the fifth switching tube and the sixth switching tube are complementary. In this embodiment, the driving signals The chip is SI8233BD-D-ISR from Core Technology, with isolation function.

As shown in Figure 3, when the modulation module does not send data, the communication switch of the modulation module is turned off and traditional power conversion is performed. The power modulation amount vmt is directly compared with the triangular carrier vct to generate a PWM signal with a duty cycle of δt, which controls the switch tube. On and off; the modulation module sends data, the communication switch is turned on, and the sending converter modulates the baseband signal vst that needs to be transmitted into a high-frequency signal vdt through MSK, and then superimposes it on the original power modulation amount vmt to generate a composite The power/data modulation amount vet is compared with the triangular carrier vct to generate a PWM signal. In this implementation, f1=20kHz and f0=18kHz are selected. The frequency of the output voltage ripple carries data information. This is dual-carrier modulation. This method , the power conversion uses a triangular carrier, and the data modulation uses a sinusoidal carrier. Therefore, the minimum frequency shift keying modulation method is applied to the power/information fusion technology, which can improve the frequency band utilization by changing the power modulation amount without changing the power carrier signal. , and power conversion and data transmission use different carriers, combining data modulation on the basis of traditional PWM, and realizing switching ripple communication by superimposing data carriers on the power loop, which greatly improves the informatization and intelligence of power electronic equipment, and the data modulation method Flexibility, strong anti-interference performance, small mutual interference between power conversion and communication, and long communication distance. In the existing technology, FSK (frequency shift keying) is a modulation technology in which digital data is encoded into two or more discrete frequencies. In FSK, different digital bits (0 or 1) are represented by different frequencies. For example, 0 can be represented as a low-frequency signal and 1 as a high-frequency signal. The frequency switching of the FSK signal is sudden, and the signal has obvious transitions between different frequencies. The main difference between contrast and MSK modulation is that the FSK signal jumps between frequencies, while the MSK signal has a smooth transition during each bit. Frequency changes, and due to the hopping characteristics of the FSK signal, its spectrum usually has multiple discrete frequency components, while the spectrum of the MSK signal is narrower and only contains one main frequency component. Due to the difference in spectrum, MSK usually has a higher Bandwidth efficiency, more data can be transmitted within the same bandwidth range, and due to smooth frequency changes, MSK signals have better anti-interference performance in some interference environments than FSK signals, and MSK is a special type Continuous Phase Modulation (CPM), which has only a fixed frequency change during each bit. The frequency change of the MSK signal is smooth, and the signal does not transition between different frequencies.

As shown in Figure 4, the voltage spectrum on the DC bus is mainly concentrated in the DC component, f1=20kHz and f0=18kHz; the band-pass filters BPF1 and BPF0 respectively filter the voltage after DC isolation, and the result only contains f1=20kHz or f0=18kHz. The voltage ripple with f0=18kHz as the main component is then subjected to the sliding discrete Fourier transform SDFT to obtain the amplitudes of the frequency points of f1=20kHz and f0=18kHz, and compared with the threshold set by the program, the symbol is finally judged. 1" and "0" to achieve signal demodulation. In the field of communication, a symbol refers to a discrete signal unit transmitted in a digital communication system, representing a certain information content. A symbol is usually a fixed period of time. signal waveform or signal state.

The power information fusion method of the power information fusion device for DC-DC converter power control loop disturbance is as follows:

S1, the source Boost converter increases the DC voltage source to supply power to the downstream load Buck converter. It also acts as a data transceiver, completing power conversion and information interaction at the same time, and inserts dead time.

S2. The load Buck converter reduces the voltage of the DC bus and supplies power to the load at its output end. It also acts as a data transceiver and inserts dead time.

S3, source Boost converter and load Buck converter include sampling circuit, band-pass filter, control circuit and drive circuit.

S4, sampling circuit, samples the output voltage; band-pass filter, isolates the DC component of the DC bus voltage, and performs band-pass filtering on the AC component to filter out noise other than the carrier frequency; control circuit, all in digital form For modulation, the low-frequency baseband data is modulated onto a high-frequency carrier, and then the high-frequency data carrier is used as a disturbance signal, superimposed on the power modulation quantity of the original power control loop, and finally the power/data The composite modulation amount is used as the comparison value of the counter to generate a duty cycle that integrates data information; for demodulation, the voltage ripple after processing by the bandpass filter is sampled and judged, and the drive circuit is used to integrate the data information The PWM signal is used for power amplification to drive _the first switching tube Q1 and _the second switching tube Q2 to be complementary on and off, using an isolated driver chip.

The above are only preferred embodiments of the present invention, and are not intended to limit the present invention in other forms. Any skilled person familiar with the art may make changes or modifications to equivalent changes using the technical contents disclosed above. The embodiments may be applied to other fields, but any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still fall within the protection scope of the technical solution of the present invention.

Claims (1)

1. A power information fusion device for DC-DC converter power control loop disturbance, comprising: the direct-current voltage source, the band-pass filter, the driving circuit, the modulation module, the source Boost converter as a power supply, the load Buck converter as a load and the direct-current bus; the output end of the source Boost converter and the input end of the load Buck converter share a direct current bus, the source Boost converter and the load Buck converter are connected through the direct current bus, the driving circuit is connected with the grid electrodes of a switching tube of the source Boost converter and a switching tube of the load Buck converter, and the band-pass filter is connected with the direct current bus;

   when the modulation module does not send data, a communication switch of the modulation module is disconnected, traditional power conversion is carried out, the power modulation quantity vm (t) is directly compared with a triangular carrier wave vc (t) to generate a pulse width modulation (Pulse Width Modulation, PWM) signal, the duty ratio is delta (t), and the on and off of a source Boost converter switching tube and a load Buck converter switching tube are controlled;

   the modulation module sends data, the communication switch is conducted, the source Boost converter modulates a baseband signal vs (t) to be transmitted into a high-frequency signal vd (t) through MSK of the modulation module, the high-frequency signal vd (t) is superimposed on the original power modulation quantity vm (t), a composite power/data modulation quantity ve (t) is generated, and the composite power/data modulation quantity ve (t) is compared with a triangular carrier wave vc (t) to generate a PWM signal;

   the source Boost converter increases a direct-current voltage source to supply power for the back-stage load Buck converter;

   the source Boost converter includes: the direct-current power supply comprises a first direct-current voltage source E1, a first inductor L1, a first capacitor C1, a first switching tube Q1 and a second switching tube Q2, wherein the positive electrode of the first direct-current voltage source E1 is connected with one end of the first inductor L1, the negative electrode of the first direct-current voltage source E1 is connected with the source electrode of the first switching tube Q1, and the other end of the first inductor L1 is connected with the drain electrode of the first switching tube Q1 and the source electrode of the second switching tube Q2; one end of the first capacitor C1 is connected with the positive electrode of the direct current bus, and the other end of the first capacitor C1 is connected with the negative electrode of the direct current bus; the drain electrode of the first switching tube Q1 is connected with the first inductor L1, the grid electrode of the first switching tube Q1 is connected with the driving circuit, and the source electrode of the first switching tube Q1 is connected with the negative electrode of the direct current bus; the drain electrode of the second switching tube Q2 is connected with the first capacitor C1, the grid electrode of the second switching tube Q2 is connected with the driving circuit, and the source electrode of the second switching tube Q2 and the first inductor L1 are both connected with the drain electrode of the first switching tube Q1;

   the band-pass filter includes: the circuit comprises a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first capacitor C5, a second capacitor C6, a third capacitor C7 and an operational amplifier, wherein one end of the first resistor R1 is connected with the first capacitor C5, and the other end of the first resistor R1 is connected with the second capacitor C6 and the third capacitor C7 and the fourth resistor R4; one end of the second resistor R2 is connected with the inverting input end of the operational amplifier with the third resistor R3, and the other end of the second resistor R2 is grounded; one end of the third resistor R3 is connected with the output end of the operational amplifier through the fourth resistor R4, and the other end of the third resistor R3 is connected with the inverting input end of the operational amplifier through the second resistor R2; one end of the fourth resistor R4 is connected with the third resistor R3 and the output end of the operational amplifier, and the other end of the fourth resistor R4 is connected with the first resistor R1 and the second capacitor C6 and the third capacitor C7; one end of the fifth resistor R5 is connected with the third capacitor C7 and the non-inverting input end of the operational amplifier, and the other end of the fifth resistor R5 is grounded; one end of a first capacitor C5 is connected with the positive electrode of the direct current bus voltage, the other end of the first capacitor C5 is connected with a first resistor R1, and the first capacitor C5 performs direct current blocking treatment on the direct current bus voltage to obtain an alternating current component of the direct current bus voltage; one end of the second capacitor C6 is connected with the first resistor R1, the fourth resistor R4 and the third capacitor C7, and the other end of the second capacitor C6 is grounded; one end of the third capacitor C7 is connected with the first resistor R1, the fourth resistor R4 and the second capacitor C6, and the other end of the third capacitor C7 is connected with the fifth resistor R5 and the non-inverting input end of the operational amplifier; the positive power supply end of the operational amplifier is connected with positive direct current voltage, the negative power supply end of the operational amplifier is connected with negative direct current voltage, the non-inverting input end of the operational amplifier is connected with a fifth resistor R5 and a third capacitor C7, the inverting input end of the operational amplifier is connected with a second resistor R2 and a third resistor R3, and the output end of the operational amplifier is connected with the third resistor R3, a fourth resistor R4 and an MCU;

   the load Buck converter comprises: the three-phase direct-current power supply comprises a third inductor L3, a third capacitor C3, a fifth switching tube Q5 and a sixth switching tube Q6, wherein one end of the third inductor L3 is connected with the third capacitor C3, the other end of the third inductor L3 is connected with a source electrode of the fifth switching tube Q5 and a drain electrode of the sixth switching tube Q6, one end of the third capacitor C3 is connected with the third inductor L3, and the other end of the third capacitor C3 is connected with a negative electrode of a direct-current bus and a source electrode of the sixth switching tube Q6; the drain electrode of the fifth switching tube Q5 is connected with the positive electrode of the direct current bus, the grid electrode of the fifth switching tube Q5 is connected with the driving circuit, and the source electrode of the fifth switching tube Q5 is connected with the drain electrodes of the third inductor L3 and the sixth switching tube Q6; the drain electrode of the sixth switching tube Q6 is connected with the source electrodes of the third inductor L3 and the fifth switching tube Q5, the grid electrode of the sixth switching tube Q6 is connected with the driving circuit, and the source electrode of the sixth switching tube Q6 is connected with the negative electrode of the direct current bus and the third capacitor C3;

   the driving signals of the first switching tube Q1 and the second switching tube Q2 are complementary, and the driving signals of the fifth switching tube Q5 and the sixth switching tube Q6 are complementary.