CN116827272A - Chopper amplifier circuit and device - Google Patents
Chopper amplifier circuit and device Download PDFInfo
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- CN116827272A CN116827272A CN202310610445.0A CN202310610445A CN116827272A CN 116827272 A CN116827272 A CN 116827272A CN 202310610445 A CN202310610445 A CN 202310610445A CN 116827272 A CN116827272 A CN 116827272A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
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Abstract
The embodiment of the application provides a chopper amplifier circuit and chopper amplifier equipment, and belongs to the technical field of amplifiers. The chopper amplifier circuit includes: a first-stage chopper, a first-stage amplifier, a second-stage chopper and a second-stage amplifier which are sequentially connected along the input end to the output end of the chopper amplifier circuit; and a feedback loop, which is arranged between the output end of the first-stage amplifier and the signal compensation end, and is configured to filter offset voltage and 1/f noise in the output signal of the first-stage amplifier, and feed back the filtered signal to the signal compensation end of the first-stage amplifier. The embodiment of the application sets a feedback loop behind the first-stage amplifier to inhibit offset voltage and 1/f noise in the output signal of the first-stage amplifier.
Description
Technical Field
The application relates to the technical field of amplifiers, in particular to a chopper amplifier circuit and chopper amplifier equipment.
Background
In many electronic devices (e.g., detection devices), the strength of the signal received by the device is often weak, thus requiring high gain amplifier circuitry. In practical application, the performance of the amplifier is easily interfered by offset voltage and 1/f noise due to low frequency and small amplitude of the signal, so that the accuracy and sensitivity of the whole circuit are reduced.
In this regard, two-stage chopper circuits have been proposed in the prior art. However, the inventor of the present application found that in the implementation of the present application, the first-stage amplifying circuit of the two-stage chopper circuit often exhibits high gain, and the disturbance of offset voltage and 1/f noise is more obvious at the high gain, wherein the offset voltage is very easy to cause saturation of the first-stage amplifying circuit, and the offset voltage and 1/f noise of the first-stage amplifying circuit may exhibit high-frequency ripple in the output, which affects the circuit performance.
Disclosure of Invention
It is an aim of embodiments of the present application to provide a chopper amplifier circuit and apparatus for at least partially solving the above technical problems.
To achieve the above object, an embodiment of the present application provides a chopper amplifier circuit including: a first-stage chopper, a first-stage amplifier, a second-stage chopper and a second-stage amplifier which are sequentially connected along the input end to the output end of the chopper amplifier circuit; and a feedback loop, which is arranged between the output end of the first-stage amplifier and the signal compensation end, and is configured to filter offset voltage and 1/f noise in the output signal of the first-stage amplifier, and feed back the filtered signal to the signal compensation end of the first-stage amplifier.
Optionally, the feedback loop comprises: the input end of the integrator is connected with the output end of the first-stage amplifier and is configured to integrate offset voltage and 1/f noise in the output signal of the first-stage amplifier so as to obtain a first compensation signal; and the input end of the first filter is connected with the output end of the integrator, the output end of the first filter is connected with the signal compensation end of the first-stage amplifier and is configured to filter clutter except the offset voltage and the 1/f noise in the first compensation signal so as to obtain a second compensation signal which is fed back to the signal compensation end of the first-stage amplifier.
Optionally, the integrator employs an active integrator or a switched capacitor integration circuit.
Optionally, when the integrator employs a switched capacitor integration circuit, the switched capacitor integration circuit includes: the switching capacitor unit, the offset storage unit and the first transconductance amplifier unit are sequentially connected from the input end to the output end of the switching capacitor integrating circuit; and a feedback structure formed between the output of the first transconductance amplifier unit and the input and output of the offset memory unit.
Optionally, the switched capacitor unit includes: a capacitor C1a and a capacitor C3a which are sequentially connected with the positive input end of the switch capacitor integration circuit in series, and a capacitor C2a, one end of which is connected with a connection point between the capacitor C1a and the capacitor C3a, and the other end of which is connected with a circuit common mode potential; a capacitor C1b and a capacitor C3b which are sequentially connected with the negative input end of the switch capacitor integration circuit in series, and a capacitor C2b, one end of which is connected with a connection point between the capacitor C1b and the capacitor C3b, and the other end of which is connected with a circuit common mode potential; and a plurality of clock switches for controlling signal conduction between the capacitor C1a, the capacitor C2a, the capacitor C3a, the capacitor C1b, the capacitor C2b, the capacitor C3b and their associated connections.
Optionally, the offset storage unit includes a capacitor C4a and a capacitor C4b, whose input ends are respectively connected to the positive and negative output ends of the switched capacitor unit, and whose output ends are respectively connected to the positive and negative input ends of the first transconductance amplifier unit.
Optionally, the feedback structure includes: a capacitor C5a disposed between the negative output terminal of the first transconductance amplifier unit and the positive input terminal and the positive output terminal of the offset storage unit; a capacitor C5b disposed between the positive output terminal of the first transconductance amplifier unit and the negative input terminal and the negative output terminal of the offset memory unit; and a plurality of clock switches for controlling signal conduction between the capacitor C5a, the capacitor C5b and their associated connections.
Optionally, the first filter includes: the positive and negative input ends of the second transconductance amplifier unit are respectively connected with the positive and negative output ends of the integrator, and the negative and positive output ends of the second transconductance amplifier unit are respectively connected with the positive and negative input ends of the third transconductance amplifier unit Gm 5; the topological structure is connected with the positive input end through the negative output end of the third transconductance amplifier unit Gm5, the positive output end is formed by the negative input end, and the output end of the third transconductance amplifier unit Gm5 is the output end of the first filter and is connected to the signal compensation end of the first-stage amplifier; and the filtering structure is formed by a capacitor with one end connected with the output end of the third transconductance amplifier unit Gm5 and the other end grounded.
Optionally, the chopper amplifier circuit further includes a second filter, an input terminal of which is connected to an output terminal of the second stage amplifier, and an output terminal of which is an output terminal of the chopper amplifier circuit. Wherein: the first-stage chopper is configured to modulate a fundamental frequency signal from an input end of the chopper amplifier circuit into a high-frequency signal; the first-stage amplifier is configured to amplify the high-frequency signal modulated by the first-stage chopper; the second-stage chopper is configured to modulate the high-frequency signal amplified by the first-stage amplifier back to a fundamental frequency signal; the second-stage amplifier is configured to amplify the fundamental frequency signal modulated by the second-stage chopper; and the second filter is configured to filter out high-frequency ripples in the output signal of the second-stage amplifier.
The embodiment of the application also provides equipment comprising any chopper amplifier circuit.
Through the technical scheme, the embodiment of the application is provided with the feedback loop behind the first-stage amplifier so as to inhibit offset voltage and 1/f noise in the output signal of the first-stage amplifier and improve the offset, 1/f noise, output ripple and other performances of the chopper amplifier.
Additional features and advantages of embodiments of the application will be set forth in the detailed description which follows.
Drawings
The accompanying drawings are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain, without limitation, the embodiments of the application. In the drawings:
FIG. 1 is a schematic diagram of a chopper amplifier circuit according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a switched capacitor integration circuit employed by an example of an embodiment of the present application;
FIG. 3 is a circuit schematic of a first filter employed by an example of an embodiment of the present application; and
fig. 4 is a diagram of a simulation effect of an exemplary chopper amplifier circuit employing an embodiment of the present application.
Description of the reference numerals
100. A first stage chopper; 200. a first stage amplifier; 300. a second stage chopper; 400. a second stage amplifier; 500. a feedback loop; 600. a second filter;
510. an integrator; 520. a first filter;
511. a switched capacitor unit; 512. an offset storage unit; 513. a first transconductance amplifier unit; 521. a second transconductance amplifier unit; 522. a topology; 523. filtering structure
Detailed Description
The following describes the detailed implementation of the embodiments of the present application with reference to the drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the application, are not intended to limit the application.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "connected," "connected," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; either directly or indirectly via an intermediate medium, or in communication with each other or in interaction with each other. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.
Fig. 1 is a schematic diagram of a chopper amplifier circuit according to an embodiment of the present application, the chopper amplifier circuit including: a first-stage chopper 100, a first-stage amplifier 200, a second-stage chopper 300, and a second-stage amplifier 400 connected in this order along an input terminal Vin to an output terminal Vout of the chopper amplifier circuit; and a feedback loop 500, disposed between the output terminal of the first stage amplifier 200 and the signal compensation terminal, configured to filter offset voltage and 1/f noise in the output signal of the first stage amplifier 200, and to feed back the filtered signal to the signal compensation terminal of the first stage amplifier 200.
The embodiment of the application suppresses the offset voltage and 1/f noise output by the first-stage amplifier 200 by arranging the feedback loop 500, and improves the offset, 1/f noise, output ripple and other performances of the whole chopper amplifier circuit.
In a preferred embodiment, the chopper amplifier circuit further comprises a second filter 600, the input of which is connected to the output of the second stage amplifier 400, the output being the output of the chopper amplifier circuit.
Accordingly, in one example low offset chopper amplifier, the functions of the individual constituent circuits of the chopper amplifier circuit of fig. 1 are configured as follows:
1) The first stage chopper 100 is configured to modulate a fundamental frequency signal from an input terminal Vin of the chopper amplifier circuit into a high frequency signal.
2) The first stage amplifier 200 is configured to amplify the high frequency signal modulated by the first stage chopper 100.
3) The second stage chopper 300 is configured to modulate the high frequency signal amplified by the first stage amplifier 200 back to a fundamental frequency signal.
4) The second stage amplifier 400 is configured to amplify the fundamental frequency signal modulated by the second stage chopper 300.
5) The feedback loop 500 is configured to filter the offset voltage and 1/f noise in the output signal of the first stage amplifier 200, and feedback the filtered signal to the signal compensation terminal of the first stage amplifier 200.
6) The second filter 600 is configured to filter out high frequency ripple in the output signal of the second stage amplifier 400.
In this example, the feedback loop 500 includes: an integrator 510, the input end of which is connected to the output end of the first stage amplifier 200 and configured to integrate the offset voltage and 1/f noise in the output signal of the first stage amplifier 200 to obtain a first compensation signal; and a first filter 520, an input end of which is connected to an output end of the integrator 510, an output end of which is connected to the signal compensation end of the first stage amplifier 200, and configured to filter noise waves except the offset voltage and the 1/f noise in the first compensation signal, so as to obtain a second compensation signal fed back to the signal compensation end of the first stage amplifier 200.
Here, the feedback loop formed by the integrator 510 and the first filter 520 is easier to implement in a circuit, and a resistor, a capacitor, an inductor, or the like with a large area is not required.
Further, in this example, both the first stage chopper 100 and the second stage chopper 300 may be implemented with MOS transistor switches; the first-stage amplifier 200 and the second-stage amplifier 400 are transconductance amplifiers, which are respectively denoted as Gm1 and Gm2, and can flexibly configure gain and bandwidth according to other performance requirements of the circuit; the integrator 510 may be implemented by an active integrator or a switched capacitor integrating circuit; the first filter 520 and the second filter 600 may be implemented using active or passive filter structures.
Accordingly, the workflow of the low offset chopper amplifier of this example is:
in a first step, the input signal Vin passes through a first stage chopper 100, and the frequency is modulated to a high frequency.
Second, the output signal of the first-stage chopper 100 enters the first-stage amplifier 200 to obtain an amplified useful signal; signals such as offset voltage and 1/f noise of the first-stage amplifier 200 enter the integrator 510 and the first filter 520 in sequence, are processed by the integrator 510 and the first filter 520, and then compensate the first-stage amplifier 200.
In a third step, the output signal of the first stage amplifier 200 is passed through a second stage chopper 300, the frequency being modulated back to the fundamental frequency.
Fourth, the output signal of the second stage chopper 300 enters the second stage amplifier 400, and the useful signal is further amplified.
In the fifth step, the output signal of the second stage amplifier 400 enters the second filter 600, and the high-frequency ripple interference in the useful signal is filtered out to become the output signal Vout.
Fig. 2 is a schematic diagram of a switched capacitor integration circuit employed as an example of an embodiment of the application. As shown in fig. 2, the switched capacitor integration circuit includes: a switched capacitor unit 511, an offset storage unit 512 and a first transconductance amplifier unit 513 (denoted Gm3, which is a high gain amplifier) connected in this order along the input to the output of the switched capacitor integrating circuit; and a feedback structure formed between the output terminal of the first transconductance amplifier unit 513 and the input and output terminals of the offset storage unit 512.
Wherein the switched capacitor unit 511 (which may also be referred to as a T-Cell unit) includes: a capacitor C1a and a capacitor C3a which are sequentially connected with the positive input end of the switch capacitor integration circuit in series, and a capacitor C2a, one end of which is connected with a connection point between the capacitor C1a and the capacitor C3a, and the other end of which is connected with a circuit common mode potential Vcm; a capacitor C1b and a capacitor C3b which are sequentially connected with the negative input end of the switch capacitor integration circuit in series, and a capacitor C2b, one end of which is connected with a connection point between the capacitor C1b and the capacitor C3b, and the other end of which is connected with a circuit common mode potential Vcm; and a plurality of clock switches for controlling signal conduction between the capacitor C1a, the capacitor C2a, the capacitor C3a, the capacitor C1b, the capacitor C2b, the capacitor C3b and their associated connections.
The plurality of clock switches are, for example, the plurality of switches controlled by the clock phase phi 1 or phi 2 shown in fig. 2.
The offset storage unit 512 includes a capacitor C4a and a capacitor C4b, which have input terminals connected to the positive and negative output terminals of the switched capacitor unit 511, respectively, and output terminals connected to the positive and negative input terminals of the first transconductance amplifier unit 513, respectively.
Wherein the feedback structure comprises: a capacitor C5a provided between the negative output terminal of the first transconductance amplifier unit 513 and the positive input terminal and the positive output terminal of the offset storage unit 512; a capacitor C5b provided between the positive output terminal of the first transconductance amplifier unit 513 and the negative input terminal and negative output terminal of the offset storage unit 512; and a plurality of clock switches for controlling signal conduction between the capacitor C5a, the capacitor C5b and their associated connections. Wherein the first transconductance amplifier unit 513 may be denoted Gm3; the plurality of clock switches includes switches controlled by clock phases phi 1 or phi 2, respectively, and directed to the input and output of the offset memory unit 512, respectively.
For the integrator of fig. 2, the switched capacitor unit 511 operates under the control of clocks phi 1 and phi 2, representing an extra large resistance. Meanwhile, the first transconductance amplifier unit 513, in cooperation with the feedback capacitances C5a and C5b, behaves as an integrator of an excessively large time constant. In addition, the offset storage unit 512 is configured to reduce the input offset voltage of the first transconductance amplifier unit 513 under the phase control of the clocks phi 1 and phi 2, so as to improve the circuit accuracy.
Fig. 3 is a circuit schematic of a first filter employed as an example of an embodiment of the present application, employing a Gm-C filter structure. As shown in fig. 3, the first filter 520 includes: a second transconductance amplifier unit 521 (denoted as Gm 4) having positive and negative input terminals respectively connected to the positive and negative output terminals of the integrator 510, and negative and positive output terminals respectively connected to the positive and negative input terminals of the third transconductance amplifier unit Gm 5; a topology 522, which is connected to the positive input terminal through the negative output terminal of the third transconductance amplifier unit Gm5, and the positive output terminal is formed with the negative input terminal, and the output terminal of the third transconductance amplifier unit Gm5 is the output terminal of the first filter 520 and is connected to the signal compensation terminal of the first stage amplifier 200; and a filter structure 523 formed by a capacitor having one end connected to the output end of the third transconductance amplifier unit Gm5 and the other end grounded.
For the first filter of fig. 3, where the second transconductance amplifier unit 52 converts the input voltage to current, which behaves as a transconductance amplifier; and the output of the second transconductance amplifier unit 521 is connected to another topology 522 formed by direct feedback connection of the input and output of the third transconductance amplifier unit Gm5, which is represented as a resistor. Meanwhile, the whole circuit of the first filter can realize the function of low-pass filtering by matching with two or more capacitors connected to the ground in parallel.
Fig. 4 is a simulated effect diagram of an exemplary chopper amplifier circuit employing an embodiment of the present application, showing integrator 510 and first filter 520 passing loop feedback to produce a high pass corner frequency for the transfer function of the output of first stage amplifier 200. Accordingly, the first stage amplifier 200 behaves as: the useful signal modulated to a high frequency can be amplified normally at an intermediate frequency gain, while the low frequency signal is suppressed at a low gain. Thus, in this example, the integrator 510 and the first filter 520 are effective to suppress offset voltages and 1/f noise at frequencies below the high pass corner frequency, thereby improving low frequency spurs in the output of the first stage amplifier 200 and thereby reducing high frequency ripple in the output of the overall chopper amplifier circuit.
In summary, by simulation of an example chopper amplifier circuit, it is shown that the chopper amplifier circuit of the embodiment of the present application has the following advantages.
1) According to the embodiment of the application, the feedback loop is arranged behind the first-stage amplifier to inhibit offset voltage and 1/f noise in the output signal of the first-stage amplifier, so that the offset, 1/f noise, output ripple and other performances of the chopper amplifier are improved.
2) In the embodiment of the application, the loop structure formed by the first-stage amplifier, the integrator and the first filter is easier to realize in a circuit, and a resistor, a capacitor or an inductor with a large area is not needed.
3) The embodiment of the application has no too high requirements on the chopping frequencies of the first-stage chopper and the second-stage chopper, so that the circuit can be applied to a wider frequency range.
4) The integrator provided by the embodiment of the application adopts a switched capacitor structure, and realizes the integration of an ultra-large time constant. In the integrator, the switched capacitor unit helps to reduce the circuit area, and the offset storage unit helps to reduce the offset of the integrator and the filter loop.
5) The first filter of the embodiment of the application adopts a Gm-C structure, and adopts the second transconductance amplifier unit 521 and a topological structure formed by direct feedback of the input and the output of the third transconductance amplifier unit, thereby reducing the circuit area and facilitating the integration.
6) The integrator and the first filter 1 in the embodiment of the application adopt a capacitance ratio or transconductance ratio mode to realize cut-off frequency, and reduce the sensitivity of the circuit along with process fluctuation.
The embodiment of the application also provides equipment comprising any chopper amplifier circuit. The device is for example a sensor, a bioelectronic device, a detection meter or the like, and the chopper amplifier circuit is for example used as an interface circuit of these devices.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises an element.
The foregoing is merely exemplary of the present application and is not intended to limit the present application. Various modifications and variations of the present application will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. which come within the spirit and principles of the application are to be included in the scope of the claims of the present application.
Claims (10)
1. A chopper amplifier circuit, comprising:
a first-stage chopper (100), a first-stage amplifier (200), a second-stage chopper (300) and a second-stage amplifier (400) which are sequentially connected along the input end to the output end of the chopper amplifier circuit; and
and a feedback loop (500) disposed between the output end of the first-stage amplifier (200) and the signal compensation end, and configured to filter offset voltage and 1/f noise in the output signal of the first-stage amplifier (200), and to feed back the filtered signal to the signal compensation end of the first-stage amplifier (200).
2. Chopper amplifier circuit according to claim 1, characterized in that the feedback loop (500) comprises:
an integrator (510) having an input connected to the output of the first stage amplifier (200) and configured to integrate the offset voltage and 1/f noise in the output signal of the first stage amplifier (200) to obtain a first compensation signal; and
-a first filter (520) having an input connected to the output of the integrator (510), and an output connected to the signal compensation terminal of the first stage amplifier (200), configured to filter noise except for the offset voltage and the 1/f noise in the first compensation signal, so as to obtain a second compensation signal fed back to the signal compensation terminal of the first stage amplifier (200).
3. Chopper amplifier circuit according to claim 2, characterized in that the integrator (510) employs an active integrator or a switched capacitor integrating circuit.
4. A chopper amplifier circuit according to claim 3, wherein when the integrator employs a switched-capacitor integrating circuit, the switched-capacitor integrating circuit comprises:
a switched capacitor unit (511), an offset storage unit (512) and a first transconductance amplifier unit (513) which are sequentially connected along the input end to the output end of the switched capacitor integrating circuit; and
and a feedback structure formed between an output terminal of the first transconductance amplifier unit (513) and input and output terminals of the offset storage unit (512).
5. The chopper amplifier circuit according to claim 4, wherein the switched capacitor unit (511) comprises:
a capacitor C1a and a capacitor C3a which are sequentially connected with the positive input end of the switch capacitor integration circuit in series, and a capacitor C2a, one end of which is connected with a connection point between the capacitor C1a and the capacitor C3a, and the other end of which is connected with a circuit common mode potential;
a capacitor C1b and a capacitor C3b which are sequentially connected with the negative input end of the switch capacitor integration circuit in series, and a capacitor C2b, one end of which is connected with a connection point between the capacitor C1b and the capacitor C3b, and the other end of which is connected with a circuit common mode potential; and
a plurality of clock switches for controlling signal conduction between the capacitor C1a, the capacitor C2a, the capacitor C3a, the capacitor C1b, the capacitor C2b, the capacitor C3b and their associated connections.
6. The chopper amplifier circuit according to claim 4, wherein the offset storage unit (512) includes a capacitor C4a and a capacitor C4b having input terminals connected to the positive and negative output terminals of the switched capacitor unit (511), respectively, and output terminals connected to the positive and negative input terminals of the first transconductance amplifier unit (513), respectively.
7. The chopper amplifier circuit of claim 4, wherein the feedback structure comprises:
a capacitance C5a provided between the negative output terminal of the first transconductance amplifier unit (513) and the positive input terminal and the positive output terminal of the offset storage unit (512);
a capacitance C5b provided between the positive output terminal of the first transconductance amplifier unit (513) and the negative input terminal and negative output terminal of the offset storage unit (512); and
a plurality of clock switches for controlling signal conduction between the capacitor C5a, the capacitor C5b and their associated connections.
8. The chopper amplifier circuit of claim 2, wherein the first filter (520) comprises:
the positive and negative input ends of the second transconductance amplifier unit (521) are respectively connected with the positive and negative output ends of the integrator (510), and the negative and positive output ends of the second transconductance amplifier unit are respectively connected with the positive and negative input ends of the third transconductance amplifier unit Gm 5;
a topology (522) connected to a positive input terminal through a negative output terminal of the third transconductance amplifier unit Gm5, wherein a positive output terminal and a negative input terminal are formed, and an output terminal of the third transconductance amplifier unit Gm5 is an output terminal of the first filter (520) and is connected to the signal compensation terminal of the first stage amplifier (200); and
and a filter structure (523) formed by a capacitor having one end connected to the output end of the third transconductance amplifier unit Gm5 and the other end grounded.
9. Chopper amplifier circuit according to any of claims 1-8, characterized in that it further comprises a second filter (600) with an input connected to the output of the second stage amplifier (400), the output being the output of the chopper amplifier circuit;
wherein:
-the first stage chopper (100) configured to modulate a fundamental frequency signal from an input of the chopper amplifier circuit into a high frequency signal;
-the first stage amplifier (200) configured to amplify a high frequency signal modulated by the first stage chopper (100);
-the second stage chopper (300) configured to modulate the high frequency signal amplified by the first stage amplifier (200) back to a fundamental frequency signal;
-the second stage amplifier (400) configured to amplify the fundamental frequency signal modulated by the second stage chopper (300); and
the second filter (600) is configured to filter out high frequency ripple in the output signal of the second stage amplifier (400).
10. An apparatus comprising the chopper amplifier circuit of any of claims 1-9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310610445.0A CN116827272A (en) | 2023-05-26 | 2023-05-26 | Chopper amplifier circuit and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310610445.0A CN116827272A (en) | 2023-05-26 | 2023-05-26 | Chopper amplifier circuit and device |
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| Publication Number | Publication Date |
|---|---|
| CN116827272A true CN116827272A (en) | 2023-09-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202310610445.0A Pending CN116827272A (en) | 2023-05-26 | 2023-05-26 | Chopper amplifier circuit and device |
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| CN (1) | CN116827272A (en) |
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- 2023-05-26 CN CN202310610445.0A patent/CN116827272A/en active Pending
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