CN116827100A

CN116827100A - Power converter, control method thereof, system thereof, electrical equipment and medium

Info

Publication number: CN116827100A
Application number: CN202210280074.XA
Authority: CN
Inventors: 王重; 周爱弟; 李奇
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2022-03-21
Filing date: 2022-03-21
Publication date: 2023-09-29

Abstract

The application provides a power converter, a control method thereof, a system thereof, electrical equipment and a medium. In order to realize the hardware current limiting link, a current limiting circuit needs to be added in the power converter, the current limiting circuit comprises a switch and a resistor which are positioned between an input end and an output end and are connected in parallel, the input end of the current limiting circuit is coupled with a mains input power supply, and the output end of the current limiting circuit is coupled with the input end of the rectifying circuit. After the power converter is electrified, the current limiting circuit is subjected to parameter initialization, so that a switch in the current limiting circuit is disconnected, alternating current input by a mains supply input power supply is required to be connected into the rectifying circuit after being divided by a resistor in the current limiting circuit, and the condition that the charging current is started in a hardware current limiting link is ensured not to be overcurrent is avoided. When the hardware current limiting link is completed, a switch in the current limiting circuit can be closed, so that alternating current input by a mains input power supply is directly connected into the rectifying circuit.

Description

Power converter, control method thereof, system thereof, electrical equipment and medium

Technical Field

The application relates to the technical field of electrical appliance control, in particular to a power converter, a control method thereof, a system thereof, electrical equipment and a medium.

Background

People are increasingly conscious of energy conservation and energy utilization improvement. With the rapid development of society, people are increasingly using electric appliances such as refrigerators, air conditioners, washing machines and the like, and most of the electric appliances need to convert alternating current into direct current, an uncontrollable diode rectifying circuit is generally used for realizing alternating current/direct current (AC/DC) conversion, and the circuit comprises a full-bridge rectifying nonlinear device and a capacitive reactive device, so that the harmonic content and reactive power of a power grid current can be increased.

In order to reduce the harmonic content of the grid current and increase the grid power factor, a power factor correction (power factor correction, PFC) circuit is required. When the PFC circuit is started, the charging current of the rectifying capacitor is several times larger than the rated current, in order to limit the charging current of the rectifying capacitor, soft start boosting is generally adopted to realize current limiting, but the power of a load is different, and the effect of charging and current limiting of the rectifying capacitor is also different. Along with load fluctuation, the charging current of the rectifying capacitor also flows excessively, and the problem of charging overcurrent during starting of the PFC circuit cannot be fundamentally solved.

Disclosure of Invention

In view of the above, the present application provides a power converter, a control method thereof, a system thereof, an electrical apparatus and a medium, which can solve the problem of charging overcurrent when the PFC circuit is started.

In a first aspect, the present application provides a control method for a power converter, before driving a power factor correction circuit to work, a new charging current limiting strategy of a rectifying capacitor is provided, and by combining hardware current limiting and software boosting, the starting charging current of the rectifying capacitor can be ensured to be within an allowable range, and the service life of the power converter is prolonged. Specifically, the control method of the power converter provided by the embodiment of the application generally comprises three processes: the system comprises an analog sampling stage, a starting stage and a driving stage, wherein the starting stage comprises a hardware current limiting link and a software boosting link. In order to realize the hardware current limiting link, a current limiting circuit needs to be added in the power converter, the current limiting circuit comprises a switch and a resistor, wherein the switch and the resistor are positioned between an input end and an output end and are connected in parallel, when the power converter is electrified, the initial state of the switch is in an off state, the input end of the current limiting circuit is coupled with a mains input power supply, and the output end of the current limiting circuit is coupled with the input end of the rectifying circuit. The resistor can be a heating resistor, the larger the current passing through the heating resistor is, the larger the resistance value of the resistor is, and the resistor can play a role in voltage division and current limiting, so that the power factor correction circuit is slowly boosted. After the power converter is electrified, the current limiting circuit can be initialized to enable a switch in the current limiting circuit to be in an off state, alternating current input by a mains input power supply is required to be connected into the rectifying circuit after being divided by a resistor in the current limiting circuit, and the situation that the charging current is started in a hardware current limiting link and overcurrent is avoided is ensured. When the hardware current limiting link is completed, a switch in the current limiting circuit can be closed (conducted), so that alternating current input by a mains input power supply is directly connected into the rectifying circuit. After the hardware current limiting link is completed, only partial capacitor current charging work is completed, the actual output voltage of the power converter does not reach the target voltage yet, the software boosting link is subsequently entered, the subsequent capacitor current charging work is performed through a specific boosting strategy, the actual output voltage reaches the target voltage, and the software boosting stage is completed to enter the subsequent driving stage.

The control method of the power converter provided by the embodiment of the application specifically comprises the following steps: when the first sampling value of the input current and the first sampling value of the output voltage of the power factor correction circuit are determined to meet the set condition, the control switch is in a closed state, and a hardware current limiting link is completed; and determining a pulse width modulation (pulse width modulation, PWM) signal based on a second sampling value of the input current, a second sampling value of the input voltage and a second sampling value of the output voltage of the power factor correction circuit obtained after the switch is in a closed state and a reference voltage value set by the output voltage, and driving the power factor correction circuit to perform boosting operation by adopting the PWM signal so that the output voltage of the power factor correction circuit reaches a set target voltage value, thereby completing a software boosting link.

In some possible implementations, after the power converter is powered on, that is, when the initial state of the switch is an off state, the input current and the output voltage of the pfc circuit may be sampled, respectively, to obtain a first sampled value of the input current and a first sampled value of the output voltage. The analog sampling process can be completed through the sampling control circuit, the sampling control circuit can sample the BUS voltage, namely the output voltage BUS_V of the power factor correction circuit, and the output voltage BUS_Vo1 is obtained by amplifying KVo times and then performing analog-to-digital conversion. The sampling control circuit can also sample the inductance current, namely the input current PFC_I of the power factor correction circuit, amplify KiL times and then perform analog-to-digital conversion to obtain a first sampling value PFC_iL1 of the input current.

Thereafter, when it is determined that the first sampling value bus_vo1 of the output voltage is not less than the set voltage threshold Va, the set voltage threshold Va may be set to: 200 V.ltoreq.Va.ltoreq.310V, and/or, when it is determined that the first sampling value PFC_iL1 of the input current is not greater than the set current threshold Ia, the set current threshold Ia may be set to 0.ltoreq.Ia.ltoreq.16A, and acquisition of the count value is started. For example, the count value may be acquired by setting the voltage threshold Va and the current threshold Ia to be satisfied at the same time, or the count value may be acquired by setting the voltage threshold Va and the current threshold Ia to be satisfied alternatively. Then, when it is determined that the acquired count value km_timer is not smaller than the set duration threshold Ta, the set duration threshold may be set to: ta is more than or equal to 0 and less than or equal to 10s, and the control switch is in a closed state.

In some possible implementations, before making the determination, it is also determined whether the power converter satisfies a set start-up enabling condition; when the start-up enabling condition is satisfied, the above-described determination is started.

In some possible implementations, the launch enable condition may include: whether the load power coupled by the power factor correction circuit reaches a set power threshold value or not is judged to judge whether the power factor correction circuit is coupled with a load or not, or whether a starting signal of the power factor correction circuit is received or not, namely, a user can manually control the starting of the power converter.

In some possible implementations, the complete process of the hardware current limiting link provided by the application may include: firstly, after a power converter is electrified, initializing parameters of a current limiting circuit; then, judging whether the power converter meets a set starting enabling condition or not; when the starting enabling condition is not met, waiting for judgment all the time; when the starting enabling condition is met, acquiring a first sampling value BUS_Vo1 of the output voltage; then, determining whether the first sampling value bus_vo1 of the output voltage is not less than a set voltage threshold Va, that is, determining whether bus_vo1 is greater than or equal to Va is satisfied, the set voltage threshold Va may be set as: va is more than or equal to 200V and less than or equal to 310V; when the first sampling value of the output voltage is determined to be larger than a set voltage threshold value, re-acquiring the sampling value BUS_Vo1 of the output voltage until the sampling value BUS_Vo1 of the output voltage is determined to be not smaller than the set voltage threshold value Va; when the first sampling value of the output voltage is not smaller than the set voltage threshold value, acquiring a first sampling value PFC_iL1 of the input current; then, determining whether the first sampling value PFC_iL1 of the input current is not larger than a set current threshold value Ia, namely judging whether PFC_iL1 is smaller than or equal to Ia, wherein the set current threshold value Ia can be set to be larger than or equal to 0 and smaller than or equal to 16A; when the first sampling value of the input current is determined to be larger than the set current threshold value, the first sampling value BUS_Vo1 of the output voltage is obtained again until the first sampling value PFC_iL of the input current is determined to be larger than the set current threshold value Ia; when the first sampling value of the input current is not larger than the set current threshold value, the counting value KM_timer is acquired, for example, the counting function of a Timer can be utilized to start the Timer to count, the counting value is acquired, or the Timer starts to count when being electrified, then the counting value of the current Timer is acquired as an initial value, and the initial value is subtracted from the counting value acquired later to obtain the finally acquired counting value; finally, determining whether the acquired count value KM_Timer is not smaller than a set duration threshold value Ta, namely judging whether the count value KM_Timer is not smaller than Ta, wherein the set duration threshold value can be set as follows: ta is more than or equal to 0 and less than or equal to 10s; when the acquired count value is determined to be smaller than the set duration threshold value, the count value is acquired again; and when the acquired count value is not larger than the set duration threshold value, the control switch is in a closed state. The hardware current limiting link can be completed through the process, the starting charging current of the rectifying capacitor is ensured to be within the allowable range, and the service life of the power converter is prolonged.

In some possible implementation manners, in the control method provided by the application, only partial capacitor current charging work is completed after the hardware current limiting link is completed, the actual output voltage of the power converter does not reach the target voltage yet, and the software boosting link is entered later, and the charging process still exists in the boosting process. The alternating current of the mains input power supply is changed into a steamed bread waveform after being rectified by the rectifying circuit, namely the steamed bread waveform is the input voltage of the power factor correction circuit, after hardware current limiting is completed, the output voltage of the power factor correction circuit is V1, and the target voltage is Vref. The software boosting operation can be performed specifically through two schemes, wherein the first scheme is to ensure that the charging current of the rectifying capacitor cannot overflow under the condition that the difference between the output voltage V1 and the target voltage Vref is smaller, and the reference voltage value set by the output voltage of the power factor correction circuit is directly set as the target voltage value Vref required to be reached by the output voltage of the power factor correction circuit at the moment T1 (T1 > Ta), so that the boosting function is realized, and the software boosting operation of the power converter is completed. In the second scheme, if the difference between the output voltage V1 and the target voltage Vref is large and the reference voltage is directly set to the final target voltage at time T1, the problem of overcurrent of the charging current occurs, the reference voltage of the output voltage may be divided into at least two segments by adopting a segment boosting manner, the reference voltage is set to an incremental value in segments and finally set to the target voltage Vref, so as to complete the software boosting operation of the power converter. Specifically, the reference voltage value is set to be divided into n (n=2, 3, … …) segments according to actual conditions, for example, the reference voltage value can be divided into three segments, and at the time T1, the reference voltage is set to be a first voltage value V2 (V1 < V2); at the time of T2 (T1 < T2), setting the reference voltage as a second voltage value V3 (V2 < V3); at the time of T3 (T2 < T3), setting the reference voltage as the final target voltage value Vref (V3 < Vref), thereby realizing the boosting function, simultaneously avoiding the overcurrent of the charging current and prolonging the service life of the rectifying capacitor.

In some possible implementation manners, in the control method provided by the application, in a software boosting link and a subsequent driving stage, the current tracking input power grid voltage waveform can be regulated in a double-loop modulation mode, so that the input current waveform can well track the change of the input voltage waveform, PWM signals for driving a power factor correction circuit are generated, the power factor correction is realized, the power factor of the power grid is improved, and the current harmonic content of the power grid is reduced. Specifically, the pulse width modulation PWM signal is determined based on a second sampling value of an input current, a second sampling value of an input voltage, a second sampling value of an output voltage, and a reference voltage value set by the output voltage of the power factor correction circuit, which are obtained after the switch is in a closed state, and the method specifically may be implemented by: firstly, calculating a first difference value between a second sampling value of the output voltage and a reference voltage value; then, carrying out voltage loop modulation on the first difference value to obtain an output value; then, multiplying the output value by the value obtained by data conversion of the second sampling value of the input voltage to obtain a reference current value; then, calculating a second difference value between the reference current value and a second sampling value of the input current; then, carrying out current loop modulation on the second difference value to obtain a PWM signal duty ratio; and finally, carrying out pulse modulation on the duty ratio of the PWM signal to obtain the PWM signal. Specifically, as the working frequency of the switching tube in the power factor correction circuit is lower, the inductance value of the required inductor is larger, and when the working frequency of the switching tube in the power factor correction circuit is not fixed, in order to meet all possible working frequencies, the inductance value of the inductor is required to be selected according to the minimum value of the working frequency, so that the inductance value and the volume of the selected inductor are larger, and the cost of the inductor is increased. The double-loop control adopted by the application can fix the switching frequency of a switching tube in the power factor correction circuit, the inductance value of the inductor is determined by the current inner loop module, and the inductor with smaller inductance value can be selected by fixing the high-frequency switching frequency, for example, the frequency is selected to be more than 40kHz, so that the volume of the inductor is reduced, and the inductance cost is reduced.

Since accurate sampling of the inductor current is required for implementing the power factor correction, the method in the prior art triggers sampling at the counting zero point or the cycle point of one PWM cycle, but the trigger switch signals at the trigger points are relatively more, and external electromagnetic signal interference is increased. In the control method provided by the application, a new set of sampling strategies can be set when the second sampling value of the input current, the second sampling value of the input voltage and the second sampling value of the output voltage of the power factor correction circuit are obtained based on the fact that the switch is in a closed state, and fixed point (namely non-zero point and periodic point) sampling in a half-wave period is adopted, so that the trigger sampling at the switching time point between the on and off of the switching tube can be avoided, the fixed point sampling is omitted, the calculation of the duty ratio of the PWM signal is omitted to determine the trigger sampling, and the control period time is shortened.

Specifically, the mains voltage input by the mains input power supply is generally 50Hz alternating voltage, and the mains voltage is converted into 100Hz steamed bread waveform after being rectified by the rectifying circuit. In a half-wave period of an output waveform (namely a steamed bread waveform) of the rectifying circuit, when the steamed bread waveform voltage is low, the PWM signal duty ratio is large, and when the steamed bread waveform voltage is large, the PWM signal duty ratio is small.

In some possible implementations, the sampling strategy provided by the present application may be: in a half-wave period of an output waveform of the rectifying circuit, when the angle is smaller than 30 degrees (and a certain angle nearby) or larger than 150 degrees (and a certain angle nearby), the duty ratio of the PWM signal is larger than 0.5, the sampling can be triggered at 0.3+/-0.1 times of one PWM period, namely, the sampling can be triggered at any fixed position between 0.2 times and 0.4 times, for example, the sampling can be triggered at 0.2 times, 0.3 times or 0.4 times. In a half-wave period of an output waveform of the rectifying circuit, when the angle is larger than 30 degrees or smaller than 150 degrees, the PWM signal duty ratio is smaller than 0.5, so that sampling can be triggered at 0.7+/-0.1 time of the PWM period, namely, sampling can be triggered at any fixed position between 0.6 time and 0.8 time, for example, 0.6 time, 0.7 time or 0.8 time, accurate sampling in the whole half-wave period is realized, control accuracy caused by sampling errors due to harmonic waves is reduced, the output power factor is improved, and the current harmonic content is reduced.

In summary, the control method of the power converter provided by the application provides a new charging current limiting strategy of the rectifying capacitor, and the combination of hardware current limiting and software voltage boosting can ensure that the starting charging current of the rectifying capacitor is within an allowable range, so that the service life of the power converter is prolonged. After hardware current limiting is completed, the current tracking input power grid voltage waveform can be regulated in a double-loop modulation mode, so that the input current waveform can well track the input voltage waveform change, PWM signals for driving the power factor correction circuit are generated, power factor correction is realized, the power factor of the power grid is improved, and the current harmonic content of the power grid is reduced. And the double-loop control can fix the switching frequency of a switching tube in the power factor correction circuit, and the inductor with smaller inductance value can be selected by fixing the high-frequency switching frequency, so that the volume of the inductor is reduced, and the cost of the inductor is reduced. And a new sampling strategy is set, and a fixed point (namely a non-zero point and a periodic point) in a half-wave period is adopted for sampling, so that the trigger sampling at a switching time point between the on and off of a switching tube can be avoided, the accurate sampling in the whole half-wave period is realized, the control accuracy brought by sampling errors due to harmonic waves is reduced, the output power factor is improved, and the current harmonic content is reduced. Moreover, fixed-point sampling also omits calculation of the duty ratio of the PWM signal to determine trigger sampling, thereby shortening the control period time.

In a second aspect, the present application further provides a power converter, which specifically may include: the input end of the current limiting circuit is used for being coupled with a mains input power supply AC, the output end of the current limiting circuit is coupled with the input end of the rectifying circuit, the output end of the rectifying circuit is coupled with the input end of the power factor correction circuit, and the output end of the power factor correction circuit is used for being coupled with a load RL. The current limiting circuit may particularly comprise a switch and a resistor located between the input and the output and connected in parallel. The resistor can be a heating resistor, the larger the current passing through the heating resistor is, the larger the resistance value of the resistor is, and the resistor can play a role in voltage division and current limiting, so that the power factor correction circuit is slowly boosted. After the power converter is electrified, the initial state of the switch is in an off state, alternating current input by a mains supply input power supply is connected into the rectifying circuit after being divided by a resistor, so that the starting charging current of the rectifying capacitor can be ensured to be in an allowable range, and the service life of the power converter is prolonged. When the first sampling value of the input current and the first sampling value of the output voltage of the power factor correction circuit are determined to meet the set condition, the switch can be controlled to be in a closed (conducting) state, so that alternating current input by a mains input power supply is directly connected into the rectifying circuit, hardware current limiting operation of the power converter is completed, and the power factor correction circuit starts to operate. When the power factor correction circuit stops operating, the switch can be directly turned off to restore the initial state. The rectifying circuit generally includes four diodes. Alternating voltage with the mains voltage of 50Hz can be converted into steamed bread waveform of 100Hz after being rectified by the rectifying circuit. The power factor correction circuit may specifically include: the filter capacitor, the boost circuit and the rectifying capacitor, the boost circuit may specifically include: inductance, diode and switching tube. The steamed bread waveform output by the rectifying circuit can be converted into direct current with a target voltage value after being boosted and converted by the power factor correction circuit.

In some possible implementations, the power converter may further include: an electromagnetic interference (electromagnetic interference, EMI) filter coupled between the mains input power source and the current limiting circuit, an input of the EMI filter being for coupling with the mains input power source, an output of the EMI filter being coupled with an input of the current limiting circuit. Electromagnetic interference generally refers to that electronic products work to cause interference to other peripheral electronic products, and an electromagnetic interference filter can filter alternating current input into a power factor correction circuit.

In a third aspect, the present application also provides a power converter system, comprising a power converter and a control circuit; the specific structure of the power converter may refer to the power converter of the second aspect, and the description will not be repeated. When it is determined that the first sampling value of the input current and the first sampling value of the output voltage of the power factor correction circuit meet the set condition (namely, meet the hardware current-limiting relieving end condition), the control circuit can control the switch to be in a closed (conducting) state, so that alternating current input by the mains input power supply is directly connected to the rectifying circuit to complete hardware current-limiting operation of the power converter, and then the control circuit can determine a PWM signal based on the second sampling value of the input current, the second sampling value of the input voltage and the second sampling value of the output voltage of the power factor correction circuit obtained after the switch is in the closed state and the set reference voltage value of the output voltage, and drive the power factor correction circuit to conduct boosting operation by adopting the PWM signal, so that the output voltage of the power factor correction circuit reaches the set target voltage value.

In some possible implementations, the control circuit may include: the sampling control circuit is respectively coupled with the switch control circuit and the drive control circuit; the sampling control circuit is used for respectively sampling the input voltage, the input current and the output voltage of the power factor correction circuit after the power converter is electrified, obtaining a first sampling value of the input current and a first sampling value of the output voltage when the switch is in an open state, and obtaining a second sampling value of the input current, a second sampling value of the input voltage and a second sampling value of the output voltage after the switch is in a closed state; the switch control circuit is used for controlling the switch to be in a closed state after the first sampling value of the input current and the first sampling value of the output voltage are determined to meet the set condition so as to finish the hardware current limiting operation of the power converter; and the driving control circuit is used for determining a PWM signal based on a second sampling value of the input current, a second sampling value of the input voltage and a second sampling value of the output voltage obtained after the switch is in a closed state and a reference voltage value set by the output voltage, and driving the power factor correction circuit to perform boosting operation by adopting the PWM signal.

In some possible implementations, the sampling control circuit may specifically include an input voltage sampling module, an output voltage sampling module, and an input current sampling module.

The input voltage sampling module is provided with an input voltage sampling value output end, and the input voltage sampling value output end is used for outputting a second sampling value of the input voltage of the power factor correction circuit. The input voltage sampling module may specifically include: an input voltage sampling circuit, a first amplifier and a first analog-to-digital converter; the input voltage sampling circuit is coupled between the output end of the rectifying circuit and the input end of the power factor correction circuit, and can sample the rectified voltage, namely the input voltage PFC_V of the power factor correction circuit; the input end of the first amplifier is coupled with the output end of the input voltage sampling circuit, and the first amplifier can amplify the output value of the input voltage sampling circuit by KVIn times and then input the amplified output value to the first analog-to-digital converter; the input end of the first analog-to-digital converter is coupled with the output end of the first amplifier, the output end of the first analog-to-digital converter is used as an input voltage sampling value output end, and the first analog-to-digital converter can perform analog-to-digital conversion on the amplified value of the first amplifier to obtain and output a second sampling value PFC_Vin2 of the input voltage.

The output voltage sampling module is provided with an output voltage sampling value output end, and the output voltage sampling value output end is used for outputting a first sampling value or a second sampling value of the output voltage of the power factor correction circuit. The output voltage sampling module may specifically include: the output voltage sampling circuit, the second amplifier and the second analog-to-digital converter; the output voltage sampling circuit is coupled between the output end of the power factor correction circuit and the load RL, and can sample BUS voltage, namely the output voltage BUS_V of the power factor correction circuit; the input end of the second amplifier is coupled with the output end of the output voltage sampling circuit, and the second amplifier can amplify the output value of the output voltage sampling circuit by KVo times and then input the amplified output value to the second analog-to-digital converter; the input end of the second analog-to-digital converter is coupled with the output end of the second amplifier, the output end of the second analog-to-digital converter is used as an output voltage sampling value output end, and the second analog-to-digital converter can perform analog-to-digital conversion on the amplified value of the second amplifier to obtain and output a first sampling value BUS_Vo1 or a second sampling value BUS_Vo2 of the output voltage.

The input current sampling module is provided with an input current sampling value output end, and the input current sampling value output end is used for outputting a first sampling value or a second sampling value of the input current of the power factor correction circuit. The input current sampling module may specifically include: an input current sampling circuit, a third amplifier and a third analog-to-digital converter; the input current sampling circuit is coupled to two ends of an inductor L of the power factor correction circuit, and can sample the inductor current, namely an input current PFC_I of the power factor correction circuit; the input end of the third amplifier is coupled with the output end of the input current sampling circuit, and the third amplifier can amplify the output value of the input current sampling circuit by KiL times and then input the amplified output value to the third analog-to-digital converter; the input end of the third analog-to-digital converter is coupled with the output end of the third amplifier, the output end of the third analog-to-digital converter is used as an input current sampling value output end, and the third analog-to-digital converter can perform analog-to-digital conversion on the amplified value of the third amplifier to obtain and output a first sampling value PFC_iL1 or a second sampling value PFC_iL2 of the input current.

Since accurate sampling of the inductor current is required for implementing the power factor correction, the method in the prior art triggers sampling at the counting zero point or the cycle point of one PWM cycle, but the trigger switch signals at the trigger points are relatively more, and external electromagnetic signal interference is increased. In the embodiment of the application, after the switch is in the closed state, a new set of sampling strategy can be set, and the fixed point (namely, non-zero point and periodic point) sampling in the half-wave period is adopted, so that the trigger sampling at the switching time point between the on and off of the switching tube can be avoided, the fixed point sampling is omitted, the PWM signal duty ratio is calculated to determine the trigger sampling, and the control period time is shortened.

In some possible implementations, the switch control circuit may specifically include: the device comprises a voltage controller, a current controller, a timing controller and a master controller; the input end of the voltage controller is coupled with the output end of the output voltage sampling value in the sampling control circuit, and the voltage controller can determine whether the first sampling value of the acquired output voltage is not smaller than a set voltage threshold value; the input end of the current controller is coupled with the output end of an input current sampling value in the sampling control circuit, and the current controller can determine whether the first sampling value of the acquired input current is not more than a set current threshold value; the input end of the timing controller is coupled with the output end of the timer, the timing controller can start working under the control of the master controller, acquire a count value from the timer, and send a corresponding instruction to the master controller when the acquired count value is not less than a set duration threshold value; the input end of the main controller is respectively coupled with the output end of the voltage controller, the output end of the current controller and the output end of the timing controller, and the main controller can determine that the timing controller starts working when the voltage controller determines that the first sampling value of the output voltage is not smaller than the set voltage threshold value and/or when the current controller determines that the first sampling value of the input current is not larger than the set current threshold value; the master controller can also generate a control signal for controlling the switch to be closed when receiving a corresponding instruction sent by the timing controller. The switch control circuit can ensure that the starting charging current of the rectifying capacitor is in an allowable range, and the service life of the power converter is prolonged.

In some possible implementations, the drive control circuit may adopt a dual-loop control structure with a current loop as an inner loop and a voltage loop as an outer loop, and the drive control circuit may specifically include a voltage outer loop module, a current inner loop module and a PWM module. Because the lower the working frequency of the switching tube in the power factor correction circuit is, the larger the inductance value of the inductance is needed, when the working frequency of the switching tube in the power factor correction circuit is not fixed, the inductance value of the inductance is needed to be selected according to the minimum value of the working frequency in order to meet all possible working frequencies, so that the inductance value and the volume of the inductance are larger, and the cost of the inductance is increased. The double-loop control adopted by the application can fix the switching frequency of a switching tube in the power factor correction circuit, the inductance value of the inductor is determined by the current inner loop module, and the inductor with smaller inductance value can be selected by fixing the high-frequency switching frequency, for example, the frequency is selected to be more than 40kHz, so that the volume of the inductor is reduced, and the inductance cost is reduced.

The voltage outer loop module may have three signal inputs, an output voltage input for obtaining a second sample value of the output voltage of the pfc circuit, a reference voltage input for obtaining a second sample value of the input voltage of the pfc circuit, and an input voltage input for obtaining a reference voltage value set by the output voltage of the pfc circuit. The voltage outer loop module may include a first subtracter, a voltage loop modulator, a multiplier and a data converter, wherein the input end of the first subtracter is an output voltage input end and a reference voltage input end respectively, the output end of the first subtracter is coupled with the input end of the voltage loop modulator, the output end of the voltage loop modulator is coupled with one input end of the multiplier, the input end of the data converter is an input voltage input end, the output end of the data converter is coupled with the other input end of the multiplier, and the output end of the multiplier is coupled with the current inner loop module.

The current inner loop module may have an input current input for taking a second sampled value of the input current of the power factor correction circuit. The current loop module may include a second subtractor and a current loop modulator, one input of the second subtractor being coupled to the output of the multiplier, the other input of the second subtractor being an input current input, the output of the second subtractor being coupled to the input of the current loop modulator, the output of the current loop modulator being coupled to the input of the PWM module.

The PWM module may include a pulse modulator having an input coupled to an output of the current loop modulator and a drive signal generator having an output coupled to an input of the drive signal generator.

The driving control circuit works as follows:

the first subtracter calculates a first difference value between a second sampling value of the output voltage and a reference voltage value and inputs the first difference value to the voltage loop modulator, and the voltage loop modulator carries out voltage loop modulation on the first difference value to obtain an output value and inputs the output value to the multiplier; the data converter performs data conversion on a second sampling value of the input voltage and inputs the second sampling value to the multiplier, and the multiplier multiplies the output value by the value of the second sampling value of the input voltage after data conversion to obtain a reference current value and inputs the reference current value to the second subtracter; the second subtracter calculates a second difference value between the reference current value and a second sampling value of the input current and inputs the second difference value to the current loop modulator, and the current loop modulator carries out current loop modulation on the second difference value to obtain a PWM signal duty ratio and inputs the PWM signal duty ratio to the pulse modulator; the pulse modulator carries out pulse modulation on the duty ratio of the PWM signal to obtain the PWM signal and inputs the PWM signal to the driving signal generator, and the driving signal generator generates a driving signal of the power factor correction circuit according to the PWM signal, so that the input current waveform can well track the waveform change of the input voltage, and the current harmonic wave is greatly reduced, thereby achieving the purpose of improving the power factor.

In some possible implementations, only partial capacitor current charging is completed after the hardware current limiting link is completed, the actual output voltage of the power converter does not reach the target voltage yet, and the software boosting process is needed to ensure that the output voltage of the power factor correction circuit is the target voltage value. The software boosting operation can be performed specifically through two schemes, wherein the first scheme is to ensure that the charging current of the rectifying capacitor cannot overflow under the condition that the difference between the output voltage V1 and the target voltage Vref is smaller, and the reference voltage value set by the output voltage of the power factor correction circuit is directly set as the target voltage value Vref required to be reached by the output voltage of the power factor correction circuit at the moment T1 (T1 > Ta), so that the boosting function is realized, and the software boosting operation of the power converter is completed. In the second scheme, if the difference between the output voltage V1 and the target voltage Vref is large and the reference voltage is directly set to the final target voltage at time T1, the problem of overcurrent of the charging current occurs, the reference voltage of the output voltage may be divided into at least two segments by adopting a segment boosting manner, the reference voltage is set to an incremental value in segments and finally set to the target voltage Vref, so as to complete the software boosting operation of the power converter. Specifically, the reference voltage value is set to be divided into n (n=2, 3, … …) segments according to actual conditions, for example, the reference voltage value can be divided into three segments, and at the time T1, the reference voltage is set to be a first voltage value V2 (V1 < V2); at the time of T2 (T1 < T2), setting the reference voltage as a second voltage value V3 (V2 < V3); at the time of T3 (T2 < T3), setting the reference voltage as the final target voltage value Vref (V3 < Vref), thereby realizing the boosting function, simultaneously avoiding the overcurrent of the charging current and prolonging the service life of the rectifying capacitor.

In a fourth aspect, an embodiment of the present application further provides an electrical device including the power converter system of the third aspect, where the electrical device may be an electrical device such as a refrigerator, an air conditioner, a washing machine, or the like.

In a fifth aspect, embodiments of the present application provide a computer-readable storage medium storing computer instructions that, when executed by a control module, cause the control module to perform the method provided in any one of the first aspects above.

The technical effects that any one of the second aspect and the fifth aspect may be designed to achieve are referred to as the technical effects that any one of the first aspect may be designed to achieve, and detailed descriptions thereof are omitted herein. These and other aspects of the application will be more readily apparent from the following description of the embodiments.

Drawings

Fig. 1 is a flow chart of a control method of a power converter according to an embodiment of the present application;

FIG. 2 is a flow chart of a hardware current limiting operation according to an embodiment of the present application;

FIG. 3 is a voltage waveform diagram of a software boosting stage according to an embodiment of the present application;

FIG. 4 is a schematic flow chart of a software boosting stage according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a sampling control strategy according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of a power converter system according to an embodiment of the present application;

fig. 7 is a schematic diagram of a specific structure of a power converter according to an embodiment of the present application;

fig. 8 is a schematic diagram of a specific structure of a control circuit according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings. The specific method of operation in the method embodiment may also be applied to the device embodiment or the system embodiment. In the description of the present application, "at least one" means one or more, wherein a plurality means two or more. In view of this, the term "plurality" may also be understood as "at least two" in embodiments of the present application. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/", unless otherwise specified, generally indicates that the associated object is an "or" relationship. In addition, it should be understood that in the description of the present application, the words "first," "second," and the like are used merely for distinguishing between the descriptions and not for indicating or implying any relative importance or order.

It should be noted that in embodiments of the present application, "coupled" may be understood as electrically connected, and that two electrical components may be coupled directly or indirectly to each other. For example, a may be directly coupled to B, or indirectly coupled to B through one or more other electrical components, such as a may be directly coupled to B, or directly coupled to C, which may be directly coupled to B, where coupling is achieved through C. In some cases, "coupled" may also be understood as connected. In summary, coupling between a and B may enable the transfer of electrical energy between a and B.

It should be noted that the switching transistors and switches in the embodiments of the present application may be one or more of various types of switching transistors such as a relay, a metal oxide semiconductor field effect transistor (metal oxide semiconductor field effect transistor, MOSFET), a bipolar junction transistor (bipolar junction transistor, BJT), an insulated gate bipolar transistor (insulated gate bipolar transistor, IGBT), and the like, which are not specifically described in the embodiments of the present application. Each switching tube can comprise a first electrode, a second electrode and a control electrode, wherein the control electrode is used for controlling the on or off of the switching tube. When the switching tube is turned on, current can be transmitted between the first electrode and the second electrode of the switching tube, and when the switching tube is turned off, current cannot be transmitted between the first electrode and the second electrode of the switching tube. Taking a MOSFET as an example, the control electrode of the switching tube may be a gate electrode, the first electrode of the switching tube may be a source electrode of the switching tube, the second electrode may be a drain electrode of the switching tube, or the first electrode may be a drain electrode of the switching tube, and the second electrode may be a source electrode of the switching tube.

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application.

The topology structure of the existing boost type power converter comprises a rectifying circuit and a power factor correction (power factor correction, PFC) circuit, wherein the input end of the rectifying circuit is coupled with a mains input power supply, the output end of the rectifying circuit is coupled with the input end of the power factor correction circuit, the output end of the power factor correction circuit is used for being coupled with a load, and the power factor correction circuit comprises a boost circuit and a rectifying capacitor. When the power converter is started, the charging current of the rectifying capacitor in the power factor correction circuit is several times larger than the rated current, so that the charging current of the rectifying capacitor is limited, overcurrent of the rectifying capacitor is avoided, software slow start is generally adopted in the prior art to realize current limiting, but the power of a load is different, and the effect of charging and current limiting of the rectifying capacitor is also different. Along with load fluctuation, the charging current of the rectifying capacitor also flows excessively, and the problem of charging overcurrent during starting of the power factor correction circuit cannot be fundamentally solved.

In the control method of the power converter provided by the embodiment of the application, before the power factor correction circuit is driven to work, a new charging current limiting strategy of the rectifying capacitor is provided, and the combination of hardware current limiting and software boosting is adopted, so that the starting charging current of the rectifying capacitor can be ensured to be within an allowable range, and the service life of the power converter is prolonged.

Referring to fig. 1, the control method of a power converter provided by the embodiment of the application specifically includes the following steps:

s1, when a first sampling value of an input current and a first sampling value of an output voltage of the power factor correction circuit are determined to meet a set condition, the control switch is in a closed state, and a hardware current limiting link is completed.

Specifically, after the power converter is powered on, that is, when the initial state of the switch is an off state, the input current and the output voltage of the power factor correction circuit may be respectively sampled, to obtain a first sampling value of the input current and a first sampling value of the output voltage. In some possible implementations, the above-described analog sampling process may be accomplished by a sampling control circuit. The sampling control circuit can sample the BUS voltage, namely the output voltage BUS_V of the power factor correction circuit, amplify KVo times and then perform analog-to-digital conversion to obtain a first sampling value BUS_Vo1 of the output voltage. The sampling control circuit can also sample the inductance current, namely the input current PFC_I of the power factor correction circuit, amplify KiL times and then perform analog-to-digital conversion to obtain a first sampling value PFC_iL1 of the input current.

S2, determining a pulse width modulation (pulse width modulation, PWM) signal based on a second sampling value of an input current, a second sampling value of an input voltage and a second sampling value of an output voltage of the power factor correction circuit obtained after the switch is in a closed state and a reference voltage value set by the output voltage.

And S3, driving the power factor correction circuit to perform boosting operation by adopting a PWM signal, so that the output voltage of the power factor correction circuit reaches a set target voltage value, and completing a software boosting link.

Specifically, the control method of the power converter provided by the embodiment of the application generally comprises three processes: the system comprises an analog sampling stage, a starting stage and a driving stage, wherein the starting stage comprises a hardware current limiting link and a software boosting link. In order to realize the hardware current limiting link, a current limiting circuit needs to be added in the power converter, the current limiting circuit comprises a switch and a resistor, wherein the switch and the resistor are positioned between an input end and an output end and are connected in parallel, when the power converter is electrified, the initial state of the switch is in an off state, the input end of the current limiting circuit is coupled with a mains input power supply, the output end of the current limiting circuit is coupled with the input end of a rectifying circuit, and the specific structure of the power converter is not described in detail in the following. The resistor can be a heating resistor, the larger the current passing through the heating resistor is, the larger the resistance value of the resistor is, and the resistor can play a role in voltage division and current limiting, so that the power factor correction circuit is slowly boosted. After the power converter is electrified, the current limiting circuit can be initialized to enable a switch in the current limiting circuit to be in an off state, alternating current input by a mains input power supply is required to be connected into the rectifying circuit after being divided by a resistor in the current limiting circuit, and the situation that the charging current is started in a hardware current limiting link and overcurrent is avoided is ensured. When the hardware current limiting link is completed, a switch in the current limiting circuit can be closed (conducted), so that alternating current input by a mains input power supply is directly connected into the rectifying circuit. After the hardware current limiting link is completed, only partial capacitor current charging work is completed, the actual output voltage of the power converter does not reach the target voltage yet, the software boosting link is subsequently entered, the subsequent capacitor current charging work is performed through a specific boosting strategy, the actual output voltage reaches the target voltage, and the starting stage is completed to enter the subsequent conventional driving stage.

Referring to fig. 2, the complete process of the hardware current limiting link provided by the present application may include the following steps:

s11, after the power converter is electrified, initializing parameters of the current limiting circuit;

s12, judging whether the power converter meets a set starting enabling condition or not;

when it is determined that the start enabling condition is not satisfied, waiting for judgment all the time, and repeatedly executing step S12; when the start enabling condition is satisfied, step S13 is executed;

s13, acquiring a first sampling value BUS_Vo1 of an output voltage;

s14, determining whether the first sampling value BUS_Vo1 of the output voltage is not smaller than a set voltage threshold Va, namely judging whether BUS_Vo1 is not smaller than or equal to Va, wherein the set voltage threshold Va can be set as follows: va is more than or equal to 200V and less than or equal to 310V;

returning to execute the step S13 when the first sampling value of the output voltage is determined to be larger than the set voltage threshold value; when the first sampling value of the output voltage is not less than the set voltage threshold, executing step S15;

s15, acquiring a first sampling value PFC_iL1 of an input current;

s16, determining whether a first sampling value PFC_iL1 of the input current is not larger than a set current threshold value Ia, namely judging whether PFC_iL1 is smaller than or equal to Ia, wherein the set current threshold value Ia can be set to be larger than or equal to 0 and smaller than or equal to 16A;

Returning to execute the step S13 when the first sampling value of the input current is determined to be larger than the set current threshold value; when the first sampling value of the input current is not larger than the set current threshold value, executing step S17;

s17, starting to acquire a count value KM_timer, for example, by utilizing the counting function of a Timer, starting to start the Timer to count after executing the step S17, acquiring the count value, or starting to count when the Timer is powered on, acquiring the count value of the current Timer as an initial value after executing the step S17, and subtracting the initial value from the count value acquired later to obtain the count value finally;

s18, determining whether the acquired count value KM_Timer is not smaller than a set duration threshold value Ta, namely judging whether the count value KM_Timer is not smaller than Ta, wherein the set duration threshold value can be set as follows: ta is more than or equal to 0 and less than or equal to 10s;

when the acquired count value is determined to be smaller than the set duration threshold, repeating the step S17; when the acquired count value is not larger than the set duration threshold, executing step S19;

s19, controlling the switch to be in a closed state.

The steps S11-S19 can finish a hardware current limiting link, ensure that the starting charging current of the rectifying capacitor is in an allowable range, and prolong the service life of the power converter.

In some possible implementation manners, in the control method provided by the application, only partial capacitor current charging work is completed after the hardware current limiting link is completed, the actual output voltage of the power converter does not reach the target voltage yet, and the software boosting link is entered later, and the charging process still exists in the boosting process. Referring to fig. 3, the ac power of the mains input power is rectified by the rectifying circuit to be changed into a steamed bread waveform, that is, the steamed bread waveform is the input voltage of the power factor correction circuit, and after the hardware current limiting link is completed, the output voltage of the power factor correction circuit is V1, and the target voltage is Vref. The software boosting operation can be performed specifically through two schemes, wherein the first scheme is to ensure that the charging current of the rectifying capacitor cannot overflow under the condition that the difference between the output voltage V1 and the target voltage Vref is smaller, and the reference voltage value set by the output voltage of the power factor correction circuit is directly set as the target voltage value Vref required to be reached by the output voltage of the power factor correction circuit at the moment T1 (T1 > Ta), so that the boosting function is realized, and the software boosting operation of the power converter is completed. In the second scheme, if the difference between the output voltage V1 and the target voltage Vref is large and the reference voltage is directly set to the final target voltage at time T1, the problem of overcurrent of the charging current occurs, the reference voltage of the output voltage may be divided into at least two segments by adopting a segment boosting manner, the reference voltage is set to an incremental value in segments and finally set to the target voltage Vref, so as to complete the software boosting operation of the power converter. Specifically, the reference voltage value is set to be divided into n (n=2, 3, … …) segments according to actual conditions, for example, the reference voltage value can be divided into three segments, and at the time T1, the reference voltage is set to be a first voltage value V2 (V1 < V2); at the time of T2 (T1 < T2), setting the reference voltage as a second voltage value V3 (V2 < V3); at the time of T3 (T2 < T3), setting the reference voltage as the final target voltage value Vref (V3 < Vref), thereby realizing the boosting function, simultaneously avoiding the overcurrent of the charging current and prolonging the service life of the rectifying capacitor.

In the control method provided by the application, in a software boosting link and a subsequent driving stage, the current tracking input power grid voltage waveform can be regulated in a double-loop modulation mode, so that the input current waveform can well track the input voltage waveform change, PWM signals for driving the power factor correction circuit are generated, the power factor correction is realized, the power factor of the power grid is improved, and the current harmonic content of the power grid is reduced. Referring to fig. 4, in some possible implementations, the step S2 of determining the PWM signal based on the second sampled value of the input current, the second sampled value of the input voltage, the second sampled value of the output voltage, and the reference voltage value set by the output voltage obtained after the switch is in the closed state may specifically be implemented by the following steps:

s21, calculating a first difference value between a second sampling value of the output voltage and a reference voltage value;

s22, performing voltage loop modulation on the first difference value to obtain an output value;

s23, multiplying the output value by the value obtained by data conversion of the second sampling value of the input voltage to obtain a reference current value;

s24, calculating a second difference value between the reference current value and a second sampling value of the input current;

S25, performing current loop modulation on the second difference value to obtain a PWM signal duty ratio;

s26, pulse modulating the duty ratio of the PWM signal to obtain the PWM signal.

Specifically, as the working frequency of the switching tube in the power factor correction circuit is lower, the inductance value of the required inductor is larger, and when the working frequency of the switching tube in the power factor correction circuit is not fixed, in order to meet all possible working frequencies, the inductance value of the inductor is required to be selected according to the minimum value of the working frequency, so that the inductance value and the volume of the selected inductor are larger, and the cost of the inductor is increased. The double-loop control adopted by the application can fix the switching frequency of a switching tube in the power factor correction circuit, the inductance value of the inductor is determined by the current inner loop module, and the inductor with smaller inductance value can be selected by fixing the high-frequency switching frequency, for example, the frequency is selected to be more than 40kHz, so that the volume of the inductor is reduced, and the inductance cost is reduced.

Since accurate sampling of the inductor current is required for implementing the power factor correction, the method in the prior art triggers sampling at the counting zero point or the cycle point of one PWM cycle, but the trigger switch signals at the trigger points are relatively more, and external electromagnetic signal interference is increased. In the control method provided by the application, in the step S2, a set of new sampling strategies can be set when the second sampling value of the input current, the second sampling value of the input voltage and the second sampling value of the output voltage of the power factor correction circuit are obtained based on the fact that the switch is in a closed state, and the fixed point (namely, a non-zero point and a periodic point) sampling in a half-wave period is adopted, so that the trigger sampling at the switching time point between the on and off of the switching tube can be avoided, the fixed point sampling is omitted, the PWM signal duty ratio is calculated to determine the trigger sampling, and the control period time is shortened.

In some possible implementations, referring to fig. 5, the sampling strategy provided by the present application may be: in a half-wave period of an output waveform of the rectifying circuit, when the angle is smaller than 30 degrees (and a certain angle nearby) or larger than 150 degrees (and a certain angle nearby), the duty ratio of the PWM signal is larger than 0.5, the sampling can be triggered at 0.3+/-0.1 times of one PWM period, namely, the sampling can be triggered at any fixed position between 0.2 times and 0.4 times, for example, the sampling can be triggered at 0.2 times, 0.3 times or 0.4 times. In a half-wave period of an output waveform of the rectifying circuit, when the angle is larger than 30 degrees or smaller than 150 degrees, the PWM signal duty ratio is smaller than 0.5, so that sampling can be triggered at 0.7+/-0.1 time of the PWM period, namely, sampling can be triggered at any fixed position between 0.6 time and 0.8 time, for example, 0.6 time, 0.7 time or 0.8 time, accurate sampling in the whole half-wave period is realized, control accuracy caused by sampling errors due to harmonic waves is reduced, the output power factor is improved, and the current harmonic content is reduced.

Based on the same technical concept, the embodiment of the application provides a power converter, a power converter system and electrical equipment, wherein the electrical equipment can be electrical equipment such as a refrigerator, an air conditioner, a washing machine and the like. The electrical device includes a power converter system, and referring to fig. 6, the power converter system includes a power converter 100 and a control circuit 200. The power converter 100 and the power converter system are described in detail below.

Referring to fig. 7, in some possible implementations, the power converter 100 may specifically include: the power factor correction circuit comprises a current limiting circuit 3, a rectifying circuit 1 and a power factor correction circuit 2, wherein the input end of the current limiting circuit 3 is used for being coupled with a mains input power supply in an AC mode, the output end of the current limiting circuit 3 is coupled with the input end of the rectifying circuit 1, the output end of the rectifying circuit 1 is coupled with the input end of the power factor correction circuit 2, and the output end of the power factor correction circuit 2 is used for being coupled with a load RL. The current limiting circuit 3 may specifically comprise a switch KM and a resistor R located between the input and the output and connected in parallel. The resistor R can be a heating resistor, the larger the current passing through the heating resistor is, the larger the resistance value of the resistor R is, and the resistor R can play a role in voltage division and current limiting, so that the power factor correction circuit 2 is slowly boosted. After the power converter 100 is powered on, the initial state of the switch KM is in an off state, alternating current input by the AC input by the mains supply needs to be divided by the resistor R and then connected into the rectifying circuit 1, so that the starting charging current of the rectifying capacitor 1 can be ensured to be within an allowable range, and the service life of the power converter 100 is prolonged. When it is determined that the first sampling value of the input current and the first sampling value of the output voltage of the pfc circuit 2 satisfy the set condition (that is, satisfy the hardware current limiting and relieving end condition), the control circuit 200 may control the switch KM to be in a closed (conducting) state, so that the AC input by the mains input power AC is directly connected to the rectifying circuit 1, and the hardware current limiting operation of the power converter 100 is completed, and then, the control circuit 200 may determine the PWM signal based on the second sampling value of the input current, the second sampling value of the input voltage and the second sampling value of the output voltage of the pfc circuit 2, and the reference voltage value set by the output voltage, and drive the pfc circuit 2 to perform the boost operation by using the PWM signal, so that the output voltage of the pfc circuit 2 reaches the set target voltage value. When the power factor correction circuit 2 stops operating, the switch KM may be directly turned off to restore the initial state. The rectifying circuit 1 generally includes four diodes VD1 to VD4, and the specific connection structure thereof is shown in fig. 6, which is not described herein. The alternating voltage with the mains voltage of 50Hz can be converted into 100Hz steamed bread waveform after being rectified by the rectifying circuit 1. The power factor correction circuit 2 may specifically include: the filter capacitor Cin, the boost circuit, and the rectifying capacitor Cout, the boost circuit may specifically include: the specific coupling structure of the inductor L, the diode VD, and the switching tube VT is shown in fig. 7, and will not be described herein. The steamed bread waveform output by the rectifying circuit 1 can be converted into direct current with a target voltage value after being boosted and converted by the power factor correction circuit 2.

Referring to fig. 7, in some possible implementations, the power converter may further include: an electromagnetic interference (electromagnetic interference, EMI) filter connected between the mains input AC and the current limiting circuit 3, the input of the electromagnetic interference filter EMI being for AC coupling with the mains input, the output of the electromagnetic interference filter EMI being coupled with the input of the current limiting circuit 3. Electromagnetic interference generally means that the electronic product works to cause interference to other peripheral electronic products, and the electromagnetic interference filter EMI can filter the alternating current input to the pfc circuit 2.

Referring to fig. 8, in some possible implementations, a control circuit 200 in a power converter system may include: a sampling control circuit 4, a switch control circuit 5 and a drive control circuit 6, the sampling control circuit 4 being coupled with the switch control circuit 5 and the drive control circuit 6, respectively;

the sampling control circuit 4 is configured to sample an input voltage pfc_v, an input current pfc_i, and an output voltage bus_v of the power factor correction circuit 2 after the power converter 100 is powered on, obtain a first sampling value pfc_il1 of the input current and a first sampling value bus_vo1 of the output voltage when the switch KM is in an off state, and obtain a second sampling value pfc_il2 of the input current, a second sampling value pfc_v2 of the input voltage, and a second sampling value bus_vo2 of the output voltage after the switch KM is in a closed state;

The switch control circuit 5 is used for controlling the switch KM to be in a closed state after the first sampling value PFC_iL1 of the input current and the first sampling value BUS_Vo1 of the output voltage are determined to meet the set condition so as to finish the hardware current limiting operation of the power converter;

the driving control circuit 6 is configured to determine a PWM signal based on a second sampling value pfc_il2 of the input current, a second sampling value pfc_v2 of the input voltage, a second sampling value bus_vo2 of the output voltage, and a reference voltage value Vref set by the output voltage, which are obtained after the switch KM is in a closed state, and drive the power factor correction circuit 2 to perform boost operation by using the PWM signal.

In some possible implementations, the sampling control circuit 4 may specifically include an input voltage sampling module, an output voltage sampling module, and an input current sampling module.

The input voltage sampling module is provided with an input voltage sampling value output end, and the input voltage sampling value output end is used for outputting a second sampling value of the input voltage of the power factor correction circuit. The input voltage sampling module may specifically include: an input voltage sampling circuit 41, a first amplifier 42, a first analog-to-digital converter 43; the input voltage sampling circuit 41 is connected between the output end of the rectifying circuit 1 and the input end of the power factor correction circuit 2, and the input voltage sampling circuit 41 can sample the voltage rectified by the rectifying circuit 1, namely, the input voltage pfc_v of the power factor correction circuit 2; the input end of the first amplifier 42 is coupled to the output end of the input voltage sampling circuit 41, and the first amplifier 42 can amplify the output value of the input voltage sampling circuit 41 by KVin times and then input the amplified output value to the first analog-to-digital converter 43; the input end of the first analog-to-digital converter 43 is coupled to the output end of the first amplifier 42, the output end of the first analog-to-digital converter 43 is used as an input voltage sampling value output end, and the first analog-to-digital converter 43 can perform analog-to-digital conversion on the amplified value of the first amplifier 42 to obtain and output a second sampling value pfc_vjn2 of the input voltage.

The output voltage sampling module is provided with an output voltage sampling value output end, and the output voltage sampling value output end is used for outputting a first sampling value or a second sampling value of the output voltage of the power factor correction circuit. The output voltage sampling module may specifically include: an output voltage sampling circuit 44, a second amplifier 45, a second analog-to-digital converter 46; the output voltage sampling circuit 44 is connected between the output end of the power factor correction circuit 2 and the load RL, and the output voltage sampling circuit 44 can sample the BUS voltage, namely, the output voltage bus_v of the power factor correction circuit; the input end of the second amplifier 45 is coupled with the output end of the output voltage sampling circuit 44, and the second amplifier 45 can amplify the output value of the output voltage sampling circuit by KVo times and then input the amplified output value to the second analog-to-digital converter 46; the input end of the second analog-to-digital converter 46 is coupled to the output end of the second amplifier 45, the output end of the second analog-to-digital converter 46 is used as an output end of the output voltage sampling value, and the second analog-to-digital converter 46 can perform analog-to-digital conversion on the amplified value of the second amplifier 45 to obtain and output a first sampling value bus_vo1 or a second sampling value bus_vo2 of the output voltage.

The input current sampling module is provided with an input current sampling value output end, and the input current sampling value output end is used for outputting a first sampling value or a second sampling value of the input current of the power factor correction circuit. The input current sampling module may specifically include: an input current sampling circuit 47, a third amplifier 48, a third analog-to-digital converter 49; the input current sampling circuit 47 is coupled to two ends of the inductor L of the PFC circuit 2, and the input current sampling circuit 47 may sample the inductor current, that is, the input current pfc_i of the PFC circuit 2; an input end of the third amplifier 48 is coupled with an output end of the input current sampling circuit 47, and the third amplifier 48 can amplify the output value of the input current sampling circuit 47 by KiL times and then input the amplified output value to the third analog-to-digital converter 49; an input end of the third analog-to-digital converter 49 is coupled to an output end of the third amplifier 48, and an output end of the third analog-to-digital converter 49 is used as an input current sampling value output end, and the third analog-to-digital converter 49 can perform analog-to-digital conversion on an amplified value of the third amplifier 48 to obtain and output a first sampling value pfc_il1 or a second sampling value pfc_il2 of the input current.

In some possible implementations, the switch control circuit 5 may specifically include: a voltage controller 51, a current controller 52, a timing controller 53, and a master 54; wherein, the input end of the voltage controller 51 is coupled with the output end of the output voltage sampling value in the sampling control circuit 4, and the voltage controller 51 can determine whether the first sampling value BUS_Vo1 of the obtained output voltage is not less than the set voltage threshold Va; an input terminal of the current controller 52 is coupled to an input current sampling value output terminal in the sampling control circuit 4, and the current controller 52 can determine whether the first sampling value pfc_il1 of the acquired input current is not greater than the set current threshold value Ia; the input end of the timing controller 53 is coupled with the output end of the Timer 55, the timing controller 53 can start working under the control of the master controller 54, acquire a count value KM_timer from the Timer 55, and send a corresponding instruction to the master controller 54 when the acquired count value KM_timer is determined to be not smaller than a set duration threshold Ta; the input terminal of the master controller 54 is respectively coupled to the output terminal of the voltage controller 51, the output terminal of the current controller 52, and the output terminal of the timing controller 53, and the master controller 54 may determine that the timing controller 53 starts to operate when the voltage controller 51 determines that the first sampling value bus_vo1 of the output voltage is not less than the set voltage threshold Va, and/or when the current controller 52 determines that the first sampling value pfc_il1 of the input current is not greater than the set current threshold Ia; the master controller 54 may also generate a control signal for controlling the switch KM to be closed when receiving a corresponding instruction sent by the timing controller 53. The switch control circuit 5 can ensure that the starting charging current of the rectifying capacitor Cout is within an allowable range, and the service life of the power converter 100 is prolonged.

In some possible implementations, the driving control circuit 6 may adopt a dual-loop control structure with a current loop as an inner loop and a voltage loop as an outer loop, and the driving control circuit 6 may specifically include a voltage outer loop module, a current inner loop module and a PWM module. Because the lower the operating frequency of the switching tube VT in the pfc circuit 2 is, the larger the inductance value of the inductance L is required, when the operating frequency of the switching tube VT in the pfc circuit 2 is not fixed, in order to satisfy all possible operating frequencies, the inductance value of the inductance L needs to be selected according to the minimum value of the operating frequency, which results in that the inductance value and the volume of the inductance L are both larger, and the cost of the inductance L is increased. The double-loop control adopted by the application can fix the switching frequency of the switching tube VT in the power factor correction circuit 2, the inductance value of the inductance L is determined by the current inner loop module, and the inductance L with smaller inductance value can be selected by fixing the high-frequency switching frequency, for example, the frequency is selected to be more than 40kHz, so that the volume of the inductance L is reduced, and the cost of the inductance L is reduced.

The voltage outer loop module may have three signal inputs, namely an output voltage input for acquiring a second sampling value bus_vo2 of the output voltage of the PFC circuit 2, a reference voltage input for acquiring a second sampling value pfc_v2 of the input voltage of the PFC circuit 2, and an input voltage input for acquiring a reference voltage value Vref set by the output voltage of the PFC circuit 2. The voltage outer loop module may include a first subtractor 61, a voltage loop modulator 62, a multiplier 63, and a data converter 64, wherein input ends of the first subtractor 61 are an output voltage input end and a reference voltage input end, respectively, an output end of the first subtractor 61 is coupled to an input end of the voltage loop modulator 62, an output end of the voltage loop modulator 62 is coupled to one input end of the multiplier 63, an input end of the data converter 64 is an input voltage input end, an output end of the data converter 64 is coupled to another input end of the multiplier 63, and an output end of the multiplier 63 is coupled to the current inner loop module.

The current inner loop module may have an input current input for taking a second sampled value pfc_il2 of the input current of the power factor correction circuit. The current loop module may include a second subtractor 65 and a current loop modulator 66, one input of the second subtractor 65 being coupled to the output of the multiplier 63, the other input of the second subtractor 65 being an input current input, the output of the second subtractor 65 being coupled to the input of the current loop modulator 66, the output of the current loop modulator 66 being coupled to the input of the PWM module.

The PWM module may include a pulse modulator 67 and a drive signal generator 68, an input of the pulse modulator 67 being coupled to an output of the current loop modulator 66, and an output of the pulse modulator 67 being coupled to an input of the drive signal generator 68.

The driving control circuit 6 operates as follows:

the first subtracter 61 calculates a first difference between the second sampling value bus_vo2 of the output voltage and the reference voltage value Vref and inputs the first difference to the voltage loop modulator 62, and the voltage loop modulator 62 performs voltage loop modulation on the first difference to obtain an output value VPI and inputs the output value VPI to the multiplier 63; the data converter 64 performs data conversion on the second sampling value pfc_vjn2 of the input voltage and inputs the result to the multiplier 63, and the multiplier 63 multiplies the output value VPI by the value of the second sampling value pfc_vjn2 of the input voltage after the data conversion to obtain a reference current value pfc_iref and inputs the reference current value pfc_iref to the second subtractor 65; the second subtracter 65 calculates a second difference value between the reference current value pfc_iref and a second sampling value pfc_il2 of the input current and inputs the second difference value to the current loop modulator 66, and the current loop modulator 66 performs current loop modulation on the second difference value to obtain a PWM signal Duty ratio Duty and inputs the PWM signal Duty ratio Duty to the pulse modulator 67; the pulse modulator 67 carries out pulse modulation on the duty ratio of the PWM signal to obtain a PWM signal and inputs the PWM signal to the driving signal generator 68, and the driving signal generator 68 generates a driving signal PWM of the power factor correction circuit according to the PWM signal, so that the input current waveform can well track the waveform change of the input voltage, and the current harmonic is greatly reduced, thereby achieving the purpose of improving the power factor.

The embodiment of the application also provides a readable storage medium for storing the method or algorithm provided by the embodiment. Such as random access memory (random access memory, RAM), flash memory, read Only Memory (ROM), EPROM memory, non-volatile read only memory (Electronic Programmable ROM), registers, hard disk, a removable disk, or any other form of storage medium known in the art.

The steps of a method or algorithm described in embodiments of the present application may be embedded directly in the power converter system. The power converter system may include RAM memory, flash memory, ROM memory, EPROM memory, registers, hard disk, a removable disk, or any other form of storage medium in the art that can store the steps of the methods or algorithms provided by embodiments of the application. The storage medium may be, for example, coupled to a control circuit or processor (or controller) in the power converter system such that the control module, processor (or controller) can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the control module, processor (or controller).

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

Although the application has been described in connection with specific features and embodiments thereof, it will be apparent that various modifications and combinations can be made without departing from the spirit and scope of the application. Accordingly, the specification and drawings are merely exemplary illustrations of the present application as defined in the appended claims and are considered to cover any and all modifications, variations, combinations, or equivalents that fall within the scope of the application.

It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims

1. A power converter system comprising a power converter and a control circuit;

the power converter includes: the power factor correction circuit comprises a current limiting circuit, a rectifying circuit and a power factor correction circuit, wherein the current limiting circuit comprises a switch and a resistor which are arranged between an input end and an output end and are connected in parallel, when the power converter is electrified, the initial state of the switch is in an off state, the input end of the current limiting circuit is used for being coupled with a mains input power supply, the output end of the current limiting circuit is coupled with the input end of the rectifying circuit, the output end of the rectifying circuit is coupled with the input end of the power factor correction circuit, and the output end of the power factor correction circuit is used for being coupled with a load;

the control circuit is used for controlling the switch to be in a closed state when the first sampling value of the input current and the first sampling value of the output voltage of the power factor correction circuit are determined to meet the set condition; and determining a Pulse Width Modulation (PWM) signal based on a second sampling value of the input current, a second sampling value of the input voltage and a second sampling value of the output voltage of the power factor correction circuit, which are obtained after the switch is in a closed state, and a reference voltage value set by the output voltage, and driving the power factor correction circuit to perform boosting operation by adopting the PWM signal.

2. The power converter system of claim 1, wherein the power converter further comprises: and the input end of the electromagnetic interference filter is used for being coupled with the input power supply of the city network, and the output end of the electromagnetic interference filter is coupled with the input end of the current limiting circuit.

3. The power converter system of claim 1 or 2, wherein the power factor correction circuit comprises: the filter capacitor, boost circuit and rectifying capacitor, boost circuit includes: an inductor, a diode and a switching tube, the switching tube being for being driven by the PWM signal.

4. A power converter system according to any of claims 1-3, wherein the control circuit comprises a sampling control circuit, a switching control circuit, and a drive control circuit, the sampling control circuit being coupled to the switching control circuit and the drive control circuit, respectively;

the sampling control circuit is used for respectively sampling the input voltage, the input current and the output voltage of the power factor correction circuit after the power converter is electrified, obtaining a first sampling value of the input current and a first sampling value of the output voltage when the switch is in an open state, and obtaining a second sampling value of the input current, a second sampling value of the input voltage and a second sampling value of the output voltage after the switch is in a closed state;

The switch control circuit is used for controlling the switch to be in a closed state after the first sampling value of the input current and the first sampling value of the output voltage are determined to meet a set condition;

the driving control circuit is used for determining the PWM signal based on a second sampling value of the input current, a second sampling value of the input voltage and a second sampling value of the output voltage which are obtained after the switch is in a closed state and a reference voltage value set by the output voltage, and driving the power factor correction circuit to perform boosting operation by adopting the PWM signal.

5. The power converter system of claim 4, wherein said switch control circuit comprises: the device comprises a voltage controller, a current controller, a timing controller and a master controller;

the voltage controller is used for determining whether the first sampling value of the output voltage is not smaller than a set voltage threshold value;

the current controller is used for determining whether the first sampling value of the input current is not larger than a set current threshold value;

the main controller is used for determining that the timing controller starts working when the voltage controller determines that the first sampling value of the output voltage is not smaller than a set voltage threshold value and/or when the current controller determines that the first sampling value of the input current is not larger than the set current threshold value;

The timing controller is used for acquiring a count value from the timer, and sending a corresponding instruction to the main controller when the acquired count value is not smaller than a set duration threshold value;

the main controller is also used for generating a control signal for controlling the switch to be closed when receiving a corresponding instruction sent by the timing controller.

6. The power converter system of claim 4 or 5, wherein the drive control circuit comprises: a first subtracter, a voltage loop modulator, a multiplier, a data converter, a second subtracter, a current loop modulator, a pulse modulator and a driving signal generator;

the first subtracter is used for calculating a first difference value between the second sampling value of the output voltage and the reference voltage value and inputting the first difference value to the voltage loop modulator;

the voltage loop modulator is used for performing voltage loop modulation on the first difference value to obtain an output value and inputting the output value to the multiplier;

the data converter is used for carrying out data conversion on the second sampling value of the input voltage and inputting the second sampling value to the multiplier;

the multiplier is used for multiplying the output value with the value of the second sampling value of the input voltage after data conversion to obtain a reference current value and inputting the reference current value to the second subtracter;

The second subtracter is used for calculating a second difference value between the reference current value and a second sampling value of the input current and inputting the second difference value to the current loop modulator;

the current loop modulator is used for performing current loop modulation on the second difference value to obtain a PWM signal duty ratio and inputting the PWM signal duty ratio to the pulse modulator;

the pulse modulator is used for carrying out pulse modulation on the duty ratio of the PWM signal to obtain a PWM signal and inputting the PWM signal into the driving signal generator;

the driving signal generator is used for generating a driving signal of the power factor correction circuit according to the PWM signal.

7. The power converter system of claim 6, wherein the reference voltage value is set directly to a target voltage value to which the output voltage of the power factor correction circuit is required to reach, or the reference voltage value is set in stages to a plurality of incremental values and finally to the target voltage value.

8. The power converter system of any of claims 4-7, wherein the sampling control circuit comprises: an input voltage sampling circuit, an output voltage sampling circuit, an input current sampling circuit, a first amplifier, a second amplifier, a third amplifier, a first analog-to-digital converter, a second analog-to-digital converter and a third analog-to-digital converter;

The input voltage sampling circuit is used for sampling the input voltage of the power factor correction circuit;

the output voltage sampling circuit is used for sampling the output voltage of the power factor correction circuit;

the input current sampling circuit is used for sampling the input current of the power factor correction circuit;

the first amplifier is used for amplifying the output value of the input voltage sampling circuit and inputting the amplified output value to the first analog-to-digital converter;

the second amplifier is used for amplifying the output value of the output voltage sampling circuit and inputting the amplified output value to the second analog-to-digital converter;

the third amplifier is configured to amplify an output value of the input current sampling circuit and input the amplified output value to the third analog-to-digital converter;

the first analog-to-digital converter is used for performing analog-to-digital conversion on the amplified value of the first amplifier to obtain and output a second sampling value of the input voltage;

the second analog-to-digital converter is used for performing analog-to-digital conversion on the amplified value of the second amplifier to obtain and output a first sampling value or a second sampling value of the output voltage;

and the third analog-to-digital converter is used for performing analog-to-digital conversion on the amplification value of the third amplifier to obtain and output a first sampling value or a second sampling value of the input current.

9. The power converter system of claim 8, wherein after the switch is in a closed state, the input voltage sampling circuit, the output voltage sampling circuit, and the input current sampling circuit are each: triggering sampling at any fixed position between 0.6 times and 0.8 times of a PWM signal period in a set angle range of a half-wave period of an output waveform of the rectifying circuit; the set angle range is more than 30 degrees and less than 150 degrees; and triggering sampling at any fixed position between 0.2 times and 0.4 times of one PWM signal period outside the set angle range of the half-wave period of the output waveform of the rectifying circuit.

10. An electrical device comprising a power converter system according to any of claims 1-9.

11. A power converter, comprising: the power factor correction circuit comprises a current limiting circuit, a rectifying circuit and a power factor correction circuit, wherein the current limiting circuit comprises a switch and a resistor which are arranged between an input end and an output end and are connected in parallel, the initial state of the switch is an off state after the power converter is electrified, the input end of the current limiting circuit is used for being coupled with a mains input power supply, the output end of the current limiting circuit is coupled with the input end of the rectifying circuit, the output end of the rectifying circuit is coupled with the input end of the power factor correction circuit, and the output end of the power factor correction circuit is used for being coupled with a load;

The switch is controlled to be in a closed state when a first sampling value of an input current and a first sampling value of an output voltage of the power factor correction circuit are determined to satisfy a set condition.

12. The power converter of claim 11, further comprising: and the input end of the electromagnetic interference filter is used for being coupled with the input power supply of the city network, and the output end of the electromagnetic interference filter is coupled with the input end of the current limiting circuit.

13. A power converter as claimed in claim 11 or 12, wherein the power factor correction circuit comprises: the filter capacitor, boost circuit and rectifying capacitor, boost circuit includes: inductance, diode and switching tube.

14. The control method of the power converter is characterized in that the power converter comprises a current limiting circuit, a rectifying circuit and a power factor correction circuit, wherein the current limiting circuit comprises a switch and a resistor which are arranged between an input end and an output end and connected in parallel, when the power converter is electrified, the initial state of the switch is in an off state, the input end of the current limiting circuit is used for being coupled with a mains input power supply, the output end of the current limiting circuit is coupled with the input end of the rectifying circuit, the output end of the rectifying circuit is coupled with the input end of the power factor correction circuit, and the output end of the power factor correction circuit is used for being coupled with a load; the control method comprises the following steps:

When the first sampling value of the input current and the first sampling value of the output voltage of the power factor correction circuit are determined to meet the set condition, controlling the switch to be in a closed state;

determining a Pulse Width Modulation (PWM) signal based on a second sampling value of an input current, a second sampling value of an input voltage and a second sampling value of an output voltage of the power factor correction circuit, which are obtained after the switch is in a closed state, and a reference voltage value set by the output voltage;

and driving the power factor correction circuit to perform boosting operation by adopting the PWM signal.

15. The control method according to claim 14, wherein controlling the switch to be in the closed state when it is determined that a set condition is satisfied based on a first sampling value of an input current and a first sampling value of an output voltage of the power factor correction circuit, comprises:

after the power converter is electrified, sampling the input current and the output voltage of the power factor correction circuit respectively to obtain a first sampling value of the input current and a first sampling value of the output voltage;

when the first sampling value of the output voltage is not smaller than a set voltage threshold value, and/or when the first sampling value of the input current is not larger than a set current threshold value, acquiring a count value;

And when the acquired count value is not smaller than the set time threshold, controlling the switch to be in a closed state.

16. The control method according to claim 15, wherein starting to acquire the count value when it is determined that the first sampling value of the output voltage is not less than a set voltage threshold value and/or when it is determined that the first sampling value of the input current is not greater than a set current threshold value, comprises:

acquiring a first sampling value of the output voltage;

determining whether a first sampled value of the output voltage is not less than the set voltage threshold;

when the first sampling value of the output voltage is determined to be larger than the set voltage threshold value, the first sampling value of the output voltage is obtained again until the first sampling value of the output voltage is determined to be not smaller than the set voltage threshold value;

when the first sampling value of the output voltage is not smaller than the set voltage threshold value, acquiring the first sampling value of the input current;

determining whether a first sampled value of the input current is not greater than the set current threshold;

when the first sampling value of the input current is determined to be larger than the set current threshold value, the first sampling value of the output voltage is obtained again until the first sampling value of the input current is determined to be not larger than the set current threshold value;

And when the first sampling value of the input current is not larger than the set current threshold value, acquiring a count value.

17. The control method according to any one of claims 14 to 16, wherein controlling the switch to be in a closed state when it is determined that a set condition is satisfied based on a first sampling value of an input current and a first sampling value of an output voltage of the power factor correction circuit, includes:

after judging that the power converter meets a set starting enabling condition, controlling the switch to be in a closed state when the fact that the set condition is met is determined based on a first sampling value of an input current and a first sampling value of an output voltage of the power factor correction circuit;

the start-up enabling condition includes: and the load power coupled by the power factor correction circuit reaches a set power threshold value, or a starting signal of the power factor correction circuit is received.

18. The control method according to any one of claims 14 to 17, wherein the reference voltage value of the output voltage setting is set directly to a target voltage value to be reached by the output voltage of the power factor correction circuit, or the reference voltage value is set in stages to a plurality of incremental values and finally to the target voltage value.

19. The control method according to any one of claims 14 to 18, wherein the second sampling value of the input current, the second sampling value of the input voltage, and the second sampling value of the output voltage based on the power factor correction circuit obtained after the switch is in the closed state are:

sampling triggered at any fixed position between 0.6 times and 0.8 times of a PWM signal period in a set angle range of a half-wave period of an output waveform of the rectifying circuit; the set angle range is more than 30 degrees and less than 150 degrees;

and sampling triggered at any fixed position between 0.2 times and 0.4 times of one PWM signal period outside the set angle range of the half-wave period of the output waveform of the rectifying circuit.

20. A computer readable storage medium storing computer instructions which, when executed, cause the method of any one of claims 14-19 to be performed.