CN116805143A - Digital circuit time sequence statistics method, device, equipment and storage medium - Google Patents
Digital circuit time sequence statistics method, device, equipment and storage medium Download PDFInfo
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Abstract
The application discloses a digital circuit time sequence statistical method, a device, equipment and a storage medium, which relate to the field of digital circuit design and comprise the following steps: setting the thread number of a time sequence report file to be processed, and determining a main thread and a target number of sub threads based on the thread number; dividing the time sequence report file to be processed based on a preset dividing rule, obtaining corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the time sequence report file to be processed according to the adjusted dividing points to obtain sub files with target quantity; analyzing the time sequence paths corresponding to the subfiles based on the target number of the sub-threads respectively to obtain time sequence path information, and carrying out statistics updating on the time sequence path information respectively to obtain statistics results; and merging all the statistical results by using the main thread to obtain a target time sequence statistical result. Therefore, the method and the device can accurately and rapidly acquire the time sequence statistical result through a multithread concurrent processing mode.
Description
Technical Field
The present application relates to the field of digital circuit design, and in particular, to a digital circuit timing statistics method, apparatus, device, and storage medium.
Background
Timing closure is a fundamental and critical factor to be met in the design of digital circuits, where static timing analysis is required at each stage of the digital circuit design. However, for most practical digital integrated circuits, the detailed timing report files generated by the static timing analysis tool (such as PrimeTime) are more than ten and hundreds of G, so that the text tool cannot be opened, and the designer cannot directly obtain the key timing information such as the worst timing path, the timing margin distribution interval of the illegal path and the like. There is a need in the industry to obtain the most critical timing statistics from the oversized timing report file to guide the later circuit repair and optimization direction, but the existing scheme is basically to simply analyze the file with a scripting language, and the processing time of the timing report file of tens of GB (gigabytes) often reaches tens of hours. Therefore, how to quickly and accurately obtain the timing statistics is a problem to be solved in the art.
Disclosure of Invention
Accordingly, the present application is directed to a digital circuit timing statistics method, apparatus, device and storage medium, which can greatly reduce the operation time length by a multi-thread concurrent processing method and obtain accurate timing statistics results in a relatively reasonable operation time. The specific scheme is as follows:
in a first aspect, the application discloses a digital circuit timing statistics method, comprising:
setting the thread number of a time sequence report file to be processed, and determining a main thread and a target number of sub threads based on the thread number;
dividing the to-be-processed time sequence report file based on a preset dividing rule to obtain corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the to-be-processed time sequence report file according to the adjusted dividing points to obtain the target number of subfiles;
analyzing the time sequence paths corresponding to the subfiles based on the target number of the subfiles respectively to obtain time sequence path information, and carrying out statistics updating on the time sequence path information respectively to obtain statistics results;
and merging the statistical results by using the main thread to obtain a target time sequence statistical result.
Optionally, the number of the main threads is 1, and the sum of the number of the main threads and the target number is equal to the number of threads.
Optionally, the partitioning the to-be-processed timing report file based on a preset partitioning rule includes:
and dividing the time sequence report file to be processed based on the rule that the byte numbers of the divided partial subfiles are equal.
Optionally, the adjusting the dividing points according to the preset adjustment rule includes:
judging whether the current division point is positioned at the end of a time sequence path text in the time sequence report file to be processed;
and determining whether to correspondingly adjust the dividing points or not based on the judging result.
Optionally, the determining whether to perform corresponding adjustment on the segmentation point based on the determination result includes:
if the current partition point is positioned at the tail of the file, not adjusting;
if the current division point is not located at the tail of the file, determining the position of a preset keyword which is closest to the current division point according to the position of the current division point, and correspondingly adjusting the position of the current division point according to the position of the preset keyword; the position of the preset keyword is located behind the position of the current segmentation point.
Optionally, the adjusting the position of the current division point according to the position of the preset keyword includes:
and determining the position of a line feed symbol corresponding to the preset keyword according to the position of the preset keyword, and determining the position of the line feed symbol as the position of the current division point.
Optionally, the analyzing, by the sub-threads based on the target number, the timing paths corresponding to the sub-files to obtain the timing path information includes:
and respectively reading texts of time sequence paths to be processed in the subfiles based on the target number of the subfiles, and analyzing the time sequence paths corresponding to the subfiles according to target keywords of the texts of the time sequence paths to be processed so as to obtain the time sequence path information.
In a second aspect, the present application discloses a digital circuit timing statistics apparatus, comprising:
the thread determining module is used for setting the thread number of the time sequence report file to be processed and determining the main threads and the target number of sub threads based on the thread number;
the sub-file acquisition module is used for dividing the to-be-processed time sequence report file based on a preset dividing rule, acquiring corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the to-be-processed time sequence report file according to the adjusted dividing points to obtain the sub-files with the target number;
the analysis module is used for respectively analyzing the time sequence paths corresponding to the subfiles based on the target number of the subfiles to obtain time sequence path information, and respectively carrying out statistics updating on the time sequence path information to obtain statistics results;
and the statistical result merging module is used for merging the statistical results by using the main thread so as to obtain a target time sequence statistical result.
In a third aspect, the present application discloses an electronic device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the steps of the digital circuit timing statistics method disclosed above.
In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program; wherein the computer program when executed by a processor implements the steps of the digital circuit timing statistics method disclosed above.
As can be seen from the above, when the application is used for counting the time sequence of the digital circuit, firstly, the thread number of the time sequence report file to be processed is set, and the main thread and the sub threads with the target number are determined based on the thread number; dividing the to-be-processed time sequence report file based on a preset dividing rule to obtain corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the to-be-processed time sequence report file according to the adjusted dividing points to obtain the sub-files with the target number; analyzing the time sequence paths corresponding to the subfiles based on the target number of the subfiles respectively to obtain time sequence path information, and carrying out statistics updating on the time sequence path information respectively to obtain statistics results; and finally, merging the statistical results by using the main thread to obtain a target time sequence statistical result. Therefore, the application firstly divides the ultra-large detailed time sequence report file according to the number of threads supported by the hardware platform, then adopts a multi-thread concurrent processing mode to allocate one thread to each divided part for analysis processing, and then combines each divided time sequence report in a multi-thread mode to obtain the final time sequence statistical analysis result. Therefore, the running time of the time sequence statistics program can be greatly reduced through multi-thread concurrence, the division points of the file can be adjusted, the situation that the text with the same time sequence cannot be counted because the text is incomplete in two division parts can be avoided, and an accurate time sequence statistics result can be obtained in a shorter running time.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a digital circuit timing statistics method disclosed in the present application;
FIG. 2 is a timing diagram of a digital circuit according to the present disclosure;
FIG. 3 is a flowchart of a timing statistics method for a digital circuit according to one embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a timing statistics device for a digital circuit according to the present application;
fig. 5 is a block diagram of an electronic device according to the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
There is a need in the industry to obtain the most critical timing statistics from the oversized timing report file to guide the later circuit repair and optimization direction, but the existing scheme is basically to simply analyze the file with a scripting language, and the processing time is required to reach tens of hours for tens of GB timing report files. In order to solve the technical problems, the application discloses a digital circuit time sequence statistical method, which can greatly reduce the operation time length through a multithread concurrent processing mode and obtain accurate time sequence statistical results in a relatively reasonable operation time.
Referring to fig. 1, an embodiment of the present application discloses a digital circuit timing statistics method, including:
and S11, setting the thread number of the time sequence report file to be processed, and determining the main thread and the target number of sub threads based on the thread number.
In this embodiment, the method of the present application may be run on a multi-core, multi-threaded, high memory capacity Linux or Unix system computer. Firstly, a program needs to be started in a command line mode, a time sequence report file to be processed is input, and the thread number N is set; it should be noted that, the setting of the thread number is manually set based on the thread number of the hardware, and the thread number can be larger than, equal to or smaller than the thread number of the hardware, specifically, the user needs to be seen, and of course, the thread number of the thread number equal to the thread number of the hardware is the optimal choice, so that the computing power provided by the hardware can be utilized to the maximum extent. Wherein the number of the main threads is 1, and the sum of the number of the main threads and the target number is equal to the number of threads. That is, one of the N threads is the main thread, leaving N-1 sub-threads that can be concurrent.
And step S12, dividing the time sequence report file to be processed based on a preset dividing rule, obtaining corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the time sequence report file to be processed according to the adjusted dividing points to obtain the sub-files with the target number.
In this embodiment, after determining one main thread and N-1 sub threads, as shown in fig. 2, the to-be-processed timing report file is divided based on a rule that the number of bytes of each divided sub file is equal, and the large file is divided into N-1 parts; to avoid the situation that the text of one time sequence path is divided into two parts and cannot be counted, a plurality of dividing points are obtained, the dividing points are required to be correspondingly adjusted according to a preset adjusting rule, and after the dividing points are adjusted, the time sequence report file to be processed is divided according to the adjusted dividing points, so that the sub files with the target number are obtained.
And step S13, analyzing the time sequence paths corresponding to the subfiles based on the target number of the subfiles respectively to obtain time sequence path information, and carrying out statistics updating on the time sequence path information respectively to obtain statistics results.
In this embodiment, multiple threads are concurrent, each thread analyzes and counts time sequence statistical information of a respective part, reads texts of time sequence paths to be processed in each sub-file based on the target number of sub-threads, and analyzes time sequence paths corresponding to each sub-file according to target keywords of the texts of the time sequence paths to be processed, so as to obtain each time sequence path information. Each sub-thread is required to analyze and count the file parts allocated to each sub-thread respectively, read the text of each time sequence path to be processed from the segmented text, analyze the time sequence paths and update the statistical result. The analysis of the timing paths is to analyze the text of the timing paths to obtain the information of each timing path, and to count the information of the timing paths. And analyzing and counting according to the keywords of the time sequence path text. For example:
the line from which "Startpoint" starts is start point information;
the line from "Endpoint" is the Endpoint information;
"Path Group" is followed by timing Path Group information;
the "Path Type" describes whether to establish a timing Path or to hold a timing Path;
the line between the start of "Point" and the first "data arrival time" is information of each stage of the initiation path (trunk path);
the row from "slot" is the final timing margin for the current timing path;
after the information is obtained, the statistical result is updated.
And S14, merging the statistical results by utilizing the main thread to obtain a target time sequence statistical result.
In this embodiment, in this concurrent processing stage, the main thread waits for all the sub threads to finish executing, that is, when the sub threads execute tasks, the main thread does not execute tasks, but only waits for the sub threads to finish executing tasks, then performs its own actions, that is, after counting of each sub thread, returns respective counting results to the main thread, and then the main thread merges the counting results of each sub thread to obtain a total counting result. The timing statistics analysis result comprises the distribution of the margin of the violating timing paths, the number and the minimum margin of the violating timing paths classified according to different starting points/end points, the number and the minimum margin of the violating timing paths classified according to different timing path groups, the minimum margin of the timing paths classified according to the number of the stages of the timing paths, and the path information of the same starting points and different end points which are ordered according to the number of the violating timing paths.
As can be seen from the above, when the application is used for counting the time sequence of the digital circuit, firstly, the thread number of the time sequence report file to be processed is set, and the main thread and the sub threads with the target number are determined based on the thread number; dividing the to-be-processed time sequence report file based on a preset dividing rule to obtain corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the to-be-processed time sequence report file according to the adjusted dividing points to obtain the sub-files with the target number; analyzing the time sequence paths corresponding to the subfiles based on the target number of the subfiles respectively to obtain time sequence path information, and carrying out statistics updating on the time sequence path information respectively to obtain statistics results; and finally, merging the statistical results by using the main thread to obtain a target time sequence statistical result. Therefore, the application firstly divides the ultra-large detailed time sequence report file according to the number of threads supported by the hardware platform, then adopts a multi-thread concurrent processing mode to allocate one thread to each divided part for analysis processing, and then combines each divided time sequence report in a multi-thread mode to obtain the final time sequence statistical analysis result. Therefore, the running time of the time sequence statistics program can be greatly reduced through multi-thread concurrence, the division points of the file can be adjusted, the situation that the text with the same time sequence cannot be counted because the text is incomplete in two division parts can be avoided, and an accurate time sequence statistics result can be obtained in a shorter running time.
Based on the above embodiments, the present application can correspondingly adjust the dividing points according to a preset adjustment rule. Next, a specific description will be made with respect to a process of performing corresponding adjustment of the division points according to a preset adjustment rule. Referring to fig. 3, an embodiment of the present application discloses a specific digital circuit timing statistics method, which includes:
and S21, judging whether the current division point is positioned at the end of the time sequence path text in the time sequence report file to be processed.
In this embodiment, when the file is initially divided, the whole file is divided according to the mode that the byte number of each part is equal, so that the byte where the dividing point is located may be in the middle of the text of a certain time sequence path, and thus the text of the time sequence path is divided into two parts and is separated from the two divided files, and thus the incomplete text of the time sequence path will not be counted correctly. Therefore, fine adjustment of the division points is required, and the fine adjustment of the division points of the file is that after each division point of the file is adjusted to the end of one time sequence text, the next time sequence text is started, or the end of the whole time sequence file is finished, so that the problem that the time sequence paths near the division points cannot be counted correctly is avoided. In this way, it is first determined whether the current partition point is located at the end of the timing path text in the pending timing report file.
And S22, if the current division point is positioned at the end of the file, not adjusting.
In this embodiment, since the texts of different timing paths are not in the same line, at least one line-changing symbol ('is separated between the different timing texts''), only the segmentation point needs to be located to this line-feeder. Since the text of each timing path starts with the keyword "Startpoint", if the current division point is located at the end of the file, the division point is not adjusted any more.
Step S23, if the current division point is not located at the end of the file, determining the position of a preset keyword closest to the current division point according to the position of the current division point; the position of the preset keyword is located behind the position of the current segmentation point.
In this embodiment, if the current partition point is not located at the end of the file, the partition point needs to be searched for. The position of the preset keyword closest to the current division point is first determined according to the position of the current division point, that is, a "start point" keyword closest to the current division point is found.
And step S24, determining the position of a line feeding symbol corresponding to the preset keyword according to the position of the preset keyword, and determining the position of the line feeding symbol as the position of the current division point.
In this embodiment, after finding the last "Startpoint" keyword, the keyword must be preceded by a line-feeding symbol, and then the position of the line-feeding symbol is determined as the position of the current division point. The division point may be adjusted to the position of the divider.
Therefore, the application can avoid that the text of the same time sequence cannot be counted because of incomplete in the two segmentation parts by correspondingly adjusting the segmentation points, thereby ensuring the accuracy of the final counting result.
Referring to fig. 4, an embodiment of the present application discloses a digital circuit timing statistics device, including:
the thread determining module 11 is used for setting the thread number of the to-be-processed time sequence report file and determining the main threads and the target number of sub threads based on the thread number;
the sub-file obtaining module 12 is configured to segment the to-be-processed time sequence report file based on a preset segmentation rule, obtain corresponding segmentation points, correspondingly adjust the segmentation points according to a preset adjustment rule, and segment the to-be-processed time sequence report file according to the adjusted segmentation points to obtain the target number of sub-files;
the analyzing module 13 is configured to analyze the timing paths corresponding to the subfiles based on the target number of the subfiles, so as to obtain each timing path information, and perform statistics update on each timing path information, so as to obtain each statistics result;
the statistics merging module 14 is configured to merge each of the statistics by using the main thread to obtain a target timing statistics.
As can be seen from the above, when the application is used for counting the time sequence of the digital circuit, firstly, the thread number of the time sequence report file to be processed is set, and the main thread and the sub threads with the target number are determined based on the thread number; dividing the to-be-processed time sequence report file based on a preset dividing rule to obtain corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the to-be-processed time sequence report file according to the adjusted dividing points to obtain the sub-files with the target number; analyzing the time sequence paths corresponding to the subfiles based on the target number of the subfiles respectively to obtain time sequence path information, and carrying out statistics updating on the time sequence path information respectively to obtain statistics results; and finally, merging the statistical results by using the main thread to obtain a target time sequence statistical result. Therefore, the application firstly divides the ultra-large detailed time sequence report file according to the number of threads supported by the hardware platform, then adopts a multi-thread concurrent processing mode to allocate one thread to each divided part for analysis processing, and then combines each divided time sequence report in a multi-thread mode to obtain the final time sequence statistical analysis result. Therefore, the running time of the time sequence statistics program can be greatly reduced through multi-thread concurrence, the division points of the file can be adjusted, the situation that the text with the same time sequence cannot be counted because the text is incomplete in two division parts can be avoided, and an accurate time sequence statistics result can be obtained in a shorter running time.
In some specific embodiments, the subfile acquisition module 12 may specifically include:
and the segmentation sub-module is used for segmenting the to-be-processed time sequence report file based on the rule that the byte numbers of the segmented sub-files are equal.
In some specific embodiments, the subfile acquisition module 12 may specifically include:
the first judging submodule is used for judging whether the current division point is positioned at the end of the time sequence path text in the time sequence report file to be processed;
and the adjustment determination submodule is used for determining whether to correspondingly adjust the dividing points or not based on the judging result.
In some specific embodiments, the adjustment determination submodule may specifically include:
the non-adjusting unit is used for not adjusting if the current division point is positioned at the end of the file;
the adjusting unit is used for determining the position of a preset keyword closest to the current division point according to the position of the current division point if the current division point is not positioned at the end of the file, and correspondingly adjusting the position of the current division point according to the position of the preset keyword; the position of the preset keyword is located behind the position of the current segmentation point.
In some specific embodiments, the adjusting unit may specifically include:
and the position determining subunit is used for determining the position of the line feeding symbol corresponding to the preset keyword according to the position of the preset keyword, and determining the position of the line feeding symbol as the position of the current division point.
In some specific embodiments, the parsing module 13 may specifically include:
the time sequence path information acquisition sub-module is used for respectively reading texts of time sequence paths to be processed in the subfiles based on the target number of sub-threads, and analyzing the time sequence paths corresponding to the subfiles according to target keywords of the texts of the time sequence paths to be processed so as to obtain the time sequence path information.
Further, the embodiment of the present application further discloses an electronic device, and fig. 5 is a block diagram of an electronic device 20 according to an exemplary embodiment, where the content of the figure is not to be considered as any limitation on the scope of use of the present application.
Fig. 5 is a schematic structural diagram of an electronic device 20 according to an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input output interface 25, and a communication bus 26. The memory 22 is used for storing a computer program, and the computer program is loaded and executed by the processor 21 to implement relevant steps in the digital circuit timing statistics method disclosed in any of the foregoing embodiments. In addition, the electronic device 20 in the present embodiment may be specifically an electronic computer.
In this embodiment, the power supply 23 is configured to provide an operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and an external device, and the communication protocol in which the communication interface is in compliance is any communication protocol applicable to the technical solution of the present application, which is not specifically limited herein; the input/output interface 25 is used for acquiring external input data or outputting external output data, and the specific interface type thereof may be selected according to the specific application requirement, which is not limited herein.
The memory 22 may be a carrier for storing resources, such as a read-only memory, a random access memory, a magnetic disk, or an optical disk, and the resources stored thereon may include an operating system 221, a computer program 222, and the like, and the storage may be temporary storage or permanent storage.
The operating system 221 is used for managing and controlling various hardware devices on the electronic device 20 and computer programs 222, which may be Windows Server, netware, unix, linux, etc. The computer program 222 may further comprise a computer program capable of performing other specific tasks in addition to the computer program capable of performing the digital circuit timing statistics method performed by the electronic device 20 as disclosed in any of the previous embodiments.
Further, the application also discloses a computer readable storage medium for storing a computer program; wherein the computer program when executed by a processor implements the digital circuit timing statistics method disclosed previously. For specific steps of the method, reference may be made to the corresponding contents disclosed in the foregoing embodiments, and no further description is given here.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The foregoing has outlined rather broadly the more detailed description of the application in order that the detailed description of the application that follows may be better understood, and in order that the present principles and embodiments may be better understood; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.
Claims (10)
1. A digital circuit timing statistics method, comprising:
setting the thread number of a time sequence report file to be processed, and determining a main thread and a target number of sub threads based on the thread number;
dividing the to-be-processed time sequence report file based on a preset dividing rule to obtain corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the to-be-processed time sequence report file according to the adjusted dividing points to obtain the target number of subfiles;
analyzing the time sequence paths corresponding to the subfiles based on the target number of the subfiles respectively to obtain time sequence path information, and carrying out statistics updating on the time sequence path information respectively to obtain statistics results;
and merging the statistical results by using the main thread to obtain a target time sequence statistical result.
2. The digital circuit timing statistics method as recited in claim 1, wherein the number of main threads is 1, and a sum of the number of main threads and the target number is equal to the number of threads.
3. The digital circuit timing statistics method according to claim 1, wherein the partitioning the to-be-processed timing report file based on a preset partitioning rule comprises:
and dividing the time sequence report file to be processed based on the rule that the byte numbers of the divided partial subfiles are equal.
4. The digital circuit timing statistics method according to claim 1, wherein the adjusting the dividing point according to the preset adjustment rule includes:
judging whether the current division point is positioned at the end of a time sequence path text in the time sequence report file to be processed;
and determining whether to correspondingly adjust the dividing points or not based on the judging result.
5. The digital circuit timing statistics method as recited in claim 4, wherein the determining whether to make the corresponding adjustment to the split point based on the determination result comprises:
if the current partition point is positioned at the tail of the file, not adjusting;
if the current division point is not located at the tail of the file, determining the position of a preset keyword which is closest to the current division point according to the position of the current division point, and correspondingly adjusting the position of the current division point according to the position of the preset keyword; the position of the preset keyword is located behind the position of the current segmentation point.
6. The digital circuit timing statistics method according to claim 5, wherein the adjusting the position of the current division point according to the position of the preset keyword comprises:
and determining the position of a line feed symbol corresponding to the preset keyword according to the position of the preset keyword, and determining the position of the line feed symbol as the position of the current division point.
7. The digital circuit timing statistics method according to any one of claims 1 to 6, wherein the analyzing the timing paths corresponding to the subfiles based on the target number of the sub-threads to obtain the timing path information includes:
and respectively reading texts of time sequence paths to be processed in the subfiles based on the target number of the subfiles, and analyzing the time sequence paths corresponding to the subfiles according to target keywords of the texts of the time sequence paths to be processed so as to obtain the time sequence path information.
8. A digital circuit timing statistics apparatus, comprising:
the thread determining module is used for setting the thread number of the time sequence report file to be processed and determining the main threads and the target number of sub threads based on the thread number;
the sub-file acquisition module is used for dividing the to-be-processed time sequence report file based on a preset dividing rule, acquiring corresponding dividing points, correspondingly adjusting the dividing points according to a preset adjusting rule, and dividing the to-be-processed time sequence report file according to the adjusted dividing points to obtain the sub-files with the target number;
the analysis module is used for respectively analyzing the time sequence paths corresponding to the subfiles based on the target number of the subfiles to obtain time sequence path information, and respectively carrying out statistics updating on the time sequence path information to obtain statistics results;
and the statistical result merging module is used for merging the statistical results by using the main thread so as to obtain a target time sequence statistical result.
9. An electronic device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the steps of the digital circuit timing statistics method as claimed in any one of claims 1 to 7.
10. A computer-readable storage medium storing a computer program; wherein the computer program when executed by a processor implements the steps of the digital circuit timing statistics method as claimed in any of claims 1 to 7.
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| CN202311069908.3A CN116805143A (en) | 2023-08-24 | 2023-08-24 | Digital circuit time sequence statistics method, device, equipment and storage medium |
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| CN202311069908.3A CN116805143A (en) | 2023-08-24 | 2023-08-24 | Digital circuit time sequence statistics method, device, equipment and storage medium |
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