CN116801506A - Local thick gold electroplating method for circuit board - Google Patents
Local thick gold electroplating method for circuit board Download PDFInfo
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- CN116801506A CN116801506A CN202210259102.XA CN202210259102A CN116801506A CN 116801506 A CN116801506 A CN 116801506A CN 202210259102 A CN202210259102 A CN 202210259102A CN 116801506 A CN116801506 A CN 116801506A
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- Prior art keywords
- metal layer
- layer
- thick gold
- circuit board
- solder resist
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 title claims abstract description 91
- 238000000034 method Methods 0.000 title claims abstract description 80
- 229910052737 gold Inorganic materials 0.000 title claims abstract description 77
- 239000010931 gold Substances 0.000 title claims abstract description 77
- 238000009713 electroplating Methods 0.000 title claims abstract description 40
- 239000002184 metal Substances 0.000 claims abstract description 175
- 229910052751 metal Inorganic materials 0.000 claims abstract description 175
- 238000005530 etching Methods 0.000 claims abstract description 58
- 229910000679 solder Inorganic materials 0.000 claims description 54
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 34
- 239000010949 copper Substances 0.000 claims description 21
- 229910052759 nickel Inorganic materials 0.000 claims description 17
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 16
- 229910052802 copper Inorganic materials 0.000 claims description 16
- 238000011282 treatment Methods 0.000 claims description 10
- 239000002390 adhesive tape Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 12
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 abstract description 2
- 239000000460 chlorine Substances 0.000 description 10
- 239000000463 material Substances 0.000 description 7
- 238000007650 screen-printing Methods 0.000 description 6
- 239000002253 acid Substances 0.000 description 5
- 229910052801 chlorine Inorganic materials 0.000 description 5
- 238000012546 transfer Methods 0.000 description 5
- 229910021591 Copper(I) chloride Inorganic materials 0.000 description 4
- FAPWRFPIFSIZLT-UHFFFAOYSA-M Sodium chloride Chemical compound [Na+].[Cl-] FAPWRFPIFSIZLT-UHFFFAOYSA-M 0.000 description 4
- OXBLHERUFWYNTN-UHFFFAOYSA-M copper(I) chloride Chemical compound [Cu]Cl OXBLHERUFWYNTN-UHFFFAOYSA-M 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 238000011161 development Methods 0.000 description 4
- 230000018109 developmental process Effects 0.000 description 4
- 238000004381 surface treatment Methods 0.000 description 4
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 238000005553 drilling Methods 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 239000003513 alkali Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000003365 glass fiber Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 230000008929 regeneration Effects 0.000 description 2
- 238000011069 regeneration method Methods 0.000 description 2
- 239000011780 sodium chloride Substances 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000178 monomer Substances 0.000 description 1
- 208000029278 non-syndromic brachydactyly of fingers Diseases 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
Abstract
The invention relates to a local thick gold electroplating method of a circuit board, which comprises the following steps: providing a first circuit board; the first circuit board comprises a first metal layer and a second metal layer, and the first metal layer and the second metal layer are respectively positioned at two opposite ends of the first circuit board; a through hole is formed in the first circuit board; a third metal layer is arranged on the side wall of the through hole, and the third metal layer is respectively connected with the first metal layer and the second metal layer; etching the first metal layer to form a thick gold part to be electroplated and a first etching area; and electroplating the thick gold part to form at least one fourth metal layer on the thick gold part. According to the local thick gold electroplating method for the circuit board, disclosed by the embodiment of the invention, the conductive network of the circuit board is used as a lead wire for thick gold electroplating, so that the manufacturing procedures are reduced, and the manufacturing cost is reduced.
Description
Technical Field
The invention relates to a circuit board, in particular to a local thick gold electroplating method of the circuit board.
Background
In the current production process of circuit boards, electroplating thick gold includes two processes: a process with auxiliary leads and a process without auxiliary leads. The process with auxiliary leads is more conventional and is used for the clamping board, but for the optical module and the USB type board, as the golden finger is a long finger and a short finger (the finger network is required to be conducted successively, or the golden leads cannot be led out at the middle position of the board), the process with the auxiliary leads cannot be suitable for the circuit boards of the types, and therefore, the circuit boards of the types need to be produced by the process without the auxiliary leads.
The existing method for electrically thick gold with auxiliary leads needs to use special materials, the process is complex, and the reject ratio of the process is high, so that the production cost of the method is high. Specifically, the existing production process of the circuit board comprises the following steps: (1) Obtaining a layered circuit board through a previous process, wherein the layered circuit board comprises an upper surface and a lower surface which are oppositely arranged; (2) Mechanically drilling the layered circuit board, and depositing copper on the hole wall to form a metal via hole; (3) Etching the upper and lower surfaces to form lines 1 on the upper and lower surfaces, respectively; (4) Setting silk-screen printing selective ink in a partial area of the circuit 1 so as to enable the surface to be smooth and facilitate the subsequent film pasting; (5) Setting a dry film in a partial area of the circuit 1, and exposing an area needing thick gold; (6) electroplating thick gold in the area where the thick gold is needed; (7) film stripping; (8) Respectively arranging silk-screen selective ink in partial areas of the upper surface and the lower surface; (9) Setting an alkali-resistant etched dry film in a partial region of the upper surface and the lower surface, and exposing a wire region; (10) etching the wire region; (11) providing a solder resist ink on the upper and lower surfaces; and (12) performing character silk screen printing and other post-processing.
Disclosure of Invention
In view of the above analysis, an embodiment of the present invention is to provide a method for locally electroplating thick gold on a circuit board, which is used for solving the problem of high yield in the existing method for electroplating thick gold.
In one aspect, an embodiment of the present invention provides a method for locally electroplating thick gold on a circuit board, including:
providing a first circuit board; the first circuit board comprises a first metal layer and a second metal layer, and the first metal layer and the second metal layer are respectively positioned at two opposite ends of the first circuit board;
a through hole is formed in the first circuit board;
a third metal layer is arranged on the side wall of the through hole, and the third metal layer is respectively connected with the first metal layer and the second metal layer;
etching the first metal layer to form a thick gold part to be electroplated and a first etching area; and
and electroplating the thick gold part to form at least one fourth metal layer on the thick gold part.
According to an embodiment of the present invention, the etched first metal layer includes the thick gold portion and a solder resist portion; the method comprises the following steps: and before the electroplating treatment, setting solder resist ink in the solder resist part, part of the first etching area and the through hole.
According to an embodiment of the present invention, the etched first metal layer is composed of the thick gold portion, the solder resist portion and the film-attaching portion; the method comprises the following steps: and after the solder resist ink is arranged, arranging a dry film or an adhesive tape on the film pasting part.
According to an embodiment of the invention, the method comprises:
after the thick gold part of the first metal layer is subjected to electroplating treatment, etching part of the second metal layer to form a second etching region in the second metal layer; and
and setting solder resist ink on the second metal layer and the second etching area.
According to an embodiment of the invention, the first metal layer and/or the second metal layer comprises copper.
According to an embodiment of the invention, the third metal layer comprises copper.
According to an embodiment of the present invention, the through hole is opened along a thickness direction of the first circuit board.
According to an embodiment of the present invention, the at least one fourth metal layer includes a nickel layer and a gold layer.
According to an embodiment of the present invention, the nickel layer is disposed on the thick gold portion, and the gold layer is disposed on the nickel layer.
According to an embodiment of the present invention, the first wiring board includes a plurality of insulating layers and a plurality of metal layers disposed between the first metal layer and the second metal layer; the multilayer insulating layer comprises a first insulating layer and a fifth insulating layer, wherein the first insulating layer is arranged on the second metal layer, and the fifth insulating layer is arranged on the first metal layer.
According to an embodiment of the present invention, the thick gold portion includes a first surface, a second surface, and a plurality of side surfaces, the first surface and the second surface are disposed opposite to each other, and the plurality of side surfaces connect the first surface and the second surface; the thick gold part is arranged on the fifth insulating layer through the second surface, and the at least one fourth metal layer is arranged on the first surface and the plurality of side surfaces.
According to the local thick gold electroplating method for the circuit board, disclosed by the embodiment of the invention, the conductive network of the circuit board is used as a lead wire for thick gold electroplating, so that the manufacturing procedures are reduced, and the manufacturing cost is reduced.
In the invention, the technical schemes can be mutually combined to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention. Wherein:
fig. 1 and 2 are schematic flow diagrams of a method for locally electroplating thick gold on a circuit board according to an embodiment of the invention;
fig. 3 is a schematic cross-sectional view of a first circuit board with a through hole according to an embodiment of the invention.
The reference numerals are explained as follows:
11. a first metal layer; 12. a second metal layer; 13. a third metal layer; 14. a nickel layer; 15. a gold layer; 21. a first insulating layer; 22. a second insulating layer; 23. a third insulating layer; 24. a fourth insulating layer; 25. a fifth insulating layer; 26. a first intermediate metal layer; 27. a second intermediate metal layer; 30. a through hole; 31. a first etched region; 32. a second etched region; 41. a first solder resist ink layer; 42. a second solder resist ink layer; 60. thick gold portion.
Detailed Description
The following detailed description of preferred embodiments of the invention, which form a part hereof, and together with the description of the invention serve to explain the principles of the invention, are not intended to limit the scope of the invention.
Referring to fig. 1 and 2, an embodiment of the present invention provides a method for locally electroplating thick gold on a circuit board, including:
providing a first circuit board, wherein the first circuit board comprises a first metal layer 11 and a second metal layer 12, and the first metal layer 11 and the second metal layer 12 are respectively positioned on two opposite sides of the first circuit board;
a through hole 30 is formed in the first circuit board;
a third metal layer 13 is arranged on the side wall of the through hole 30, and the third metal layer 13 is respectively connected with the first metal layer 11 and the second metal layer 12;
etching the first metal layer 11 to form a first etched region 31 in the first metal layer 11, and dividing the first metal layer 11 into a thick gold portion 60, a solder resist portion and a film-sticking portion according to an etching pattern; the formation of the first etched region 31 exposes part or all of the sides of the thick gold portion 60; and
electroplating the thick gold portion 60 to form at least one fourth metal layer on the thick gold portion 60;
wherein the second metal layer 12 is a flat plate structure.
In the method for locally electroplating thick gold on the circuit board according to the embodiment of the invention, the first metal layer 11 is etched, the second metal layer 12 is kept to be in a continuous flat structure, and the first metal layer 11 and the second metal layer 12 are electrically connected through the third metal layer 13, so that the subsequent thick gold electroplating process can be performed without connecting extra wires. Therefore, the subsequent process for etching the lead is saved, the manufacturing procedures are reduced, and the manufacturing cost is reduced.
In one embodiment, the first metal layer 11 and the second metal layer 12 are respectively located at two ends of the first circuit board along the thickness direction of the first circuit board.
In one embodiment, the first metal layer 11 and the second metal layer 12 each include copper, for example, may be copper layers.
In an embodiment, the first circuit board is formed by a lamination process.
In one embodiment, the first circuit board includes a plurality of insulating layers and a plurality of metal layers between the first metal layer 11 and the second metal layer 12.
In one embodiment, referring to fig. 3, the multi-layer insulating layers may include a first insulating layer 21, a second insulating layer 22, a third insulating layer 23, a fourth insulating layer 24, and a fifth insulating layer 25; the multiple metal layers may include a first intermediate metal layer 26 and a second intermediate metal layer 27.
In one embodiment, the first insulating layer 21 is disposed on the second metal layer 12; the second insulating layer 22 and the first intermediate metal layer 26 are disposed on the first insulating layer 21, and the first intermediate metal layer 26 is partitioned into a plurality of blocks by the second insulating layer 22; the third insulating layer 23 is disposed on the second insulating layer 22 and the first intermediate metal layer 26; the fourth insulating layer 24 and the second intermediate metal layer 27 are disposed on the third insulating layer 23, and the second intermediate metal layer 27 is partitioned into a plurality of blocks by the fourth insulating layer 24; the fifth insulating layer 25 is disposed on the fourth insulating layer 24 and the second intermediate metal layer 27.
In an embodiment, the materials of the first insulating layer 21, the second insulating layer 22, the third insulating layer 23, the fourth insulating layer 24 and the fifth insulating layer 25 may be a composite material of glass fiber and epoxy resin, and the materials of the first intermediate metal layer 26 and the second intermediate metal layer 27 may be the same as those of the first metal layer 11 and the second metal layer 12, for example, copper layers.
In one embodiment, the through hole 30 may be formed on the first circuit board by mechanical drilling.
In an embodiment, the through hole 30 penetrates the first circuit board along the thickness direction of the first circuit board, for example, the through hole 30 may penetrate the first metal layer 11, the first insulating layer 21, the first intermediate metal layer 26, the third insulating layer 23, the second intermediate metal layer 27, the fifth insulating layer 25 and the second metal layer 12; further, the through hole 30 may be a circular hole.
In one embodiment, the axis of the through hole 30 forms an angle of 80 to 100 °, such as 85 °, 88 °, 90 °, 92 °, 95 °, with the thickness direction of the first circuit board; further, the axial direction of the through hole 30 makes an angle of 80 to 100 °, for example, 85 °, 88 °, 90 °, 92 °, 95 °, with the thickness direction of the first metal layer 11 or the second metal layer 12.
In one embodiment, the third metal layer 13 includes copper, and further, the third metal layer 13 may be a copper layer.
In one embodiment, a portion of the first metal layer 11 is subjected to an image transfer and development etching process to form a first etched region 31 exposing the fifth insulating layer 25, so as to form a predetermined circuit pattern. Further, the first metal layer 11 may be etched using an acid etching process.
In one embodiment, the image transfer, development and etching process comprises: firstly, exposing a dry film (photosensitive material) on the surface of a first metal layer 11 (such as a copper layer) by an ultraviolet exposure machine according to a photographing principle, so as to transfer the designed circuit pattern onto the dry film on the surface of the first metal layer 11; thereafter, 1% Na was used 2 CO 3 The solution dissolves the dry film which is not exposed on the surface of the first metal layer 11, and only the dry film of the required circuit pattern on the surface of the first metal layer 11 is reserved; finally, the exposed copper surface on the surface of the first metal layer 11 is removed by etching solution.
In one embodiment, the etching solution used in the acid etching process comprises CuCl 2 、HCl、NaCl、NH 4 Cl and H 2 O. The etching reaction is as follows: cu+CuCl 2 →Cu 2 Cl 2 The method comprises the steps of carrying out a first treatment on the surface of the Due to Cu 2 Cl 2 Is not easily dissolved in water and is excessiveCl of (2) - In the presence of a soluble complex ion is formed, which reacts as follows: cu (Cu) 2 Cl 2 +4Cl - →2[CuCl 3 ] 2- . Preferably, cuCl is carried out by introducing chlorine into the system 2 The regeneration reaction is as follows: cu (Cu) 2 Cl 2 +Cl 2 →2CuCl 2 The method comprises the steps of carrying out a first treatment on the surface of the Chlorine is a strong oxidant, so that the regeneration rate is high, and the chlorine also has the advantage of low cost. Further, the process parameters of the acid etching process include: spraying and pressing: 2.5+ -1 kg/cm 2 The method comprises the steps of carrying out a first treatment on the surface of the Temperature: 50+/-2 ℃; specific gravity: 1.35+/-0.3; oxidation potential: 18-65; cu (Cu) 2+ ：160±20g/l。
In one embodiment, the first metal layer 11 includes a first surface and a second surface disposed opposite to the first surface, and the second surface is located between the first surface and the second metal layer 12.
In one embodiment, the first metal layer 11 may be divided into a thick gold portion 60, a solder resist portion and a film-attaching portion according to the etched circuit pattern; the thick gold portion 60 (the position where the window is opened) is a region on the first surface where thick gold is to be plated, and the solder resist portion (the position where the window is not opened) is a region on the first surface where thick gold is not to be plated but solder resist ink is to be provided, and the film attaching portion includes, for example, a region where SMT pads are to be made and where solder resist ink is not to be covered. The shape of the thick gold portion 60 and the solder resist portion may be selected according to specific needs.
In one embodiment, the metal surrounding the thick gold portion 60 may be removed by etching to form the first etched region 31, thereby exposing a plurality of sides of the thick gold portion 60 connecting the first surface and the second surface.
In one embodiment, the fourth metal layer covers the first surface and the plurality of sides of the thick gold portion 60 to reduce oxidation and corrosion of the thick gold portion 60 due to partial area exposure.
In an embodiment, the at least one fourth metal layer includes a nickel layer 14 and a gold layer 15, for example, the nickel layer 14 is disposed on the first surface of the thick gold portion 60, and the gold layer 15 is disposed on the nickel layer 14.
In one embodiment, before the electroplating process, a solder resist ink is disposed in the solder resist portion, a portion of the first etched region 31 and the through hole 30 to form a first solder resist ink layer 41, wherein a portion of the first solder resist ink layer 41 is located on the first surface of the solder resist portion, another portion is filled in the through hole 30, and the rest is located in the first etched region 31. The first etching region 31 is not completely filled with solder resist ink, so as to reserve a portion of the first etching region to accommodate the fourth metal layer disposed on the side of the thick gold portion 60.
In one embodiment, the thickness of the first solder resist ink layer 41 at the solder resist portion is 50-100 um, such as 60um, 70um, 80um, 90um.
According to the local thick gold electroplating method for the circuit board, the step of setting the solder resist ink is adjusted to be located between the etching step and the metal electroplating step, and the solder resist ink is used for replacing screen printing selective ink to fill up the height difference of the surface of the circuit board caused by etching, so that the step of setting the screen printing selective ink in the traditional method can be omitted, and the process procedure is shortened; and simultaneously, the side surface of the thick gold part 60 can be covered by an electroplated metal layer, so that the quality risk caused by oxidation and corrosion of a metal surface (such as a copper surface) exposed from the side surface in the use process of the product is reduced.
In one embodiment, the nickel layer 14 covers the first surface and all sides of the portion Yu Houjin, and the gold layer 15 covers the nickel layer 14; the areas of the first etched region 31 where no solder resist ink is printed can be used to accommodate the nickel layer 14 and the gold layer 15 covering the sides of the thick gold portion 60.
In one embodiment, the solder mask ink may be a conventional solder mask ink, for example, including an epoxy photo-monomer, a photoinitiator, a filler, and a colorant.
In one embodiment, the solder resist ink may be disposed in the solder resist portion, a portion of the first etched region 31 and the via hole 30 by printing.
In one embodiment, after the first solder resist ink layer 41 is formed, the first surface of the film-attached portion of the first metal layer 11 is covered with a dry film or an adhesive tape, and then the thick metal portion 60 is subjected to a metal electroplating process to form at least one fourth metal layer.
In one embodiment, the thick gold portion 60 of the first metal layer 11 is subjected to an electroplating process and then the second metal layer 12 is subjected to an etching process.
The local thick gold electroplating method of the circuit board in one embodiment of the invention further comprises the following steps:
etching a portion of the second metal layer 12 to form a second etched region 32 in the second metal layer 12; and
a solder resist ink is disposed over the second metal layer 12 and the second etched region 32.
In one embodiment, a portion of the second metal layer 12 is subjected to an image transfer and development etching process, and a second etching region 32 exposing the first insulating layer 21 is formed in the second metal layer 12, wherein the second etching region 32 is used as an insulating region between lines.
In one embodiment, a solder resist ink may be disposed on second metal layer 12 and second etched region 32 to form second solder resist ink layer 42.
In one embodiment, the etching process of the second etching region 32 and the solder resist ink used may be the same as the etching process of the first etching region 31 and the solder resist ink used.
In one embodiment, after forming the second solder resist ink layer 42, other surface treatments, molding, electrical testing, FQC, packaging, shipment, etc. are performed on the circuit board; other surface treatments include, among others, tin deposition, silver deposition, osp, tin spraying, etc.
According to the local thick gold electroplating method for the circuit board, materials and process steps can be existing materials and methods.
According to the local thick gold electroplating method for the circuit board, disclosed by the embodiment of the invention, the purposes of circuit etching and local thick gold position etching of the electric thick gold are realized by utilizing the conductive network of the circuit board and adopting a step-by-step etching method of firstly etching the first metal layer 11 and then etching the second metal layer 12.
According to the local thick gold electroplating method for the circuit board, the step of setting the solder resist ink is adjusted to be located between the etching step and the metal electroplating step, the uneven surface of the circuit board caused by etching is filled with the solder resist ink, so that the difficulty of three-dimensional film sticking is avoided, and the reject ratio of open circuit is reduced by 3%.
Compared with the existing method, the local thick gold electroplating method for the circuit board has the advantages that the production cost is greatly reduced; specifically, the method of an embodiment of the invention adopts the self conductive network to carry out the circuit, and no extra lead is needed to be introduced, so that compared with the prior method, the alkaline etching process for removing the lead and the process for using special dry film materials are not needed, and the cost can be saved by 66% per square meter in the circuit process. Further, by adjusting the step of setting the solder resist ink, the steps of setting the silk-screen selective ink, setting the dry film and the like can be saved, so that the manufacturing cost is reduced by about 220 yuan/m 2 。
The method for locally electroplating thick gold on the circuit board according to an embodiment of the invention is further described below with reference to the accompanying drawings and specific examples.
Examples
S1: forming a first circuit board by laminating layers; as shown in fig. 3, the first circuit board includes a second metal layer 12, a first insulating layer 21, a second insulating layer 22, a first intermediate metal layer 26, a third insulating layer 23, a fourth insulating layer 24, a second intermediate metal layer 27, a fifth insulating layer 25, and a first metal layer 11 that are stacked, wherein the second insulating layer 22 and the first intermediate metal layer 26 are disposed between the first insulating layer 21 and the third insulating layer 23, and the fourth insulating layer 24 and the second intermediate metal layer 27 are disposed between the third insulating layer 23 and the fifth insulating layer 25; the first metal layer 11, the second metal layer 12, the first intermediate metal layer 26 and the second intermediate metal layer 27 are all copper layers, and the first insulating layer 21, the second insulating layer 22, the third insulating layer 23, the fourth insulating layer 24 and the fifth insulating layer 25 are all made of a composite of glass fibers and epoxy resin;
s2: a circular through hole 30 is formed in the first circuit board, and the through hole 30 penetrates through the first metal layer 11, the first insulating layer 21, the first intermediate metal layer 26, the third insulating layer 23, the second intermediate metal layer 27, the fifth insulating layer 25 and the second metal layer 12 along the thickness direction of the first circuit board; the axis of the through hole 30 is perpendicular to the first metal layer 11;
s3: a third metal layer 13 is arranged on the side wall of the through hole 30, and the third metal layer 13 is a copper layer and completely covers the side wall of the through hole 30 and is connected with the first metal layer 11 and the second metal layer 12;
s4: dividing the first metal layer 11 into a thick gold portion 60, a solder resist portion and a film-sticking portion, etching the portion of the first metal layer 11 surrounding the thick gold portion 60 by the acid etching process to separate the thick gold portion 60 from other portions of the first metal layer 11 and expose a plurality of sides of the thick gold portion 60; meanwhile, a first etched region 31 exposing the fifth insulating layer 25 is formed in the first metal layer 11 by etching; wherein the etching liquid adopted in the acid etching process comprises CuCl 2 、HCl、NaCl、NH 4 Cl and H 2 O；
S5: printing solder resist ink in the solder resist portion, part of the first etched region 31 and the through hole 30 to form a first solder resist ink layer 41; covering the first surface of the film-attaching portion of the first metal layer 11 with a dry film or an adhesive tape;
s6: forming a nickel layer 14 and a gold layer 15 on the thick gold portion 60 by electroplating, wherein the nickel layer 14 covers the first surface and all side surfaces of the Yu Houjin portion 60, and the gold layer 15 covers the nickel layer 14; the areas of the first etched region 31 where no solder resist ink is printed can be used to accommodate the nickel layer 14 and the gold layer 15 covering the sides of the thick gold portion 60;
s7: performing image transfer and development etching treatment on part of the second metal layer 12 to form a second etching region 32 in the second metal layer 12;
s8: providing a solder resist ink over the second metal layer 12 and the second etched region 32 to form a second solder resist ink layer 42;
s9: and carrying out other surface treatment, molding, electrical measurement, FQC, packaging, shipment and other treatments on the circuit board.
In the production process, the open circuit defects in the product are found out and scrapped through AOI (Automated Optical Inspection) and E-T (electrical performance test), and the number of the open circuit scrapped is divided by the total feeding number to obtain the open circuit reject ratio.
Comparative example
(1) Obtaining a layered circuit board through a previous process, wherein the layered circuit board comprises an upper surface and a lower surface which are oppositely arranged;
(2) Mechanically drilling the layered circuit board, and depositing copper on the hole wall to form a metal via hole;
(3) Etching the upper and lower surfaces to form lines 1 on the upper and lower surfaces, respectively;
(4) Setting silk-screen printing selective ink in a partial area of the circuit 1 so as to enable the surface to be smooth and facilitate the subsequent film pasting;
(5) Setting a dry film in a partial area of the circuit 1, and exposing an area needing thick gold;
(6) Electroplating thick gold in the exposed area needing thick gold;
(7) Film stripping;
(8) Respectively arranging silk-screen selective ink in partial areas of the upper surface and the lower surface;
(9) Setting an alkali-resistant etched dry film in a partial region of the upper surface and the lower surface, and exposing a wire region;
(10) Etching the wire region;
(11) Providing solder resist ink on the upper and lower surfaces;
(12) Performing character silk screen printing, other surface treatment, molding, electric measurement, FQC, packaging, shipment and other treatment.
The circuit boards prepared in the examples and the comparative examples were subjected to cost and reject ratio calculation, and the cost of the examples was 1020 yuan/m 2 The reject ratio was 1.5%; the cost of the comparative example was 1240 yuan/m 2 The reject ratio was 4.5%.
The present invention is not limited to the above-mentioned embodiments, and any changes or substitutions that can be easily understood by those skilled in the art within the technical scope of the present invention are intended to be included in the scope of the present invention.
Claims (10)
1. A local thick gold electroplating method of a circuit board comprises the following steps:
providing a first circuit board; the first circuit board comprises a first metal layer and a second metal layer, and the first metal layer and the second metal layer are respectively positioned at two opposite ends of the first circuit board;
a through hole is formed in the first circuit board;
a third metal layer is arranged on the side wall of the through hole, and the third metal layer is respectively connected with the first metal layer and the second metal layer;
etching the first metal layer to form a thick gold part to be electroplated and a first etching area; and
and electroplating the thick gold part to form at least one fourth metal layer on the thick gold part.
2. The method of claim 1, wherein the etched first metal layer comprises the thick gold portion and a solder resist portion; the method comprises the following steps: and before the electroplating treatment, setting solder resist ink in the solder resist part, part of the first etching area and the through hole.
3. The method of claim 2, wherein the etched first metal layer is comprised of the thick gold portion, the solder resist portion, and a film-attaching portion; the method comprises the following steps: and after the solder resist ink is arranged, arranging a dry film or an adhesive tape on the film pasting part.
4. The method according to claim 1, comprising:
after the thick gold part of the first metal layer is subjected to electroplating treatment, etching part of the second metal layer to form a second etching region in the second metal layer; and
and setting solder resist ink on the second metal layer and the second etching area.
5. The method of claim 1, wherein the first metal layer and/or the second metal layer comprises copper.
6. The method of claim 1, wherein the third metal layer comprises copper.
7. The method of any one of claims 1 to 6, wherein the at least one fourth metal layer comprises a nickel layer and a gold layer.
8. The method of any one of claims 1 to 7, wherein the nickel layer is disposed on the thick gold portion, the gold layer being disposed on the nickel layer.
9. The method of claim 7, wherein the first wiring board comprises a plurality of insulating layers and a plurality of metal layers disposed between the first metal layer and the second metal layer; the multilayer insulating layer comprises a first insulating layer and a fifth insulating layer, wherein the first insulating layer is arranged on the second metal layer, and the fifth insulating layer is arranged on the first metal layer.
10. The method of claim 9, wherein the thick gold portion comprises a first surface, a second surface, and a plurality of sides, the first surface and the second surface disposed opposite each other, the plurality of sides connecting the first surface and the second surface; the thick gold part is arranged on the fifth insulating layer through the second surface, and the at least one fourth metal layer is arranged on the first surface and the plurality of side surfaces.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210259102.XA CN116801506A (en) | 2022-03-16 | 2022-03-16 | Local thick gold electroplating method for circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210259102.XA CN116801506A (en) | 2022-03-16 | 2022-03-16 | Local thick gold electroplating method for circuit board |
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| Publication Number | Publication Date |
|---|---|
| CN116801506A true CN116801506A (en) | 2023-09-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210259102.XA Pending CN116801506A (en) | 2022-03-16 | 2022-03-16 | Local thick gold electroplating method for circuit board |
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| Country | Link |
|---|---|
| CN (1) | CN116801506A (en) |
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2022
- 2022-03-16 CN CN202210259102.XA patent/CN116801506A/en active Pending
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