CN116801143B - Method and system for using BOB (BOB) by downstream optical port of FTTR (fiber to the Home) main gateway - Google Patents
Method and system for using BOB (BOB) by downstream optical port of FTTR (fiber to the Home) main gateway Download PDFInfo
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Abstract
The invention provides a method and a system for using a BOB (Brillouin optical fiber) for a downlink optical port of an FTTR (fiber to the Home) main gateway, and relates to the technical field of optical network equipment. Under the condition that the ONU main control is externally hung with a FLASH memory, a space is opened up in the FLASH memory and is used for storing the calibration data of the BOB used by the downlink optical port; three parts of the ONU master control, the FPGA chip and the BOB driving chip are connected through an I2C communication interface, and a GPIO control right link is added between the ONU master control and the FPGA chip, so that the distribution of the I2C communication control right is ensured to be accurate and orderly; in addition, because the ONU master control replaces the traditional MCU to control the BOB drive, the hardware cost is saved, complex wiring arrangement can be avoided, the ONU master control function is more powerful, and more complex calibration data management steps can be executed on the basis of constructing a calibration data_equipment list, so that a better calibration effect is obtained.
Description
Technical Field
The invention relates to the technical field of optical network equipment, in particular to a method and a system for using a BOB (boil off from) for a downlink optical port of an FTTR (fiber to the Home) main gateway.
Background
The FTTR technical scheme is that home networking is carried out through an optical fiber medium, an FTTR main gateway is deployed in a distribution box or a key position, and the main gateway is taken as a core, and an optical network of the FTTR is formed through an optical splitter and a single-core bidirectional optical fiber. The FTTR master gateway network is arranged between the OLT and the slave gateway, is connected with the OLT through the home optical network, and is used for providing the home optical network to connect the slave gateway downwards, so that the FTTR master gateway provides greater flexibility for the FTTR networking compared with the FTTH networking.
The hardware of the current FTTR main gateway is mostly an ONU main control chip, and is connected with an FPGA chip to realize a single-port OLT, and the single-port OLT has a downlink PON port. Because the optical module technology is mature, the downlink PON port generally adopts the optical module to perform equipment, and the FPGA can read the information of the optical module or control the light emission of the optical module. However, the optical module also has the defect of high cost, so that the existing FTTR main gateway also has the BOB scheme, thereby greatly saving the cost.
However, the BOSA device used in the existing BOB scheme has a cost advantage compared with the optical module, but the on-board design is more complex and has requirements on hardware and software, the BOB driver needs to be controlled by the MCU, and the calibration data is stored by the EEPROM; this clearly increases the implementation difficulty and deployment cost of the BOB scheme.
Therefore, it is necessary to provide a method and a system for using BOB for the FTTR primary gateway downstream optical port to solve the above technical problems.
Disclosure of Invention
In order to solve the technical problems, the invention provides a system for using a BOB for a downlink optical port of an FTTR main gateway, which comprises an ONU main control, an FPGA chip, a BOB driving chip and a BOSA device;
the BOSA device is used as a downlink optical port of the FTTR main gateway to be arranged and is electrically connected with the BOB driving chip; the BOB driving chip is respectively and electrically connected with the ONU master control and the FPGA chip through the I2C communication interface, and the ONU master control and the FPGA chip are in bidirectional communication connection through the HSGMII communication interface; the ONU main control is externally hung with a FLASH memory, and opens up a space in the FLASH memory for storing the calibration data of the BOB used by the downlink optical port;
when an I2C communication interface is used for electric connection, the BOB driving chip is used as I2C SLAVE equipment, the ONU main control and the FPGA chip are simultaneously used as I2C MASTER equipment of the BOB driving chip for setting, and one GPIO interface is respectively selected from the ONU main control and the FPGA chip for docking, so that the GPIO interface is set as a GPIO control right link; the GPIO control right link is used for determining the I2C communication control right by the ONU main control and the FPGA chip.
As a further solution, a control protocol is set in the ONU master control and the FPGA chip together, and the control protocol is used to cooperate with both parties to determine the control right; the ONU master control performs control right adjustment by pulling high/low through a GPIO interface, and obtains I2C communication control right when the GPIO control right link is in high potential; and when the GPIO control right link is in a low potential, the FPGA chip obtains the I2C communication control right.
As a further solution, the FLASH memory performs data modification locking on the calibration data, and manages the calibration data through a calibration data_device list; the calibration data_device list includes: a BOSA device model item, a BOB driver chip model item, a calibration data item, and an original calibration data item; the original calibration data item is used for storing original calibration data of the BOSA device when the BOSA device performs factory calibration, and the calibration data item is used for storing calibration data after data conversion by the BOB driver chip driver.
The method for using the BOB by the downlink optical port of the FTTR main gateway is applied to the system using the BOB by the downlink optical port of the FTTR main gateway, and is characterized by comprising the following steps of:
powering up equipment, and starting an FTTR main gateway;
the ONU main control pulls up the GPIO control right link voltage through the GPIO interface;
according to a control protocol, an ONU main control obtains I2C communication control rights, and an FPGA chip keeps silent;
the ONU main control obtains the model of the BOB driving chip and the model of the BOSA device, and inquires corresponding calibration data in a calibration data_equipment list;
when calibration data is queried: the ONU main control acquires calibration data and writes the calibration data into the BOB driving chip;
when no calibration data is found: the BOB initialization and calibration fails, and error information is returned;
after the calibration data writing/returning error information is completed, the GPIO control right link voltage is pulled down, the FPGA chip obtains the I2C communication control right and releases silence, and the BOB initialization calibration is finished.
As a still further solution, BOB conditional calibration is performed by:
the FTTR main gateway continuously monitors the calibration condition and executes the next step when the condition is triggered; wherein the calibration conditions include: timing calibration, error calibration and active calibration;
the ONU master control sends a calibration request to the FPGA chip through the HSGMII communication interface,
the FPGA chip receives the calibration request and sends a calibration response to the ONU master control after the current control action is completed;
the ONU main control pulls up the GPIO control right link voltage through the GPIO interface;
according to a control protocol, an ONU main control obtains I2C communication control rights, and an FPGA chip keeps silent;
the ONU main control obtains the model of the BOB driving chip and the model of the BOSA device, and inquires corresponding calibration data in a calibration data_equipment list;
when calibration data is queried: the ONU main control acquires calibration data and writes the calibration data into the BOB driving chip;
when no calibration data is found: the BOB conditional calibration fails, and error information is returned;
after the calibration data writing/returning error information is completed, the GPIO control right link voltage is pulled down, the FPGA chip obtains the I2C communication control right and releases silence, and the BOB conditional calibration is finished.
As a still further solution, the timing calibration: performing a BOB-conditioned calibration at a predetermined time period or a predetermined point in time; error calibration: and executing BOB conditional calibration when the communication interference error exceeds a preset range.
As a further solution, when the BOB driver chip changes, BOB driver change calibration is performed by:
inquiring whether the modified BOB driving chip model exists in the calibration data_equipment list;
if yes, directly calling calibration data corresponding to the model of the BOB driving chip after being changed, and jumping to execute the last step;
if the BOB driver chip model does not exist, acquiring the changed BOB driver chip model and a corresponding driver program, and sequentially executing the next step;
inputting the original calibration data into a driver of the BOB driver chip after modification, and obtaining the calibration data through data conversion;
creating a model item and a corresponding calibration data item of the BOB driving chip to finish updating the list of the calibration data_equipment;
and triggering active calibration, and changing the current calibration data into the calibration data corresponding to the BOB driving chip.
As a further solution, when a BOSA device change occurs, a BOSA device change calibration is performed by:
acquiring original calibration data corresponding to the BOSA device after the change;
acquiring the current BOB driving chip model and a corresponding driving program;
respectively inputting the original calibration data of the BOSA device after the change into the dynamic program of each BOB driving chip to obtain the calibration data;
creating a BOSA device model item, and integrally updating the calibration data item to finish updating the calibration data_equipment list;
and triggering active calibration, and changing the current calibration data into the calibration data of the BOSA device after the current BOB driving chip is correspondingly changed.
As a further solution, the calibration data_device list can be updated through an upgrade package, the ONU master control performs data modification and unlocking on the calibration data after verifying the security of the upgrade package, and triggers active calibration after the update is completed, so as to change the current calibration data into updated calibration data.
Compared with the related art, the method and the system for using the BOB for the downlink optical port of the FTTR main gateway have the following beneficial effects:
under the condition that the ONU main control is externally hung with a FLASH memory, a space is opened up in the FLASH memory and is used for storing the calibration data of the BOB used by the downlink optical port; three parts of the ONU master control, the FPGA chip and the BOB driving chip are connected through an I2C communication interface, and a GPIO control right link is added between the ONU master control and the FPGA chip, so that the distribution of the I2C communication control right is ensured to be accurate and orderly; in addition, because the ONU master control replaces the traditional MCU to control the BOB drive, the hardware cost is saved, complex wiring arrangement can be avoided, the ONU master control function is more powerful, and more complex calibration data management steps can be executed on the basis of constructing a calibration data_equipment list, so that a better calibration effect is obtained.
Drawings
Fig. 1 is a schematic structural diagram of a system using BOB for a downstream optical port of an FTTR main gateway according to the present invention;
fig. 2 is a schematic diagram of a connection structure of an I2C communication interface according to the present invention;
FIG. 3 is a schematic diagram illustrating a BOSA device calibration change according to the present invention;
FIG. 4 is a schematic diagram showing a BOB driver chip modification calibration;
fig. 5 is a second schematic diagram of a BOB driver chip modification calibration according to the present invention.
Detailed Description
The invention will be further described with reference to the drawings and embodiments.
As shown in fig. 1, the system for using BOB for the downstream optical port of the FTTR main gateway provided in this embodiment includes an ONU master control, an FPGA chip, a BOB driving chip, and a BOSA device;
the BOSA device is used as a downlink optical port of the FTTR main gateway to be arranged and is electrically connected with the BOB driving chip; the BOB driving chip is respectively and electrically connected with the ONU master control and the FPGA chip through the I2C communication interface, and the ONU master control and the FPGA chip are in bidirectional communication connection through the HSGMII communication interface; the ONU main control is externally hung with a FLASH memory, and opens up a space in the FLASH memory for storing the calibration data of the BOB used by the downlink optical port;
when an I2C communication interface is used for electric connection, the BOB driving chip is used as I2C SLAVE equipment, the ONU main control and the FPGA chip are simultaneously used as I2C MASTER equipment of the BOB driving chip for setting, and one GPIO interface is respectively selected from the ONU main control and the FPGA chip for docking, so that the GPIO interface is set as a GPIO control right link; the GPIO control right link is used for determining the I2C communication control right by the ONU main control and the FPGA chip.
It should be noted that: when the existing FTTR main gateway sets a downlink PON port, a BOB scheme and an optical module scheme exist: the design is more complex and requires both hardware and software. In terms of hardware, since the BOB scheme requires calibration of Bosa at the time of product production, and the calibration data is stored locally, the calibration data is imported at the time of device power-up. In the whole design of the FTTR main gateway, since the FPGA chip is not provided with any storage device, an MCU and an EEPROM are added between the FPGA and the BOB driving chip, the BOB driving is controlled by the MCU, and the calibration data is stored by the EEPROM.
The application number is as follows: the application of CN201910920247.8 provides an automatic loading method of a home gateway BOB module ED, namely a scheme of writing parameters required by normal operation of BOB into an EEPROM on line is adopted, and the BOB chip is specifically proposed to complete the configuration of a register by reading the EEPROM; among them, EEPROM can provide a storage mode that is easy to modify and reliable, but it requires more additional hardware support, such as a high voltage generator and a complex control circuit, and is also more expensive.
Therefore, in the case that the ONU master control is externally hung with the FLASH memory, the embodiment opens up a space in the FLASH memory for storing the calibration data of the BOB used by the downstream optical port; three parts of the ONU master control, the FPGA chip and the BOB driving chip are connected through an I2C communication interface, and a GPIO control right link is added between the ONU master control and the FPGA chip, so that the distribution of the I2C communication control right is ensured to be accurate and orderly; in addition, because the ONU master control replaces the traditional MCU to control the BOB drive, the hardware cost is saved, complex wiring arrangement can be avoided, the ONU master control function is more powerful, more complex calibration data management steps can be executed, and a better calibration effect is obtained.
Note that: the BOB calibration data is relatively small, and at maximum, only a few kbytes. The FLASH space of the ONU main control plug-in has 512Mbyte, only 1M space is needed to be separated for storing BOB calibration data, and redundant space is needed for backup.
As a further solution, a control protocol is set in the ONU master control and the FPGA chip together, and the control protocol is used to cooperate with both parties to determine the control right; the ONU master control performs control right adjustment by pulling high/low through a GPIO interface, and obtains I2C communication control right when the GPIO control right link is in high potential; and when the GPIO control right link is in a low potential, the FPGA chip obtains the I2C communication control right.
It should be noted that: as shown in fig. 2, the I2C communication interface leads out an SDA path and an SCL path, and the ONU master control and the FPGA chip are provided with the same control coordination so as to orderly perform the authorization through the GPIO control authorization link, the ONU master control can actively regulate and control the I2C communication control authorization by adjusting the level of the GPIO interface, and the FPGA chip continuously scans the level of the corresponding GPIO interface, thereby achieving the coordination authorization with the ONU master control.
As a further solution, the FLASH memory performs data modification locking on the calibration data, and manages the calibration data through a calibration data_device list; the calibration data_device list includes: a BOSA device model item, a BOB driver chip model item, a calibration data item, and an original calibration data item; the original calibration data item is used for storing original calibration data of the BOSA device when the BOSA device performs factory calibration, and the calibration data item is used for storing calibration data after data conversion by the BOB driver chip driver.
It should be noted that: when the BOSA device leaves the factory, certain physical deviation exists, so that the factory calibration is needed, original calibration data aiming at the BOSA device is obtained, the original calibration data cannot be directly applied to BOB driver calibration, so that the original calibration data is converted into calibration data which can be read, understood and used by a BOB driver chip, however, the driver programs of each BOB driver chip are different, and the calibration data obtained through the conversion of the driver programs are also different; that is to say: the BOSA device model item and the original calibration data item are bound one by one, the BOB driving chip model item and the driving program are bound one by one, the calibration data is correspondingly generated according to the BOSA device model item and the BOB driving chip model, one or more downlink PON ports exist in each device in the FTTR main gateway, and different conditions exist in the BOB driving chip and the BOSA device selected between each device and the downlink PON port; therefore, we need to build a list of calibration data_devices to manage and call these data in order, and call the corresponding calibration data for the existing specific situation, so as to achieve the accuracy of calibration.
The method for using the BOB by the downlink optical port of the FTTR main gateway is applied to the system using the BOB by the downlink optical port of the FTTR main gateway, and is characterized by comprising the following steps of:
powering up equipment, and starting an FTTR main gateway;
the ONU main control pulls up the GPIO control right link voltage through the GPIO interface;
according to a control protocol, an ONU main control obtains I2C communication control rights, and an FPGA chip keeps silent;
the ONU main control obtains the model of the BOB driving chip and the model of the BOSA device, and inquires corresponding calibration data in a calibration data_equipment list;
when calibration data is queried: the ONU main control acquires calibration data and writes the calibration data into the BOB driving chip;
when no calibration data is found: the BOB initialization and calibration fails, and error information is returned;
after the calibration data writing/returning error information is completed, the GPIO control right link voltage is pulled down, the FPGA chip obtains the I2C communication control right and releases silence, and the BOB initialization calibration is finished.
It should be noted that: on the basis of constructing a calibration data_equipment list, the ONU master control can realize more complex calibration steps; the BOB initialization calibration is to perform routine calibration when the device is started, so that smooth communication of the FTTR main gateway is ensured.
As a still further solution, BOB conditional calibration is performed by:
the FTTR main gateway continuously monitors the calibration condition and executes the next step when the condition is triggered; wherein the calibration conditions include: timing calibration, error calibration and active calibration;
the ONU master control sends a calibration request to the FPGA chip through the HSGMII communication interface,
the FPGA chip receives the calibration request and sends a calibration response to the ONU master control after the current control action is completed;
the ONU main control pulls up the GPIO control right link voltage through the GPIO interface;
according to a control protocol, an ONU main control obtains I2C communication control rights, and an FPGA chip keeps silent;
the ONU main control obtains the model of the BOB driving chip and the model of the BOSA device, and inquires corresponding calibration data in a calibration data_equipment list;
when calibration data is queried: the ONU main control acquires calibration data and writes the calibration data into the BOB driving chip;
when no calibration data is found: the BOB conditional calibration fails, and error information is returned;
after the calibration data writing/returning error information is completed, the GPIO control right link voltage is pulled down, the FPGA chip obtains the I2C communication control right and releases silence, and the BOB conditional calibration is finished.
It should be noted that: the BOB conditional calibration is to automatically perform a calibration step when a calibration condition is triggered, so as to increase the number of FTTR primary gateways to perform high-quality communication under a specific condition.
As a still further solution, the timing calibration: performing a BOB-conditioned calibration at a predetermined time period or a predetermined point in time; error calibration: and executing BOB conditional calibration when the communication interference error exceeds a preset range.
As a further solution, when the BOB driver chip changes, BOB driver change calibration is performed by:
inquiring whether the modified BOB driving chip model exists in the calibration data_equipment list;
if yes, directly calling calibration data corresponding to the model of the BOB driving chip after being changed, and jumping to execute the last step;
if the BOB driver chip model does not exist, acquiring the changed BOB driver chip model and a corresponding driver program, and sequentially executing the next step;
inputting the original calibration data into a driver of the BOB driver chip after modification, and obtaining the calibration data through data conversion;
creating a model item and a corresponding calibration data item of the BOB driving chip to finish updating the list of the calibration data_equipment;
and triggering active calibration, and changing the current calibration data into the calibration data corresponding to the BOB driving chip.
It should be noted that: when the BOB driver chip is changed (e.g., the BOB driver chip is replaced), if the BOB driver chip is replaced, the current calibration data may be changed through the steps shown in fig. 4, and if the BOB driver chip is not used, the current calibration data may be changed through the steps shown in fig. 5, and the calibration data_device list may be updated.
As a further solution, when a BOSA device change occurs, a BOSA device change calibration is performed by:
acquiring original calibration data corresponding to the BOSA device after the change;
acquiring the current BOB driving chip model and a corresponding driving program;
respectively inputting the original calibration data of the BOSA device after the change into the dynamic program of each BOB driving chip to obtain the calibration data;
creating a BOSA device model item, and integrally updating the calibration data item to finish updating the calibration data_equipment list;
and triggering active calibration, and changing the current calibration data into the calibration data of the BOSA device after the current BOB driving chip is correspondingly changed.
It should be noted that: as shown in fig. 3, when the BOSA device is changed (e.g., the BOSA device is replaced), the original calibration data is changed, all the corresponding calibration data are changed, each calibration data needs to be updated, the update of the calibration data_equipment list is completed, and then the current calibration data is changed to the calibration data of the BOSA device after the corresponding change of the current BOB driver chip, so as to obtain an accurate BOB calibration effect.
As a further solution, the calibration data_device list can be updated through an upgrade package, the ONU master control performs data modification and unlocking on the calibration data after verifying the security of the upgrade package, and triggers active calibration after the update is completed, so as to change the current calibration data into updated calibration data.
It should be noted that: because relevant control is directly carried out through the ONU master control, the local upgrade package can be received through the ONU master control to carry out the calibration and the update of the FTTR master gateway, so that the list update can be conveniently carried out after the BOB driving chip/BOSA device is locally maintained, and the equipment after maintenance is adapted; the cloud upgrade package is convenient for the overall maintenance and management of the network.
The foregoing is only illustrative of the present invention and is not to be construed as limiting the scope of the invention, and all equivalent structures or equivalent flow modifications which may be made by the teachings of the present invention and the accompanying drawings or which may be directly or indirectly employed in other related art are within the scope of the invention.
Claims (9)
1. The system for using the BOB by the downlink optical port of the FTTR main gateway is characterized by comprising an ONU main control, an FPGA chip, a BOB driving chip and a BOSA device;
the BOSA device is used as a downlink optical port of the FTTR main gateway to be arranged and is electrically connected with the BOB driving chip; the BOB driving chip is respectively and electrically connected with the ONU master control and the FPGA chip through the I2C communication interface, and the ONU master control and the FPGA chip are in bidirectional communication connection through the HSGMII communication interface; the ONU main control is externally hung with a FLASH memory, and opens up a space in the FLASH memory for storing the calibration data of the BOB used by the downlink optical port;
when an I2C communication interface is used for electric connection, the BOB driving chip is used as I2C SLAVE equipment, the ONU main control and the FPGA chip are simultaneously used as I2C MASTER equipment of the BOB driving chip for setting, and one GPIO interface is respectively selected from the ONU main control and the FPGA chip for docking, so that the GPIO interface is set as a GPIO control right link; the GPIO control right link is used for determining the I2C communication control right by the ONU main control and the FPGA chip.
2. The system for using BOB for the downstream optical port of the FTTR host gateway according to claim 1, wherein a control protocol is set in the ONU master control and the FPGA chip together, and the control protocol is used to cooperate with both parties to determine the control right; the ONU master control performs control right adjustment by pulling high/low through a GPIO interface, and obtains I2C communication control right when the GPIO control right link is in high potential; and when the GPIO control right link is in a low potential, the FPGA chip obtains the I2C communication control right.
3. The system of claim 1, wherein the FLASH memory performs data modification locking on the calibration data and manages the calibration data through a calibration data_device list; the calibration data_device list includes: a BOSA device model item, a BOB driver chip model item, a calibration data item, and an original calibration data item; the original calibration data item is used for storing original calibration data of the BOSA device when the BOSA device performs factory calibration, and the calibration data item is used for storing calibration data after data conversion by the BOB driver chip driver.
4. A method for using BOB for an FTTR main gateway downstream optical port, which is applied to a system for using BOB for an FTTR main gateway downstream optical port as set forth in any one of claims 1 to 3, wherein the BOB initialization calibration is performed by:
powering up equipment, and starting an FTTR main gateway;
the ONU main control pulls up the GPIO control right link voltage through the GPIO interface;
according to a control protocol, an ONU main control obtains I2C communication control rights, and an FPGA chip keeps silent;
the ONU main control obtains the model of the BOB driving chip and the model of the BOSA device, and inquires corresponding calibration data in a calibration data_equipment list;
when calibration data is queried: the ONU main control acquires calibration data and writes the calibration data into the BOB driving chip;
when no calibration data is found: the BOB initialization and calibration fails, and error information is returned;
after the calibration data writing/returning error information is completed, the GPIO control right link voltage is pulled down, the FPGA chip obtains the I2C communication control right and releases silence, and the BOB initialization calibration is finished.
5. The method of using BOB for FTTR host gateway downstream optical port as set forth in claim 4, wherein BOB conditional calibration is performed by:
the FTTR main gateway continuously monitors the calibration condition and executes the next step when the condition is triggered; wherein the calibration conditions include: timing calibration, error calibration and active calibration;
the ONU master control sends a calibration request to the FPGA chip through the HSGMII communication interface,
the FPGA chip receives the calibration request and sends a calibration response to the ONU master control after the current control action is completed;
the ONU main control pulls up the GPIO control right link voltage through the GPIO interface;
according to a control protocol, an ONU main control obtains I2C communication control rights, and an FPGA chip keeps silent;
the ONU main control obtains the model of the BOB driving chip and the model of the BOSA device, and inquires corresponding calibration data in a calibration data_equipment list;
when calibration data is queried: the ONU main control acquires calibration data and writes the calibration data into the BOB driving chip;
when no calibration data is found: the BOB conditional calibration fails, and error information is returned;
after the calibration data writing/returning error information is completed, the GPIO control right link voltage is pulled down, the FPGA chip obtains the I2C communication control right and releases silence, and the BOB conditional calibration is finished.
6. The method of using BOB for FTTR host gateway downstream optical port as set forth in claim 5, wherein the timing calibration: performing a BOB-conditioned calibration at a predetermined time period or a predetermined point in time; error calibration: and executing BOB conditional calibration when the communication interference error exceeds a preset range.
7. The method for using BOB for the FTTR host gateway downstream optical port of claim 5, wherein when the BOB driver chip is changed, the BOB driver change calibration is performed by:
inquiring whether the modified BOB driving chip model exists in the calibration data_equipment list;
if yes, directly calling calibration data corresponding to the model of the BOB driving chip after being changed, and jumping to execute the last step;
if the BOB driver chip model does not exist, acquiring the changed BOB driver chip model and a corresponding driver program, and sequentially executing the next step;
inputting the original calibration data into a driver of the BOB driver chip after modification, and obtaining the calibration data through data conversion;
creating a model item and a corresponding calibration data item of the BOB driving chip to finish updating the list of the calibration data_equipment;
and triggering active calibration, and changing the current calibration data into the calibration data corresponding to the BOB driving chip.
8. The method of using BOB for the FTTR host gateway downstream optical port of claim 5, wherein when the BOSA device is changed, the BOSA device change calibration is performed by:
acquiring original calibration data corresponding to the BOSA device after the change;
acquiring the current BOB driving chip model and a corresponding driving program;
respectively inputting the original calibration data of the BOSA device after the change into the dynamic program of each BOB driving chip to obtain the calibration data;
creating a BOSA device model item, and integrally updating the calibration data item to finish updating the calibration data_equipment list;
and triggering active calibration, and changing the current calibration data into the calibration data of the BOSA device after the current BOB driving chip is correspondingly changed.
9. The method for using BOB for the FTTR host gateway downstream optical port according to claim 5, wherein the list of calibration data_devices is updated by an upgrade package, the ONU master control verifies the security of the upgrade package, performs data modification and unlocking on the calibration data, and triggers active calibration after the update is completed, so as to change the current calibration data into updated calibration data.
Priority Applications (1)
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