CN116783639A - Display device and electronic apparatus - Google Patents
Display device and electronic apparatus Download PDFInfo
- Publication number
- CN116783639A CN116783639A CN202280012781.9A CN202280012781A CN116783639A CN 116783639 A CN116783639 A CN 116783639A CN 202280012781 A CN202280012781 A CN 202280012781A CN 116783639 A CN116783639 A CN 116783639A
- Authority
- CN
- China
- Prior art keywords
- group
- insulator
- pixel circuits
- light emitting
- conductive film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
An embodiment of the present invention provides a novel display device excellent in convenience, practicality, and reliability. A display device is provided that includes a first set of pixels, a second set of pixels, a first conductive film, and a second conductive film, wherein the first set of pixels includes a first set of light emitting devices and a first set of pixel circuits, the first set of pixel circuits includes a first set of pixel circuits, and the first set of pixel circuits includes a first pixel circuit. The second group of pixels comprises a second group of light emitting devices and a second group of pixel circuits, the second group of light emitting devices are electrically connected with the second group of pixel circuits, the second group of pixel circuits comprises a second group of pixel circuits, and the second group of pixel circuits comprises a second pixel circuit. The first conductive film is electrically connected with the first group of pixel circuits and the second group of pixel circuits. The second conductive film is electrically connected to the first pixel circuit and the second pixel circuit.
Description
Technical Field
One embodiment of the present invention relates to a display device, an electronic apparatus, or a semiconductor device.
Note that one embodiment of the present invention is not limited to the above-described technical field. The technical field of one embodiment of the invention disclosed in the present specification and the like relates to an object, a method, or a manufacturing method. In addition, one embodiment of the present invention relates to a process, a machine, a product, or a composition (composition of matter). More specifically, examples of the technical field of one embodiment of the present invention disclosed in the present specification include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method of these devices, and a manufacturing method of these devices.
Background
A display having a small chromaticity change with respect to a current density micro light emitting diode is known (patent document 1). Specifically, each of the plurality of pixels includes a display element and a microcontroller. The microcontroller comprises a first transistor, a triangular wave generating circuit, a comparator, a switch and a constant current circuit. The first transistor has a function of holding a potential corresponding to data written to the pixel in an off state. The triangular wave generating circuit has a function of generating a triangular wave signal. The comparator has a function of generating an output signal corresponding to the held potential, the signal of the triangular wave. The switch has a function of controlling whether or not to cause a current flowing through the constant current circuit to flow through the display element in accordance with the output signal.
[ Prior Art literature ]
[ patent literature ]
Patent document 1 international patent application publication No. WO2019/130138 booklet
Disclosure of Invention
Technical problem to be solved by the invention
An object of one embodiment of the present invention is to provide a novel display device excellent in convenience, practicality, or reliability. Further, an object of one embodiment of the present invention is to provide a novel electronic device excellent in convenience, practicality, or reliability. Further, it is an object of one embodiment of the present invention to provide a novel display device, a novel electronic apparatus, or a novel semiconductor device.
Note that the description of these objects does not hinder the existence of other objects. Note that one embodiment of the present invention is not required to achieve all of the above objects. Objects other than the above objects are apparent from and can be extracted from the description of the specification, drawings, claims, and the like.
Means for solving the technical problems
(1) One embodiment of the present invention is a display device including a first group of pixels, a second group of pixels, a third group of pixels, a first conductive film, and a second conductive film.
The first set of pixels includes a first set of light emitting devices, a first pad, a second pad, a conductive material, and a first set of pixel circuits.
The first group of light emitting devices is electrically connected to the first pad, and the first pad overlaps the second pad. A conductive material is sandwiched between the first pad and the second pad, and the conductive material electrically connects the first pad and the second pad. The second pads are electrically connected with the first group of pixel circuits.
The first group of pixel circuits includes a first group of pixel circuits, and the first group of pixel circuits includes a first pixel circuit.
The second group of pixels comprises a second group of light emitting devices and a second group of pixel circuits, the second group of light emitting devices are electrically connected with the second group of pixel circuits, the second group of pixel circuits comprises a second group of pixel circuits, and the second group of pixel circuits comprises a second pixel circuit.
The third group of pixels comprises a third group of light emitting devices and a third group of pixel circuits, and the third group of light emitting devices are electrically connected with the third group of pixel circuits.
The first conductive film is electrically connected with the first group of pixel circuits and the second group of pixel circuits.
The second conductive film is electrically connected to the first pixel circuit and the second pixel circuit.
Thus, for example, a signal can be supplied to one or more pixel circuits in the first group of pixel circuits during the first period using the first conductive film. In addition, signals may be supplied to one or more pixel circuits in the second group of pixel circuits during the same first period. Further, for example, a signal may be supplied to a plurality of pixel circuits during the first period using the first conductive film.
Further, for example, a signal may be supplied to a first pixel circuit in the first group of pixel circuits during the second period using the second conductive film. In addition, a signal may be supplied to a second pixel circuit in the second group of pixel circuits during the same second period. Further, the first pixel circuit may supply power to the second pads of the first group of pixels during the second period, and the second pixel circuit may supply power to the second pads of the second group of pixels.
The area of the second pad may be made close to the occupied area of the first group of pixel circuits. The area of the first pad may be made close to the occupied area of the first group of pixel circuits. The second pad is easily electrically connected to the first pad. The first group of pixel circuits is easily electrically connected to the first group of light emitting devices. The first group of pixel circuits is easily bonded to the first group of light emitting devices. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
(2) In addition, one embodiment of the present invention is a display device including a first group of pixels, a second group of pixels, a third group of pixels, a first conductive film, and a third conductive film.
The first set of pixels includes a first set of light emitting devices, a first pad, a second pad, a conductive material, and a first set of pixel circuits.
The first group of light emitting devices is electrically connected to the first pad, and the first pad overlaps the second pad. A conductive material is sandwiched between the first pad and the second pad, and the conductive material electrically connects the first pad and the second pad. The second pads are electrically connected with the first group of pixel circuits.
The first group of pixel circuits includes a first group of pixel circuits, and the first group of pixel circuits includes a first pixel circuit.
The second group of pixels comprises a second group of light emitting devices and a second group of pixel circuits, the second group of light emitting devices are electrically connected with the second group of pixel circuits, the second group of pixel circuits comprises a second group of pixel circuits, and the second group of pixel circuits comprises a second pixel circuit.
The third group of pixels comprises a third group of light emitting devices and a third group of pixel circuits, the third group of light emitting devices are electrically connected with the third group of pixel circuits, the third group of pixel circuits comprises a third group of pixel circuits, and the third group of pixel circuits comprises a third pixel circuit.
The first conductive film is electrically connected with the first group of pixel circuits and the second group of pixel circuits.
The third conductive film is electrically connected to the first pixel circuit and the third pixel circuit.
Thus, for example, signals may be supplied to one or more of the first and third sets of pixel circuits during the first period. In addition, for example, a signal may be supplied to one or more pixel circuits in the third group of pixel circuits in a different period from the first period.
Further, for example, a signal may be supplied to a first pixel circuit in the first group of pixel circuits during the second period. In addition, a signal may be supplied to a third pixel circuit in a third group of pixel circuits during the same second period. Further, the first pixel circuit may supply power to the second pads of the first group of pixels during the second period, and the third pixel circuit may supply power to the second pads of the third group of pixels. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
(3) In addition, one embodiment of the present invention is a display device including a first group of pixels, a second group of pixels, a third group of pixels, a first conductive film, a fourth conductive film, and a fifth conductive film.
The first set of pixels includes a first set of light emitting devices, a first pad, a second pad, a conductive material, and a first set of pixel circuits.
The first group of light emitting devices is electrically connected to the first pad, and the first pad overlaps the second pad. A conductive material is sandwiched between the first pad and the second pad, and the conductive material electrically connects the first pad and the second pad. The second pads are electrically connected with the first group of pixel circuits.
The first group of pixel circuits includes a first group of pixel circuits, and the first group of pixel circuits includes a first pixel circuit.
The second group of pixels comprises a second group of light emitting devices and a second group of pixel circuits, the second group of light emitting devices are electrically connected with the second group of pixel circuits, the second group of pixel circuits comprises a second group of pixel circuits, and the second group of pixel circuits comprises a second pixel circuit.
The third group of pixels comprises a third group of light emitting devices and a third group of pixel circuits, the third group of light emitting devices are electrically connected with the third group of pixel circuits, the third group of pixel circuits comprises a third group of pixel circuits, and the third group of pixel circuits comprises a third pixel circuit.
The first conductive film is electrically connected with the first group of pixel circuits and the second group of pixel circuits.
The fourth conductive film is electrically connected to the first pixel circuit and the second pixel circuit.
The fifth conductive film is electrically connected to the first pixel circuit and the third pixel circuit.
Thus, for example, a signal can be supplied to one or more pixel circuits in the first group of pixel circuits during the first period using the first conductive film. In addition, signals may be supplied to one or more pixel circuits in the second group of pixel circuits during the same first period. Further, for example, a signal may be supplied to a plurality of pixel circuits during the first period using the first conductive film.
For example, a fourth conductive film and a fifth conductive film may be used to supply signals to a first pixel circuit in the first group of pixel circuits during the second period.
Further, two conductive films intersecting with each other, such as a fourth conductive film and a fifth conductive film, may be used to select one from the first group of pixel circuits to supply signals. The conductive film for supplying signals can be reduced. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
(4) In addition, one embodiment of the present invention is the display device described above including the sixth conductive film.
The first group of light emitting devices includes a first light emitting device and the second group of light emitting devices includes a second light emitting device. The sixth conductive film is electrically connected to the first light emitting device and the second light emitting device.
Thus, for example, the sixth conductive film can be used to select the second light emitting device of the second group of light emitting devices when selecting the first light emitting device of the first group of light emitting devices. In addition, the first pads of the first group of pixels may supply power to the second light emitting device while the first pads of the first group of pixels supply power to the first light emitting device.
In addition, the area of the first pad may be made close to the occupied area of the first group of light emitting devices. The second pad is easily electrically connected to the first pad. The first group of pixel circuits is easily electrically connected to the first group of light emitting devices. The first group of pixel circuits is easily bonded to the first group of light emitting devices. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
(5) Further, one embodiment of the present invention is the display device described above including the seventh conductive film.
The first group of light emitting devices includes a first light emitting device and the third group of light emitting devices includes a third light emitting device. The seventh conductive film is electrically connected to the first light emitting device and the third light emitting device.
(6) In addition, one embodiment of the present invention is the display apparatus described above in which the first light emitting device is a light emitting diode.
Thus, for example, the seventh conductive film may be used to select the third light emitting device of the third group of light emitting devices when selecting the first light emitting device of the first group of light emitting devices. In addition, the pads of the third group of pixels may supply power to the third light emitting device while the first pads of the first group of pixels supply power to the first light emitting device. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
(7) In addition, one embodiment of the present invention is the display device including the eighth conductive film and the ninth conductive film.
The first pixel circuit includes a first switch, a second switch, a transistor, a capacitor, and a node.
The first switch includes a first terminal electrically connected to the eighth conductive film and a second terminal electrically connected to the node, and has a function of controlling a conductive state or a nonconductive state according to a potential of the first conductive film.
The transistor includes a gate electrode electrically connected to the node and a first electrode electrically connected to the ninth conductive film.
The capacitor includes a conductive film electrically connected to the node and a conductive film electrically connected to the ninth conductive film.
The second switch includes a first terminal electrically connected to the second electrode of the transistor and a second terminal electrically connected to the second pad, and has a function of controlling a conductive state or a non-conductive state according to a second selection signal.
(8) Further, one embodiment of the present invention is the display device including the first driving circuit.
The first driving circuit supplies a first selection signal to the first conductive film, and the first driving circuit supplies a second selection signal to the second conductive film.
The first driving circuit controls the potential of the sixth conductive film.
(9) Another embodiment of the present invention is the display device including the first functional layer and the second functional layer.
The first functional layer includes a first set of pixel circuits and a second pad.
The second functional layer is overlapped with the first functional layer, and the second functional layer comprises a first group of light emitting devices and a first bonding pad.
Thus, the first group of pixel circuits can be electrically connected to the first group of light emitting devices using the second pad, the first pad, and the conductive material. In addition, for example, a plurality of pixel circuits and a plurality of light emitting devices may be connected using one pad. Specifically, three pixel circuits and three light emitting devices may be connected using one pad. It is possible to reduce the number of connection portions and suppress occurrence of connection failure. The area in which the connection is made may be reduced with respect to the occupied area of the first group of light emitting devices. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
(10) In addition, one embodiment of the present invention is the display device described above including the third functional layer.
The third functional layer has a region sandwiching the first functional layer between the third functional layer and the second functional layer, and the third functional layer includes a second driving circuit.
The second driving circuit has a function of supplying an image signal.
Thus, the image signal displayed on the display device can be generated without increasing the external shape of the display device. In addition, the second driving circuit may be electrically connected to the first group of pixel circuits disposed directly above it. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
(11) Another embodiment of the present invention is an electronic device including an arithmetic unit and the display device.
The operation unit generates image information, and the display device displays the image information.
(12) Another embodiment of the present invention is an electronic device including the display device and the computing unit.
The third functional layer includes an arithmetic unit that generates image information. In addition, the display device displays image information.
In the drawings of the present specification, components are classified according to their functions and are shown as block diagrams of blocks independent of each other, but it is difficult to completely divide the components according to their functions in practice, and one component involves a plurality of functions.
In this specification, the names of the source and the drain of the transistor are changed with each other according to the polarity of the transistor and the level of the potential applied to each terminal. In general, in an n-channel transistor, a terminal to which a low potential is applied is referred to as a source, and a terminal to which a high potential is applied is referred to as a drain. In the p-channel transistor, a terminal to which a low potential is applied is referred to as a drain, and a terminal to which a high potential is applied is referred to as a source. In this specification, although it is assumed that the connection relationship of the transistor is described assuming that the source and the drain are fixed in some cases for convenience, in practice, the names of the source and the drain are interchanged in accordance with the above potential relationship.
In this specification, a source of a transistor means a source region of a part of a semiconductor film serving as an active layer or a source electrode connected to the semiconductor film. Similarly, the drain of the transistor is a drain region of a part of the semiconductor film or a drain electrode connected to the semiconductor film. In addition, the gate electrode means a gate electrode.
In this specification, a state in which transistors are connected in series refers to a state in which, for example, only one of a source and a drain of a first transistor is connected to only one of a source and a drain of a second transistor. In addition, the state in which the transistors are connected in parallel refers to a state in which one of a source and a drain of the first transistor is connected to one of a source and a drain of the second transistor and the other of the source and the drain of the first transistor is connected to the other of the source and the drain of the second transistor.
In the present specification, the term "connected" means electrically connected, and corresponds to a state in which current, voltage, or potential can be supplied or transmitted. Therefore, the connection state does not necessarily mean a state of direct connection, but includes, in its category, a state of indirect connection through a circuit element such as a wiring, a resistor, a diode, and a transistor, which can supply or transfer a current, a voltage, or a potential.
Even when individual components are connected to each other in the circuit diagram in this specification, there are cases where one conductive film has functions of a plurality of components, for example, a case where a part of wiring is used as an electrode, and the like. The connection in the present specification includes a case where such a single conductive film has functions of a plurality of constituent elements.
In addition, in this specification, one of the first electrode and the second electrode of the transistor is a source electrode, and the other is a drain electrode.
Effects of the invention
According to one embodiment of the present invention, a novel display device excellent in convenience, practicality, or reliability can be provided. In addition, a novel electronic device excellent in convenience, practicality, and reliability can be provided. Further, a novel display device, a novel electronic apparatus, or a novel semiconductor device can be provided.
Note that the description of these effects does not hinder the existence of other effects. Furthermore, one embodiment of the present invention need not have all of the above effects. Further, it is apparent that effects other than the above-described effects exist in the descriptions of the specification, drawings, claims, and the like, and effects other than the above-described effects can be obtained from the descriptions of the specification, drawings, claims, and the like.
Brief description of the drawings
Fig. 1A and 1B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 2 is a block diagram illustrating a structure of a display device according to an embodiment.
Fig. 3 is a block diagram illustrating a structure of a display device according to an embodiment.
Fig. 4 is a circuit diagram illustrating a structure of a display device according to an embodiment.
Fig. 5 is a timing chart illustrating a driving method of a display device according to an embodiment.
Fig. 6 is a circuit diagram illustrating a structure of a display device according to an embodiment.
Fig. 7 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 8A and 8B are block diagrams illustrating a structure of a display device according to an embodiment.
Fig. 9A and 9B are block diagrams illustrating a structure of a display device according to an embodiment.
Fig. 10A and 10B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 11A and 11B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 12A and 12B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 13A and 13B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 14A and 14B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 15 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 16 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 17A and 17B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 18 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 19 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 20A and 20B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 21 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 22 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 23A and 23B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 24 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 25 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 26A and 26B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 27 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 28 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 29 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 30 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 31 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 32 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 33A and 33B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 34 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 35A and 35B are diagrams illustrating a structure of a display device according to an embodiment.
Fig. 36 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 37 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 38 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 39 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 40 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 41 is a diagram illustrating a structure of a display device according to an embodiment.
Fig. 42A to 42C are diagrams illustrating a structure of a transistor according to an embodiment.
Fig. 43A to 43C are diagrams illustrating metal oxides according to embodiments.
Fig. 44A to 44D are diagrams illustrating an electronic device according to an embodiment.
Fig. 45A and 45B are diagrams illustrating an electronic device according to an embodiment.
Modes for carrying out the invention
The display device according to one embodiment of the present invention includes a first group of pixels, a second group of pixels, a first conductive film, and a second conductive film. The first set of pixels includes a first set of light emitting devices, a first pad, a second pad, a conductive material, and a first set of pixel circuits. The first group of light emitting devices is electrically connected to the first pad, and the first pad overlaps the second pad. A conductive material is sandwiched between the first pad and the second pad, and the conductive material electrically connects the first pad and the second pad. The second pads are electrically connected with the first group of pixel circuits. The first group of pixel circuits includes a first group of pixel circuits, and the first group of pixel circuits includes a first pixel circuit. The second group of pixels comprises a second group of light emitting devices and a second group of pixel circuits, the second group of light emitting devices are electrically connected with the second group of pixel circuits, the second group of pixel circuits comprises a second group of pixel circuits, and the second group of pixel circuits comprises a second pixel circuit. The first conductive film is electrically connected with the first group of pixel circuits and the second group of pixel circuits. The second conductive film is electrically connected to the first pixel circuit and the second pixel circuit.
Thus, for example, a signal can be supplied to one or more pixel circuits in the first group of pixel circuits during the first period using the first conductive film. In addition, signals may be supplied to one or more pixel circuits in the second group of pixel circuits during the same first period. Further, for example, a signal may be supplied to a plurality of pixel circuits during the first period using the first conductive film.
Further, for example, a signal may be supplied to a first pixel circuit in the first group of pixel circuits during the second period using the second conductive film. In addition, a signal may be supplied to a second pixel circuit in the second group of pixel circuits during the same second period. Further, the first pixel circuit may supply power to the second pads of the first group of pixels during the second period, and the second pixel circuit may supply power to the second pads of the second group of pixels.
The area of the second pad may be made close to the occupied area of the first group of pixel circuits. The area of the first pad may be made close to the occupied area of the first group of pixel circuits. The second pad is easily electrically connected to the first pad. The first group of pixel circuits is easily electrically connected to the first group of light emitting devices. The first group of pixel circuits is easily bonded to the first group of light emitting devices. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
The embodiments will be described in detail with reference to the accompanying drawings. It is noted that the present invention is not limited to the following description, but one of ordinary skill in the art can easily understand the fact that the manner and details thereof can be changed into various forms without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below. Note that in the structure of the invention described below, the same reference numerals are used in common in different drawings to show the same portions or portions having the same functions, and repetitive description thereof will be omitted.
(embodiment 1)
In this embodiment mode, a structure of a display device according to an embodiment of the present invention will be described with reference to fig. 1A to 9B.
Fig. 1A is a plan view illustrating the structure of a display device according to an embodiment of the present invention, and fig. 1B is a sectional view taken along a line X1-X2 of the display device according to an embodiment of the present invention shown in fig. 1A.
Fig. 2 is a block diagram illustrating the structure of a group of pixels 703 (i, j) shown in fig. 1A.
Fig. 3 is a block diagram illustrating the structure of a group of pixels 703 (i, j) shown in fig. 2.
Fig. 4 is a circuit diagram illustrating the structure of a group of pixels 703 (i, j) shown in fig. 2.
Fig. 5 is a timing chart illustrating the operation of the group of pixels 703 (i, j) shown in fig. 2.
Fig. 6 is a circuit diagram illustrating the structure of a group of pixels 703 (i, j) different from fig. 4.
Fig. 7 is a plan view illustrating a structure of a display device according to an embodiment of the present invention.
Fig. 8A is a block diagram illustrating a structure of a group of pixels 703 (i, j) shown in fig. 7, and fig. 8B is a block diagram illustrating a structure different from that of the group of pixels 703 (i, j) shown in fig. 8A.
Fig. 9A is a block diagram illustrating a structure of a group of pixels 703 (i, j) shown in fig. 8, and fig. 9B is a block diagram illustrating a structure different from that of the group of pixels 703 (i, j) shown in fig. 9A.
Note that in this specification, a variable having a value of an integer of 1 or more may be used as a symbol. For example, (p) including a variable p having a value of an integer of 1 or more may be used to designate a part of a symbol of any one of the p components at maximum. For example, (m, n) including a variable m and a variable n, which are integers of 1 or more, may be used to designate a part of a symbol of any one of the maximum mxn components.
< structural example of display device 1>
The display device 700 according to one embodiment of the present invention includes a group of pixels 703 (i, j), a functional layer 520 (1), and a functional layer 520 (2) (see fig. 1A and 1B). For example, the functional layer 520 (1) and the functional layer 520 (2) are formed separately and then bonded to each other, whereby a display device according to one embodiment of the present invention can be formed.
Structural example of a group of pixels 703 (i, j)
The group of pixels 703 (i, j) includes a group of light emitting devices 550 (i, j), a group of pixel circuits 530 (i, j), a pad 541 (i, j), a pad 542 (i, j), and a conductive material 543 (i, j) (see fig. 1B and 3). For example, the group of light emitting devices 550 (i, j) includes light emitting devices 550 (i, j) (p, 1) to 550 (i, j) (p, t) (refer to fig. 2 and 3). Specifically, as a group of light emitting devices, a light emitting device that emits red light, a light emitting device that emits green light, and a light emitting device that emits blue light may be used. In addition, the group of pixel circuits 530 (i, j) includes pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) (refer to fig. 2 and 3). Note that t is not limited to an integer of 1 or more of 3. In addition, for example, a metal or a composite material may be used as the conductive material 543. Specifically, nickel particles or nickel particles coated with gold may be used as the conductive material 543. In addition, a composite material in which resin is subjected to metal plating may be used as the conductive material 543. In addition, a metal coated with an insulating material or a composite material of resin subjected to metal plating may be used as the conductive material 543.
Structural example of functional layer 520 (1)
The functional layer 520 (1) includes a set of pixel circuits 530 (i, j) and pads 541 (i, j). The pad 541 (i, j) is electrically connected to a set of pixel circuits 530 (i, j).
Structural example of functional layer 520 (2)
The functional layer 520 (2) overlaps the functional layer 520 (1), and the functional layer 520 (2) includes a group of light emitting devices 550 (i, j) and pads 542 (i, j). The pad 542 (i, j) is electrically connected to a set of light emitting devices 550 (i, j). For example, the functional layer 520 (2) includes a plurality of light emitting devices in a matrix shape. Note that a light emitting device that emits red light, a light emitting device that emits green light, and a light emitting device that emits blue light may be used for the functional layer 520 (2). For example, a plurality of light emitting devices that emit blue light may be arranged in a matrix, and a color conversion layer that converts blue light into light of another color may be arranged on the top surface of the light emitting devices. In addition, as the light emitting device, an LED, an OLED, or the like may be used.
Structural example of conductive Material 543 (i, j)
The conductive material 543 (i, j) is sandwiched between the pad 541 (i, j) and the pad 542 (i, j) and electrically connects the pad 541 (i, j) and the pad 542 (i, j). In other words, the conductive material 543 (i, j) electrically connects the group of pixel circuits 530 (i, j) and the group of light emitting devices 550 (i, j) through the pads 541 (i, j) and 542 (i, j).
Thus, a group of pixel circuits 530 (i, j) can be electrically connected to a group of light emitting devices 550 (i, j) using pads 541 (i, j), pads 542 (i, j), and conductive material 543 (i, j). For example, q pixel circuits may be connected to q light emitting devices using q or less pads. Note that q is an integer of 1 or more. Specifically, three pixel circuits may be connected to three light emitting devices using a pair of pads. In addition, the number of connection portions can be reduced and occurrence of connection failure can be suppressed. In addition, the area for connection can be reduced with respect to the area occupied by the group of light emitting devices 550 (i, j). That is, in one embodiment of the present invention, a plurality of pixel circuits which are actively driven are connected to a plurality of light emitting devices by using a pair of pads, so that the plurality of light emitting devices can be driven in a passive driving manner. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
< structural example of display device 2>
The display device according to one embodiment of the present invention includes a conductive film COM1 and a conductive film COM2 (i) (p, q) (see fig. 3). Note that the conductive film COM1 and the conductive film COM2 (i) (p, q) are used as wirings.
A group of pixel circuits 530 (i, j) includes pixel circuits 530 (i, j) (p, q) and 530 (i, j) (p, 2), and a group of light emitting devices 550 (i, j) includes light emitting devices 550 (i, j) (p, q) and 550 (i, j) (p, 2). In addition, a group of pixels 703 (i, j) includes pixels 702 (i, j) (p, q) (refer to fig. 2). For example, a group of pixel circuits 530 (i, j) includes t pixel circuits. Note that t is an integer of 1 or more, and p is an integer of 1 or more and t or less.
Structural example of pixel 702 (i, j) (p, q)
The pixel 702 (i, j) (p, q) includes a pixel circuit 530 (i, j) (p, q) and a light emitting device 550 (i, j) (p, q).
The pixel circuit 530 (i, j) (p, q) is electrically connected to the conductive film COM1, and the pixel circuit 530 (i, j) (p, q) is electrically connected to one electrode of the light emitting device 550 (i, j) (p, q) within a predetermined period. For example, when the group of pixels 703 (i, j) includes the pixels 702 (i, j) (p, 1) to 702 (i, j) (p, t), one of the periods t displayed by the group of pixels 703 (i, j) may be set as a predetermined period by dividing the period t equally.
The other electrode of the light emitting device 550 (i, j) (p, q) is electrically connected to the conductive film COM2 (i) (p, q), and a predetermined voltage is supplied between the conductive film COM2 (i) (p, q) and the conductive film COM1 during the predetermined period. For example, a voltage that drives the light emitting device 550 (i, j) (p, q) at maximum luminance may be used as the prescribed voltage. Note that the pixel circuit 530 (i, j) (p, q) controls the voltage allocated from the prescribed voltage to the light emitting device 550 (i, j) (p, q). In addition, in a period excluding the predetermined period, a voltage that does not cause the light-emitting device 550 (i, j) (p, q) to emit light is supplied to the conductive film COM2 (i) (p, q).
Thus, for example, the light emitting device 550 (i, j) (p, q) can be selected, and driven using the pixel circuit 530 (i, j) (p, q). In addition, the pixel circuit 530 (i, j) (p, q) may be selected to drive the light emitting device 550 (i, j) (p, q) within a predetermined period. In addition, a group of pixels 703 (i, j) can be driven in a plurality of periods. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
< structural example of display device 3>
A display device according to one embodiment of the present invention includes a conductive film S1 (j) q, a conductive film G1 (i) p, and a conductive film G2 (i) (p, q) (see fig. 4). The conductive films S1 (j) q, the conductive film S1 (j) q-1, the conductive film G1 (i) p, and the conductive film G2 (i) (p, q) are used as wirings.
Structural example of Pixel Circuit 530 (i, j) (p, q)
The pixel circuit 530 (i, j) (p, q) includes a switch SW2 (p, q), a switch SW11, a transistor M11, a capacitor C11 and a node N11.
The switch SW11 includes a first terminal electrically connected to the conductive film S1 (j) q and a second terminal electrically connected to the node N11, and has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G1 (i) p.
The transistor M11 includes a gate electrode electrically connected to the node N11 and a first electrode electrically connected to the conductive film COM 1.
The capacitor C11 includes a conductive film electrically connected to the node N11 and a conductive film electrically connected to the conductive film COM 1.
The switch SW2 (p, q) includes a first terminal electrically connected to the second electrode of the transistor M11 and a second terminal electrically connected to the pad 541 (i, j), and has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G2 (i) (p, q).
In addition, the group of pixel circuits 530 (i, j) includes pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t), and is electrically connected to the pad 541 (i, j) through any one of the switches SW2 (p, 1) to SW2 (p, t). The switches SW2 (p, 1) to SW2 (p, t) have a function of selecting any one of the pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) to bring the pad 541 (i, j) into a conductive state. Note that the switches SW2 (p, 1) to SW2 (p, t) include the switch SW2 (p, q+1).
Note that the circuit shown in the drawings is one example of a circuit that can be used as the pixel circuit 530 (i, j) (p, q), and is not limited to this structure. For example, the circuit shown in fig. 6 can be used as a part of the pixel circuit 530 (i, j) (p, q). Specifically, the switch SW12, the switch SW13 and the capacitor C12 can be used for the pixel circuit 530 (i, j) (p, q). The display device includes a conductive film G12 (i) p and a conductive film G13 (i) p electrically connected to the pixel circuit 530 (i, j) (p, q). The switch SW12 includes a first terminal electrically connected to the node N11 and a second terminal electrically connected to the first electrode of the transistor M11, and has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G12 (i) p. The switch SW13 includes a first terminal electrically connected to the node N11 and a second terminal electrically connected to the conductive film COM1, and has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G13 (i) p. The capacitor C12 includes a conductive film connected to the second terminal of the switch SW11 and a conductive film electrically connected to the node N11.
< structural example of display device 4>
The display device according to one embodiment of the present invention includes a driver circuit GD (see fig. 1B).
Structural example of drive Circuit GD
The driving circuit GD supplies a first selection signal to the conductive film G1 (i) p. The pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) electrically connected to the conductive film G1 (i) p may acquire, for example, an image signal from any one of the conductive films S1 (j) 1 to S1 (j) t according to the first selection signal (refer to fig. 3).
The driving circuit GD supplies a second selection signal to the conductive film G2 (i) (p, q). The pixel circuit 530 (i, j) (p, q) electrically connected to the conductive film G2 (i) (p, q) is brought into a conductive state with the pad 541 (i, j) according to the second selection signal. Note that the driving circuit GD selects one of the conductive films G2 (i) (p, 1) to G2 (i) (p, t) in a prescribed order, and supplies the second selection signal for a prescribed period.
The drive circuit GD controls the potential of the conductive film COM2 (i) (p, q). During the period in which the second selection signal is supplied to the conductive film G2 (i) (p, q), the potential of the conductive film COM2 (i) (p, q) is controlled so that a predetermined voltage is supplied between the conductive film and the conductive film COM 1. For example, the potential of the conductive film COM2 (i) (p, q) is controlled to supply a voltage that drives the light emitting device 550 (i, j) (p, q) at maximum luminance. Note that the drive circuit GD controls the potential so that a predetermined voltage is supplied for a predetermined period by selecting one of the conductive films COM2 (i) (p, 1) to COM2 (i) (p, t) in a predetermined order. In addition, in a period excluding the predetermined period, the potentials of the conductive films COM2 (i) (p, 1) to COM2 (i) (p, t) are controlled so as not to cause the light emitting device to emit light.
< structural example of display device 5>
A display device according to an embodiment of the present invention includes a pad 541 (i) (p, q), a pad 542 (i) (p, q), and a conductive material 543 (i) (p, q) (see fig. 1B).
The pads 541 (i) (p, q) are electrically connected to the drive circuit GD, for example, and the pads 542 (i) (p, q) are electrically connected to the conductive film COM2 (i) (p, q), for example. In addition, the conductive material 543 (i) (p, q) is sandwiched between the pads 541 (i) (p, q) and 542 (i) (p, q), and electrically connects the pads 541 (i) (p, q) and 542 (i) (p, q).
Thus, the potential of the conductive film COM2 (i) (p, q) can be controlled using the driving circuit GD.
Method for driving display device example 1
A method of driving a display device according to an embodiment of the present invention will be described. Specifically, a method for driving the display device will be described with reference to operations of the pixel 702 (i, j) (p, q-1), the pixel 702 (i, j) (p, q), and the pixel 702 (i, j) (p, q+1) in the group of pixels 703 (i, j) (see fig. 4 and 5).
[ first step ]
The first selection signal is supplied to the conductive film G1 (i) p (see fig. 5) in a period from time t10 to time t 11.
The pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) in the group of pixel circuits 530 (i, j) acquire image signals according to the first selection signal.
For example, the pixel circuit 530 (i, j) (p, q) acquires an image signal from the conductive film S1 (j) q.
[ second step ]
During the period from time t11 to time t18, one of the conductive films G2 (i) (p, 1) to G2 (i) (p, t) is selected in a prescribed order and the second selection signal is supplied. In addition, one of the conductive films COM2 (i) (p, 1) to COM2 (i) (p, t) is selected in a predetermined order and a predetermined potential is supplied. Note that the conductive films G2 (i) (p, 1) to G2 (i) (p, t) include the conductive films G2 (i) (p+1, 1).
The pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) in the group of pixel circuits 530 (i, j) control the potential of the pad 541 (i, j) according to the acquired image signal and the second selection signal.
[ operation of pixel 702 (i, j) (p, q-1) in the second step ]
For example, in a period from time t14 to time t15, the pixel circuit 530 (i, j) (p, q-1) is supplied with the second selection signal from the conductive film G2 (i) (p, q-1), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p, q-1) is supplied with a predetermined potential in a period from time t14 to time t 15.
Thus, in the period from time t14 to time t15, the light emitting device 550 (i, j) (p, q-1) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q-1).
[ operation of pixel 702 (i, j) (p, q) in the second step ]
For example, in a period from time t15 to time t16, the pixel circuit 530 (i, j) (p, q) is supplied with a selection signal from the conductive film G2 (i) (p, q), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal. In addition, the conductive film COM2 (i) (p, q) is supplied with a predetermined potential in the period from time t15 to time t 16. Thus, in the period from time t15 to time t16, the light emitting device 550 (i, j) (p, q) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q).
[ operation of pixel 702 (i, j) (p, q+1) in the second step ]
For example, in a period from time t16 to time t17, the pixel circuit 530 (i, j) p+1 is supplied with a selection signal from the conductive film G2 (i) (p, q+1), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal. In addition, the conductive film COM2 (i) (p, q+1) is supplied with a predetermined potential in the period from time t16 to time t 17. Thus, in the period from time t16 to time t17, the light emitting device 550 (i, j) (p, q+1) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q+1).
Third step
In a period from time t18 to time t20, the conductive films G2 (i) (p, 1) to G2 (i) (p, t) are supplied with potentials that bring the switches SW2 (p, 1) to SW2 (p, t) into a non-conductive state. In addition, the conductive films COM2 (i) (p, 1) to COM2 (i) (p, t) are supplied with potentials that bring the light emitting devices 550 (i, j) (p, 1) to 550 (i, j) (p, t) into a non-light emitting state.
Note that the period FR1 in the drawing corresponds to one frame period. Thus, the display device according to one embodiment of the present invention can realize the duty drive.
Method for driving display device example 2
The display device according to one embodiment of the present invention can be driven by a method different from the driving method example 1. The driving method example 2 is different from the driving method example 1 in that: during one frame from time t30 to time t40, the display is divided into a plurality of times. Only the differences will be described in detail, and the above description is applied to the portions having the same structure.
[ first step ]
The first selection signal is supplied to the conductive film G1 (i) p (see fig. 5) in a period from time t30 to time t 31.
The pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) in the group of pixel circuits 530 (i, j) acquire image signals according to the first selection signal.
[ second step ]
During the period from time t31 to time t35, one of the conductive films G2 (i) (p, 1) to G2 (i) (p, t) is selected in a prescribed order and the second selection signal is supplied. In addition, one of the conductive films COM2 (i) (p, 1) to COM2 (i) (p, t) is selected in a predetermined order and a predetermined potential is supplied.
The pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) in the group of pixel circuits 530 (i, j) control the potential of the pad 541 (i, j) according to the acquired image signal and the second selection signal.
Third step
During the period from time t36 to time t40, one of the conductive films G2 (i) (p, 1) to G2 (i) (p, t) is selected in a prescribed order and the second selection signal is supplied. In addition, one of the conductive films COM2 (i) (p, 1) to COM2 (i) (p, t) is selected in a predetermined order and a predetermined potential is supplied.
The pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) in the group of pixel circuits 530 (i, j) control the potential of the pad 541 (i, j) according to the acquired image signal and the second selection signal.
Note that the period FR2 in the drawing corresponds to one frame period. Thus, the display device according to one embodiment of the present invention can perform display twice for each pixel in one frame. In addition, for example, occurrence of a color break-up phenomenon can be suppressed.
< structural example of display device 5>
The display device according to one embodiment of the present invention includes the functional layer 520 (3) (see fig. 1B).
The functional layer 520 (3) includes a region sandwiching the functional layer 520 (1) between the functional layer 520 (2). In other words, the functional layer 520 (3), the functional layer 520 (1), and the functional layer 520 (2) are stacked.
The functional layer 520 (3) includes a driving circuit SD that supplies an image signal to the conductive film S1 (j) q. In addition, the functional layer 520 (3) includes a terminal 519B.
Thus, the image signal displayed on the display device can be generated without increasing the external shape of the display device. In addition, the driving circuit SD and the group of pixel circuits 530 (i, j) disposed directly above it may be electrically connected. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
< structural example of display device 6>
The display device according to one embodiment of the present invention includes a region 231 (see fig. 7). The region 231 includes one group of pixels 703 (i, 1) to one group of pixels 703 (i, n) and another group of pixels 703 (1, j) to one group of pixels 703 (m, j). In other words, the region 231 includes one group of pixel circuits 530 (i, 1) to one group of pixel circuits 530 (i, n) and another group of pixel circuits 530 (1, j) to one group of pixel circuits 530 (m, j). Note that m is an integer of 1 or more, and i is an integer of 1 or more and m or less. n is an integer of 1 or more, and j is an integer of 1 or more and n or less.
A group of pixel circuits 530 (i, 1) to a group of pixel circuits 530 (i, n) are arranged in a row direction (a direction indicated by an arrow R1 in the drawing), the group of pixel circuits 530 (i, 1) to the group of pixel circuits 530 (i, n) include a group of pixel circuits 530 (i, j), and the group of pixel circuits 530 (i, 1) to 530 (i, n) are electrically connected to the conductive film G1 (i) p.
Another group of the pixel circuits 530 (1, j) to 530 (m, j) is arranged in a column direction (a direction indicated by an arrow C1 in the drawing) intersecting the row direction, and another group of the pixel circuits 530 (1, j) to 530 (m, j) includes one group of the pixel circuits 530 (i, j). In addition, another group of the pixel circuits 530 (1, j) to the group of the pixel circuits 530 (m, j) are electrically connected to the conductive film S1 (j) q.
< structural example of display device 7>
A group of light emitting devices 550 (i, j) of a display apparatus according to an embodiment of the present invention includes the light emitting devices 550 (i, j) (p, 1) to 550 (i, j) (p, t) (refer to fig. 8A). Note that the light emitting devices 550 (i, j) (p, 1) to 550 (i, j) (p, t) are arranged in the row direction.
< structural example 8 of display device >
A group of light emitting devices 550 (i, j) of the display apparatus of one embodiment of the present invention includes light emitting devices 550 (i, j) (p, 1) to 550 (i, j) (p, t), and the light emitting devices 550 (i, j) (p, 1) to 550 (i, j) (p, t) may also be arranged in a column direction (refer to fig. 8B).
< structural example of display device 9>
A group of light emitting devices 550 (i, j) of the display apparatus according to an embodiment of the present invention includes the light emitting devices 550 (i, j) (p, 1) to 550 (i, j) (p, t), and the light emitting devices 550 (i, j) (p, 1) to 550 (i, j) (p, t) may be also arranged in a matrix (refer to fig. 9A and 9B).
This embodiment mode can be appropriately combined with the description of other embodiment modes.
(embodiment 2)
In this embodiment, a structure of a display device according to an embodiment of the present invention will be described with reference to fig. 10A to 29.
Fig. 10A is a perspective view illustrating a structure of a display device according to an embodiment of the present invention, and fig. 10B is a plan view illustrating a part of the display device according to an embodiment of the present invention shown in fig. 10A.
Fig. 11A is a perspective view illustrating a structure of a display device according to an embodiment of the present invention, and fig. 11B is a plan view illustrating a part of the display device according to an embodiment of the present invention shown in fig. 11A.
Fig. 12A is a perspective view illustrating a structure of a display device according to an embodiment of the present invention, and fig. 12B is a plan view illustrating a part of the display device according to an embodiment of the present invention shown in fig. 12A.
Fig. 13A is a plan view illustrating a structure of a display device according to an embodiment of the present invention, and fig. 13B is a plan view illustrating a structure of a display device according to an embodiment of the present invention different from the structure illustrated in fig. 13A.
Fig. 14A is a circuit diagram illustrating a pixel circuit of a display device to which one embodiment of the present invention is applied, and fig. 14B is a timing chart illustrating an operation of the pixel circuit illustrated in fig. 14A.
Fig. 15 is a perspective view illustrating a structure of a group of pixels of a display device to which one embodiment of the present invention is applied.
Fig. 16 is a perspective view illustrating a structure of a group of pixels different from the structure illustrated in fig. 15.
Fig. 17A is a circuit diagram illustrating a pixel circuit applied to a display device according to an embodiment of the present invention, and fig. 17B is a timing chart illustrating an operation of the pixel circuit illustrated in fig. 17A.
Fig. 18 is a perspective view illustrating a structure of a group of pixels of a display device to which one embodiment of the present invention is applied.
Fig. 19 is a perspective view illustrating a structure of a group of pixels different from the structure illustrated in fig. 18.
Fig. 20A is a circuit diagram illustrating a pixel circuit applied to a display device according to an embodiment of the present invention, and fig. 20B is a timing chart illustrating an operation of the pixel circuit illustrated in fig. 20A.
Fig. 21 is a perspective view illustrating a structure of a group of pixels of a display device to which one embodiment of the present invention is applied.
Fig. 22 is a perspective view illustrating a structure of a group of pixels different from the structure illustrated in fig. 21.
Fig. 23A is a circuit diagram illustrating a pixel circuit applied to a display device according to an embodiment of the present invention, and fig. 23B is a timing chart illustrating an operation of the pixel circuit illustrated in fig. 23A.
Fig. 24 is a perspective view illustrating a structure of a group of pixels of a display device to which one embodiment of the present invention is applied.
Fig. 25 is a perspective view illustrating a structure of a group of pixels different from the structure illustrated in fig. 24.
Fig. 26A is a circuit diagram illustrating a pixel circuit of a display device to which one embodiment of the present invention is applied, and fig. 26B is a timing chart illustrating an operation of the pixel circuit illustrated in fig. 26A.
Fig. 27 is a perspective view illustrating a structure of a group of pixels of a display device to which one embodiment of the present invention is applied.
Fig. 28 is a perspective view illustrating a structure of a group of pixels different from the structure illustrated in fig. 27.
Fig. 29 is a perspective view illustrating a structure of a group of pixels different from those illustrated in fig. 27 and 28.
< structural example of display device 1>
The display device described in this embodiment mode includes a group of pixels 703 (i, j), a group of pixels 703 (i, j+1), a group of pixels 703 (i+1, j), a conductive film G1 (i) p, and a conductive film G2 (i) (p, q) (see fig. 10A).
Structural example 1 of a group of pixels 703 (i, j)
The group of pixels 703 (i, j) includes a group of light emitting devices 550 (i, j), a pad 542 (i, j), a pad 541 (i, j), a conductive material 543 (i, j), and a group of pixel circuits 530 (i, j).
A group of light emitting devices 550 (i, j) is electrically connected to the pads 542 (i, j). The pad 542 (i, j) overlaps the pad 541 (i, j), and the pad 541 (i, j) is electrically connected to the group of pixel circuits 530 (i, j).
The conductive material 543 (i, j) is sandwiched between the pad 542 (i, j) and the pad 541 (i, j), and the conductive material 543 (i, j) electrically connects the pad 542 (i, j) and the pad 541 (i, j).
Structural example 1 of a group of pixel circuits 530 (i, j)
The group of pixel circuits 530 (i, j) includes a group of pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t), and the group of pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) includes a group of pixel circuits 530 (i, j) (p, q) (refer to fig. 10B).
A group of pixel circuits 530 (i, j) includes a group of pixel circuits 530 (i, j) (1, q) to 530 (i, j) (s, q), and a group of pixel circuits 530 (i, j) (1, q) to 530 (i, j) (s, q) includes a group of pixel circuits 530 (i, j) (p, q). Note that s is an integer of 1 or more. In addition, the group of pixel circuits 530 (i, j) includes pixel circuits 530 (i, j) (1, 1) to 530 (i, j) (s, t).
Structural example 1 of a group of pixels 703 (i, j+1)
The group of pixels 703 (i, j+1) includes a group of light emitting devices 550 (i, j+1) and a group of pixel circuits 530 (i, j+1), and the group of light emitting devices 550 (i, j+1) is electrically connected to the group of pixel circuits 530 (i, j+1) (see fig. 10A).
Structural example 1 of a group of pixel circuits 530 (i, j+1)
The set of pixel circuits 530 (i, j+1) includes a set of pixel circuits 530 (i, j+1) (p, 1) to 530 (i, j+1) (p, t), and the set of pixel circuits 530 (i, j+1) (p, 1) to 530 (i, j+1) (p, t) includes a set of pixel circuits 530 (i, j+1) (p, q) (refer to fig. 10B). In addition, the group of pixel circuits 530 (i, j+1) includes pixel circuits 530 (i, j+1) (1, 1) to 530 (i, j+1) (s, t).
Structural example 1 of a group of pixels 703 (i+1, j)
The group of pixels 703 (i+1, j) includes a group of light emitting devices 550 (i+1, j) and a group of pixel circuits 530 (i+1, j), and the group of light emitting devices 550 (i+1, j) is electrically connected to the group of pixel circuits 530 (i+1, j) (see fig. 10A).
Structural example 1 of a group of pixel circuits 530 (i+1, j)
The group of pixel circuits 530 (i+1, j) includes a group of pixel circuits 530 (i+1, j) (1, q) to 530 (i+1, j) (s, q), and the group of pixel circuits 530 (i+1, j) (1, q) to 530 (i+1, j) (s, q) includes a group of pixel circuits 530 (i+1, j) (p, q) (refer to fig. 10B). In addition, the group of pixel circuits 530 (i+1, j) includes pixel circuits 530 (i+1, j) (1, 1) to 530 (i+1, j) (s, t).
Structural example 1 of conductive film G1 (i) p
The conductive film G1 (i) p is electrically connected to a group of pixel circuits 530 (i, j) (p, 1) to 530 (i, j) (p, t) and a group of pixel circuits 530 (i, j+1) (p, 1) to 530 (i, j+1) (p, t).
Structural example 1 of conductive film G2 (i) (p, q)
The conductive film G2 (i) (p, q) is electrically connected to the pixel circuit 530 (i, j) (p, q) and the pixel circuit 530 (i, j+1) (p, q).
Thus, for example, a signal can be supplied to one or more pixel circuits in the group of pixel circuits 530 (i, j) during the first period using the conductive film G1 (i) p. In addition, signals may be supplied to one or more pixel circuits in another set of pixel circuits 530 (i, j+1) during the same first period. Further, for example, the conductive film G1 (i) p may be used to supply signals to a plurality of pixel circuits during the first period.
In addition, for example, a signal may be supplied to the pixel circuit 530 (i, j) (p, q) in the group of pixel circuits 530 (i, j) during the second period using the conductive film G2 (i) (p, q). In addition, a signal may be supplied to the pixel circuit 530 (i, j+1) (p, q) in another group of pixel circuits 530 (i, j+1) during the same second period. In the second period, the pixel circuit 530 (i, j) (p, q) may supply power to the pad 541 (i, j), and the pixel circuit 530 (i, j+1) (p, q) may supply power to the pad 541 (i, j+1).
Further, the area of the pad 541 (i, j) may be made close to the area occupied by the group of pixel circuits 530 (i, j). In addition, the area of the pad 542 (i, j) may be made close to the area occupied by the group of pixel circuits 530 (i, j). The electrical connection of the pad 541 (i, j) and the pad 542 (i, j) becomes easy. Electrical connection of the set of pixel circuits 530 (i, j) to the set of light emitting devices 550 (i, j) is facilitated. Bonding of the set of pixel circuits 530 (i, j) to the set of light emitting devices 550 (i, j) is facilitated. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
Structural example 2 of a group of pixel circuits 530 (i, j)
The group of pixel circuits 530 (i, j) described in this embodiment includes, for example, the pixel circuits 530 (i, j) (p, q) and the pixel circuits 530 (i, j) (p+1, q) (see fig. 15 and 16).
Structural example 1 of Pixel Circuit 530 (i, j)
The pixel circuit 530 (i, j) (p, q) includes a switch SW11, a switch SW2 (p, q), a transistor M11, a capacitor C11 and a node N11 (see fig. 14A and 17A).
The switch SW11 includes a first terminal electrically connected to the conductive film S1 (j) q and a second terminal electrically connected to the node N11, and has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G1 (i) p.
The transistor M11 includes a gate electrode electrically connected to the node N11 and a first electrode electrically connected to the conductive film COM 1.
The capacitor C11 includes a conductive film electrically connected to the node N11 and a conductive film electrically connected to the conductive film COM 1.
The switch SW2 (p, q) includes a first terminal electrically connected to the second electrode of the transistor M11 and a second terminal electrically connected to the pad 541 (i, j), and has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G2 (i) (p, q).
Method for driving display device example 1
A method of driving a display device according to an embodiment of the present invention will be described. Specifically, a method of driving the display device will be described with reference to operations of the pixel circuits 530 (i, j) (p, q) and the pixel circuits 530 (i, j) (p+1, q) in the group of pixels 703 (i, j) (see fig. 14B and 15). Note that the period FR1 in the drawing corresponds to one frame period.
[ first step ]
The first selection signal is supplied to the conductive film G1 (i) p during the period from time t9 to time t 10. The first selection signal is supplied to the conductive film G1 (i) p+1 in the period from time t10 to time t 11.
The pixel circuit 530 (i, j) (p, q) acquires an image signal from the conductive film S1 (j) q according to the first selection signal. The pixel circuit 530 (i, j) (p+1, q) selects an image signal from the conductive film S1 (j) q+1 according to the first selection signal.
[ second step ]
The second selection signal is supplied to the conductive film G2 (i) (p, q) during the period from time t11 to time t 12. In addition, a predetermined potential is supplied to the conductive film COM2 (i) (p, q).
The pixel circuit 530 (i, j) (p, q) controls the potential of the pad 541 (i, j) according to the acquired image signal and the second selection signal.
Third step
The second selection signal is supplied to the conductive film G2 (i) (p+1, q) during the period from time t12 to time t 13. In addition, a predetermined potential is supplied to the conductive film COM2 (i) (p+1, q).
The pixel circuit 530 (i, j) (p+1, q) controls the potential of the pad 541 (i, j) according to the acquired image signal and the second selection signal.
Structural example 3 of a group of pixel circuits 530 (i, j)
The group of pixel circuits 530 (i, j) described in this embodiment includes, for example, the pixel circuits 530 (i, j) (p, q), the pixel circuits 530 (i, j) (p, q+1), the pixel circuits 530 (i, j) (p, q+2), and the pixel circuits 530 (i, j) (p, q+3) (see fig. 18 and 19). Note that the display device includes a conductive film S1 (j) q+2 and a conductive film S1 (j) q+3. In addition, the group of light emitting devices 550 (i, j) includes light emitting devices 550 (i, j) (p, q+2) and light emitting devices 550 (i, j) (p, q+3). The display device includes a conductive film COM2 (j) (p, q+1), a conductive film COM2 (j) (p, q+2), and a conductive film COM2 (j) (p, q+3) (see fig. 19).
Method for driving display device example 2
A method of driving a display device according to an embodiment of the present invention will be described. Specifically, a method of driving the display device will be described with reference to operations from the pixel circuit 530 (i, j) (p, q) to the pixel circuit 530 (i, j) (p, q+3) in the group of pixels 703 (i, j) (see fig. 17B and 18). Note that the period FR1 in the drawing corresponds to one frame period.
[ first step ]
The first selection signal is supplied to the conductive film G1 (i) p in a period from time t10 to time t 11.
The pixel circuit 530 (i, j) (p, q) acquires an image signal from the conductive film S1 (j) q according to the first selection signal. In addition, the pixel circuit 530 (i, j) (p, q+1) acquires an image signal from the conductive film S1 (j) q+1 according to the first selection signal.
[ second step ]
During the period from time t11 to time t15, one of the conductive films G2 (i) (p, q) to G2 (i) (p, q+3) is selected in a prescribed order and the second selection signal is supplied. In addition, one of the conductive films COM2 (i) (p, q) to COM2 (i) (p, q+3) is selected in a predetermined order and a predetermined potential is supplied. Note that the conductive films G2 (i) (p, q) to G2 (i) (p, q+3) include the conductive film G2 (i) (p, q+2), and the conductive films COM2 (i) (p, q) to COM2 (i) (p, q+3) include the conductive film COM2 (i) (p, q+2).
[ operation of pixel 702 (i, j) (p, q) in the second step ]
For example, in a period from time t11 to time t12, the pixel circuit 530 (i, j) (p, q) is supplied with the second selection signal from the conductive film G2 (i) (p, q), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p, q) is supplied with a predetermined potential in the period from time t11 to time t 12.
Thus, in the period from time t11 to time t12, the light emitting device 550 (i, j) (p, q) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q).
[ operation of pixel 702 (i, j) (p, q+1) in the second step ]
For example, in a period from time t12 to time t13, the pixel circuit 530 (i, j) (p, q+1) is supplied with the second selection signal from the conductive film G2 (i) (p, q+1), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p, q+1) is supplied with a predetermined potential in the period from time t12 to time t 13.
Thus, in the period from time t12 to time t13, the light emitting device 550 (i, j) (p, q+1) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q+1).
< structural example of display device 2>
Further, structural example 2 of the display device is different from structural example 1 of the display device in that: the display device described in this embodiment mode includes conductive films G2 (j) (p, q) instead of the conductive films G2 (i) (p, q) (see fig. 11B). Only the differences will be described in detail, and the above description will be applied to the portions where the same structure as described above can be used.
Structural example 1 of conductive film G2 (j) (p, q)
The conductive film G2 (j) (p, q) is electrically connected to the pixel circuit 530 (i, j) (p, q) and the pixel circuit 530 (i+1, j) (p, q).
Thus, for example, a signal can be supplied to one or more of the group of pixel circuits 530 (i, j) and the group of pixel circuits 530 (i, j+1) in the first period using the conductive film G1 (i) p. In addition, for example, the conductive film G1 (i+1) p may be used to supply a signal to one or more pixel circuits in the group of pixel circuits 530 (i+1, j) in a period different from the first period.
In addition, for example, a signal may be supplied to the pixel circuit 530 (i, j) (p, q) in the group of pixel circuits 530 (i, j) during the second period using the conductive film G2 (j) (p, q). In addition, a signal may be supplied to the pixel circuit 530 (i+1, j) (p, q) in another group of pixel circuits 530 (i+1, j) during the same second period. In addition, in the second period, the pixel circuit 530 (i, j) (p, q) may supply power to the pad 541 (i, j), and the pixel circuit 530 (i+1, j) (p, q) may supply power to the pad 541 (i+1, j). As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
Structural example 4 of a group of pixel circuits 530 (i, j)
The group of pixel circuits 530 (i, j) described in this embodiment includes, for example, the pixel circuits 530 (i, j) (p, q), the pixel circuits 530 (i, j) (p, q+1), the pixel circuits 530 (i, j) (p, q+2), and the pixel circuits 530 (i, j) (p, q+3) (see fig. 21 and 22).
Structural example 2 of Pixel Circuit 530 (i, j)
The structural example 2 of the pixel circuit 530 (i, j) is different from the structural example 1 of the pixel circuit 530 (i, j) in that: the switch SW2 (p, q) has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G2 (j) (p, q) instead of the conductive film G2 (i) (p, q) (see fig. 20A and 23A). Only the differences will be described in detail, and the above description will be applied to the portions where the same structure as described above can be used.
Method for driving display device example 3
A method of driving a display device according to an embodiment of the present invention will be described. Specifically, a method of driving the display device will be described with reference to operations from the pixel circuit 530 (i, j) (p, q) to the pixel circuit 530 (i, j) (p, q+3) in the group of pixels 703 (i, j) (see fig. 20B and 21). Note that the period FR1 in the drawing corresponds to one frame period.
[ first step ]
The first selection signal is supplied to the conductive film G1 (i) p in a period from time t10 to time t 11.
The pixel circuit 530 (i, j) (p, q) acquires an image signal from the conductive film S1 (j) q according to the first selection signal. In addition, the pixel circuit 530 (i, j) (p, q+1) acquires an image signal from the conductive film S1 (j) q+1 according to the first selection signal.
[ second step ]
During the period from time t11 to time t15, one of the conductive films G2 (j) (p, q) to G2 (j) (p, q+3) is selected in a prescribed order and the second selection signal is supplied. In addition, one of the conductive films COM2 (i) (p, q) to COM2 (i) (p, q+3) is selected in a predetermined order and a predetermined potential is supplied.
[ operation of pixel 702 (i, j) (p, q) in the second step ]
For example, in a period from time t11 to time t12, the pixel circuit 530 (i, j) (p, q) is supplied with the second selection signal from the conductive film G2 (j) (p, q), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p, q) is supplied with a predetermined potential in the period from time t11 to time t 12.
Thus, in the period from time t11 to time t12, the light emitting device 550 (i, j) (p, q) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q).
[ operation of pixel 702 (i, j) (p, q+1) in the second step ]
For example, in a period from time t12 to time t13, the pixel circuit 530 (i, j) (p, q+1) is supplied with the second selection signal from the conductive film G2 (j) (p, q+1), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p, q+1) is supplied with a predetermined potential in the period from time t12 to time t 13.
Thus, in the period from time t12 to time t13, the light emitting device 550 (i, j) (p, q+1) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q+1).
Structural example 5 of a group of pixel circuits 530 (i, j)
The group of pixel circuits 530 (i, j) described in this embodiment includes, for example, pixel circuits 530 (i, j) (p, q) to 530 (i, j) (p, q+3) and pixel circuits 530 (i, j) (p+1, q) to 530 (i, j) (p+1, q+3) (refer to fig. 24 and 25).
Method for driving display device example 4
A method of driving a display device according to an embodiment of the present invention will be described. Specifically, a method of driving the display device will be described with reference to operations from the pixel circuit 530 (i, j) (p, q) to the pixel circuit 530 (i, j) (p+1, q+3) in the group of pixels 703 (i, j) (see fig. 23B and 24). Note that the period FR1 in the drawing corresponds to one frame period.
[ first step ]
The first selection signal is supplied to the conductive film G1 (i) p during the period from time t9 to time t 10. The first selection signal is supplied to the conductive film G1 (i) p+1 in the period from time t10 to time t 11.
The pixel circuit 530 (i, j) (p, q) acquires an image signal from the conductive film S1 (j) q according to the first selection signal. In addition, the pixel circuit 530 (i, j) (p, q+1) acquires an image signal from the conductive film S1 (j) q+1 according to the first selection signal.
[ second step ]
During the period from time t11 to time t19, one of the conductive films G2 (j) (p, q) to G2 (j) (p+1, q+3) is selected in a prescribed order and the second selection signal is supplied. In addition, one of the conductive films COM2 (i) (p, q) to COM2 (i) (p, q+3) is selected in a predetermined order and a predetermined potential is supplied.
[ operation of pixel 702 (i, j) (p, q) in the second step ]
For example, in a period from time t11 to time t12, the pixel circuit 530 (i, j) (p, q) is supplied with the second selection signal from the conductive film G2 (j) (p, q), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p, q) is supplied with a predetermined potential in the period from time t11 to time t 12.
Thus, in the period from time t11 to time t12, the light emitting device 550 (i, j) (p, q) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q).
[ operation of pixel 702 (i, j) (p, q+1) in the second step ]
For example, in a period from time t12 to time t13, the pixel circuit 530 (i, j) (p, q+1) is supplied with the second selection signal from the conductive film G2 (j) (p, q+1), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p, q+1) is supplied with a predetermined potential in the period from time t12 to time t 13.
Thus, in the period from time t12 to time t13, the light emitting device 550 (i, j) (p, q+1) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q+1).
[ operation of pixel 702 (i, j) (p+1, q) in the second step ]
For example, in a period from time t15 to time t16, the pixel circuit 530 (i, j) (p+1, q) is supplied with the second selection signal from the conductive film G2 (j) (p+1, q), and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p+1, q) is supplied with a predetermined potential in the period from time t15 to time t 16.
Thus, in the period from time t15 to time t16, the light emitting device 550 (i, j) (p+1, q) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p+1, q).
< structural example of display device 3>
Further, structural example 3 of the display device is different from structural example 1 of the display device in that: the display device described in this embodiment mode includes conductive films G3 (i) p and G3 (j) q instead of the conductive films G2 (i) (p, q) (see fig. 12B). Only the differences will be described in detail, and the above description will be applied to the portions where the same structure as described above can be used.
Structural example 1 of conductive film G3 (i) p
The conductive film G3 (i) p is electrically connected to the pixel circuit 530 (i, j) (p, q) and the pixel circuit 530 (i, j+1) (p, q).
Structural example 1 of conductive film G3 (j) q
The conductive film G3 (j) q is electrically connected to the pixel circuit 530 (i, j) (p, q) and the pixel circuit 530 (i+1, j) (p, q).
Thus, for example, a signal can be supplied to one or more pixel circuits in the group of pixel circuits 530 (i, j) during the first period using the conductive film G1 (i) p. In addition, signals may be supplied to one or more pixel circuits in another set of pixel circuits 530 (i, j+1) during the same first period. Further, for example, the conductive film G1 (i) p may be used to supply signals to a plurality of pixel circuits during the first period.
In addition, for example, the conductive film G3 (i) p and the conductive film G3 (j) q may be used to supply signals to the pixel circuits 530 (i, j) (p, q) in the group of pixel circuits 530 (i, j) in the second period. In addition, for example, the conductive film G3 (i) p and the conductive film G3 (j+1) q may be used to supply signals to the pixel circuits 530 (i, j+1) (p, q) in the group of pixel circuits 530 (i, j+1) in the second period. Further, for example, the conductive film G3 (i+1) p and the conductive film G3 (j) q may be used to supply signals to the pixel circuits 530 (i+1, j) (p, q) in the group of pixel circuits 530 (i+1, j) in the second period.
Further, since one is selected from a group of the pixel circuits 530 (i, j) to supply a signal using two conductive films (e.g., the conductive film G3 (i) p and the conductive film G3 (j) q) intersecting each other, the number of conductive films can be reduced. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
Structural example 6 of a group of pixel circuits 530 (i, j)
The group of pixel circuits 530 (i, j) described in this embodiment includes, for example, pixel circuits 530 (i, j) (p, q) to 530 (i, j) (p, q+3) and pixel circuits 530 (i, j) (p+1, q) to 530 (i, j) (p+1, q+3) (refer to fig. 27, 28 and 29).
Structural example 3 of Pixel Circuit 530 (i, j)
The structural example 3 of the pixel circuit 530 (i, j) is different from the structural example 1 of the pixel circuit 530 (i, j) in that: the switch SW3p and the switch SW3q are included instead of the switch SW2 (p, q) (see fig. 26A). Only the differences will be described in detail, and the above description will be applied to the portions where the same structure as described above can be used.
The switch SW3p includes a first terminal electrically connected to the second electrode of the transistor M11, and has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G3 (i) p.
The switch SW3q includes a first terminal electrically connected to the second terminal of the switch SW3p and a second terminal electrically connected to the pad 541 (i, j), and has a function of controlling a conductive state or a nonconductive state according to the potential of the conductive film G3 (j) q.
Method for driving display device example 5
A method of driving a display device according to an embodiment of the present invention will be described. Specifically, a method of driving the display device will be described with reference to operations from the pixel circuit 530 (i, j) (p, q) to the pixel circuit 530 (i, j) (p+1, q+3) in the group of pixels 703 (i, j) (see fig. 26B and 27). Note that the period FR1 in the drawing corresponds to one frame period.
[ first step ]
The first selection signal is supplied to the conductive film G1 (i) p during the period from time t9 to time t 10. The first selection signal is supplied to the conductive film G1 (i) p+1 in the period from time t10 to time t 11.
The pixel circuit 530 (i, j) (p, q) acquires an image signal from the conductive film S1 (j) q according to the first selection signal. The pixel circuit 530 (i, j) (p, q+1) selects an image signal from the conductive film S1 (j) q+1 according to the first selection signal.
[ second step ]
In the period from time t11 to time t15, one of the conductive films G3 (j) q to G3 (j) q+3 is selected and the fourth selection signal is supplied in a prescribed order while the third selection signal is supplied to the conductive film G3 (i) p. In addition, one of the conductive films COM2 (i) (p, q) to COM2 (i) (p, q+3) is selected in a predetermined order and a predetermined potential is supplied.
[ operation of pixel 702 (i, j) (p, q) in the second step ]
For example, in a period from time t11 to time t15, the pixel circuit 530 (i, j) (p, q) is supplied with the third selection signal from the conductive film G3 (i) p. In addition, in the period from time t11 to time t12, the fourth selection signal is supplied from the conductive film G3 (j) q, and the potential of the pad 541 (i, j) is controlled according to the acquired image signal.
In addition, the conductive film COM2 (i) (p, q) is supplied with a predetermined potential in the period from time t11 to time t 12.
Thus, in the period from time t11 to time t12, the light emitting device 550 (i, j) (p, q) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q).
[ operation of pixel 702 (i, j) (p, q+1) in the second step ]
For example, in a period from time t11 to time t15, the pixel circuit 530 (i, j) (p, q+1) is supplied with the third selection signal from the conductive film G3 (i) p. In addition, in the period from time t12 to time t13, the fourth selection signal is supplied from the conductive film G3 (j) q+1, and the potential of the pad 541 (i, j) is controlled in accordance with the acquired image signal.
In addition, the conductive film COM2 (i) (p, q+1) is supplied with a predetermined potential in the period from time t12 to time t 13.
Thus, in the period from time t12 to time t13, the light emitting device 550 (i, j) (p, q+1) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p, q+1).
[ operation of pixel 702 (i, j) (p+1, q) in the second step ]
For example, in a period from time t15 to time t19, the pixel circuit 530 (i, j) (p+1, q) is supplied with the third selection signal from the conductive film G3 (i) p+1. In addition, in the period from time t15 to time t16, the fourth selection signal is supplied from the conductive film G3 (j) q, and the potential of the pad 541 (i, j) is controlled according to the acquired image signal.
In addition, the conductive film COM2 (i) (p+1, q) is supplied with a predetermined potential in the period from time t15 to time t 16.
Thus, in the period from time t15 to time t16, the light emitting device 550 (i, j) (p+1, q) displays at a predetermined luminance according to the potential difference between the pad 541 (i, j) and the conductive film COM2 (i) (p+1, q).
< structural example of display device 4>
The display device according to one embodiment of the present invention includes conductive films COM2 (i) (p, q) (see fig. 13A). In addition, the conductive film COM2 (i+1) (p, q) and the conductive film COM2 (j+1) (p, q) are included.
Structural example 1 of a group of light-emitting devices 550 (i, j)
A group of light emitting devices 550 (i, j) includes light emitting devices 550 (i, j) (p, q). In addition, a group of light emitting devices 550 (i, j) includes light emitting devices 550 (i, j) (1, 1) to 550 (i, j) (s, t).
Note that the display device or the light-emitting device of this embodiment mode has a function of displaying an image using a light-emitting diode. Since the light emitting diode is a self-light emitting device, when the light emitting diode is used as a display device, a backlight is not required for the display device, and a polarizing plate may not be provided. Thus, the power consumption of the display device can be reduced, and the display device can be thinned and lightened. In addition, a display device using a light emitting diode as a display device can improve luminance (for example, 5000cd/m 2 Above, preferably 10000cd/m 2 The above), and the contrast is high and the viewing angle is wide, so that a high display quality can be obtained. In addition, by using an inorganic material for a light emitting material, the service life of the display device can be prolonged and the reliability can be improved.
In this embodiment, an example of a case where a micro LED is used as a light emitting diode will be described in particular. In this embodiment mode, a micro LED having a double heterojunction is described. Note that the light emitting diode is not particularly limited, and for example, a micro LED having a quantum well junction, an LED using a nanopillar, or the like may be employed.
The area of the light-emitting region of the light-emitting diode is preferably 1mm 2 Hereinafter, more preferably 10000. Mu.m 2 Hereinafter, it is more preferably 3000. Mu.m 2 Hereinafter, it is more preferably 700. Mu.m 2 The following is given. The area of the region is preferably 1. Mu.m 2 The above is more preferably 10. Mu.m 2 The above is more preferably 100. Mu.m 2 The above. Note that in this specification and the likeIn (2), the area of the light-emitting region is 10000 μm 2 The light emitting diode is hereinafter referred to as micro LED or micro light emitting diode.
The display device of this embodiment mode preferably includes a transistor having a channel formation region in a metal oxide layer. Transistors using metal oxides can reduce power consumption. For this reason, a display device with extremely low power consumption can be realized by combining micro LEDs.
The display device of this embodiment mode is preferably a transistor having a channel formation region over a semiconductor substrate (e.g., a silicon substrate). Thus, high-speed operation of the circuit can be achieved.
Preferably, the display device of this embodiment is stacked with a transistor having a channel formation region in a semiconductor substrate and a transistor having a channel formation region in a metal oxide layer. Thus, high-speed operation of the circuit can be realized and power consumption can be made extremely low.
Structural example 1 of a group of light-emitting devices 550 (i, j+1)
A group of light emitting devices 550 (i, j+1) includes light emitting devices 550 (i, j+1) (p, q). A group of light emitting devices 550 (i, j+1) includes light emitting devices 550 (i, j+1) (1, 1) to 550 (i, j+1) (s, t).
Structural example 1 of a group of light-emitting devices 550 (i+1, j)
The group of light emitting devices 550 (i+1, j) includes light emitting devices 550 (i+1, j) (p, q). A group of light emitting devices 550 (i+1, j) includes light emitting devices 550 (i+1, j) (1, 1) to 550 (i+1, j) (s, t).
Structural example 1 of conductive film COM2 (i) (p, q)
The conductive film COM2 (i) (p, q) is electrically connected to the light emitting device 550 (i, j) (p, q) and the light emitting device 550 (i, j+1) (p, q).
Thus, for example, using the conductive film COM2 (i) (p, q), the light emitting device 550 (i, j+1) (p, q) in the group of light emitting devices 550 (i, j+1) can be selected when the light emitting device 550 (i, j) (p, q) in the group of light emitting devices 550 (i, j) is selected. In addition, when the pad 542 (i, j) supplies power to the light emitting device 550 (i, j) (p, q), the pad 542 (i, j+1) may supply power to the light emitting device 550 (i, j+1) (p, q).
Further, the area of the pad 542 (i, j) may be made close to the area occupied by the group of light emitting devices 550 (i, j). The electrical connection of the pad 541 (i, j) and the pad 542 (i, j) becomes easy. Electrical connection of the set of pixel circuits 530 (i, j) to the set of light emitting devices 550 (i, j) is facilitated. Bonding of the set of pixel circuits 530 (i, j) to the set of light emitting devices 550 (i, j) is facilitated. As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
Structural example 2 of a group of light-emitting devices 550 (i, j)
The group of light emitting devices 550 (i, j) described in this embodiment includes, for example, a plurality of light emitting devices (see fig. 15, 18, 21, 24, and 27) including the light emitting device 550 (i, j) (p, q).
< structural example of display device 5>
Further, structural example 5 of the display device is different from structural example 4 of the display device in that: the display device described in this embodiment mode includes a conductive film COM2 (j) (p, q) instead of the conductive film COM2 (i) (p, q) (see fig. 13B). Only the differences will be described in detail, and the above description will be applied to the portions where the same structure as described above can be used.
Structural example 1 of conductive film COM2 (j) (p, q)
The conductive film COM2 (j) (p, q) is electrically connected to the light emitting device 550 (i, j) (p, q) and the light emitting device 550 (i+1, j) (p, q).
Thus, for example, using the conductive film COM2 (j) (p, q), the light emitting device 550 (i+1, j) (p, q) in the group of light emitting devices 550 (i, j) can be selected when the light emitting device 550 (i, j) (p, q) in the group of light emitting devices 550 (i, j) is selected. In addition, when the pad 542 (i, j) supplies power to the light emitting device 550 (i, j) (p, q), the pad 542 (i+1, j) may supply power to the light emitting device 550 (i+1, j) (p, q). As a result, a novel display device excellent in convenience, practicality, and reliability can be provided.
Structural example 3 of a group of light-emitting devices 550 (i, j)
The group of light emitting devices 550 (i, j) described in this embodiment includes, for example, a plurality of light emitting devices including the light emitting device 550 (i, j) (p, q) and the light emitting device 550 (i, j) (p+1, q) (see fig. 16, 19, 22, 25, and 29). Note that the light-emitting device 550 (i, j) (p+1, q) is electrically connected to the conductive film COM2 (j) (p+1, q).
This embodiment mode can be appropriately combined with the description of other embodiment modes.
Embodiment 3
In this embodiment, a display device and a display system according to an embodiment of the present invention will be described with reference to fig. 30 to 35B.
Fig. 30 is a block diagram illustrating a structure of a display device according to an embodiment of the present invention.
Fig. 31 is a block diagram illustrating the structure of the display unit shown in fig. 30.
Fig. 32 is a block diagram illustrating a structure of a display device according to an embodiment of the present invention.
Fig. 33A and 33B are block diagrams illustrating the structure of the pixel shown in fig. 32.
Fig. 34 is a block diagram illustrating a structure of a display device according to an embodiment of the present invention.
Fig. 35A is a flowchart of a correction method, and fig. 35B is a schematic diagram illustrating the correction method.
< structural example of display device 1>
Next, fig. 30 shows a block diagram for explaining each structure in the display device 10. The display device includes a driving circuit 40, a functional circuit 50, and a display unit 60.
Structural example 1 of drive Circuit 40
As an example, the driving circuit 40 includes a gate driver 41 and a source driver 42. The gate driver 41 has a function of driving a plurality of gate lines GL for outputting signals to the pixel circuits 62R, 62G, 62B. The source driver 42 has a function of driving a plurality of source lines SL for outputting signals to the pixel circuits 62R, 62G, 62B. In addition, the driving circuit 40 supplies voltages for display by the pixel circuits 62R, 62G, 62B to the pixel circuits 62R, 62G, 62B through a plurality of wirings.
Structural example 1 of functional Circuit 50
The functional circuit 50 includes a CPU51, and the CPU51 can be used for arithmetic processing of data. In addition, the CPU51 includes a CPU core 53. The CPU core 53 includes a flip-flop 80 for temporarily holding data used for the arithmetic processing. The flip-flop 80 includes a plurality of scan flip-flops 81, and each scan flip-flop 81 is electrically connected to a backup circuit 82 provided in the display unit 60. The data (backup data) of the scan flip-flop is input and output between the flip-flop 80 and the backup circuit 82.
Display unit 60
A configuration example of the arrangement of the backup circuit 82 and the pixel circuits 62R, 62G, and 62B of the sub-pixels in the display unit 60 will be described with reference to fig. 30 and 31.
Fig. 31 shows a structure in which a plurality of pixels 61 are arranged in a matrix in the display unit 60. The pixel 61 includes a backup circuit 82 in addition to the pixel circuits 62R, 62G, 62B. As described above, the backup circuit 82 and the pixel circuits 62R, 62G, and 62B can each be configured by an OS transistor, and thus can be disposed in the same pixel.
The display unit 60 includes a plurality of pixels 61 provided with pixel circuits 62R, 62G, 62B and a backup circuit 82. As illustrated in fig. 31, the backup circuit 82 is not necessarily arranged in the pixel 61 as a repeating unit. The configuration may be freely set according to the shape of the display portion 60, the shape of the pixel circuits 62R, 62G, 62B, and the like.
< structural example of display device 2>
Fig. 32 is a block diagram schematically showing a configuration example of a display device 10 as a display device according to an embodiment of the present invention. The display device 10 includes a layer 20 and a layer 30, and the layer 30 may be stacked over the layer 20, for example. An interlayer insulator or electrical conductor for electrically connecting the different layers may be provided between the layers 20 and 30.
Layer 20
The transistor provided in the layer 20 may be, for example, a transistor including silicon in a channel formation region (also referred to as a Si transistor), and may be, for example, a transistor including single crystal silicon in a channel formation region. In particular, when a transistor including single crystal silicon in a channel formation region is used as a transistor provided in the layer 20, on-state current of the transistor can be increased. This is preferable because the circuit included in the layer 20 can be driven at high speed. In addition, since the Si transistor can be formed by micromachining with a channel length of 3nm to 10nm, the display device 10 provided with an accelerator such as a CPU, GPU, or the like, an application processor, or the like can be realized.
The layer 20 is provided with a driving circuit 40 and a functional circuit 50. The Si transistor of layer 20 may increase the on-state current of the transistor. Thus enabling the circuits to be driven at high speed.
Structural example 2 of drive Circuit 40
The driving circuit 40 includes a gate line driving circuit, a source line driving circuit, and the like for driving the pixel circuits 62R, 62G, 62B. As an example, the driving circuit 40 includes a gate line driving circuit and a source line driving circuit for driving the pixels 61 of the display portion 60. By disposing the driving circuit 40 in the layer 20 different from the layer 30 in which the display portion is provided, the occupied area of the display portion in the layer 30 can be increased. In addition, the driving circuit 40 may include an LVDS (Low Voltage Differential Signaling: low voltage differential signal) circuit or a D/a (Digital to Analog: analog digital) conversion circuit or the like, which is used as an interface for receiving data such as image data from outside the display device 10. The Si transistor of layer 20 may increase the on-state current of the transistor. The channel length, channel width, and the like of the Si transistor may be different depending on the operation speed of each circuit.
Layer 30
As a transistor provided in the layer 30, a bottom gate transistor, a top gate transistor, or the like can be used. For example, a semiconductor containing a group 14 element can be used for the semiconductor film. Specifically, a semiconductor containing silicon can be used for the semiconductor film. For example, hydrogenated amorphous silicon, polycrystalline silicon, or single crystal silicon may be used. In addition, a metal oxide can be used for the semiconductor film. For example, an OS transistor may be used. In particular, as the OS transistor, a transistor including an oxide including at least one of indium, an element M (element M is aluminum, gallium, yttrium, or tin), and zinc in a channel formation region is preferably used. Such an OS transistor has a characteristic that an off-state current is extremely low. Therefore, in particular, when an OS transistor is used as a transistor provided in a pixel circuit included in a display portion, analog data written to the pixel circuit can be held for a long period of time, which is preferable.
The layer 30 is provided with a display portion 60 including a plurality of pixels 61. The pixel 61 is provided with pixel circuits 62R, 62G, 62B for controlling light emission of red, green, and blue. The pixel circuits 62R, 62G, 62B are used as sub-pixels of the pixel 61. Since the pixel circuits 62R, 62G, 62B include OS transistors, analog data written to the pixel circuits can be held for a long period of time. In addition, the backup circuits 82 are provided in each of the pixels 61 included in the layer 30. Note that the backup circuit is sometimes referred to as a memory circuit or a memory circuit. Further, data (backup data BD) of the scan flip-flop is input and output between the flip-flop 80 and the backup circuit.
Structural example of Pixel Circuit 1
Fig. 33A and 33B show a structural example of a pixel circuit 62 which can be used as the pixel circuits 62R, 62G, 62B, and a light-emitting element 70 connected to the pixel circuit 62. Fig. 33A is a diagram showing connection of the elements, and fig. 33B is a diagram schematically showing the vertical relationship of the driving circuit 40, the pixel circuit 62, and the light emitting element 70.
In this specification and the like, the "element" may be sometimes referred to as a "device". For example, the display element, the light-emitting element, and the liquid crystal element may be referred to as a display device, a light-emitting device, and a liquid crystal device, for example.
The pixel circuit 62 shown in fig. 33A and 33B as an example includes a switch SW11, a switch SW2p, a switch SW12, a switch SWm, a transistor M11, and a capacitor C11. The switch SW11, the switch SW2p, the switch SW12, the switch SWm and the transistor M11 may be constituted by OS transistors. Each of the switches SW11, SW2p, SW12, SWm and the transistor M11 preferably includes a back gate electrode, and in this case, a structure in which the same signal as the gate electrode is supplied to the back gate electrode or a structure in which a signal different from the gate electrode is supplied to the back gate electrode may be employed.
The switch SW11 includes a first terminal electrically connected to the source line SL and a second terminal electrically connected to the node N11, and has a function of controlling a conductive state or a non-conductive state according to the potential of the gate line GL 11.
The transistor M11 includes a gate electrode electrically connected to the node N11 and a first electrode electrically connected to the conductive film COM 1. The conductive film COM1 is a wiring for supplying current to the light emitting element 70 and a wiring for outputting current flowing through the pixel circuit 62 to the driving circuit 40 or the functional circuit 50.
The capacitor C11 includes a conductive film electrically connected to the node N11 and a conductive film electrically connected to the conductive film COM 1.
The switch SW2p has a function of controlling a conductive state or a nonconductive state according to the potential of the gate line GL2p, a first terminal electrically connected to the second electrode of the transistor M11, a second terminal electrically connected to the first pad 541 (i, j), and a second terminal.
The light emitting element 70 includes one electrode electrically connected to the first pad 541 (i, j) and the other electrode electrically connected to the conductive film COM2 (i) (p, q). The conductive film COM2 (i) (p, q) is a wiring that supplies a potential for supplying current to the light emitting element 70.
Thereby, the intensity of light emitted by the light emitting element 70 can be controlled according to the image signal supplied to the gate electrode of the transistor M11.
The switch SW12 includes a first terminal electrically connected to the wiring V0 and a second terminal electrically connected to the first electrode of the transistor M11, and has a function of controlling a conductive state or a nonconductive state according to the potential of the gate line GL 12. The wiring V0 is a potential for supplying a reference potential and a wiring for outputting a current flowing through the pixel circuit 62 to the driving circuit 40 or the functional circuit 50.
The switch SWm includes a first terminal electrically connected to the wiring V1 and a second terminal electrically connected to the first pad 541 (i, j), and has a function of controlling a conductive state or a nonconductive state according to a control signal. The wiring V1 is a wiring for supplying a reference potential.
Thus, a current value which can be used to set a pixel parameter can be output from the wiring V0 through the switch SWm and the switch SW 12. More specifically, the wiring V0 may be used as a monitor line that outputs the current flowing through the transistor M11 to the outside. The current output to the wiring V0 is converted into a voltage by a source follower circuit or the like and output to the outside. Alternatively, the digital signal may be converted by an a/D converter or the like and output to the driving circuit 40 or the like.
Structural example of Pixel Circuit 2
In the structure illustrated in fig. 33B, wiring electrically connecting the pixel circuit 62 and the driving circuit 40 can be shortened, whereby wiring resistance of the wiring can be reduced. Accordingly, since data can be written at a high speed, the display device 10 can be driven at a high speed. Thus, a sufficient frame period can be ensured even if the display device 10 includes many pixels 61, and thus the pixel density of the display device 10 can be increased. Further, by increasing the pixel density of the display device 10, the resolution of the image displayed by the display device 10 can be increased. For example, the pixel density of the display device 10 may be set to 1000ppi or more, 5000ppi or more, or 7000ppi or more. Accordingly, the display device 10 may be, for example, an AR or VR display device, and may be suitably used for an electronic apparatus in which a display unit such as an HMD is located closer to a user.
In fig. 33B, the gate lines GL11, GL12, GL2p, the conductive film COM1, the wiring V0, the wiring V1, and the source line SL are supplied with signals from the driving circuit 40 under the pixel circuit 62 through the wirings, but one embodiment of the present invention is not limited thereto. For example, the wirings for supplying signals and voltages to the driving circuit 40 may be routed around the outer periphery of the display unit 60 and electrically connected to the pixel circuits 62 arranged in a matrix in the layer 30. At this time, a structure in which the gate driver 41 included in the driving circuit 40 is provided in the layer 30 is effective. That is, the transistor of the gate driver 41 is effectively an OS transistor. A structure in which a part of the functions of the source driver 42 included in the driver circuit 40 is provided in the layer 30 is effective. For example, it is effective to provide a demultiplexer for distributing the signal output from the source driver 42 to each source line in the layer 30. It is effective that the transistor of the demultiplexer is of an OS transistor structure.
Backup circuit 82
For example, a memory including an OS transistor is suitable for the backup circuit 82. Since the OS transistor has the characteristic of extremely small off-state current, the backup circuit formed by the OS transistor has the following advantages: voltage drop can be suppressed according to data to be backed up; little power is consumed in holding data, and the like. The backup circuit 82 including an OS transistor may be provided in the display portion 60 configured with a plurality of pixels 61. Fig. 32 shows a state in which the backup circuit 82 is provided in each pixel 61.
The backup circuit 82 constituted by OS transistors may be provided stacked with the layer 20 including Si transistors. The backup circuits 82 may be arranged in a matrix like the sub-pixels in the pixel 61, or one backup circuit 82 may be provided for a plurality of pixels. That is, the backup circuit 82 may be configured within the layer 30 without being limited by the configuration of the pixels 61. Therefore, the backup circuit 82 can be arranged so as to increase the degree of freedom of the display section/circuit layout without increasing the circuit area, and the storage capacity of the backup circuit 82 required for the arithmetic processing can be increased.
< structural example of display device 3>
Fig. 34 shows a modified example of each component included in the display device 10 described above.
The block diagram of the display device 10A shown in fig. 34 corresponds to a configuration in which an accelerator 52 is added to the functional circuit 50 in the display device 10 of fig. 30.
The accelerator 52 is used as a dedicated arithmetic circuit for the product-sum arithmetic processing of the artificial neural network NN. In the operation using the accelerator 52, a process of correcting the display failure described above, a process of correcting the outline of the image by up-converting the display data, or the like may be performed. In addition, by adopting a configuration in which the CPU51 is power-gated at the time of the arithmetic processing by the accelerator 52, it is possible to achieve low power consumption.
< structural example of display System >
Further, in the display device according to one embodiment of the present invention, since the pixel circuit and the functional circuit can be stacked, defective pixels can be detected using the functional circuit provided below the pixel circuit. By using the information of the defective pixel, a display defect caused by the defective pixel can be corrected and normal display can be performed.
A part of the correction method shown below may also be performed by a circuit provided outside the display device. In addition, a part of the correction method may also be performed by the driving circuit 40 of the display device 10.
Examples of more specific correction methods are shown below. Fig. 35A is a flowchart of the correction method described below.
First, the correction operation is started in step S1.
Next, in step S2, the current of the pixel is read out. For example, each pixel may be driven in such a manner that a current is output to a monitor line electrically connected to the pixel.
Next, in step S3, the read current is converted into a voltage. At this time, in the case where the digital signal is used in the subsequent processing, it may be converted into digital data in step S3. For example, analog data may be converted to digital data using an analog-to-digital conversion circuit (ADC).
Next, in step S4, pixel parameters of each pixel are acquired from the acquired data. Examples of the pixel parameter include a threshold voltage or field effect mobility of a driving transistor, threshold voltage of a light emitting element, and a current value in a predetermined voltage.
Next, in step S5, it is determined whether each pixel is abnormal or not according to the pixel parameter. For example, when the pixel parameter value exceeds (or falls below) a predetermined threshold value, the pixel is determined to be an abnormal pixel.
Examples of the abnormal pixel include a dark spot defect whose luminance is significantly low or a bright spot defect whose luminance is significantly high with respect to an input data potential.
In step S5, the address of the abnormal pixel and the kind of defect can be identified and acquired.
Next, in step S6, correction processing is performed.
An example of the correction process is described with reference to fig. 35B. Fig. 35B schematically shows 3×3 pixels. Here, the central pixel is set as the pixel 61D of the dark spot defect. Fig. 35B schematically shows a state in which the pixel 61D is turned off and the pixel 61N in the vicinity thereof is turned on at a predetermined luminance.
The dark spot defect is a defect in which the brightness of a pixel does not reach a normal brightness even if correction is made to increase the data potential input to the pixel. Then, as shown in fig. 35B, correction to increase the luminance is performed on the pixel 61N in the vicinity of the pixel 61D with the dark point defect. Thus, even if a dark spot defect occurs, a normal image can be displayed.
Note that in the case where the defect is a bright point defect, the bright point defect may be made inconspicuous by reducing the luminance of the nearby pixel.
In particular, in the case of a display device having high definition (for example, 1000ppi or more), since it is difficult to separate and view each pixel, the correction method of supplementing an abnormal pixel with such a pixel in the vicinity is particularly effective.
On the other hand, it is preferable to correct abnormal pixels such as dark spot defects and bright spot defects so as not to input data potentials.
In this way, correction parameters can be set for each pixel. By using the correction parameters for the input image data, corrected image data for displaying an optimal image on the display device 10 can be generated.
In addition, since there is a deviation in pixel parameters not only for the abnormal pixel but also for the pixels in the vicinity thereof, there is a case where unevenness due to the deviation is observed when displaying an image. Here, correction parameters may be set for pixels that are not determined to be abnormal pixels to eliminate (equalize) deviations in pixel parameters. For example, the reference value may be set based on a central value, an average value, or the like of the pixel parameters of a part of or all of the pixels, and a correction value for eliminating a difference from the reference value may be set as the correction parameter for the pixel parameter of the predetermined pixel.
Further, as correction data of pixels in the vicinity of the abnormal pixel, correction data in which both the correction amount for supplementing the abnormal pixel and the correction amount for eliminating the deviation of the pixel parameter are considered is preferably set.
Next, in step S7, the correction operation ends.
The display of the image may be performed later based on the correction data acquired by the above-described correction operation and the inputted image data.
Note that as one of the correction works, a neural network may also be used. When the display correction system performs an operation based on an artificial neural network, product-sum operation is repeated. In the operation using the accelerator 52, correction can be performed due to the display failure. In addition, by adopting a configuration in which the CPU51 is power-gated at the time of the arithmetic processing by the accelerator 52, it is possible to achieve low power consumption. As the neural network, for example, a correction parameter may be determined based on the estimation result obtained by machine learning. For example, the estimation may be performed by performing operations based on an artificial neural network, such as a Deep Neural Network (DNN), a Convolutional Neural Network (CNN), a Recurrent Neural Network (RNN), an automatic encoder, a Deep Boltzmann Machine (DBM), a Deep Belief Network (DBN), or the like. When the correction parameters are determined using the neural network, the correction can be performed with high accuracy even without using a detailed algorithm for performing the correction, thereby making the abnormal pixels inconspicuous.
The above is a description of the correction method.
In addition, in the CPU51 described above, the operation performed by the display correction system to correct the current flowing through the pixel can be kept as backup data for the data during the operation. This is particularly effective in terms of an arithmetic process with a large amount of computation such as an arithmetic operation using an artificial neural network. In addition, by using the CPU51 as an application processor, driving or the like for making the frame rate variable is combined, and in addition, display failure can be reduced, and power consumption can be reduced.
This embodiment mode can be appropriately combined with the description of other embodiment modes.
Embodiment 4
In this embodiment, a cross-sectional structure example of the display device 10 according to one embodiment of the present invention will be described with reference to fig. 36 to 41.
Fig. 36 is a sectional view illustrating a structure of a display device according to an embodiment of the present invention.
Fig. 37 is a cross-sectional view illustrating a structure of a display device according to an embodiment of the present invention different from the structure shown in fig. 36.
Fig. 38 is a cross-sectional view illustrating a structure of a display device according to an embodiment of the present invention, which is different from the structure shown in fig. 36.
Fig. 39 is a cross-sectional view illustrating a structure of a display device according to an embodiment of the present invention, which is different from the structure shown in fig. 38.
Fig. 40 is a cross-sectional view illustrating a structure of a display device according to an embodiment of the present invention, which is different from the structures shown in fig. 36 to 39.
Fig. 41 is a cross-sectional view illustrating a structure of a display device according to an embodiment of the present invention, which is different from the structures illustrated in fig. 36 to 40.
< structural example of display device 1>
Fig. 36 is a sectional view showing a structural example of the display device 10. The display device 10 includes an insulator 421 and a substrate 705, and the insulator 421 and the substrate 705 are bonded by a sealant 712. An OS transistor is preferably used as the pixel circuit. At least a part of the driving circuit may be formed using an OS transistor. At least a part of the functional circuit may be formed using an OS transistor. In addition, at least a part of the driving circuit may be externally mounted. In addition, at least a part of the functional circuit may be externally mounted.
Insulator 421, insulator 214, insulator 216
As the insulator 421, various insulator substrates such as a glass substrate and a sapphire substrate can be used. Insulator 421 is provided with insulator 214, and insulator 214 is provided with insulator 216.
Insulator 222, insulator 224, insulator 254, insulator 280, insulator 274, insulator 281
Insulator 216 is provided with insulator 222, insulator 224, insulator 254, insulator 280, insulator 274 and insulator 281.
The insulator 421, the insulator 214, the insulator 280, the insulator 274, and the insulator 281 are used as interlayer films, and may be used as planarizing films each covering the concave-convex shape thereunder.
Insulator 361
An insulator 361 is provided on the insulator 281. Conductor 317 and conductor 337 are embedded in insulator 361. Here, the height of the top surface of the conductor 337 may be made substantially the same as the height of the top surface of the insulator 361.
Insulator 363
The insulator 363 is provided on the conductor 337 and the insulator 361. The insulator 363 is embedded with a conductor 347, a conductor 353, a conductor 355, and a conductor 357. Here, the heights of the top surfaces of the conductors 353, 355, and 357 may be substantially the same as the height of the top surface of the insulator 363.
The insulator 363 is embedded with the conductor 341, the conductor 343, and the conductor 351. Here, the height of the top surface of the conductor 351 may be substantially the same as the height of the top surface of the insulator 363.
The insulator 361 and the insulator 363 may be used as an interlayer film and as a planarizing film covering the concave-convex shapes thereunder, respectively. For example, in order to improve the flatness of the top surface of the insulator 363, the plane thereof may be planarized by a planarization process using a chemical mechanical polishing (CMP: chemical Mechanical Polishing) method or the like.
Electrode 760
The conductors 353, 355, 357 and insulator 363 are provided with connection electrodes 760. Further, an anisotropic conductor 780 is provided so as to be electrically connected to the connection electrode 760, and an FPC (Flexible Printed Circuit: flexible circuit board) 716 is provided so as to be electrically connected to the anisotropic conductor 780. By using the FPC716, various signals and the like can be supplied to the display device 10 from the outside of the display device 10.
In fig. 36, three conductors including a conductor 353, a conductor 355, and a conductor 357 are shown as conductors having a function of electrically connecting a connection electrode 760 and a conductor 347, and one embodiment of the present invention is not limited thereto. The number of conductors having the function of electrically connecting the connection electrode 760 and the conductor 347 may be one, two, four or more. By providing a plurality of conductors having a function of electrically connecting the connection electrode 760 and the conductor 347, contact resistance can be reduced.
Transistor 750
A transistor 750 is provided over the insulator 214. The transistor 750 may be a transistor provided in the layer 30 shown in embodiment mode 3. For example, a transistor provided in the pixel circuit 62 may be used. As the transistor 750, an OS transistor can be used as appropriate. The OS transistor has a characteristic of extremely small off-state current. Thus, image data and the like can be held for a long time, and the frequency of refresh operation can be reduced. Thereby, power consumption of the display device 10 can be reduced.
In addition, the transistor 750 may be a transistor provided in the backup circuit 82. As the transistor 750, an OS transistor can be used as appropriate. The OS transistor has a characteristic of extremely small off-state current. Therefore, even during the period when the sharing of the power supply voltage is stopped, the data in the flip-flop can be continuously held. Therefore, a normally-off operation of the CPU (an operation of intermittently stopping the power supply voltage) can be realized. Thereby, power consumption of the display device 10 can be reduced.
The conductors 301a and 301b are embedded in the insulators 254, 280, 274, and 281. The conductor 301a is electrically connected to one of the source and the drain of the transistor 750, and the conductor 301b is electrically connected to the other of the source and the drain of the transistor 750. Here, the heights of the top surfaces of the conductors 301a and 301b may be substantially the same as the height of the top surface of the insulator 281.
The insulator 361 is embedded with the conductor 311, the conductor 313, the conductor 331, the capacitor 790, the conductor 333, and the conductor 335. The conductors 311 and 313 are electrically connected to the transistor 750 to serve as wirings. The conductor 333 and the conductor 335 are electrically connected to the capacitor 790. Here, the heights of the top surfaces of the conductors 331, 333, and 335 may be substantially the same as the height of the top surface of the insulator 361.
Capacitor 790
As shown in fig. 36, the capacitor 790 includes a lower electrode 321 and an upper electrode 325. An insulator 323 is provided between the lower electrode 321 and the upper electrode 325. That is, the capacitor 790 has a stacked structure in which an insulator 323 serving as a dielectric is sandwiched between a pair of electrodes. Although fig. 36 shows an example in which the capacitor 790 is provided on the insulator 281, the capacitor 790 may be provided on a different insulator from the insulator 281.
Fig. 36 shows an example in which the conductor 301a, the conductor 301b, and the conductor 305 are formed in the same layer. Further, an example in which the conductor 311, the conductor 313, the conductor 317, and the lower electrode 321 are formed in the same layer is also shown. Further, an example in which the conductor 331, the conductor 333, the conductor 335, and the conductor 337 are formed in the same layer is also shown. Further, an example in which the conductor 341, the conductor 343, and the conductor 347 are formed in the same layer is also shown. Further, an example in which the conductor 351, the conductor 353, the conductor 355, and the conductor 357 are formed in the same layer is also shown. By forming a plurality of conductors in the same layer, the manufacturing process of the display device 10 can be simplified, and thus the manufacturing cost of the display device 10 can be reduced. In addition, they may be formed in different layers and contain different kinds of materials, respectively.
Light-emitting element 70
The display device 10 shown in fig. 36 includes a light emitting element 70. The light-emitting element 70 includes a conductor 772, a light-emitting layer 786, and a conductor 788. The light-emitting layer 786 includes an inorganic compound or an organic compound.
For example, a compound semiconductor may be used for the light-emitting layer 786. Specifically, the light-emitting layer 786 may be used with the P-type clad layer and the N-type clad layer interposed therebetween. This can cause carriers to recombine in the light-emitting layer 786. As a result, light emission due to recombination of carriers can be obtained.
For example, a stacked material which emits blue light, a stacked material which emits green light, or a stacked material which emits red light may be used for the light-emitting layer 786. Specifically, a gallium/phosphorus compound, a gallium/arsenic compound, a gallium/aluminum/arsenic compound, an aluminum/gallium/indium/phosphorus compound, an indium/gallium nitride compound, or the like can be used for the light-emitting layer 786.
In addition, quantum dots or the like can be used for the light-emitting layer 786. Specifically, a colloidal quantum dot material, an alloy type quantum dot material, a Core Shell type quantum dot material, or the like can be used for the light emitting layer 786.
In addition, a fluorescent organic compound, a phosphorescent organic compound, or the like can be used for the light-emitting layer 786. For example, a low molecular compound may be used for the light-emitting layer 786. In addition, a polymer compound may be used for the light-emitting layer 786.
For example, a small LED may be used for the light emitting element 70. Specifically, the following small LEDs can be used for the light emitting element 70: the area of the light-emitting region thereof was 1mm 2 Hereinafter, it is preferably 50000. Mu.m 2 Hereinafter, 30000 μm is more preferable 2 Hereinafter, 10000 μm is more preferable 2 Hereinafter, it is 200 μm 2 The above.
Further, a micro LED may be used for the light emitting element 70. Specifically, the following micro LEDs may be used for the light emitting element 70: the area of the light-emitting region is less than 200 μm 2 Preferably 60. Mu.m 2 Hereinafter, more preferably 15. Mu.m 2 Hereinafter, more preferably 5. Mu.m 2 Hereinafter, it is 3 μm 2 The above.
A material having transparency to visible light may be used for the electric conductor 772 and the electric conductor 788. As the light-transmitting material, for example, an oxide material containing indium, zinc, tin, or the like can be used. Note that the light-emitting element 70 may employ a bottom-emission structure that emits light to the side of the conductor 772, a top-emission structure that emits light to the side of the conductor 788, or a double-sided emission structure that emits light to both sides of the conductor 772 and the conductor 788.
In addition, a material having reflectivity to visible light may be used for the electric conductor 772 or the electric conductor 788. As the reflective material, for example, a material containing aluminum, silver, or the like can be used.
The light emitting element 70 may have an optical microcavity resonator (microcavity) structure. Thus, light of a predetermined color (for example, RGB) can be extracted without providing a coloring layer, and the display device 10 can perform color display. By adopting a structure in which a coloring layer is not provided, absorption of light by the coloring layer can be suppressed. Thereby, the display device 10 can display a high-luminance image, and the power consumption of the display device 10 can be reduced.
Pad 542, conductive material 543, pad 541, and conductive film COM2p
The light-emitting element 70 is electrically connected to the other of the source and the drain of the transistor 750 through the conductor 772, the pad 542, the conductive material 543, the pad 541, the conductor 351, the conductor 341, the conductor 331, the conductor 313, and the conductor 301 b. In other words, the conductor 772, the pad 542, the conductive material 543, the pad 541, the conductor 351, the conductor 341, the conductor 331, the conductor 313, and the conductor 301b have a function of electrically connecting the light-emitting element 70 to the pixel circuit.
The pad 542 is formed in contact with the electrical conductor 772.
The conductive material 543 is dispersed in the insulator 734, for example. Thus, the insulator 734 is used as an anisotropic adhesive or an anisotropic film.
The bonding pads 542 and 541 may be directly bonded by a surface-active bonding method, and for example, a metal-metal bonding method, specifically, a copper-copper bonding method may be used.
The conductive film COM2p is formed so as to be in contact with the conductor 772. In addition, for example, a voltage for driving the light emitting element 70 at maximum luminance is supplied.
Color conversion layer CC
The color conversion layer CC is provided so as to overlap with the light emitting element 70. The color conversion layer CC has a function of converting the color of light emitted from the light emitting element 70 into another color.
For example, a material that converts blue light emitted from the light-emitting element into green light may be used in the color conversion layer CC. In addition, a material that converts blue light into red light may also be used for the color conversion layer CC.
In addition, for example, a material that converts ultraviolet rays emitted from the light-emitting element into blue light may be used in the color conversion layer CC. In addition, a material that converts ultraviolet light into green light may also be used for the color conversion layer CC. In addition, a material that converts ultraviolet light into red light may also be used for the color conversion layer CC.
Thus, the plurality of light emitting elements can be formed in the same process using the same material, and the color conversion layers CC can be manufactured using different materials so as to overlap with the respective light emitting elements, respectively, whereby mutually different colors can be displayed.
Further, a coloring layer may be provided. The coloring layer is provided so as to have a region overlapping with the light-emitting element 70. By providing the coloring layer, the color purity of the light extracted from the light emitting element 70 can be improved. Accordingly, the display device 10 can display a high-quality image. For example, all the light emitting elements 70 of the display device 10 may be caused to emit white light.
Note that although not illustrated in fig. 36, the display device 10 may be provided with an optical member (optical substrate) such as a polarizing member, a phase difference member, an antireflection member, or the like.
Insulator 730
The display device 10 shown in fig. 36 is provided with an insulator 730 on the insulator 363. Here, the insulator 730 may cover a portion of the pad 541.
Insulator 734
The insulator 734 is sandwiched between the pad 541 and the pad 542, and has a function of bonding the pad 541 and the pad 542. In addition, a conductive material 543 is dispersed in the insulator 734. Thus, the insulator 734 is used as an anisotropic adhesive.
Light-shielding layer 738
The light shielding layer 738 has a function of shielding light emitted from an adjacent region. In addition, the light source has a function of reducing the intensity of external light reaching the transistor 750 or the like.
Sealing layer 732
The sealing layer 732 covers the light emitting element 70. The sealing layer 732 has a function of suppressing diffusion of impurities that impair the reliability of the light-emitting element 70 from outside the light-emitting element 70 to inside the light-emitting element 70.
Structure 778
The structure 778 is provided between the insulator 730 and the substrate 705, and has a function of adjusting a gap between the insulator 730 and the substrate 705.
< structural example of display device 2>
Fig. 37 is a sectional view showing a structural example of the display device 10. The display device 10 includes a substrate 701B and a substrate 705, and the substrate 701B and the substrate 705 are bonded by a sealant 712. The display device 10 shown in fig. 37 is different from the display device 10 shown in fig. 36 in that: the transistor 750 is formed over a single crystal semiconductor substrate.
Substrate 701B
As the substrate 701B, a single crystal semiconductor substrate such as a single crystal silicon substrate can be used. As the substrate 701B, a semiconductor substrate other than a single crystal semiconductor substrate can be used.
A transistor 750 is provided over the substrate 701B. The transistor 750 may be a transistor provided in the layer 30 shown in embodiment mode 3. For example, a transistor provided in the pixel circuit 62 may be used.
Transistor 750
The transistor 750 can have the same structure as a transistor 441 described below.
< structural example of display device 3>
Fig. 38 is a sectional view showing a structural example of the display device 10. The display device 10 includes a substrate 701 and a substrate 705, and the substrate 701 and the substrate 705 are bonded by a sealant 712. The display device 10 shown in fig. 38 is different from the display device 10 shown in fig. 36 in that: including transistor 601.
Substrate 701
As the substrate 701, a single crystal semiconductor substrate such as a single crystal silicon substrate can be used. Further, a semiconductor substrate other than a single crystal semiconductor substrate may be used as the substrate 701.
The transistor 441 and the transistor 601 are provided over the substrate 701. The transistor 441 and the transistor 601 may be provided in the layer 20 described in embodiment mode 3. For example, transistors for the drive circuit 40 or transistors for the functional circuit 50 in the layer 20 may be used.
Transistor 441
The transistor 441 is constituted of a conductor 443 serving as a gate electrode, an insulator 445 serving as a gate insulator, and a part of the substrate 701, and includes a semiconductor region 447 including a channel formation region, a low-resistance region 449a serving as one of a source region and a drain region, and a low-resistance region 449b serving as the other of the source region and the drain region. Transistor 441 may be p-channel or n-channel.
The transistor 441 is electrically separated from other transistors by the element separation layer 403. Fig. 38 shows a case where the transistor 441 and the transistor 601 are electrically separated by the element separation layer 403. The element separation layer 403 can be formed by a LOCOS (Local Oxidation of Silicon: local oxidation of silicon) method, an STI (Shallow Trench Isolation: shallow trench isolation) method, or the like.
Here, in the transistor 441 shown in fig. 38, the semiconductor region 447 has a convex shape. The side surfaces and the top surface of the semiconductor region 447 are covered with a conductor 443 via an insulator 445. Note that fig. 38 does not show the state where the conductor 443 covers the side surface of the semiconductor region 447. In addition, a material for adjusting the work function can be used for the conductor 443.
Like the transistor 441, a transistor whose semiconductor region has a convex shape can be referred to as a fin-type transistor because of the use of a convex portion of a semiconductor substrate. Further, an insulator may be provided so as to be in contact with the top surface of the convex portion, and may be used as a mask for forming the convex portion. Although fig. 38 shows a case where a portion of the substrate 701 is processed to form a convex portion, an SOI substrate may be processed to form a semiconductor having a convex shape.
Further, the structure of the transistor 441 shown in fig. 38 is only one example and is not limited to this, and an appropriate structure may be adopted depending on a circuit structure, a circuit operation method, or the like. For example, the transistor 441 may be a planar transistor.
Transistor 601
The transistor 601 can have the same structure as the transistor 441.
Insulator 405, insulator 407, insulator 409, and insulator 411
An element separation layer 403, a transistor 441, and a transistor 601 are provided over a substrate 701, and an insulator 405, an insulator 407, an insulator 409, and an insulator 411 are provided. Insulator 405, insulator 407, insulator 409, and insulator 411 are each embedded with an electrical conductor 451. Here, the height of the top surface of the conductive body 451 may be made substantially the same as the height of the top surface of the insulator 411.
The insulator 405, the insulator 407, the insulator 409, and the insulator 411 are used as interlayer films, and may be used as planarizing films each covering the concave-convex shape thereunder.
Insulator 421, insulator 214, insulator 216
The insulator 421 and the insulator 214 are provided on the conductor 451 and the insulator 411. Insulator 421 and insulator 214 have conductor 453 embedded therein. Here, the height of the top surface of the conductor 453 may be made substantially the same as the height of the top surface of the insulator 214.
The insulator 216 is provided on the conductor 453 and the insulator 214. The insulator 216 has a conductor 455 embedded therein. Here, the height of the top surface of the conductive body 455 may be made substantially the same as the height of the top surface of the insulator 216.
Insulator 222, insulator 224, insulator 254, insulator 280, insulator 274, insulator 281
Insulator 222, insulator 224, insulator 254, insulator 280, insulator 274, and insulator 281 are disposed on conductor 455 and on insulator 216.
Conductor 305 is embedded in insulator 222, insulator 224, insulator 254, insulator 280, insulator 274, and insulator 281. Here, the height of the top surface of the conductor 305 may be made substantially the same as the height of the top surface of the insulator 281.
The insulator 421, the insulator 214, the insulator 280, the insulator 274, and the insulator 281 are used as interlayer films, and may be used as planarizing films each covering the concave-convex shape thereunder.
Insulator 361
Insulator 361 is provided on conductor 305 and insulator 281.
Transistor 441
As shown in fig. 38, a low-resistance region 449b of the transistor 441 serving as the other of the source region and the drain region is electrically connected to the FPC716 through the conductor 451, the conductor 453, the conductor 455, the conductor 305, the conductor 317, the conductor 337, the conductor 347, the conductor 353, the conductor 355, the conductor 357, the connection electrode 760, and the anisotropic conductor 780.
< structural example of display device 4>
Fig. 39 is a sectional view showing a structural example of the display device 10. The display device 10 includes a substrate 701B and a substrate 705, and the substrate 701B and the substrate 705 are bonded by a sealant 712. The display device 10 shown in fig. 39 is different from the display device 10 shown in fig. 38 in that: the transistor 750 has the same structure as the transistor 441, and the substrate 701B and the substrate 701 are bonded by an adhesive layer 459.
Adhesive layer 459
An adhesive layer 459 is provided on the insulator 216. Bumps 458 are embedded in the adhesive layer 459. The adhesive layer 459 adheres the insulator 216 and the substrate 701B. In addition, the lower surface of the bump 458 is in contact with the conductive body 455, and the top surface of the bump 458 is in contact with the conductive body 305, and electrically connects the conductive body 455 and the conductive body 305.
Insulator 405B, insulator 280, insulator 274, insulator 281
The substrate 701B is provided with an element separation layer 403B and a transistor 750, and further with an insulator 405B, an insulator 280, an insulator 274, and an insulator 281. The insulator 305 is embedded in the insulator 405B, the insulator 280, the insulator 274, and the insulator 281. Here, the height of the top surface of the conductor 305 may be made substantially the same as the height of the top surface of the insulator 281.
The insulator 405B, the insulator 280, the insulator 274, and the insulator 281 may also be used as interlayer films, and as planarizing films covering the concave-convex shapes thereunder, respectively.
< structural example of display device 5>
The display device 10 shown in fig. 40 is different from the display device 10 shown in fig. 38 in that: the transistor 602 and the transistor 603 including an OS transistor replace the transistor 441 and the transistor 601. Further, as the transistor 750, an OS transistor can be used. That is, the display device 10 shown in fig. 40 is provided with the OS transistors in a stacked manner. Note that in fig. 40, an example in which the transistor 602 and the transistor 603 are provided over the substrate 701 is shown. As the substrate 701, as described above, a single crystal semiconductor substrate such as a single crystal silicon substrate or another semiconductor substrate can be used. As the substrate 701, a variety of insulator substrates such as a glass substrate and a sapphire substrate can be used.
Insulator 613, insulator 614
An insulator 613 and an insulator 614 are provided over the substrate 701, and a transistor 602 and a transistor 603 are provided over the insulator 614. Further, a transistor or the like may be provided between the substrate 701 and the insulator 613. For example, a transistor having the same structure as the transistor 441 and the transistor 601 shown in fig. 38 may be provided between the substrate 701 and the insulator 613.
Transistor 602, transistor 603
The transistor 602 and the transistor 603 may be provided in the layer 20 described in embodiment mode 3.
The transistor 602 and the transistor 603 may be transistors having the same structure as the transistor 750. The transistors 602 and 603 may be OS transistors having different structures from the transistor 750.
Insulator 616, insulator 622, insulator 624, insulator 654, insulator 680, insulator 674, insulator 681
Insulator 614 is provided with an insulator 616, an insulator 622, an insulator 624, an insulator 654, an insulator 680, an insulator 674, and an insulator 681 in addition to the transistor 602 and the transistor 603. The insulator 654, the insulator 680, the insulator 674, and the insulator 681 are each embedded with a conductor 461. Here, the height of the top surface of the conductor 461 may be made substantially the same as the height of the top surface of the insulator 681.
Insulator 501
The insulator 501 is provided on the conductor 461 and the insulator 681. The insulator 501 has a conductive body 463 embedded therein. Here, the height of the top surface of the conductor 463 may be made substantially the same as the height of the top surface of the insulator 501.
Insulator 421 and insulator 214 are provided on conductor 463 and insulator 501. The insulator 421 and the insulator 214 are embedded with the conductor 453. Here, the height of the top surface of the conductor 453 may be made substantially the same as the height of the top surface of the insulator 214.
As shown in fig. 40, one of a source and a drain of the transistor 602 is electrically connected to the FPC716 through a conductor 461, a conductor 463, a conductor 453, a conductor 455, a conductor 305, a conductor 317, a conductor 337, a conductor 347, a conductor 353, a conductor 355, a conductor 357, a connection electrode 760, and an anisotropic conductor 780.
Conductor 305 is embedded in insulator 222, insulator 224, insulator 254, insulator 280, insulator 274, and insulator 281. Here, the height of the top surface of the conductor 305 may be made substantially the same as the height of the top surface of the insulator 281.
The insulator 613, the insulator 614, the insulator 680, the insulator 674, the insulator 681, and the insulator 501 may also be used as interlayer films, and may also be used as planarizing films that respectively cover the concave-convex shapes thereunder.
By adopting the structure of the display device 10 shown in fig. 40, it is possible to use OS transistors as all transistors in the display device 10 while achieving a narrower frame and miniaturization of the display device 10. Thus, for example, a transistor provided in the layer 20 shown in embodiment 3 and a transistor provided in the layer 30 can be manufactured using the same device. Thus, the manufacturing cost of the display device 10 can be reduced, and the display device 10 can be provided at low cost.
< structural example of display device 6>
Fig. 41 is a cross-sectional view showing a structural example of the display device 10. The main difference from the display device 10 shown in fig. 38 is that: between the layer including the transistor 750 and the layer including the transistor 601 and the transistor 441, there is a layer including the transistor 800.
In the structure of fig. 41, the layer 20 shown in embodiment 3 may be formed of a layer including the transistor 601 and the transistor 441, or a layer including the transistor 800. The transistor 750 may be a transistor provided in the layer 30 shown in embodiment mode 3.
Insulator 821, insulator 814
The insulator 821 and the insulator 411 are provided with an insulator 814. The insulator 821 and the insulator 814 are embedded with the conductor 853. Here, the top surface of the conductor 853 may be made substantially the same height as the top surface of the insulator 814.
Insulator 816
An insulator 816 is provided on the conductor 853 and the insulator 814. A conductor 855 is embedded in the insulator 816. Here, the top surface of the conductor 855 may be made substantially the same height as the top surface of the insulator 816.
Insulator 822, insulator 824, insulator 854, insulator 880, insulator 874, insulator 881
Insulator 822, insulator 824, insulator 854, insulator 880, insulator 874 and insulator 881 are provided on conductor 855 and insulator 816. Conductor 805 is embedded in insulator 822, insulator 824, insulator 854, insulator 880, insulator 874, and insulator 881. Here, the top surface of the conductor 805 may be made substantially the same as the top surface of the insulator 881.
Insulator 421 and insulator 214 are provided on conductor 817 and insulator 881.
As shown in fig. 41, a low-resistance region 449b serving as the other of the source region and the drain region of the transistor 441 is electrically connected to the FPC716 through the conductor 451, the conductor 853, the conductor 855, the conductor 805, the conductor 817, the conductor 453, the conductor 455, the conductor 305, the conductor 317, the conductor 337, the conductor 347, the conductor 353, the conductor 355, the conductor 357, the connection electrode 760, and the anisotropic conductor 780.
Transistor 800
The transistor 800 is provided over the insulator 814. The transistor 800 may be a transistor provided in the layer 20 shown in embodiment mode 3. Transistor 800 is preferably an OS transistor. For example, the transistor 800 may be a transistor provided in the backup circuit 82.
The conductors 801a and 801b are embedded in the insulators 854, 880, 874, and 881. The conductor 801a is electrically connected to one of the source and the drain of the transistor 800, and the conductor 801b is electrically connected to the other of the source and the drain of the transistor 800. Here, the heights of the top surfaces of the conductors 801a and 801b may be substantially the same as the height of the top surface of the insulator 881.
Transistor 750
The transistor 750 may be a transistor provided in the layer 30 shown in embodiment mode 3. For example, the transistor 750 may be a transistor provided in the pixel circuit 62. Transistor 750 is preferably an OS transistor.
Insulator 405, insulator 407, insulator 409, insulator 411, insulator 821, insulator 814, insulator 880, insulator 874, insulator 881, insulator 421, insulator 214, insulator 280, insulator 274, insulator 281, insulator 361, and insulator 363 may also be used as interlayer films, and may also be used as planarizing films that respectively cover the concave-convex shapes thereunder.
Fig. 41 shows an example in which the conductor 801a, the conductor 801b, and the conductor 805 are formed in the same layer. Further, an example in which the conductor 811, the conductor 813, and the conductor 817 are formed in the same layer is shown.
At least a part of this embodiment can be implemented in combination with other embodiments described in this specification as appropriate.
Embodiment 5
In this embodiment mode, a transistor which can be used for a display device according to one embodiment of the present invention is described.
< structural example of transistor >
Fig. 42A, 42B, and 42C are a top view and a cross-sectional view of a transistor 200A and a periphery of the transistor 200A, which can be used in a display device according to one embodiment of the present invention. The transistor 200A can be applied to a display device according to one embodiment of the present invention.
Fig. 42A is a top view of the transistor 200A. Fig. 42B and 42C are cross-sectional views of the transistor 200A. Here, fig. 42B is a sectional view along the chain line A1-A2 in fig. 42A, which corresponds to a sectional view in the channel length direction of the transistor 200A. Fig. 42C is a sectional view along the dash-dot line A3-A4 in fig. 42A, which corresponds to a sectional view in the channel width direction of the transistor 200A. Note that, for ease of understanding, part of the constituent elements are omitted in the top view of fig. 42A.
As shown in fig. 42A to 42C, the transistor 200A includes: a metal oxide 230a disposed on a substrate (not shown); a metal oxide 230b disposed on the metal oxide 230a; a conductor 242a and a conductor 242b disposed on the metal oxide 230b and separated from each other; an insulator 280 disposed on the conductors 242a and 242b and forming an opening so as to overlap between the conductors 242a and 242b; a conductor 260 disposed in the opening; an insulator 250 disposed between the metal oxide 230b, the conductor 242a, the conductor 242b, the insulator 280 and the conductor 260; and a metal oxide 230c disposed between the metal oxide 230b, the conductor 242a, the conductor 242b, and the insulator 280 and the insulator 250. Here, as shown in fig. 42B and 42C, the top surface of the conductor 260 preferably substantially coincides with the top surfaces of the insulator 250, the insulator 254, the metal oxide 230C, and the insulator 280. Hereinafter, the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c may be collectively referred to as an oxide 230. The conductors 242a and 242b are sometimes collectively referred to as conductors 242.
In the transistor 200A shown in fig. 42A to 42C, the side surfaces of the conductors 242A and 242b on the side of the conductor 260 are substantially perpendicular to the bottom surface. The transistor 200A shown in fig. 42A to 42C is not limited to this, and may be configured such that an angle formed by the side surfaces and the bottom surfaces of the conductor 242A and the conductor 242b is 10 ° or more and 80 ° or less, preferably 30 ° or more and 60 ° or less. Further, the conductor 242a and the conductor 242b may have a structure in which the opposite side surfaces have a plurality of surfaces.
As shown in fig. 42A to 42C, an insulator 254 is preferably disposed between the insulator 224, the metal oxide 230a, the metal oxide 230b, the conductor 242A, the conductor 242b, the metal oxide 230C, and the insulator 280. Here, as shown in fig. 42B and 42C, the insulator 254 preferably contacts the side surface of the metal oxide 230C, the top surface and the side surface of the conductor 242a, the top surface and the side surface of the conductor 242B, the side surfaces of the metal oxide 230a and the metal oxide 230B, and the top surface of the insulator 224.
Note that in the transistor 200A, a region where a channel is formed (hereinafter also referred to as a channel formation region) and three layers of the metal oxide 230A, the metal oxide 230b, and the metal oxide 230c are stacked in the vicinity thereof, but the present invention is not limited to this. For example, the metal oxide 230b and the metal oxide 230c may have a two-layer structure or a stacked structure of four or more layers. Further, in the transistor 200A, the conductor 260 has a two-layer structure, but the present invention is not limited thereto. For example, the conductor 260 may have a single-layer structure or a stacked structure of three or more layers. The metal oxide 230a, the metal oxide 230b, and the metal oxide 230c may each have a stacked structure of two or more layers.
For example, in the case where the metal oxide 230c has a stacked structure composed of a first metal oxide and a second metal oxide over the first metal oxide, it is preferable that the first metal oxide has the same composition as the metal oxide 230b and the second metal oxide has the same composition as the metal oxide 230 a.
Here, the conductor 260 is used as a gate electrode of a transistor, and the conductor 242a and the conductor 242b are each used as a source electrode or a drain electrode. As described above, the conductor 260 is formed so as to be fitted into the opening of the insulator 280 and to be sandwiched in the region between the conductor 242a and the conductor 242 b. Here, the arrangement of the conductors 260, 242a, and 242b is selected to be self-aligned with respect to the opening of the insulator 280. That is, in the transistor 200A, the gate electrode can be arranged between the source electrode and the drain electrode in a self-aligned manner. Thus, the conductor 260 can be formed without providing a margin for alignment, and thus the occupied area of the transistor 200A can be reduced. Thus, the display device can be made high definition. In addition, a display device with a narrow frame can be realized.
As shown in fig. 42A to 42C, the conductor 260 preferably includes a conductor 260a disposed inside the insulator 250 and a conductor 260b disposed so as to be embedded inside the conductor 260 a.
The transistor 200A preferably includes an insulator 214 disposed over a substrate (not shown), an insulator 216 disposed over the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed over the insulator 216 and the conductor 205, and an insulator 224 disposed over the insulator 222. Preferably, the metal oxide 230a is disposed on the insulator 224.
An insulator 274 and an insulator 281 serving as interlayer films are preferably arranged over the transistor 200A. Here, the insulator 274 is preferably in contact with the top surfaces of the conductor 260, the insulator 250, the insulator 254, the metal oxide 230c, and the insulator 280.
Further, the insulator 222, the insulator 254, and the insulator 274 preferably have a function of suppressing diffusion of at least one of hydrogen (e.g., hydrogen atoms, hydrogen molecules, and the like). For example, insulator 222, insulator 254, and insulator 274 preferably have a lower hydrogen permeability than insulator 224, insulator 250, and insulator 280. Further, the insulator 222 and the insulator 254 preferably have a function of suppressing diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, and the like). For example, insulator 222 and insulator 254 preferably have a lower oxygen permeability than insulator 224, insulator 250, and insulator 280.
Here, the insulator 224, the metal oxide 230, and the insulator 250 are separated from the insulator 280 and the insulator 281 by the insulator 254 and the insulator 274. This can prevent impurities such as hydrogen contained in the insulator 280 and the insulator 281, and excessive oxygen from being mixed into the insulator 224, the metal oxide 230, and the insulator 250.
Further, the semiconductor device preferably includes the conductors 240 (the conductor 240A and the conductor 240 b) which are electrically connected to the transistor 200A and are used as plugs. Further, an insulator 241 (an insulator 241a and an insulator 241 b) is provided in contact with a side surface of the conductor 240 serving as a plug. That is, the insulator 241 is formed in contact with the inner walls of the openings of the insulator 254, the insulator 280, the insulator 274, and the insulator 281. Further, a first conductor of the conductor 240 may be provided in contact with a side surface of the insulator 241 and a second conductor of the conductor 240 may be provided inside thereof. Here, the height of the top surface of the conductor 240 may be substantially the same as the height of the top surface of the insulator 281. In addition, although the structure in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are stacked in the transistor 200A is shown, the present invention is not limited to this. For example, the conductor 240 may have a single-layer structure or a stacked structure of three or more layers. When the structure has a laminated structure, ordinals may be given in the order of formation to distinguish between the structures.
In addition, a metal oxide used as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) is preferably used for the metal oxide 230 (the metal oxide 230A, the metal oxide 230b, and the metal oxide 230 c) including a channel formation region in the transistor 200A. For example, as the metal oxide to be the channel formation region of the metal oxide 230, a metal oxide having a band gap of 2eV or more, preferably 2.5eV or more is preferably used.
The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, indium (In) and zinc (Zn) are preferably contained. In addition, the element M is preferably contained. The element M may be one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), and cobalt (Co). In particular, the element M is preferably one or more of aluminum (Al), gallium (Ga), yttrium (Y), and tin (Sn). Further, the element M more preferably contains one or both of Ga and Sn.
As shown in fig. 42B, the thickness of the region of the metal oxide 230B that does not overlap the conductor 242 may be thinner than the thickness of the region that overlaps the conductor 242. The thin region is formed by removing a part of the top surface of the metal oxide 230b when the conductors 242a and 242b are formed. When a conductive film to be the conductor 242 is deposited on the top surface of the metal oxide 230b, a low-resistance region is sometimes formed near the interface with the conductive film. In this manner, by removing a low-resistance region between the conductor 242a and the conductor 242b on the top surface of the metal oxide 230b, channel formation can be suppressed in this region.
In one embodiment of the present invention, a display device including a transistor having a small size and having high definition can be provided. Further, a display device including a transistor with a large on-state current and having high luminance can be provided. Further, a display device including a transistor which operates at a high speed and which operates at a high speed can be provided. Further, a display device including a transistor with stable electrical characteristics and having high reliability can be provided. Further, a display device including a transistor with a small off-state current and having low power consumption can be provided.
A detailed structure of the transistor 200A which can be used for the display device according to one embodiment of the present invention will be described.
The conductor 205 is arranged to include a region overlapping with the metal oxide 230 and the conductor 260. Further, the electric conductor 205 is preferably provided in such a manner as to be embedded in the insulator 216.
The conductors 205 include conductors 205a, 205b, and 205c. The conductor 205a contacts the bottom surface and the side wall of the opening provided in the insulator 216. The conductor 205b is provided so as to be buried in a recess formed in the conductor 205 a. Here, the top surface of the conductor 205b is lower than the top surface of the conductor 205a and the top surface of the insulator 216. The conductor 205c is in contact with the top surface of the conductor 205b and the side surface of the conductor 205 a. Here, the height of the top surface of the conductor 205c is substantially equal to the height of the top surface of the conductor 205a and the height of the top surface of the insulator 216. In other words, the conductor 205b is surrounded by the conductor 205a and the conductor 205c.
As the conductor 205a and the conductor 205c, a conductive material having a function of suppressing diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO2, or the like), copper atoms, or the like is preferably used. Alternatively, a conductive material having a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom, an oxygen molecule, and the like) is preferably used.
By using a conductive material having a function of suppressing diffusion of hydrogen as the conductor 205a and the conductor 205c, diffusion of impurities such as hydrogen contained in the conductor 205b into the metal oxide 230 through the insulator 224 or the like can be suppressed. Further, by using a conductive material having a function of suppressing diffusion of oxygen for the conductor 205a and the conductor 205c, oxidation of the conductor 205b and a decrease in conductivity can be suppressed. As the conductive material having a function of suppressing oxygen diffusion, for example, titanium nitride, tantalum nitride, ruthenium oxide, or the like can be used. Thus, the conductive body 205a may be a single layer or a stacked layer of the above-described conductive material. For example, titanium nitride may be used as the conductor 205 a.
Further, the conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. For example, tungsten may be used for the conductor 205 b.
Here, the conductor 260 is sometimes used as a first gate (also referred to as a top gate) electrode. In addition, the conductor 205 is sometimes used as a second gate (also referred to as a bottom gate) electrode. In this case, V of the transistor 200A can be controlled by independently changing the potential supplied to the conductor 205 without making it interlocked with the potential supplied to the conductor 260 th . In particular, V of the transistor 200A can be made by supplying a negative potential to the conductor 205 th Greater than 0V and can reduce off-state current. Therefore, in the case where the negative potential is supplied to the conductor 205, the drain current at the potential of 0V supplied to the conductor 260 can be reduced as compared with the case where the negative potential is not supplied to the conductor 205.
The conductor 205 is preferably larger than the channel formation region in the metal oxide 230. In particular, as shown in fig. 42C, the conductor 205 preferably extends to a region outside the end portion intersecting with the metal oxide 230 in the channel width direction. That is, it is preferable that the conductor 205 and the conductor 260 overlap each other with an insulator therebetween on the outer side of the side surface in the channel width direction of the metal oxide 230.
By having the above-described structure, the channel formation region of the metal oxide 230 can be electrically surrounded by the electric field of the conductor 260 serving as the first gate electrode and the electric field of the conductor 205 serving as the second gate electrode.
Further, as shown in fig. 42C, the conductor 205 is extended to serve as a wiring. However, the present invention is not limited to this, and an electric conductor used as a wiring may be provided under the electric conductor 205.
The insulator 214 is preferably used as a blocking insulating film for suppressing entry of impurities such as water or hydrogen into the transistor 200A from the substrate side. Therefore, the insulator 214 preferably has a structure that suppresses hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (N 2 O、NO、NO 2 Etc.), the function of diffusion of impurities such as copper atoms (the impurities are not easily penetrated). Alternatively, an insulating material having a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom, an oxygen molecule, and the like) (which is not easily permeable to the oxygen) is preferably used.
For example, aluminum oxide, silicon nitride, or the like is preferably used as the insulator 214. This can suppress diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200A side with respect to the insulator 214. Alternatively, oxygen contained in the insulator 224 or the like may be suppressed from diffusing to the substrate side more than the insulator 214.
The dielectric constants of the insulator 216, the insulator 280, and the insulator 281 used as interlayer films are preferably lower than those of the insulator 214. By using a material having a low dielectric constant as an interlayer film, parasitic capacitance generated between wirings can be reduced. For example, as the insulator 216, the insulator 280, and the insulator 281, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon and nitrogen, silicon oxide having voids, or the like is suitably used.
Insulator 222 and insulator 224 are used as gate insulators.
Here, in the insulator 224 in contact with the metal oxide 230, oxygen is preferably desorbed by heating. In this specification, oxygen desorbed by heating is sometimes referred to as excess oxygen. For example, silicon oxide, silicon oxynitride, or the like may be appropriately used as the insulator 224. By providing an insulator containing oxygen in contact with the metal oxide 230, oxygen vacancies in the metal oxide 230 can be reduced, and thus the reliability of the transistor 200A can be improved.
Specifically, as the insulator 224, an oxide material that releases a part of oxygen by heating is preferably used. The oxide that releases oxygen by heating means that the amount of oxygen released in terms of oxygen atoms in TDS (Thermal Desorption Spectroscopy: thermal desorption Spectrometry) analysis is 1.0X10 18 atoms/cm 3 The above is preferably 1.0X10 19 atoms/cm 3 The above is more preferably 2.0X10 19 atoms/cm 3 Above, or 3.0X10 20 atoms/cm 3 The oxide film above. The surface temperature of the film in the TDS analysis is preferably in the range of 100 ℃ to 700 ℃, or 100 ℃ to 400 ℃.
As shown in fig. 42C, the thickness of the region of the insulator 224 that does not overlap with the insulator 254 and does not overlap with the metal oxide 230b may be smaller than the thickness of the other regions. In the insulator 224, a region which does not overlap with the insulator 254 and does not overlap with the metal oxide 230b preferably has a thickness sufficient to diffuse the oxygen.
As with the insulator 214 or the like, the insulator 222 is preferably used as a barrier insulating film for suppressing mixing of impurities such as water and hydrogen into the transistor 200A from the substrate side. For example, insulator 222 preferably has a lower hydrogen permeability than insulator 224. By surrounding the insulator 224, the metal oxide 230, the insulator 250, and the like with the insulator 222, the insulator 254, and the insulator 274, entry of impurities such as water or hydrogen into the transistor 200A from the outside can be suppressed.
The insulator 222 preferably has a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom and an oxygen molecule) (the oxygen is not easily permeated). For example, insulator 222 preferably has a lower oxygen permeability than insulator 224. By providing the insulator 222 with a function of suppressing diffusion of oxygen or impurities, diffusion of oxygen contained in the metal oxide 230 to the substrate side can be reduced, which is preferable. Further, the reaction of the conductor 205 with oxygen contained in the insulator 224 or the metal oxide 230 can be suppressed.
As the insulator 222, an insulator containing an oxide of one or both of aluminum and hafnium as an insulating material is preferably used. As the insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used. When the insulator 222 is formed using such a material, the insulator 222 is used as a layer which suppresses release of oxygen from the metal oxide 230 or entry of impurities such as hydrogen into the metal oxide 230 from the peripheral portion of the transistor 200A.
Alternatively, for example, alumina, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to the insulator. Further, the insulator may be subjected to nitriding treatment. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the insulator.
The insulator 222 may be formed of, for example, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO) 3 ) Or (Ba, sr) TiO 3 (BST), etc., is a so-called high-k material. When miniaturization and high integration of transistors are performed, problems such as leakage current may occur due to thinning of the gate insulator. By using a high-k material as an insulator to be used as a gate insulator, the gate potential of the transistor when operating can be reduced while maintaining physical thickness.
The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the laminated structure made of the same material, and may be a laminated structure made of a different material. For example, an insulator similar to the insulator 224 may be provided under the insulator 222.
The metal oxide 230 includes a metal oxide 230a, a metal oxide 230b on the metal oxide 230a, and a metal oxide 230c on the metal oxide 230b. When the metal oxide 230a is provided under the metal oxide 230b, diffusion of impurities from a structure formed under the metal oxide 230a to the metal oxide 230b can be suppressed. When the metal oxide 230c is provided over the metal oxide 230b, diffusion of impurities from a structure formed over the metal oxide 230c to the metal oxide 230b can be suppressed.
The metal oxide 230 preferably has a stacked structure of oxide layers in which the atomic ratios of the metal atoms are different from each other. For example, in the case where the metal oxide 230 contains at least indium (In) and the element M, the atomic ratio of the element M to the other element In the constituent elements of the metal oxide 230a is preferably larger than the atomic ratio of the element M to the other element In the constituent elements of the metal oxide 230b. In addition, the atomic number ratio of the element M to In the metal oxide 230a is preferably larger than the atomic number ratio of the element M to In the metal oxide 230b. Here, the metal oxide 230c may use a metal oxide usable for the metal oxide 230a or the metal oxide 230b.
Preferably, the energy of the conduction band bottoms of the metal oxide 230a and the metal oxide 230c is made higher than the energy of the conduction band bottom of the metal oxide 230 b. In other words, the electron affinities of the metal oxide 230a and the metal oxide 230c are preferably smaller than the electron affinities of the metal oxide 230 b. In this case, the metal oxide 230c is preferably a metal oxide that can be used for the metal oxide 230 a. Specifically, the atomic number ratio of the element M to the other elements in the constituent elements of the metal oxide 230c is preferably larger than the atomic number ratio of the element M to the other elements in the constituent elements of the metal oxide 230 b. Further, the atomic number ratio of the element M to In the metal oxide 230c is preferably larger than the atomic number ratio of the element M to In the metal oxide 230 b.
Here, in the junction of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c, the energy level of the conduction band bottom changes gently. In other words, the above-described case may be expressed as that the energy level of the conduction band bottom of the junction of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c is continuously changed or continuously joined. For this reason, it is preferable to reduce the defect state density of the mixed layer formed at the interface of the metal oxide 230a and the metal oxide 230b and the interface of the metal oxide 230b and the metal oxide 230 c.
Specifically, by including a common element (main component) in addition to oxygen in the metal oxide 230a and the metal oxide 230b and the metal oxide 230c, a mixed layer having a low defect state density can be formed. For example, in the case where the metal oxide 230b is an in—ga—zn oxide, a ga—zn oxide, gallium oxide, or the like can be used as the metal oxide 230a and the metal oxide 230 c. In addition, the metal oxide 230c may have a stacked structure. For example, a stacked structure of an In-Ga-Zn oxide and a Ga-Zn oxide on the In-Ga-Zn oxide may be used, or a stacked structure of an In-Ga-Zn oxide and a gallium oxide on the In-Ga-Zn oxide may be used. In other words, as the metal oxide 230c, a stacked structure of an in—ga—zn oxide and an oxide containing no In may be used.
Specifically, as the metal oxide 230a, in: ga: zn=1: 3:4[ atomic number ratio ] or 1:1:0.5[ atomic number ratio ]. In addition, as the metal oxide 230b, in: ga: zn=4: 2:3[ atomic number ratio ] or 3:1:2[ atomic number ratio ]. In addition, as the metal oxide 230c, in: ga: zn=1: 3:4[ atomic number ratio ], in: ga: zn=4: 2:3[ atomic number ratio ], ga: zn=2: 1[ atomic ratio ] or Ga: zn=2: 5[ atomic number ratio ]. In addition, as a specific example of the case where the metal oxide 230c has a stacked-layer structure, in: ga: zn=4: 2:3[ atomic ratio ] and Ga: zn=2: 1[ atomic ratio ], in: ga: zn=4: 2:3[ atomic ratio ] and Ga: zn=2: 5[ atomic ratio ], in: ga: zn=4: 2:3[ atomic number ratio ] and a stacked structure of gallium oxide.
At this time, the main path of the carriers is the metal oxide 230b. By providing the metal oxide 230a and the metal oxide 230c with the above-described structure, the defect state density at the interface between the metal oxide 230a and the metal oxide 230b and at the interface between the metal oxide 230b and the metal oxide 230c can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and thus the transistor 200A can obtain a large on-state current and high frequency characteristics. In addition, when the metal oxide 230c has a stacked-layer structure, an effect of reducing the defect state density at the interface between the metal oxide 230b and the metal oxide 230c and an effect of suppressing diffusion of constituent elements contained in the metal oxide 230c to the insulator 250 side are expected. More specifically, when the metal oxide 230c has a stacked-layer structure, since an oxide containing no In is located above the stacked-layer structure, in which is diffused to the insulator 250 side can be suppressed. Since the insulator 250 is used as a gate insulator, poor characteristics of the transistor are caused In the case where In diffuses therein. Thus, by providing the metal oxide 230c with a stacked structure, a highly reliable display device can be provided.
A conductor 242 (a conductor 242a and a conductor 242 b) serving as a source electrode and a drain electrode is provided over the metal oxide 230 b. As the conductor 242, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the above metal element as a component, an alloy in which the above metal element is combined, or the like is preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, or the like is preferably used. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are conductive materials which are not easily oxidized or materials which absorb oxygen and maintain conductivity are preferable.
By forming the above-described conductor 242 so as to be in contact with the metal oxide 230, the oxygen concentration in the vicinity of the conductor 242 in the metal oxide 230 sometimes decreases. In addition, a metal compound layer including a metal included in the conductor 242 and a component of the metal oxide 230 is sometimes formed near the conductor 242 in the metal oxide 230. In this case, the carrier density increases in the region near the conductor 242 of the metal oxide 230, and the resistance of the region decreases.
Here, a region between the conductors 242a and 242b is formed so as to overlap with the opening of the insulator 280. Accordingly, the conductor 260 can be arranged self-aligned between the conductor 242a and the conductor 242 b.
The insulator 250 is used as a gate insulator. Insulator 250 is preferably disposed in contact with the top surface of metal oxide 230 c. As the insulator 250, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon and nitrogen, silicon oxide having voids can be used. In particular, silicon oxide and silicon oxynitride are preferable because they have thermal stability.
Like the insulator 224, it is preferable to reduce the concentration of impurities such as water and hydrogen in the insulator 250. The thickness of the insulator 250 is preferably 1nm or more and 20nm or less.
Further, a metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably inhibits oxygen diffusion from insulator 250 to conductor 260. This can suppress oxidation of the conductor 260 due to oxygen in the insulator 250.
In addition, the metal oxide is sometimes used as part of a gate insulator. Therefore, in the case where silicon oxide, silicon oxynitride, or the like is used for the insulator 250, a metal oxide which is a high-k material having a high relative dielectric constant is preferably used as the metal oxide. By providing the gate insulator with a stacked structure of the insulator 250 and the metal oxide, a stacked structure having high thermal stability and a high relative dielectric constant can be formed. Accordingly, the gate potential applied when the transistor operates can be reduced while maintaining the physical thickness of the gate insulator. In addition, the equivalent oxide thickness of the insulator used as the gate insulator (EOT: equivalent oxide thickness) can be reduced.
Specifically, a metal oxide containing one or two or more kinds selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like can be used. In particular, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used as an insulator containing an oxide of one or both of aluminum and hafnium.
Although the conductor 260 has a two-layer structure in fig. 42A to 42C, it may have a single-layer structure or a stacked structure of three or more layers.
The conductive material 260a preferably has the above-mentioned function of suppressing a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, and a nitrogen oxide molecule (N 2 O、NO、NO 2 Etc.), a conductor having a function of diffusing impurities such as copper atoms. Further, a conductive material having a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom, an oxygen molecule, and the like) is preferably used.
Further, when the conductor 260a has a function of suppressing diffusion of oxygen, oxygen contained in the insulator 250 can be suppressed from oxidizing the conductor 260b, resulting in a decrease in conductivity. As the conductive material having a function of suppressing diffusion of oxygen, for example, tantalum nitride, ruthenium oxide, or the like is preferably used.
As the conductor 260b, a conductive material containing tungsten, copper, or aluminum as a main component is preferably used. Further, since the conductor 260 is also used as a wiring, a conductor having high conductivity is preferably used. For example, a conductive material containing tungsten, copper, or aluminum as a main component may be used. The conductor 260b may have a stacked structure, for example, a stacked structure of titanium or titanium nitride and the above-described conductive material.
Further, as shown in fig. 42A and 42C, in a region of the metal oxide 230b which does not overlap with the conductor 242, that is, in a channel formation region of the metal oxide 230, a side surface of the metal oxide 230 is covered with the conductor 260. Thereby, the electric field of the conductor 260 used as the first gate electrode can be easily influenced to the side face of the metal oxide 230. This can improve the on-state current and frequency characteristics of the transistor 200A.
The insulator 254 is preferably used as a block insulating film for preventing impurities such as water and hydrogen from being mixed into the transistor 200A from the side of the insulator 280, similarly to the insulator 214 and the like. For example, insulator 254 preferably has a lower hydrogen permeability than insulator 224. As shown in fig. 42B and 42C, the insulator 254 preferably contacts the side surface of the metal oxide 230C, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242B, the side surfaces of the metal oxide 230a and the metal oxide 230B, and the top surface of the insulator 224. By adopting such a structure, hydrogen contained in the insulator 280 can be suppressed from entering the metal oxide 230 from the top surface or the side surface of the conductor 242a, the conductor 242b, the metal oxide 230a, the metal oxide 230b, and the insulator 224.
The insulator 254 also has a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom and an oxygen molecule) (the oxygen is not easily permeated). For example, insulator 254 preferably has a lower oxygen permeability than insulator 280 or insulator 224.
The insulator 254 is preferably deposited by sputtering. Oxygen may be added to the vicinity of the region of the insulator 224 in contact with the insulator 254 by depositing the insulator 254 using a sputtering method under an atmosphere containing oxygen. Thereby, oxygen can be supplied from this region into the metal oxide 230 through the insulator 224. Here, by providing the insulator 254 with a function of suppressing diffusion of oxygen to the upper side, diffusion of oxygen from the metal oxide 230 to the insulator 280 can be prevented. Further, by making the insulator 222 have a function of suppressing diffusion of oxygen to the lower side, diffusion of oxygen from the metal oxide 230 to the substrate side can be prevented. Thus, oxygen is supplied to the channel formation region in the metal oxide 230. Thus, oxygen vacancies of the metal oxide 230 can be reduced and normally-on activation of the transistor can be suppressed.
As the insulator 254, for example, an insulator containing an oxide of one or both of aluminum and hafnium may be deposited. Note that as an insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used.
By covering the insulator 224, the insulator 250, and the metal oxide 230 with the insulator 254 having a barrier property to hydrogen, the insulator 280 is separated from the insulator 224, the metal oxide 230, and the insulator 250 by the insulator 254. This can suppress the entry of impurities such as hydrogen from the outside of the transistor 200A, and can provide the transistor 200A with good electrical characteristics and reliability.
Insulator 280 is preferably disposed on insulator 224, metal oxide 230 and conductor 242 through insulator 254. For example, the insulator 280 preferably includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide added with fluorine, silicon oxide added with carbon and nitrogen, silicon oxide having voids, or the like. In particular, silicon oxide and silicon oxynitride are preferable because they have thermal stability. In particular, a material such as silicon oxide, silicon oxynitride, or silicon oxide having voids is preferable because it is easy to form a region containing oxygen which is released by heating.
Further, it is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. In addition, the top surface of insulator 280 may also be planarized.
The insulator 274 is preferably used as a barrier insulating film for suppressing the contamination of impurities such as water or hydrogen into the insulator 280 from above, similarly to the insulator 214. As the insulator 274, for example, an insulator that can be used for the insulator 214, the insulator 254, or the like can be used.
An insulator 281 serving as an interlayer film is preferably provided over the insulator 274. As with the insulator 224, the concentration of impurities such as water and hydrogen in the insulator 281 is preferably reduced.
Further, the conductors 240a and 240b are disposed in openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 254. The conductors 240a and 240b are disposed so as to sandwich the conductor 260. In addition, the top surfaces of the conductors 240a and 240b may be on the same plane as the top surface of the insulator 281.
Further, an insulator 241a is provided so as to be in contact with the inner walls of the openings of the insulator 281, the insulator 274, the insulator 280, and the insulator 254, and a first conductor of the conductor 240a is formed so as to be in contact with the side surfaces thereof. At least a portion of the bottom of the opening is located a conductor 242a, and conductor 240a is in contact with conductor 242 a. Similarly, an insulator 241b is provided so as to contact the inner walls of the openings of the insulators 281, 274, 280, and 254, and a first conductor of the conductor 240b is formed so as to contact the side surfaces thereof. At least a portion of the bottom of the opening is located a conductor 242b, and conductor 240b is in contact with conductor 242 b.
The conductors 240a and 240b are preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor 240a and the conductor 240b may have a stacked structure.
When a stacked-layer structure is used as the conductor 240, the conductor having a function of suppressing diffusion of impurities such as water and hydrogen is preferably used as the conductor in contact with the metal oxide 230a, the metal oxide 230b, the conductor 242, the insulator 254, the insulator 280, the insulator 274, and the insulator 281. For example, tantalum nitride, titanium nitride, ruthenium oxide, or the like is preferably used. The conductive material having a function of suppressing diffusion of impurities such as water or hydrogen can be used in a single layer or a stacked layer. By using this conductive material, oxygen added to the insulator 280 can be prevented from being absorbed by the conductors 240a and 240 b. Further, impurities such as water and hydrogen can be prevented from entering the metal oxide 230 from a layer above the insulator 281 through the conductors 240a and 240 b.
As the insulator 241a and the insulator 241b, for example, an insulator that can be used for the insulator 254 or the like may be used. Since the insulator 241a and the insulator 241b are provided in contact with the insulator 254, the metal oxide 230 can be prevented from being mixed with impurities such as water and hydrogen from the insulator 280 through the conductors 240a and 240 b. Further, oxygen contained in the insulator 280 can be prevented from being absorbed by the conductors 240a and 240 b.
Although not shown, conductors used as wirings may be arranged so as to be in contact with the top surface of the conductor 240a and the top surface of the conductor 240 b. The conductor used as the wiring preferably uses a conductive material containing tungsten, copper, or aluminum as a main component. The conductor may have a stacked structure, for example, a stacked structure of titanium, titanium nitride, and the above-described conductive material. The conductor may be formed so as to be fitted into the opening of the insulator.
< materials constituting transistors >
The following describes constituent materials that can be used for the transistor.
[ substrate ]
As a substrate for forming the transistor 200A, an insulator substrate, a semiconductor substrate, or a conductor substrate can be used, for example. Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), and a resin substrate. Examples of the semiconductor substrate include a semiconductor substrate made of silicon, germanium, or the like, and a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, gallium oxide, or the like. Further, a semiconductor substrate having an insulator region inside the semiconductor substrate may be exemplified by an SOI (Silicon On Insulator; silicon on insulator) substrate or the like. Examples of the conductor substrate include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate. Alternatively, a substrate containing a metal nitride, a substrate containing a metal oxide, or the like can be given. Further, an insulator substrate provided with a conductor or a semiconductor, a semiconductor substrate provided with a conductor or an insulator, a conductor substrate provided with a semiconductor or an insulator, or the like can be also mentioned. Alternatively, a substrate having an element provided over these substrates may be used. Examples of the element provided over the substrate include a capacitor, a resistor, a switching element, a light-emitting element, and a memory element.
[ insulator ]
Examples of the insulator include insulating oxides, nitrides, oxynitrides, metal oxides, metal oxynitrides, and metal oxynitrides.
For example, when miniaturization and high integration of transistors are performed, problems such as leakage current may occur due to thinning of the gate insulator. By using a high-k material as an insulator used as a gate insulator, a low voltage at the time of transistor operation can be achieved while maintaining physical thickness. On the other hand, by using a material having a low relative dielectric constant for an insulator used as an interlayer film, parasitic capacitance generated between wirings can be reduced. Therefore, the material is preferably selected according to the function of the insulator.
Examples of the insulator having a relatively high dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.
Examples of the insulator having a low relative dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon and nitrogen, silicon oxide having voids, and resin.
The transistor using the oxide semiconductor is surrounded by an insulator (the insulator 214, the insulator 222, the insulator 254, the insulator 274, or the like) having a function of suppressing permeation of impurities such as hydrogen and oxygen, whereby the electric characteristics of the transistor can be stabilized. As an insulator having a function of suppressing permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum can be used in a single layer or a stacked layer. Specifically, as an insulator having a function of suppressing permeation of impurities such as hydrogen and oxygen, a metal oxide such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide, a metal nitride such as aluminum nitride, aluminum titanium nitride, silicon oxynitride, or silicon nitride can be used.
The insulator used as the gate insulator is preferably an insulator having a region containing oxygen which is desorbed by heating. For example, by adopting a structure in which silicon oxide or silicon oxynitride having a region containing oxygen which is desorbed by heating is in contact with the metal oxide 230, oxygen vacancies contained in the metal oxide 230 can be filled.
[ electric conductor ]
As the conductor, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, and the like, an alloy containing the above metal element as a component, an alloy in which the above metal element is combined, or the like is preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, or the like is preferably used. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are conductive materials which are not easily oxidized or materials which absorb oxygen and maintain conductivity are preferable. Further, a semiconductor having high conductivity typified by polycrystalline silicon containing an impurity element such as phosphorus, and a silicide such as nickel silicide may be used.
In addition, a plurality of conductive layers formed of the above materials may be stacked. For example, a stacked-layer structure of a material containing the above metal element and a conductive material containing oxygen may be used. In addition, a stacked structure of a material containing the above metal element and a conductive material containing nitrogen may be used. In addition, a stacked-layer structure in which a material containing the above metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined may also be employed.
In addition, in the case where a metal oxide is used for a channel formation region of a transistor, a stacked-layer structure in which a material containing the above-described metal element and a conductive material containing oxygen are combined is preferably used as a conductive body to be used as a gate electrode. In this case, it is preferable to provide a conductive material containing oxygen on the channel formation region side. By disposing the conductive material containing oxygen on the channel formation region side, oxygen detached from the conductive material is easily supplied to the channel formation region.
In particular, as the conductor used as the gate electrode, a conductive material containing a metal element and oxygen contained in a metal oxide forming a channel is preferably used. In addition, a conductive material containing the above metal element and nitrogen may be used. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride may be used. Further, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide to which silicon is added may be used. In addition, indium gallium zinc oxide containing nitrogen may also be used. By using the above material, hydrogen contained in the channel-forming metal oxide may be trapped in some cases. Alternatively, hydrogen entering from an insulator or the like outside may be trapped in some cases.
At least a part of this embodiment can be implemented in combination with other embodiments described in this specification as appropriate.
Embodiment 6
In this embodiment mode, a metal oxide (hereinafter referred to as an oxide semiconductor) that can be used for the OS transistor described in the above embodiment mode is described.
< classification of Crystal Structure >
First, a description is given of classification of a crystal structure in an oxide semiconductor with reference to fig. 43A. Fig. 43A is a diagram illustrating classification of crystal structures of an oxide semiconductor, typically IGZO (metal oxide containing In, ga, and Zn).
As shown in fig. 43A, oxide semiconductors are roughly classified into "amorphus", "Crystal", and "Crystal". Furthermore, completely Amorphous (completely Amorphous) is contained in "amorphlus". In addition, "Crystalline" includes CAAC (c-axis-aligned Crystalline), nc (nanocrystalline) and CAC (closed-aligned composite). In addition, single crystals, poly crystals, and completely amorphous are not included in the category of "crystal". The "Crystal" includes single Crystal and poly Crystal.
The structure in the thickened portion of the outer frame line shown in fig. 43A is an intermediate state between "amorphorus" and "Crystal", and belongs to a new boundary region (New crystalline phase). That is, this structure is said to be a completely different structure from "Crystal" or "amorphorus" which is unstable in energy.
In addition, the crystalline structure of the film or substrate can be evaluated using X-Ray Diffraction (XRD) spectroscopy. Here, fig. 43B shows an XRD spectrum of the CAAC-IGZO film classified as "crystal" obtained by GIXD (grading-incoedence XRD) measurement. Furthermore, the GIXD process is also referred to as a thin film process or a Seemann-Bohlin process. Hereinafter, the XRD spectrum obtained by the GIXD measurement shown in fig. 43B is simply referred to as XRD spectrum. Further, the composition of the CAAC-IGZO film shown In fig. 43B is In: ga: zn=4: 2: around 3[ atomic number ratio ]. Further, the CAAC-IGZO film shown in FIG. 43B has a thickness of 500nm.
As shown in fig. 43B, a peak showing clear crystallinity was detected in the XRD spectrum of the CAAC-IGZO film. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating the c-axis orientation was detected in the vicinity of 2θ=31°. As shown in fig. 43B, the peak around 2θ=31° is asymmetric right and left with the angle at which the peak intensity is detected as the axis.
In addition, the crystalline structure of the film or substrate can be evaluated using a diffraction pattern (also referred to as a nanobeam electron diffraction pattern) observed by a nanobeam electron diffraction method (NBED: nano Beam Electron Diffraction). Fig. 43C shows the diffraction pattern of the CAAC-IGZO film. Fig. 43C is a diffraction pattern observed by an NBED that makes an electron beam incident in a direction parallel to the substrate. In addition, the composition of the CAAC-IGZO film shown In fig. 43C is In: ga: zn=4: 2: around 3[ atomic number ratio ]. In addition, in the nano-beam electron diffraction method, an electron diffraction method having a beam diameter of 1nm was performed.
As shown in fig. 43C, a plurality of spots indicating the C-axis orientation were observed in the diffraction pattern of the CAAC-IGZO film.
[ Structure of oxide semiconductor ]
In addition, when attention is paid to the crystal structure of the oxide semiconductor, the oxide semiconductor may be classified differently from fig. 43A. For example, oxide semiconductors can be classified into single crystal oxide semiconductors and non-single crystal oxide semiconductors other than the single crystal oxide semiconductors. Examples of the non-single crystal oxide semiconductor include the CAAC-OS and nc-OS described above. The non-single crystal oxide semiconductor includes a polycrystalline oxide semiconductor, an a-like OS (amorphorus-like oxide semiconductor), an amorphous oxide semiconductor, and the like.
Details of the CAAC-OS, nc-OS, and a-like OS will be described herein.
[CAAC-OS]
The CAAC-OS is an oxide semiconductor including a plurality of crystal regions, the c-axis of which is oriented in a specific direction. The specific direction refers to the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. The crystallization region is a region having periodicity of atomic arrangement. Note that the crystal region is also a region in which lattice arrangements are uniform when the atomic arrangements are regarded as lattice arrangements. The CAAC-OS may have a region where a plurality of crystal regions are connected in the a-b plane direction, and the region may have distortion. In addition, distortion refers to a portion in which the direction of lattice arrangement changes between a region in which lattice arrangements are uniform and other regions in which lattice arrangements are uniform among regions in which a plurality of crystal regions are connected. In other words, CAAC-OS refers to an oxide semiconductor that is c-axis oriented and has no significant orientation in the a-b plane direction.
Each of the plurality of crystal regions is composed of one or more fine crystals (crystals having a maximum diameter of less than 10 nm). In the case where the crystal region is composed of one minute crystal, the maximum diameter of the crystal region is less than 10nm. In the case where the crystal region is composed of a plurality of fine crystals, the size of the crystal region may be about several tens of nm.
In addition, in the case of In-M-Zn oxide (element M is one or more selected from aluminum, gallium, yttrium, tin, titanium, and the like), CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) including a layer including indium (In) and oxygen (hereinafter, in layer), and a layer including element M, zinc (Zn), and oxygen (hereinafter, (M, zn layer). Furthermore, indium and the element M may be substituted for each other. Therefore, the (M, zn) layer sometimes contains indium. In addition, the In layer sometimes contains an element M. Note that sometimes the In layer contains Zn. The layered structure is observed as a lattice image, for example in a high resolution TEM image.
For example, when structural analysis is performed on a CAAC-OS film using an XRD device, a peak indicating c-axis orientation is detected at or near 2θ=31° in Out-of-plane XRD measurement using θ/2θ scanning. Note that the position (2θ value) of the peak indicating the c-axis orientation may vary depending on the kind, composition, and the like of the metal element constituting the CAAC-OS.
Further, for example, a plurality of bright spots (spots) are observed in the electron diffraction pattern of the CAAC-OS film. In addition, when a spot of an incident electron beam (also referred to as a direct spot) passing through a sample is taken as a symmetry center, a certain spot and other spots are observed at a point-symmetrical position.
When the crystal region is observed from the above specific direction, the lattice arrangement in the crystal region is basically a hexagonal lattice, but the unit cell is not limited to a regular hexagon, and may be a non-regular hexagon. In addition, the distortion may have a lattice arrangement such as pentagonal or heptagonal. In addition, no clear grain boundary (grain boundary) was observed near the distortion of CAAC-OS. That is, distortion of the lattice arrangement suppresses the formation of grain boundaries. This is probably because CAAC-OS can accommodate distortion due to low density of arrangement of oxygen atoms in the a-b face direction or change in bonding distance between atoms due to substitution of metal atoms, or the like.
In addition, it was confirmed that the crystal structure of the clear grain boundary was called poly crystal (polycrystalline). Since the grain boundary serves as a recombination center and carriers are trapped, there is a possibility that on-state current of the transistor is lowered, field effect mobility is lowered, or the like. Therefore, CAAC-OS, in which no definite grain boundary is confirmed, is one of crystalline oxides that provide a semiconductor layer of a transistor with an excellent crystalline structure. Note that, in order to constitute the CAAC-OS, a structure containing Zn is preferable. For example, in—zn oxide and in—ga—zn oxide are preferable because occurrence of grain boundaries can be further suppressed than In oxide.
CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundary is confirmed. Therefore, it can be said that in the CAAC-OS, a decrease in electron mobility due to grain boundaries does not easily occur. Further, since crystallinity of an oxide semiconductor is sometimes lowered by contamination of impurities, generation of defects, or the like, CAAC-OS is said to be an oxide semiconductor with few impurities or defects (oxygen vacancies, or the like). Therefore, the physical properties of the oxide semiconductor including CAAC-OS are stable. Therefore, an oxide semiconductor including CAAC-OS has high heat resistance and high reliability. In addition, CAAC-OS is also stable to high temperatures (so-called thermal budget) in the manufacturing process. Thus, by using the CAAC-OS for the OS transistor, the degree of freedom in the manufacturing process can be increased.
[nc-OS]
In nc-OS, atomic arrangements in minute regions (for example, regions of 1nm to 10nm, particularly, regions of 1nm to 3 nm) have periodicity. In other words, nc-OS has a minute crystal. For example, the size of the fine crystals is 1nm to 10nm, particularly 1nm to 3nm, and the fine crystals are called nanocrystals. Furthermore, the nc-OS did not observe regularity of crystal orientation between different nanocrystals. Therefore, the orientation was not observed in the whole film. Therefore, nc-OS is sometimes not different from a-like OS or amorphous oxide semiconductor in some analytical methods. For example, when the nc-OS film is subjected to structural analysis by using an XRD device, a peak showing crystallinity is not detected in the Out-of-plane XRD measurement using θ/2θ scanning. In addition, when an electron diffraction (also referred to as selective electron diffraction) using an electron beam having a beam diameter larger than that of nanocrystals (for example, 50nm or more) is performed on the nc-OS film, a diffraction pattern resembling a halo pattern is observed. On the other hand, when an electron diffraction (also referred to as a "nanobeam electron diffraction") using an electron beam having a beam diameter equal to or smaller than the size of a nanocrystal (for example, 1nm or more and 30nm or less) is performed on an nc-OS film, an electron diffraction pattern in which a plurality of spots are observed in an annular region centered on a direct spot may be obtained.
[a-like OS]
The a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor. The a-like OS contains holes or low density regions. That is, the crystallinity of the a-like OS is lower than that of nc-OS and CAAC-OS. The concentration of hydrogen in the film of a-like OS is higher than that in the films of nc-OS and CAAC-OS.
[ Structure of oxide semiconductor ]
Next, the details of the CAC-OS described above are described. In addition, CAC-OS is related to material composition.
[CAC-OS]
The CAC-OS refers to, for example, a constitution in which elements contained in a metal oxide are unevenly distributed, wherein the size of a material containing unevenly distributed elements is 0.5nm or more and 10nm or less, preferably 1nm or more and 3nm or less or an approximate size. Note that a state in which one or more metal elements are unevenly distributed in a metal oxide and a region including the metal elements is mixed is also referred to as a mosaic shape or a patch shape hereinafter, and the size of the region is 0.5nm or more and 10nm or less, preferably 1nm or more and 3nm or less or an approximate size.
The CAC-OS is a structure in which a material is divided into a first region and a second region, and the first region is mosaic-shaped and distributed in a film (hereinafter also referred to as cloud-shaped). That is, CAC-OS refers to a composite metal oxide having a structure in which the first region and the second region are mixed.
Here, the atomic number ratios of In, ga and Zn with respect to the metal elements constituting the CAC-OS of the In-Ga-Zn oxide are each represented by [ In ], [ Ga ] and [ Zn ]. For example, in CAC-OS of In-Ga-Zn oxide, the first region is a region whose [ In ] is larger than that In the composition of the CAC-OS film. Further, the second region is a region whose [ Ga ] is larger than [ Ga ] in the composition of the CAC-OS film. Further, for example, the first region is a region whose [ In ] is larger than that In the second region and whose [ Ga ] is smaller than that In the second region. Further, the second region is a region whose [ Ga ] is larger than that In the first region and whose [ In ] is smaller than that In the first region.
Specifically, the first region is a region mainly composed of indium oxide, indium zinc oxide, or the like. The second region is a region mainly composed of gallium oxide, gallium zinc oxide, or the like. In other words, the first region may be referred to as a region mainly composed of In. The second region may be referred to as a region containing Ga as a main component.
Note that a clear boundary between the first region and the second region may not be observed.
For example, in CAC-OS of In-Ga-Zn oxide, it was confirmed that the structure was mixed by unevenly distributing a region (first region) mainly composed of In and a region (second region) mainly composed of Ga based on an EDX-plane analysis (mapping) image obtained by an energy dispersive X-ray analysis method (EDX: energy Dispersive X-ray spectroscopy).
In the case of using the CAC-OS for the transistor, the CAC-OS can be provided with a switching function (a function of controlling on/off) by a complementary effect of the conductivity due to the first region and the insulation due to the second region. In other words, the CAC-OS material has a conductive function in one part and an insulating function in the other part, and has a semiconductor function in the whole materialBody function. By separating the conductive function from the insulating function, each function can be improved to the maximum extent. Thus, by using CAC-OS for the transistor, a high on-state current (I on ) High field effect mobility (μ) and good switching operation.
Oxide semiconductors have various structures and various characteristics. The oxide semiconductor according to one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, a-likeOS, CAC-OS, nc-OS, and CAAC-OS.
< transistor with oxide semiconductor >
Here, a case where the above oxide semiconductor is used for a transistor will be described.
By using the oxide semiconductor described above for a transistor, a transistor with high field effect mobility can be realized. Further, a transistor with high reliability can be realized.
An oxide semiconductor having a low carrier concentration is preferably used for the transistor. For example, the carrier concentration in the oxide semiconductor may be 1×10 17 cm -3 Hereinafter, it is preferably 1X 10 15 cm -3 Hereinafter, more preferably 1X 10 13 cm -3 Hereinafter, it is more preferable that 1×10 11 cm -3 Hereinafter, it is more preferably less than 1X 10 10 cm -3 And 1×10 -9 cm -3 The above. In the case of aiming at reducing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film can be reduced to reduce the defect state density. In the present specification and the like, a state in which the impurity concentration is low and the defect state density is low is referred to as "high-purity intrinsic" or "substantially high-purity intrinsic". Further, an oxide semiconductor having a low carrier concentration is sometimes referred to as a "high-purity intrinsic" or a "substantially high-purity intrinsic" oxide semiconductor.
Since the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film has a low defect state density, it is possible to have a low trap state density.
Further, it takes a long time until the charge trapped by the trap level of the oxide semiconductor disappears, and the charge may act like a fixed charge. Therefore, the transistor in which the channel formation region is formed in the oxide semiconductor having a high trap state density may have unstable electrical characteristics.
Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in a nearby film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.
< impurity >
Here, the influence of each impurity in the oxide semiconductor will be described.
When the oxide semiconductor contains silicon or carbon which is one of group 14 elements, a defect level is formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor or in the vicinity of the interface of the oxide semiconductor (concentration measured by secondary ion mass spectrometry (SIMS: secondary Ion Mass Spectrometry)) was set to 2X 10 18 atoms/cm 3 Hereinafter, it is preferably 2X 10 17 atoms/cm 3 The following is given.
In addition, when the oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect level is sometimes formed to form a carrier. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal easily has normally-on characteristics. Thus, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor measured by SIMS was made 1X 10 18 atoms/cm 3 Hereinafter, it is preferably 2X 10 16 atoms/cm 3 The following is given.
When the oxide semiconductor contains nitrogen, electrons are easily generated as carriers, and the carrier concentration is increased, so that the oxide semiconductor is n-type. As a result, a transistor using an oxide semiconductor containing nitrogen for a semiconductor tends to have normally-on characteristics. Alternatively, when the oxide semiconductor contains nitrogen, a trap level may be formed. As a result, the electrical characteristics of the transistor may be unstable. Therefore, the nitrogen concentration in the oxide semiconductor measured by SIMS is set to be lower than 5X 10 19 atoms/cm 3 PreferablyIs 5 multiplied by 10 18 atoms/cm 3 Hereinafter, more preferably 1X 10 18 atoms/cm 3 Hereinafter, it is more preferable that the ratio is 5X 10 17 atoms/cm 3 The following is given.
Hydrogen contained in the oxide semiconductor reacts with oxygen bonded to a metal atom to generate water, and thus oxygen vacancies are sometimes formed. When hydrogen enters the oxygen vacancy, electrons are sometimes generated as carriers. In addition, some of the hydrogen may be bonded to oxygen bonded to a metal atom, thereby generating electrons as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen easily has normally-on characteristics. Thus, it is preferable to reduce hydrogen in the oxide semiconductor as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration measured by SIMS is set to be lower than 1×10 20 atoms/cm 3 Preferably less than 1X 10 19 atoms/cm 3 More preferably less than 5X 10 18 atoms/cm 3 More preferably less than 1X 10 18 atoms/cm 3 。
By using an oxide semiconductor whose impurity is sufficiently reduced for a channel formation region of a transistor, the transistor can have stable electrical characteristics.
At least a part of this embodiment can be implemented in combination with other embodiments described in this specification as appropriate.
Embodiment 7
In this embodiment, an electronic device including a display device and a display system according to one embodiment of the present invention will be described.
Fig. 44A is an external view of the head mounted display 8200.
The head mount display 8200 includes a mounting portion 8201, a lens 8202, a main body 8203, a display portion 8204, a cable 8205, and the like. Further, a battery 8206 is incorporated in the mounting portion 8201.
Power is supplied from the battery 8206 to the main body 8203 via the cable 8205. The main body 8203 includes a wireless receiver or the like, and is capable of displaying an image corresponding to received image data or the like on the display unit 8204. Further, by capturing the movement of the eyeball or eyelid of the user with a camera provided in the main body 8203 and calculating the coordinates of the user's line of sight from this information, the user's line of sight can be used as an input method.
Further, a plurality of electrodes may be provided at positions of the mounting portion 8201 that are contacted by the user. The main body 8203 may have a function of detecting a current flowing through the electrode according to the movement of the eyeball of the user, and thereby recognizing the line of sight of the user. Further, the main body 8203 may have a function of monitoring a pulse of the user by detecting a current flowing through the electrode. The mounting unit 8201 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, or may have a function of displaying biological information of the user on the display unit 8204. The main body 8203 may detect the movement of the head of the user and change the image displayed on the display unit 8204 in synchronization with the movement of the head of the user.
The display device according to one embodiment of the present invention can be used for the display portion 8204. Accordingly, the power consumption of the head-mounted display 8200 can be reduced, and therefore the head-mounted display 8200 can be continuously used for a long period of time. In addition, by reducing the power consumption of the head mounted display 8200, the battery 8206 can be reduced in size and weight, and thus the head mounted display 8200 can be reduced in size and weight. This reduces the burden on the user wearing the head mount display 8200, and makes the user less likely to feel tired.
Fig. 44B, 44C, and 44D are external views of the head mounted display 8300. The head mount display 8300 includes a housing 8301, a display portion 8302, a band-shaped fixing tool 8304, and a pair of lenses 8305. Further, the battery 8306 is incorporated in the housing 8301, and electric power can be supplied from the battery 8306 to the display portion 8302 or the like.
The user can see the display on the display portion 8302 through the lens 8305. Preferably, the display portion 8302 is curved. By bending the display portion 8302, the user can feel a high sense of reality. Note that in the present embodiment, the configuration in which one display portion 8302 is provided is illustrated, but the present invention is not limited to this, and for example, a configuration in which two display portions 8302 are provided may be employed. In this case, when each display unit is arranged on each eye side of the user, three-dimensional display using parallax or the like can be performed.
The display device according to one embodiment of the present invention can be used for the display portion 8302. Thus, the power consumption of the head mounted display 8300 can be reduced, so that the head mounted display 8300 can be continuously used for a long period of time. In addition, by reducing the power consumption of the head mounted display 8300, the battery 8306 can be reduced in size and weight, and thus the head mounted display 8300 can be reduced in size and weight. This reduces the burden on the user of the head mount display 8300, and makes the user less likely to feel tired.
Next, fig. 45A and 45B show examples of electronic devices different from those shown in fig. 44A to 44D.
The electronic device shown in fig. 45A and 45B includes a housing 9000, a display portion 9001, a speaker 9003, an operation key 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (the sensor has a function of measuring a force, a displacement, a position, a speed, an acceleration, an angular velocity, a rotation speed, a distance, light, liquid, magnetism, temperature, a chemical substance, sound, time, hardness, an electric field, electric current, voltage, electric power, radiation, flow, humidity, inclination, vibration, smell, or infrared), a battery 9009, or the like.
The electronic devices shown in fig. 45A and 45B have various functions. For example, it may have the following functions: a function of displaying various information (still image, moving image, character image, etc.) on the display section; a function of the touch panel; a function of displaying a calendar, date, time, or the like; functions of controlling processing by using various software (programs); a function of performing wireless communication; a function of connecting to various computer networks by using a wireless communication function; a function of transmitting or receiving various data by using a wireless communication function; a function of reading out a program or data stored in the storage medium and displaying the program or data on the display section; etc. Note that the functions that the electronic apparatus shown in fig. 45A and 45B can have are not limited to the above-described functions, but may have various functions. Although not shown in fig. 45A and 45B, the electronic device may include a plurality of display portions. In addition, the electronic device may be provided with a camera or the like so as to have the following functions: a function of photographing a still image; a function of photographing a dynamic image; a function of storing the photographed image in a storage medium (an external storage medium or a storage medium built in a camera); a function of displaying the photographed image on a display section; etc.
Next, the electronic device shown in fig. 45A and 45B will be described in detail.
Fig. 45A is a perspective view showing the portable information terminal 9101. The portable information terminal 9101 has functions of one or more of a telephone, an electronic notebook, an information reading device, and the like, for example. In particular, it can be used as a smart phone. Further, the portable information terminal 9101 may display text or image information on a plurality of sides thereof. For example, three operation buttons 9050 (also referred to as operation icons or simply as icons) may be displayed on one surface of the display portion 9001. Further, information 9051 indicated by a dotted rectangle may be displayed on the other face of the display portion 9001. Further, as an example of the information 9051, a display prompting reception of information from an email, SNS (Social Networking Services: social network service), telephone, or the like may be given; a title of an email, SNS, or the like; sender name of email or SNS; a date; time; a battery balance; and display of the antenna received signal strength, etc. Alternatively, an operation button 9050 or the like may be displayed in place of the information 9051 at a position where the information 9051 is displayed.
The display device according to one embodiment of the present invention can be applied to the portable information terminal 9101. Thus, the power consumption of the portable information terminal 9101 can be reduced, so that the portable information terminal 9101 can be continuously used for a long period of time. Further, by reducing the power consumption of the portable information terminal 9101, the battery 9009 can be reduced in size and weight, and thus the portable information terminal 9101 can be reduced in size and weight. The portability of the portable information terminal 9101 can be improved.
Fig. 45B is a perspective view showing the wristwatch-type portable information terminal 9200. The portable information terminal 9200 can execute various application programs such as mobile phones, emails, reading and editing of articles, music playing, network communication, and computer games. The display surface of the display portion 9001 is curved, and can display on the curved display surface. Fig. 45B shows an example in which the display portion 9001 displays a time 9251, an operation button 9252 (operation icon or simply referred to as icon), and content 9253. The content 9253 may be, for example, a moving image.
Further, the portable information terminal 9200 can perform short-range wireless communication standardized by communication. For example, hands-free conversation may be performed by communicating with a headset that is capable of wireless communication. The portable information terminal 9200 includes a connection terminal 9006, and can directly exchange data with another information terminal via a connector. Further, charging may be performed through the connection terminal 9006. In addition, the charging operation may be performed by wireless power supply, instead of through the connection terminal 9006.
The display device according to one embodiment of the present invention can be applied to the portable information terminal 9200. Thus, the power consumption of the portable information terminal 9200 can be reduced, and therefore the portable information terminal 9200 can be continuously used for a long period of time. Further, by reducing the power consumption of the portable information terminal 9200, the battery 9009 can be reduced in size and weight, and therefore, the portable information terminal 9200 can be reduced in size and weight. The portability of the portable information terminal 9200 can be improved.
At least a part of this embodiment can be implemented in combination with other embodiments described in this specification as appropriate.
< notes concerning the description of the present specification and the like >
Next, explanation will be given of the above embodiment and each structure in the embodiment.
The structure shown in each embodiment mode can be combined with the structure shown in other embodiment modes as appropriate to constitute one embodiment mode of the present invention. In addition, when a plurality of structural examples are shown in one embodiment, the structural examples may be appropriately combined.
In addition, the content (or a part thereof) described in one embodiment may be applied/combined/replaced with other content (or a part thereof) described in the embodiment and/or content (or a part thereof) described in another embodiment or another embodiments.
The content described in the embodiments refers to the content described in the various drawings or the content described in the specification by the article.
Further, by combining the drawing (or a part thereof) shown in one embodiment with other parts of the drawing, other drawings (or a part thereof) shown in the embodiment, and/or drawings (or a part thereof) shown in another embodiment or another embodiments, more drawings can be constituted.
In this specification and the like, constituent elements are classified according to functions and are represented by blocks independent of each other in a block diagram. However, it is difficult to classify constituent elements by function in an actual circuit or the like, and one circuit may involve a plurality of functions or a plurality of circuits may involve one function. Accordingly, the division of blocks in the block diagrams is not limited to the constituent elements described in the specification, and may be appropriately different according to circumstances.
In the drawings, the size, thickness of layers, or regions are sometimes exaggerated for clarity of illustration. Accordingly, the present invention is not limited to the dimensions in the drawings. The drawings are shown in any size for clarity, and are not limited to the shapes, values, etc. shown in the drawings. For example, unevenness in signal, voltage, or current due to noise, timing deviation, or the like may be included.
In this specification and the like, when describing a connection relation of a transistor, expressions of "one of a source and a drain" (a first electrode or a first terminal), "the other of the source and the drain" (a second electrode or a second terminal) are used. This is because the source and drain of the transistor are interchanged according to the structure, operating conditions, or the like of the transistor. Note that the source and the drain of the transistor may be appropriately replaced with a source (drain) terminal, a source (drain) electrode, or the like as appropriate.
In this specification and the like, the "electrode" or the "wiring" does not limit the functions of the constituent elements. For example, an "electrode" is sometimes used as part of a "wiring" and vice versa. The term "electrode" and "wiring" include a plurality of "electrodes" and a plurality of "wirings" formed integrally with each other.
In this specification, the voltage and the potential may be appropriately changed. The voltage refers to a potential difference from a reference potential, and when the reference potential is, for example, a ground voltage (ground voltage), the voltage may be referred to as a potential. The ground potential does not necessarily mean 0V. Note that the potentials are opposite, and the potential supplied to the wiring or the like sometimes varies according to the reference potential.
In this specification and the like, words such as "film" and "layer" may be exchanged with each other according to the situation or state. For example, the "conductive layer" may be replaced with the "conductive film" in some cases. In addition, the "insulating film" may be replaced with an "insulating layer" in some cases.
In this specification and the like, a switch means an element having a function of controlling whether or not to flow a current by changing to a conductive state (on state) or a nonconductive state (off state). Alternatively, the switch refers to an element having a function of selecting and switching a current path.
In this specification and the like, for example, a channel length refers to a distance between a source and a drain in a region where a semiconductor (or a portion where a current flows in the semiconductor when the transistor is in an on state) and a gate overlap or a region where a channel is formed in a top view of the transistor.
In this specification and the like, for example, a channel width refers to a length of a region where a semiconductor (or a portion where a current flows in the semiconductor when a transistor is in an on state) and a gate electrode overlap, or a portion where a source and a drain oppose each other in a region where a channel is formed.
In this specification and the like, "a and B connected" includes a case where a and B are electrically connected in addition to a case where a and B are directly connected. The description of "electrically connecting a and B" refers to a case where an object having a certain electric action is present between a and B, and the transmission and reception of electric signals of a and B are enabled.
[ description of the symbols ]
CC: color conversion layer, C11: capacitor, C12: capacitor, COM1: conductive film, COM2: conductive film, COM2p: conductive film, FR1: period, FR2: period, G1: conductive film, G2: conductive film, G3: conductive film, G12: conductive film, G13: conductive film, GD: drive circuit, GL: gate line, GL2p: gate line, GL11: gate line, GL12: gate line, M11: transistor, N11: node, SD: drive circuit, SWm: switch, SW11: switch, SW12: switch, SW13: switch, SW2: switch, SW2p: switch, SW3p: switch, SW3q: switch, S1: conductive film, V0: wiring, V1: wiring, 10: display device, 10A: display device, 20: layer, 30: layer, 40: drive circuit, 41: gate driver, 42: source driver, 50: functional circuit, 51: CPU, 52: accelerator, 53: CPU core, 60: display unit, 61: pixel, 61D: pixel, 61N: pixel, 62: pixel circuit, 62B: pixel circuit, 62G: pixel circuit, 62R: pixel circuit, 70: light emitting element, 80: trigger, 81: scan flip-flop, 82: backup circuit, 200A: transistor, 205: conductor, 205a: conductor, 205b: conductor, 205c: electrical conductor, 214: insulator, 216: insulator, 222: insulator, 224: insulator, 230: metal oxide, 230a: metal oxide, 230b: metal oxide, 230c: metal oxide, 231: region, 240: conductor, 240a: conductor, 240b: conductor, 241: insulator, 241a: insulator, 241b: insulator, 242: conductor, 242a: conductor, 242b: an electrical conductor, 250: insulator, 254: insulator, 260: conductor, 260a: conductor, 260b: conductor, 274: insulator, 280: insulator, 281: insulator, 301a: conductor, 301b: conductor, 305: conductor, 311: conductor, 313: electrical conductor, 317: electrical conductor, 321: lower electrode, 323: insulator, 325: upper electrode, 331: an electric conductor 333: electrical conductor, 335: conductor, 337: conductor, 341: conductors, 343: electrical conductor, 347: electrical conductor 351: conductors, 353: electrical conductor, 355: electrical conductor, 357: conductor, 361: insulator, 363: insulator, 403: element separation layer, 403B: element separation layer, 405: insulator, 405B: insulator, 407: insulator, 409: insulator, 411: insulator, 421: insulator, 441: transistor, 443: an electrical conductor 445: insulator, 447: semiconductor region, 449a: low resistance region, 449b: low resistance region, 451: conductor, 453: electrical conductor, 455: conductor, 459: adhesive layer, 461: an electrical conductor 463: conductor, 501: insulator, 520: functional layer, 530: pixel circuit, 541: pad, 542: pad, 543: conductive material, 550: light emitting device, 601: transistor, 602: transistor, 603: transistor, 613: insulator, 614: insulator, 616: insulator, 622: insulator, 624: insulator, 654: insulator, 674: insulator, 680: insulator, 681: insulator, 700: display device, 701: substrate, 701B: substrate, 702: pixel, 703: pixel, 705: substrate, 712: sealant 716: FPC, 730: insulator, 732: sealing layer, 734: insulator, 738: light shielding layer, 750: transistor, 760: connection electrode, 772: conductor, 778: structure body, 780: anisotropic conductor, 786: luminescent layer, 788: electrical conductor, 790: capacitor, 800: transistor, 801a: conductor, 801b: electrical conductor, 805: conductor, 811: conductor, 813: an electrical conductor, 814: insulator, 816: insulator, 817: conductor, 821: insulator 822: insulator, 824: insulator, 853: conductor 854: insulator, 855: conductor, 874: insulator, 880: insulator, 881: insulator, 8200: head mounted display, 8201: mounting portion, 8202: lens, 8203: main body, 8204: display unit, 8205: cable, 8206: battery, 8300: head mounted display, 8301: housing, 8302: display unit, 8304: fixing tool, 8305: lens, 8306: battery, 9000: housing, 9001: display unit, 9003: speaker, 9005: operation key, 9006: connection terminal, 9007: sensor, 9009: battery, 9050: operation button, 9051: information, 9101: portable information terminal, 9200: portable information terminal, 9251: time, 9252: operation buttons, 9253: content
Claims (12)
1. A display device, comprising:
a first set of pixels;
a second set of pixels;
a third set of pixels;
a first conductive film; and
the second conductive film is formed of a material having a second conductivity,
wherein the first group of pixels comprises a first group of light emitting devices, a first bonding pad, a second bonding pad, conductive materials and a first group of pixel circuits,
the first group of light emitting devices is electrically connected to the first bonding pad,
the first pad overlaps the second pad,
the conductive material is sandwiched between the first pad and the second pad,
the conductive material electrically connects the first pad and the second pad,
the second pads are electrically connected to the first set of pixel circuits,
the first set of pixel circuits includes a first set of pixel circuits,
the first group of pixel circuits includes a first pixel circuit,
the second set of pixels includes a second set of light emitting devices and a second set of pixel circuits,
the second set of light emitting devices is electrically connected to the second set of pixel circuits,
the second set of pixel circuits includes a second group of pixel circuits,
the second group of pixel circuits includes a second pixel circuit,
the third group of pixels comprises a third group of light emitting devices and a third group of pixel circuits,
The third set of light emitting devices is electrically connected to the third set of pixel circuits,
the first conductive film is electrically connected with the first group of pixel circuits and the second group of pixel circuits,
and the second conductive film is electrically connected to the first pixel circuit and the second pixel circuit.
2. A display device, comprising:
a first set of pixels;
a second set of pixels;
a third set of pixels;
a first conductive film; and
a third conductive film is formed on the first conductive film,
wherein the first group of pixels comprises a first group of light emitting devices, a first bonding pad, a second bonding pad, conductive materials and a first group of pixel circuits,
the first group of light emitting devices is electrically connected to the first bonding pad,
the first pad overlaps the second pad,
the conductive material is sandwiched between the first pad and the second pad,
the conductive material electrically connects the first pad and the second pad,
the second pads are electrically connected to the first set of pixel circuits,
the first set of pixel circuits includes a first set of pixel circuits,
the first group of pixel circuits includes a first pixel circuit,
the second set of pixels includes a second set of light emitting devices and a second set of pixel circuits,
The second set of light emitting devices is electrically connected to the second set of pixel circuits,
the second set of pixel circuits includes a second group of pixel circuits,
the second group of pixel circuits includes a second pixel circuit,
the third group of pixels comprises a third group of light emitting devices and a third group of pixel circuits,
the third set of light emitting devices is electrically connected to the third set of pixel circuits,
the third set of pixel circuits includes a third group of pixel circuits,
the third group of pixel circuits includes a third pixel circuit,
the first conductive film is electrically connected with the first group of pixel circuits and the second group of pixel circuits,
and the third conductive film is electrically connected to the first pixel circuit and the third pixel circuit.
3. A display device, comprising:
a first set of pixels;
a second set of pixels;
a third set of pixels;
a first conductive film;
a fourth conductive film; and
a fifth conductive film formed on the substrate,
wherein the first group of pixels comprises a first group of light emitting devices, a first bonding pad, a second bonding pad, conductive materials and a first group of pixel circuits,
the first group of light emitting devices is electrically connected to the first bonding pad,
The first pad overlaps the second pad,
the conductive material is sandwiched between the first pad and the second pad,
the conductive material electrically connects the first pad and the second pad,
the second pads are electrically connected to the first set of pixel circuits,
the first set of pixel circuits includes a first set of pixel circuits,
the first group of pixel circuits includes a first pixel circuit,
the second set of pixels includes a second set of light emitting devices and a second set of pixel circuits,
the second set of light emitting devices is electrically connected to the second set of pixel circuits,
the second set of pixel circuits includes a second group of pixel circuits,
the second group of pixel circuits includes a second pixel circuit,
the third set of pixels comprises a third set of light emitting devices,
the third set of light emitting devices is electrically connected to the third set of pixel circuits,
the third set of pixel circuits includes a third group of pixel circuits,
the third group of pixel circuits includes a third pixel circuit,
the first conductive film is electrically connected with the first group of pixel circuits and the second group of pixel circuits,
the fourth conductive film is electrically connected to the first pixel circuit and the second pixel circuit,
And the fifth conductive film is electrically connected to the first pixel circuit and the third pixel circuit.
4. A display device according to any one of claims 1 to 3, comprising:
a sixth conductive film is formed on the substrate,
wherein the first group of light emitting devices comprises a first light emitting device,
the second set of light emitting devices comprises a second light emitting device,
and the sixth conductive film is electrically connected to the first light emitting device and the second light emitting device.
5. The display device according to any one of claims 1 to 4, comprising:
a seventh conductive film is formed on the substrate,
wherein the first group of light emitting devices comprises a first light emitting device,
the third group of light emitting devices comprises a third light emitting device,
and the seventh conductive film is electrically connected to the first light emitting device and the third light emitting device.
6. The display device according to claim 4 or 5,
wherein the first light emitting device is a light emitting diode.
7. The display device according to any one of claims 1 to 6, comprising:
an eighth conductive film; and
a ninth conductive film is formed on the substrate,
wherein the first pixel circuit comprises a first switch, a second switch, a transistor, a capacitor and a node,
The first switch includes a first terminal electrically connected to the eighth conductive film and a second terminal electrically connected to the node, has a function of controlling a conductive state or a nonconductive state according to a potential of the first conductive film,
the transistor includes a gate electrode electrically connected to the node and a first electrode electrically connected to the ninth conductive film,
the capacitor includes a conductive film electrically connected to the node and a conductive film electrically connected to the ninth conductive film,
and the second switch includes a first terminal electrically connected to the second electrode of the transistor and a second terminal electrically connected to the second pad, and has a function of controlling a conductive state or a non-conductive state according to a (second) selection signal.
8. The display device according to claim 4, comprising:
the first driving circuit is provided with a first driving circuit,
wherein the first driving circuit supplies a first selection signal to the first conductive film,
the first driving circuit supplies a second selection signal,
and the first driving circuit controls the potential of the sixth conductive film.
9. The display device according to any one of claims 1 to 5, comprising:
a first functional layer; and
The second functional layer is provided with a second layer,
wherein the first functional layer includes the first set of pixel circuits and the second pad,
the second functional layer overlaps the first functional layer,
and the second functional layer includes the first group of light emitting devices and the first pad.
10. The display device according to claim 9, comprising:
the third functional layer is provided with a third functional layer,
wherein the third functional layer has a region sandwiching the first functional layer between the third functional layer and the second functional layer,
the third functional layer includes a second driving circuit,
and the second driving circuit has a function of supplying an image signal.
11. An electronic device, comprising:
an arithmetic unit; and
the display device of any one of claim 1 to 10,
wherein the operation unit generates image information,
and, the display device displays the image information.
12. An electronic device, comprising:
the display device of claim 10; and
an operation unit for performing an operation on the data,
wherein the third functional layer comprises the operation part,
the operation unit generates image information and,
and, the display device displays the image information.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2021-020852 | 2021-02-12 | ||
| JP2021059417 | 2021-03-31 | ||
| JP2021-059417 | 2021-03-31 | ||
| PCT/IB2022/050841 WO2022172124A1 (en) | 2021-02-12 | 2022-02-01 | Display apparatus and electronic equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116783639A true CN116783639A (en) | 2023-09-19 |
Family
ID=87988199
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202280012781.9A Pending CN116783639A (en) | 2021-02-12 | 2022-02-01 | Display device and electronic apparatus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116783639A (en) |
-
2022
- 2022-02-01 CN CN202280012781.9A patent/CN116783639A/en active Pending
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