CN116781462A

CN116781462A - Tap adjusting method, equipment, storage medium and system of equalizer

Info

Publication number: CN116781462A
Application number: CN202210215562.2A
Authority: CN
Inventors: 李苏
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2022-03-07
Filing date: 2022-03-07
Publication date: 2023-09-19
Also published as: WO2023169304A1

Abstract

The embodiment of the application provides a tap adjusting method, equipment, a storage medium and a system of an equalizer, wherein the method is applied to receiving equipment, and the receiving equipment comprises the following steps: a decision feedback equalizer including at least one floating tap; the method comprises the steps of periodically obtaining an input signal, and carrying out equalization processing on the input signal to obtain an equalization signal; determining a judgment signal from at least one preset transmitting signal according to the equalization signal, and acquiring an error signal according to the judgment signal and the equalization signal; updating an error accumulation value of the at least one floating tap according to the error signal and a historical decision signal cached in the at least one floating tap; and determining at least one target tap in the at least one floating tap according to the error accumulated value of the at least one floating tap. The application is used for eliminating reflection ISI with low power consumption.

Description

Tap adjusting method, equipment, storage medium and system of equalizer

Technical Field

The present application relates to the field of communications technologies, and in particular, to a tap adjustment method, apparatus, storage medium, and system for an equalizer.

Background

With the rapid development of digital signal technology to high speed and large capacity, the demand for high-speed signal processing technology is more and more urgent. Inter-symbol interference (Inter Symbol Interference, ISI) generated in a signal transmission process is a key factor for restricting the rate improvement of a signal, and the ISI may cause pulse broadening, so that the voltage amplitude of the signal is unstable, jitter of a signal data edge is caused, and the Bit Error Ratio (BER) of a channel is increased. In the prior art, ISI in a signal can be eliminated by a channel equalization method. A decision feedback equalizer (Decision Feedback Equalizer, DFE) is a common equalization method that can be used to cancel the effects of ISI and some noise and improve the signal-to-noise ratio.

The 3-order DFE is taken as an example for illustration. As shown in fig. 1, the 3-order DFE includes 3 taps, an adder and a decision device, and each tap includes an adder, a multiplier and a register. The delay signals are stored for each received signal y n, respectively, in registers in taps in the 3-stage DFE. By means of which part of the ISI in the received signal y n can be removed. In general, the impulse response of the channel decreases rapidly with time, so that most ISI in the signal can be eliminated by considering only a small number of taps, and a better equalization effect is achieved. Since the impedance in the channel is discontinuous, there is a situation in which there is a signal reflection in the channel. For long-distance channels, ISI due to signal reflection is large and not negligible. As shown in fig. 2, a channel impulse response with reflection. As can be seen from fig. 2, in addition to the first few tap coefficients being larger, the tap coefficients at n21 and n=25 are values of |h21| and |h25| significantly larger than the other taps. Therefore, the specific elimination of the ISI corresponding to the taps with larger coefficient values can effectively improve the SNR and reduce the error rate.

In order to cancel the reflected ISI, it is necessary to determine the position of the reflected ISI first, and then set a switch of a corresponding tap in the DFE for the position of the reflected ISI to cancel the reflected ISI. In the method, ISI generated at a fixed position may be eliminated by turning on a tap at the fixed position, and after determining the reflected ISI position, the tap at the reflected ISI position may be turned on to eliminate reflected ISI at the corresponding position. In the above-described method for eliminating the reflection ISI, it is necessary to determine the position of the reflection ISI. In the prior art, when L floating taps are included, the M target taps may be determined using L times the n+1 adaptive DFE. At this time, N fixed taps and 1 candidate floating tap may be opened each time, and after convergence, the position of the floating tap and the corresponding tap coefficient are recorded. When the L times of adaptive DFE are all completed, M floating taps with the largest absolute value of tap coefficients are selected from L candidate floating taps as target taps. The reflected ISI is eliminated by M target taps.

However, the above method needs to perform n+1 adaptive DFE for L times, records the coefficients of the candidate taps after waiting for each convergence, and has large power consumption and slow convergence speed.

Disclosure of Invention

In view of the above, the present application provides a method, apparatus, storage medium and system for adjusting taps of an equalizer, so as to solve the problems of large power consumption and long time in adjusting taps of an equalizer in the prior art.

In a first aspect, an embodiment of the present application provides a tap adjustment method of an equalizer, which is applied to a receiving device, where the receiving device includes: a decision feedback equalizer including at least one floating tap; the at least one floating tap is cached with a history judgment signal, and the signal acquisition moments of the history judgment signals cached by different floating taps are different; the method comprises the following steps:

periodically acquiring an input signal, and carrying out equalization processing on the input signal to obtain an equalization signal;

determining a judgment signal from at least one preset transmitting signal according to the equalization signal, and acquiring an error signal according to the judgment signal and the equalization signal;

updating an error accumulation value of the at least one floating tap according to the error signal and a historical decision signal cached in the at least one floating tap;

and determining at least one target tap in the at least one floating tap according to the error accumulated value of the at least one floating tap.

In an implementation manner of the first aspect, the method further includes:

and updating the historical decision signal cached by each floating tap in the at least one floating tap according to the decision signal.

In an implementation manner of the first aspect, the updating the error cumulative value of the at least one floating tap according to the error signal and the buffered historical decision signal in the at least one floating tap includes:

for each floating tap in at least one floating tap, increasing the error accumulated value of the floating tap by a preset threshold value when the error signal and the history decision signal cached in the floating tap are both positive signals or both negative signals according to the error signal and the history decision signal cached in the floating tap;

or when one of the error signal and the historical decision signal cached in the floating tap is a positive signal and the other is a negative signal, reducing the error accumulation value of the floating tap by a preset threshold value.

In an implementation manner of the first aspect, before the determining, according to the error accumulated value of the at least one floating tap, at least one target tap in the at least one floating tap, the method further includes:

Detecting whether the error accumulation number of the at least one floating tap reaches a preset number threshold;

said determining at least one target tap from said at least one floating tap based on said error accumulation value for said at least one floating tap comprises:

and when the error accumulation number of the at least one floating tap reaches a preset number threshold, determining at least one floating tap in the at least one floating tap according to the error accumulation value of the at least one floating tap.

In an implementation manner of the first aspect, the method further includes:

and when the error accumulation number of the at least one floating tap does not reach the preset number threshold, continuing to execute the steps of periodically acquiring an input signal, carrying out equalization processing on the input signal to obtain an equalization signal, and updating the error accumulation value of the at least one floating tap according to the error signal and the cached historical decision signal in the at least one floating tap until the error accumulation number of the at least one floating tap reaches the preset number threshold.

In one implementation manner of the first aspect, the method further includes:

and updating a tap coefficient preset by the at least one target tap according to the error signal and the historical decision signal cached in the at least one target tap.

In an implementation manner of the first aspect, the determining at least one target tap from the at least one floating tap according to an error accumulated value of the at least one floating tap includes:

and determining a preset number of target taps in the at least one floating tap according to the error accumulated value of the at least one floating tap and the sequence from the large absolute value to the small absolute value of the error accumulated value.

dividing the at least one floating tap into at least one group of floating tap groups according to a preset sequence; each floating tap group comprises at least one floating tap;

calculating an error accumulated value corresponding to each floating tap group in the at least one floating tap group according to the error accumulated value of the at least one floating tap;

and determining a target tap in at least one group of floating tap groups according to the error accumulated value corresponding to each group of floating tap groups.

In a second aspect, an embodiment of the present application provides a receiving apparatus, including: a receiver, a decision feedback equalizer, and a processor; wherein the decision feedback equalizer comprises at least one floating tap; the at least one floating tap is cached with a history judgment signal, and the signal acquisition moments of the history judgment signals cached by different floating taps are different;

The receiver is used for periodically acquiring an input signal;

the decision feedback equalizer is used for carrying out equalization processing on the input signal to obtain an equalized signal;

the decision feedback equalizer is further configured to determine a decision signal from at least one preset transmit signal according to the equalization signal;

the processor is used for acquiring an error signal according to the decision signal and the equalization signal;

the processor is further configured to update an error accumulated value of the at least one floating tap according to the error signal and a historical decision signal buffered in the at least one floating tap;

the processor is further configured to determine at least one target tap from the at least one floating tap based on an error accumulation value of the at least one floating tap.

In an implementation manner of the second aspect, the decision feedback equalizer is further configured to update a historical decision signal buffered for each of the at least one floating tap according to the decision signal.

In an implementation manner of the second aspect, the processor is specifically configured to increase, for each floating tap of at least one floating tap, an error accumulated value of the floating tap by a preset threshold value when the error signal and the history decision signal buffered in the floating tap are both positive signals or both negative signals according to the error signal and the history decision signal buffered in the floating tap;

In an implementation manner of the second aspect, the processor is further configured to detect whether the number of accumulated errors of the at least one floating tap reaches a preset number of thresholds;

the processor is specifically configured to determine at least one floating tap from the at least one floating tap according to the error accumulation value of the at least one floating tap when the error accumulation number of the at least one floating tap reaches a preset number threshold.

In an implementation manner of the second aspect, the processor is further configured to trigger the receiver to perform the step of periodically obtaining the input signal when the number of times of error accumulation of the at least one floating tap does not reach the preset number of times threshold, trigger the decision feedback equalizer to perform the step of equalizing the input signal to obtain an equalized signal, determine a decision signal in at least one preset transmission signal according to the equalized signal, and re-perform the step of obtaining an error signal according to the decision signal and the equalized signal, and update the error accumulation value of the at least one floating tap according to the error signal and the buffered historical decision signal in the at least one floating tap until the number of times of error accumulation of the at least one floating tap reaches the preset number of times threshold.

In an implementation manner of the second aspect, the processor is further configured to update tap coefficients in the at least one target tap according to the error signal and a historical decision signal buffered in the at least one target tap.

In an implementation manner of the second aspect, the processor is specifically configured to determine, according to the error accumulated value of the at least one floating tap, a preset number of target taps from the at least one floating tap in order from the higher absolute value of the error accumulated value.

In an implementation manner of the second aspect, the processor is specifically configured to divide the at least one floating tap into at least one group of floating taps according to a preset sequence; each floating tap group comprises at least one floating tap

In a third aspect, an embodiment of the present application provides a computer readable storage medium, where the computer readable storage medium includes a stored program, where the program when executed controls a device in which the computer readable storage medium is located to perform the method of any one of the first aspects.

In a fourth aspect, an embodiment of the present application provides a communication system, including: a transmitting device and a receiving device according to any of the second aspects.

By adopting the scheme provided by the embodiment of the application, the receiving equipment periodically acquires the input signal, and the input signal is subjected to equalization processing by at least one fixed tap to obtain an equalized signal. Determining a decision signal according to the equalization signal, and acquiring an error signal according to the decision signal and the equalization signal; updating an error accumulated value of the at least one floating tap according to the error signal and a historical decision signal cached in the at least one floating tap; at least one target tap is determined from the at least one floating tap based on the error accumulation value for the at least one floating tap. Thus, in the application, the error accumulated value of each floating tap can be updated according to the historical decision signal and the error signal cached in each floating tap in each period, so that the target tap is determined according to the error accumulated value of each floating tap. In the application, only the error accumulation corresponding to each floating tap is needed to be calculated, the power consumption and the implementation complexity are lower, the target tap can be rapidly determined, the delay is low, and the implementation speed is high.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is an exemplary diagram of a 3-order decision feedback equalizer according to an embodiment of the present application;

fig. 2 is an exemplary diagram of a channel impulse response scenario with reflected ISI provided in an embodiment of the present application;

fig. 3 is a schematic diagram of a scenario of a floating decision feedback equalizer according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of a receiving device according to an embodiment of the present application;

fig. 5 is a schematic flow chart of tap adjustment of an equalizer according to an embodiment of the present application;

fig. 6 is a flowchart illustrating another method for adjusting taps of an equalizer according to an embodiment of the present application;

fig. 7 is a schematic structural diagram of another receiving device according to an embodiment of the present application;

fig. 8 is a schematic structural diagram of a decision feedback equalizer according to an embodiment of the present application;

Fig. 9 is a schematic structural diagram of another receiving device according to an embodiment of the present application;

fig. 10 is a schematic structural diagram of a communication system according to an embodiment of the present application;

fig. 11 is a schematic view of a communication system according to an embodiment of the present application.

Detailed Description

For a better understanding of the technical solution of the present application, the following detailed description of the embodiments of the present application refers to the accompanying drawings.

It should be understood that the described embodiments are merely some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The terminology used in the embodiments of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be understood that the term "and/or" as used herein is merely one way of describing an association of associated objects, meaning that there may be three relationships, e.g., a and/or b, which may represent: the first and second cases exist separately, and the first and second cases exist separately. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

Before describing embodiments of the present application in detail, terms applied or likely to be applied to the embodiments of the present application will be explained first.

UI: english is unit interval and is interpreted as a unit interval or a single signal period, indicating the signal period after modulation (modulation). While UI is often used to refer to the modulated signal itself. Such as: the expressions "current UI", "previous UI", etc., actually refer to the current signal and the previous signal.

Tapping: english is tap, representing one feedback coefficient of a multi-tap decision feedback equalizer (multi-tap Decision Feedback Equalizer, multi-tap DFE) (sometimes referred to as a multi-stage decision feedback equalizer).

In mobile communication and high-speed wireless data communication, multipath effect, limited channel bandwidth and imperfection of channel characteristics lead to unavoidable intersymbol interference during data transmission, which becomes a main factor affecting communication quality, and equalization technology of channels can eliminate intersymbol interference and noise and reduce error rate. Among them, decision Feedback Equalizer (DFE) is a very effective and widely used measure against multipath interference. Since the impedance in the channel is discontinuous, there is a situation in which there is a signal reflection in the channel. For long-distance channels, ISI due to signal reflection is large and not negligible. As shown in fig. 2, a channel impulse response with reflection. As can be seen from fig. 2, in addition to the first few tap coefficients being larger, the coefficients of the taps at n=21 and n=25 are values of |h [21] | and |h [25] | significantly larger than the other taps. Therefore, the specific elimination of the ISI corresponding to the taps with larger coefficient values can effectively improve the SNR and reduce the error rate.

In order to cancel the reflected ISI, it is necessary to determine the position of the reflected ISI first, and then set a switch of a corresponding tap in the DFE for the position of the reflected ISI to cancel the reflected ISI. In the prior art, reflection ISI is eliminated by a floating tap decision feedback equalizer. Wherein the floating tap decision feedback equalizer comprises a fixed tap for eliminating ISI at a first location, and a plurality of floating taps, and the reflected ISI at other locations can be eliminated by activating at least one of the plurality of floating taps, as shown in fig. 3. To reduce power consumption, ISI at locations where the channel impulse response coefficient is large may be selected for equalization cancellation, where a target tap needs to be determined from among a plurality of floating taps. When L floating taps are included, the n+1 adaptive DFE may be used L times to determine M target taps. At this time, N fixed taps and 1 floating tap may be opened each time, and after convergence, the position of the floating tap and the corresponding tap coefficient are recorded. When the L times of adaptive DFE are all completed, M floating taps with the largest absolute value of tap coefficients are selected from the L floating taps as target taps. The reflected ISI is eliminated by the M target floating DFEs.

The method needs to carry out self-adaptive DFE for L times, records the tap coefficient of the floating tap after waiting for each convergence, and has larger power consumption and slower convergence speed.

In view of the above problems, an embodiment of the present application provides a tap adjustment method for an equalizer, where a receiving device periodically acquires an input signal, and obtains an equalized signal after at least one fixed tap equalization process is performed on the input signal. Determining a decision signal according to the equalization signal, and acquiring an error signal according to the decision signal and the equalization signal; updating an error accumulated value of the at least one floating tap according to the error signal and a historical decision signal cached in the at least one floating tap; at least one target tap is determined from the at least one floating tap based on the error accumulation value for the at least one floating tap. Thus, in the application, the error accumulated value of each floating tap can be updated according to the historical decision signal and the error signal cached in each floating tap in each period, so that the target tap is determined according to the error accumulated value of each floating tap. In the application, only the error accumulation corresponding to each floating tap is needed to be calculated, the power consumption and the implementation complexity are lower, the target tap can be rapidly determined, the delay is low, and the implementation speed is high. The following is a detailed description.

Referring to fig. 4, a schematic structural diagram of a receiving device according to an embodiment of the present application is provided. As shown in fig. 4, the receiving apparatus includes: decision feedback equalizer 40 and processor 47. Wherein the decision feedback equalizer 40 includes at least one Floating tap (Floating tap) 42. At least one floating tap 42 has a history decision signal buffered therein, and the signal acquisition times of the history decision signals buffered by different floating taps 42 are different.

As a possible implementation, referring to fig. 4, the decision feedback equalizer 40 further includes at least one Fixed tap (Fixed tap) 41, a decision device (sler) 43 and an adder 44. Wherein, the history decision signal is buffered in the at least one fixed tap 41, the signal acquisition time of the history decision signal buffered in the at least one fixed tap 41 is different from the signal acquisition time of the history decision signal buffered in the at least one floating tap 42, and the signal acquisition time of the history decision signal buffered in the different fixed taps 41 is also different.

At least one fixed tap 41, at least a first floating tap 42 are each connected to a first input of an adder 44, and a second input of the adder 44 is adapted to receive an input signal. An output of the adder 44 is connected to an input of the arbiter 43. The output of the decision means 43 is connected to a processor 47, a register 45 in at least one fixed tap 41.

The fixed tap 41 is a tap (tap) in an operating state in the decision feedback equalizer. The floating tap 42 is the tap in the decision feedback equalizer that is inactive.

It should be noted that each tap (including the fixed tap 41 and the floating tap 42) included in the decision feedback equalizer 40 includes a register 45 and a multiplier 46. Wherein the register 45 is used for buffering the history decision signal. Multiplier 46 is used to equalize the input signal.

The signal acquisition time of the history decision signal refers to the time of acquiring the history decision signal.

Referring to fig. 5, a flow chart of a tap adjusting method of an equalizer according to an embodiment of the present application is shown. The method is applied to a receiving device as shown in fig. 4. The method comprises the following steps:

step S501, periodically acquiring an input signal, and performing equalization processing on the input signal to obtain an equalized signal.

In the embodiment of the present application, since ISI is generated in the signal during transmission, the receiving apparatus needs to perform ISI cancellation processing on the received input signal. At this time, the receiving apparatus may periodically acquire the input signal. And (3) carrying out equalization processing on the input signals aiming at each acquired input signal, eliminating part of ISI, and obtaining an equalization signal.

As a possible implementation manner, the receiving device may transmit the received input signal to at least one fixed tap in the decision feedback equalizer, and cancel a portion of ISI in the input signal through an equalization process of the at least one fixed tap, to obtain an equalized signal.

As a possible implementation, the receiving device receives one signal (UI) per cycle, i.e. an input signal. After receiving the input signal, the receiving device needs to perform equalization processing on the input signal. At this time, at least one fixed tap in an operating state in a decision feedback equalizer of the receiving apparatus may perform equalization processing on an input signal. At this time, each fixed tap of the at least one fixed tap reads a stored history decision signal from a register therein, multiplies the read history decision signal buffered in the register in the fixed tap by a tap coefficient corresponding to the multiplier in the fixed tap, inverts the product, and transmits the inverted product to an adder, and the adder adds the signal to an input signal to obtain an equalized signal. The equalized signal is a signal from which a part of ISI in the input signal is cancelled by at least one fixed tap. Wherein at least one fixed tap is preset for canceling which part of the ISI in the input signal. At this time, the buffered signal in the register in at least one fixed tap is the historical decision signal corresponding to the ISI to be cancelled. For example, ISI is included in the input signal acquired in the current period. The ISI is formed by the input signal of the previous period and other input signals of earlier periods. To cancel ISI, the last period of input signal and other earlier period of input signal included in the input signal acquired in the current period need to be cancelled, so that message ISI can be implemented. Accordingly, it is possible to set in advance which times of input signals included in the input signals acquired in the current period to be eliminated, for example, the input signals of the previous period included in the input signals of the current period to be eliminated. At this time, the tap of the decision signal acquired for the previous cycle with the history decision signal buffered in the register is determined as a fixed tap, so that the input signal of the previous cycle included in the input signal acquired for the current cycle can be eliminated by using the fixed tap.

As a possible implementation manner, the input signal and the historical decision signal buffered in each register in at least one fixed tap can be obtained by the following formulaAn equalized signal is calculated. Wherein w [ n ]]Representing the equalized signal in the nth period, y [ n ]]Represents the input signal in the nth period, j represents the jth fixed tap, N represents the number of at least one fixed tap, c _j Representing tap coefficients corresponding to the multiplier in the j fixed tap, data_reg [ n, j]Representing the history decision signal buffered by the register in the jth fixed tap during the nth period, n being an integer greater than 0.

Step S502, determining a decision signal from at least one preset transmitting signal according to the equalization signal, and acquiring an error signal according to the decision signal and the equalization signal.

Wherein the at least one transmitted signal is at least one signal that the transmitting device may transmit to the receiving device.

In the embodiment of the application, after the receiving device acquires the equalization signal, a signal closest to the equalization signal may be determined from a plurality of preset transmission signals according to the equalization signal, and determined as a decision signal. After determining the decision signal, an error signal may be calculated based on the decision signal and the equalization signal.

As a possible implementation, the error signal may be calculated from the decision signal and the equalization signal by the formula error n=x n-w n. Wherein error n represents the error signal in the n-th period and x n represents the decision signal in the n-th period.

In the embodiment of the present application, each signal that may be transmitted by the transmitting device is preset in the receiving device. After the receiving device acquires the balanced signal, the receiving device can determine the signal closest to the balanced signal from the signals possibly transmitted by the preset transmitting device according to the balanced signal, and determine the signal as the signal transmitted by the received transmitting device in the current period, namely, determine the signal as the decision signal.

After determining the decision signal, the equalized signal should be identical to the decision signal in an ideal state. However, since noise such as reflection ISI is also included in the equalized signal, the equalized signal is not identical to the decision signal. At this time, an error signal, that is, an interference signal such as noise or reflection ISI included in the equalization signal may be calculated from the decision signal and the equalization signal.

Step S503, updating the error accumulated value of at least one floating tap according to the error signal and the historical decision signal buffered in the at least one floating tap.

In the embodiment of the application, the magnitude of ISI of the historical decision signal buffered in the register in the floating tap to the input signal of the current period is identified by the error accumulated value of the floating tap. The larger the error accumulation value at the floating tap, the greater the interference of the buffered historical decision signal in the register within the floating tap to the input signal of the current cycle. After the receiving device acquires the error signal, the error accumulated value of each floating tap can be updated according to the error signal and the historical decision signal cached in each floating tap.

As one possible implementation, updating the error accumulation value of the at least one floating tap based on the error signal and the buffered historical decision signal in the at least one floating tap includes:

for each floating tap in at least one floating tap, increasing the error accumulation value of the floating tap by a preset threshold value according to the error signal and the history judgment signal cached in the floating tap when the error signal and the history judgment signal cached in the floating tap are both positive signals or both negative signals;

or when one of the error signal and the historical decision signal cached in the floating tap is a positive signal and the other is a negative signal, reducing the error accumulated value of the floating tap by a preset threshold value.

Specifically, after the receiving device acquires the error signal of the current period, the error accumulation value of each floating tap may be updated according to the error signal of the current period. Because the historical decision signal buffered in the floating tap is the error signal of the current period and the historical decision signal buffered in the register in the floating tap relative to the preset reference signal, for example, the 0 level signal, the positive and negative of the signals are the same, and the positive and negative of the signals are different. When the positive and negative of the buffered historical decision signal in the floating tap are the same as those of the error signal in the current period relative to the preset reference signal, the signal which is contained in the error signal and is the same as the buffered historical decision signal in the floating tap is explained to play a role in enhancing the error signal, and at the moment, a preset threshold value is required to be added to the error accumulated value corresponding to the floating tap. When the positive and negative of the buffered historical decision signal in the floating tap are different from those of the error signal in the current period relative to the preset reference signal, the signal which is contained in the error signal and is the same as the buffered historical decision signal in the floating tap is indicated to play a role in weakening the error signal, and at the moment, the error accumulated value corresponding to the floating tap needs to be reduced by a preset threshold value.

Based on the above, after the receiving device acquires the error signal of the current period, for each floating tap in at least one floating tap, the receiving device reads the history judgment signal buffered in the floating tap, and detects whether the history judgment signal and the error signal of the current period are both positive signals or both negative signals. When the history judgment signal and the error signal of the current period are both positive signals or both negative signals, the history judgment signal and the error signal of the current period are the signals with the same sign, and at the moment, the history judgment signal buffered in the floating tap has an enhancement function on the error signal of the current period, so that the error accumulation value of the floating tap is increased by a preset threshold value. For example, the error accumulation value of the floating tap is increased by 1. When one of the history decision signal and the error signal of the current period is a positive signal and one of the history decision signal and the error signal of the current period is a negative signal, for example, the history decision signal is a positive signal, the error signal of the current period is a negative signal, or the history decision signal is a positive signal, the history decision signal and the error signal of the current period are signals with different signs, at this time, the history decision signal buffered in the floating tap has a weakening effect on the error signal of the current period, so that the error accumulated value of the floating tap is reduced by a preset threshold value. For example, the error accumulation value of the floating tap is reduced by 1. In the above manner, the error integrated value of each of the at least one floating tap can be updated.

The positive signal is a signal greater than 0 with respect to the predetermined reference signal, and the negative signal is a signal less than 0 with respect to the predetermined reference signal.

It should be noted that, the preset threshold is preset according to the actual requirement, and the change amount of the error accumulation value is changed each time. The present application is not limited to this, and may be 1 or 2.

As one possible implementation, for each of the at least one floating tap, the receiving device updates the Error accumulation value of the floating tap according to the Error signal and the buffered historical decision signal in the floating tap by the formula error_accum [ n, i ] = error_accum [ n-1, i ] + sign (Error [ n ]) x sign (data_reg [ n, i ]). Wherein error_Accum [ n, i ] represents the Error accumulated Error value of the ith floating tap in the nth period; error_Accum [ n-1, i ] represents the Error accumulated Error value of the ith floating tap in the n-1 th period, sign (Error [ n ]) represents the positive and negative of the Error signal relative to the preset reference signal in the n-th period; sign (data_reg [ n, i ]) represents the positive and negative of the history decision signal of the ith floating tap buffer relative to the preset reference signal in the nth period.

It should be noted that, the preset reference signal is preset and may be a 0 level signal.

Step S504, determining at least one target tap in the at least one floating tap according to the error accumulation value of the at least one floating tap.

In the embodiment of the present application, the receiving device may update the error accumulation value of each floating tap in each period through the step S503, and after the accumulation number is reached, the receiving device may select at least one target tap from at least one floating tap according to the error accumulation value of each floating tap. For example, at least one target tap may be selected in order of the error accumulation value of each floating tap from large to small.

As one possible implementation, determining at least one target tap from the at least one floating tap based on the error accumulation value of the at least one floating tap includes:

Specifically, when the receiving device needs to determine the target tap, a preset number of target taps may be determined in at least one floating tap according to the error accumulated value of each floating tap and in the order from the large absolute value to the small absolute value of the error accumulated value of each floating tap. That is, a predetermined number of floating taps having the largest absolute value of the error integrated value among the at least one floating tap are determined as target taps.

dividing at least one floating tap into at least one group of floating taps according to a preset sequence; calculating the error accumulated value corresponding to each group of floating taps in at least one group of floating taps according to the error accumulated value of at least one floating tap; and determining a target tap from at least one group of floating taps according to the error accumulated value corresponding to each group of floating taps.

In the embodiment of the application, at least one floating tap can be further divided into at least one group of floating taps in order to meet the requirements of users. Each set of floating taps includes at least one floating tap. Thus, the error integrated value corresponding to each group can be calculated from the error integrated value of at least one floating tap included in each group of floating taps, for example, the absolute value of the error integrated value of at least one floating tap included in each group of floating taps is integrated, and the error integrated value corresponding to each group of floating taps is calculated. In this way, at least one group of target taps can be determined from among at least one group of floating taps based on the error accumulation value corresponding to each group, so that the floating taps included in at least one group of floating taps can be determined as target taps.

Referring to fig. 6, a flow chart of another method for adjusting taps of an equalizer according to an embodiment of the present application is shown. The method is applied to a receiving device as shown in fig. 4. The embodiment of the present application adds the step of updating the buffered history decision signal in the floating tap relative to the embodiment described in fig. 5, said method comprising:

step S601, periodically acquiring an input signal, and performing equalization processing on the input signal to obtain an equalized signal.

The details of step S501 are not described herein.

Step S602, determining a decision signal from at least one preset transmitting signal according to the equalization signal, and acquiring an error signal according to the decision signal and the equalization signal.

The details of step S502 are not described herein.

Step S603, updating the error accumulated value of at least one floating tap according to the error signal and the buffered historical decision signal in the at least one floating tap.

Specific reference to step S503 is omitted here.

Step S604, updating the history decision signal cached by each floating tap in at least one floating tap according to the decision signal.

In the embodiment of the application, since the historical decision signal buffered in at least one floating tap is not constant, the current stored historical decision signal is updated after the decision signal is determined in each period. At this time, for each of at least one floating tap, the buffered history decision signal in the floating tap is transmitted to a next floating tap of the floating tap in a preset order, and the floating tap receives the transmitted history decision signal of a previous floating tap of the floating tap and buffers the received history decision signal. And when no other tap is arranged before the first floating tap according to the preset sequence, the judgment signal is sent to the first floating tap, and the first floating tap caches the received judgment signal as a historical judgment signal.

As a first possible implementation manner, at least one fixed tap is included in the decision feedback equalizer, and when the at least one fixed tap precedes the first floating tap in a preset order, the first floating tap needs to receive and store the historical decision signal buffered in its previous fixed tap. And the decision signal determined in the current period may be buffered in the first fixed tap.

As a possible implementation manner, the decision feedback equalizer includes at least one fixed tap and at least one floating tap, historical decision signals are buffered in the at least one fixed tap and the at least one floating tap, and signal acquisition moments of the buffered historical decision signals in different taps are different. At this time, after determining the decision signal, the historical decision signals cached in all taps in the decision feedback equalizer need to be updated. At this time, for each of at least one fixed tap and at least one floating tap in the decision feedback equalizer, according to the decision signal, the history decision signal stored in the tap is transmitted to the subsequent tap according to a preset sequence, and the history decision signal transmitted from the previous tap is received, and the history decision signal is stored.

In the embodiment of the application, since the input signal is required to be periodically acquired, after the updating of the error accumulation value of each floating tap is completed in the current period, the historical decision signal stored in each tap is required to be updated according to the decision signal determined in the current period. At this time, for each of at least one fixed tap and at least one floating tap, the history decision signal stored in the tap is transmitted to a tap subsequent to the tap according to a preset sequence, the tap receives the history decision signal transmitted by a tap previous to the tap, and the history decision signal received by the tap is buffered. Through the above process, updating of the buffered historical decision signal in each tap can be completed. According to a preset sequence, the decision signal determined in the current period is used as a history decision signal which needs to be updated and stored in the first tap, at this time, the history decision signal stored in the first tap needs to be transmitted to the second tap, and then the decision signal determined in the current period is stored in the first tap. And according to the preset sequence, the last tap does not have the next tap, and the stored history decision signal does not need to be transmitted to the next tap. At this time, the last tap may receive the history decision signal transmitted by its previous tap and buffer the history decision signal received by the last tap.

The preset sequence is preset, and the arrangement sequence between at least one fixed tap and at least one floating tap is set in advance.

It should be noted that, in the embodiment of the present application, the signal acquisition time of the buffered history decision signal in each tap is different. But the signal acquisition time of the history decision signal to be stored in each tap is fixed. For example, with respect to the current period, the signal stored by tap a is the determined decision signal of the previous period, and the signal stored by tap b is the determined decision signal of the previous period. At this time, each time the signal stored in the tap a and the tap b is changed with time, but the stored signal is unchanged with respect to the signal acquisition time of the current period. That is, the signal stored in the tap a is always the decision signal determined in the previous cycle with respect to the current cycle, and the signal stored in the tap b is the decision signal determined in the previous cycle.

As a possible implementation, the at least one fixed tap is located before the at least one floating tap in a preset order.

Step S605 updates the tap coefficient of the at least one fixed tap according to the error signal and the buffered historical decision signal in the at least one fixed tap.

In the embodiment of the application, in order to more accurately set the tap coefficient so as to perform more accurate ISI elimination on the input signal, a preset adaptive algorithm can be adopted to update the tap coefficient of each fixed tap according to the error signal and the historical decision signal cached in each fixed tap. At this time, an adaptive algorithm is preset, and after the receiving device acquires an error signal, the receiving device can adjust the tap coefficient in each fixed tap, that is, the multiplication coefficient of each multiplier according to the error signal. That is, after the receiving device acquires the error signal, the receiving device may calculate the adjustment value of the tap coefficient by adopting a preset adaptive algorithm according to the historical decision signal and the error signal buffered in each fixed tap. After the adjustment value of the tap coefficient is obtained, the tap coefficient of each fixed tap may be updated according to the adjustment value of the tap coefficient.

In the case of adjusting the tap coefficient of each fixed tap, the error signal used for each fixed tap is the error signal obtained in step S602. Since the buffered historical decision signal in each fixed tap is different, the calculated adjustment value of the tap coefficient corresponding to each fixed tap is not exactly the same.

It should be noted that the preset adaptive algorithm may be a minimum average variance algorithm, and of course, may also be other algorithms, which is not limited in this aspect of the present application.

It should be noted that, the tap coefficients of at least one fixed tap and at least one floating tap in the decision feedback equalizer may be preset.

Step S606, detecting whether the error accumulation number of at least one floating tap reaches a preset number threshold.

In the embodiment of the application, in order to improve the accuracy of the error accumulation value of the floating tap, the error accumulation of the floating tap in a plurality of periods can be performed. At this time, before determining the target tap based on the error accumulation value of at least one floating tap, it is detected whether the error accumulation is completed a predetermined number of times. At this time, the receiving apparatus may detect whether the number of times of error accumulation for each floating tap in the at least one floating tap reaches a preset number of times threshold after updating the error accumulation value for the at least one floating tap of the current period. For example, the preset number of times threshold is 1000 times, at this time, the receiving device may accumulate the error accumulation number of each floating tap by 1 after updating the error accumulation value of at least one floating tap in the current period. Detecting whether the updated error accumulation number of each floating tap reaches 1000 times, and if not, continuously accumulating the error accumulation value of each floating tap. At this time, the following step S607a may be performed. If 1000 times is reached, it is indicated that the error accumulation value of each floating tap can be used to make the determination of the target tap, and the following step S607b can be performed.

Step S607a, when the number of times of error accumulation of at least one floating tap does not reach the preset number of times threshold, continuing to execute the step of periodically obtaining the input signal, and performing equalization processing on the input signal to obtain an equalized signal, until the step of updating the number of times of error accumulation of at least one floating tap according to the error signal and the buffered historical decision signal in the at least one floating tap until the number of times of error accumulation of the at least one floating tap reaches the preset number of times threshold.

In the embodiment of the present application, when determining that the number of times of error accumulation of at least one floating tap does not reach the preset number of times threshold, the receiving device needs to continuously accumulate the error accumulation value of at least one floating tap, and at this time, the receiving device may continuously execute the steps S601 to S606, that is, continuously periodically acquire the input signal, and perform equalization processing on the input signal to obtain an equalized signal. And determining a decision signal according to the equalization signal, and determining an error signal according to the decision signal and the equalization signal. And updating the error accumulated value of each floating tap according to the error signal and the historical decision signal cached in each floating tap. And detecting whether the error accumulation number of the at least one floating tap reaches a preset number threshold, if not, re-executing the steps S601-S606 until the error accumulation number of the at least one floating tap reaches the preset number threshold.

Step S607b, determining at least one target tap from the at least one floating tap according to the error accumulation value of the at least one floating tap when the error accumulation number of the at least one floating tap reaches the preset number threshold.

In the embodiment of the application, when the receiving device determines that the error accumulation number of at least one floating tap reaches the preset number threshold, it indicates that the error accumulation value of at least one floating tap has been accumulated by the preset number threshold, and at this time, the judgment of the target tap can be performed according to the error accumulation value of at least one floating tap. The receiving device may determine at least one target tap from the at least one floating tap according to the error accumulated value of the at least one floating tap, and specifically, reference may be made to step S504, which is not described herein.

In the application, the error accumulated value of each floating tap can be updated in each period according to the historical decision signal and the error signal cached in each floating tap, so that the target tap is determined according to the error accumulated value of each floating tap. In the application, only the error accumulation corresponding to each floating tap is needed to be calculated, the power consumption and the implementation complexity are lower, the target tap can be rapidly determined, the delay is low, and the implementation speed is high.

Step S608, periodically acquiring an input signal, and performing equalization processing on the input signal to obtain an equalized signal.

In the embodiment of the application, after the target decision feedback equalizer is determined, the target tap can be started, after the input signal is acquired, the input signal can be subjected to equalization processing adopted by the fixed tap and at least one target in the decision feedback equalizer, and an equalization signal with partial ISI eliminated is obtained.

As a possible implementation, the receiving device may utilize the formula according to the input signal An equalized signal is calculated. Wherein w [ n ]]An equalization signal representing the nth period, y [ n ]]An input signal representing the nth period, j representing the jth fixed tap, N representing the number of fixed taps, c _j Representing the tap coefficient of the multiplier in the j-th fixed tap, data_reg [ n, j ]]Representing the buffered historical decision signal in the jth fixed tap during the nth period. data_reg [ n, i ]]The historical decision signal buffered in the ith target tap in the nth period is represented, i represents the ith target tap, and M represents the number of target taps.

Step S609, determining a decision signal according to the equalization signal, and obtaining an error signal according to the decision signal and the equalization signal.

The step S602 may be specifically referred to herein, and will not be described in detail.

Step S610, updating the tap coefficient in at least one tap in the working state according to the error signal and the history decision signal cached in at least one tap in the working state.

Wherein the at least one tap in an operational state comprises at least one fixed tap and at least one target tap.

Specific reference may be made to step S605, which is not described herein.

Referring to fig. 7, a schematic structural diagram of a receiving device according to an embodiment of the present application is provided. As shown in fig. 7, the receiving apparatus includes: a receiver 701, a decision feedback equalizer 702 and a processor 703. As shown in fig. 8, the decision feedback equalizer 702 includes at least one floating tap 7021. At least one floating tap 7021 has a history decision signal buffered therein, and signal acquisition times of the history decision signals buffered by different floating taps are different.

A receiver 701 for periodically acquiring an input signal.

And the decision feedback equalizer 702 is configured to perform equalization processing on the input signal to obtain an equalized signal.

The decision feedback equalizer 702 is further configured to determine a decision signal from at least one preset transmit signal according to the equalized signal.

A processor 703, configured to obtain an error signal according to the decision signal and the equalization signal.

The processor 703 is further configured to update the error accumulation value of the at least one floating tap 7021 based on the error signal and the buffered historical decision signal in the at least one floating tap 7021.

In one possible implementation, the processor 703 is specifically configured to increase, for each floating tap 7021 of the at least one floating tap 7021, the error cumulative value of the floating tap 7021 by a preset threshold value when both the error signal and the history decision signal buffered in the floating tap 7021 are positive signals or both are negative signals according to the error signal and the history decision signal buffered in the floating tap;

alternatively, when one of the error signal and the history decision signal buffered in the floating tap 7021 is a positive signal and the other is a negative signal, the error cumulative value of the floating tap 7021 is reduced by a preset threshold value.

The processor 703 is further configured to determine at least one target tap from the at least one floating tap 7021 based on the error accumulation value of the at least one floating tap 7021.

As a possible implementation manner, the processor 703 is specifically configured to determine, according to the error accumulated value of the at least one floating tap 7021, a preset number of target taps in the at least one floating tap 7021 in order from the higher absolute value of the error accumulated value.

Alternatively, as a possible implementation, the processor 703 is specifically configured to divide the at least one floating tap 7021 into at least one group of floating taps in a preset order; calculating an error accumulated value corresponding to each of the at least one floating tap group according to the error accumulated value of the at least one floating tap 7021; and determining a target tap in at least one group of floating tap groups according to the error accumulated value corresponding to each group of floating tap groups.

Wherein each floating tap group includes at least one floating tap 7021.

As a possible implementation manner, in the decision feedback equalizer 702, as shown in fig. 8, the method further includes: at least one fixed tap 7022, an adder 7023 and a decision 7024. Wherein, at least one fixed tap 7022 and at least one floating tap 7023 are both connected to one input of an adder 7023, and the other input of the adder 7023 is connected to the receiver 701. An output terminal of the adder 7023 is connected to an input terminal of the decision 7024, and an output terminal of the decision 7024 is connected to a first tap in a predetermined order among the at least one fixed tap 7022 and the at least one floating tap 7023. And, at least one fixed tap 7022 and at least one floating tap 7023 are connected in sequence in a preset order. The history decision signals are buffered in the at least one fixed tap 7022, and the signal acquisition moments of the history decision signals buffered in the at least one fixed tap 7022 are different from the signal acquisition moments of the history decision signals buffered in the at least one floating tap 7022.

As a possible implementation manner, each of the at least one fixed tap 7022 and the at least one floating tap includes a register 7025 and a multiplier 7026 connected to the register 7025. At this time, the at least one fixed tap 7022 and the at least one floating tap 7023 are sequentially connected in a preset order, including: the registers 7025 in the at least one fixed tap 7022 and the registers 7025 in the at least one floating tap 7023 are sequentially connected in a predetermined order, as shown in fig. 8.

As one possible implementation, each of the at least one fixed tap 7022 and the at least one floating tap further includes an equalization adder 7027. At this time, one input of the in-tap equalization adder 7027 is connected to the output of the multiplier 7026. In a preset order, when the tap is not the first tap in the decision feedback equalizer, then the other input of the in-tap equalizer adder 7027 is connected to the output of the in-tap equalizer adder 7027 that is subsequent to the tap, and the output of the tap equalizer adder 7027 is connected to one input of the equalizing adder 7027 that is previous to the tap. When the tap is the first tap in the decision feedback equalizer, the output of the equalizing adder 7027 for that tap is connected to the adder 7023, in a predetermined order.

At this time, the decision feedback equalizer 702 equalizes the input signal, and the obtaining an equalized signal includes: at least one fixed tap 7022 outputs a signal to cancel part of ISI to an adder 7023, and the adder 7023 performs equalization processing based on the input signal and the signal to cancel part of ISI output from the at least one fixed tap 7022, to obtain an equalized signal.

The decision feedback equalizer 702 determines a decision signal from at least one preset transmit signal according to the equalization signal, where the determining includes: the decision 7024 determines a decision signal from among at least one transmission signal preset based on the equalization signal.

As a possible implementation, the decision feedback equalizer 702 is further configured to update the historical decision signal buffered for each of the at least one floating tap according to the decision signal.

That is, each of at least one fixed tap 7022 and at least one floating tap 7023 included in the decision feedback equalizer 702 transmits a history decision signal buffered in a register 7025 of the tap to a register 7025 of a subsequent tap when the tap is not the first tap in the decision feedback equalizer 702 in a preset order, receives the history decision signal transmitted from the register 7025 of the previous tap of the tap, and stores the received history decision signal to the register 7025 of the tap. When the tap is the first tap in the decision feedback equalizer 702, the historical decision signal buffered in the register 7025 in that tap is transferred to the register 7025 in the next tap in a preset order. And receives the decision signal output from the decision 7024, and buffers the decision signal into a register 7025 in the tap.

As a possible implementation, the processor 706 is further configured to detect whether the number of accumulated errors of the at least one floating tap 703 reaches a preset number of thresholds.

The processor 706 is specifically configured to determine at least one target tap from the at least one floating tap 7021 according to the error accumulation value of the at least one floating tap 7021 when the error accumulation number of the at least one floating tap 703 reaches the preset number threshold.

The processor 706 is further configured to trigger the receiver 701 to perform step of periodically acquiring an input signal when the error accumulation number of the at least one floating tap 7021 does not reach the preset number threshold, trigger the decision feedback equalizer 702 to perform step of performing equalization processing to obtain an equalization signal to step of determining a decision signal from the preset at least one transmit signal according to the equalization signal, and re-perform step of acquiring an error signal to step of updating an error accumulation value of the at least one floating tap 7021 according to the error signal and a buffered historical decision signal in the at least one floating tap 7021 until the error accumulation number of the at least one floating tap 7021 reaches the preset number threshold according to the decision signal and the equalization signal

As a possible implementation, the processor 703 is further configured to update the tap coefficients preset by the at least one target tap according to the error signal and the buffered historical decision signal in the at least one target tap.

As a possible implementation, the processor 703 is further configured to update the tap coefficients preset by the at least one fixed tap according to the error signal and the buffered historical decision signal in the at least one fixed tap.

As a possible implementation, referring to fig. 9, the processor 703 includes: error adder 7031, adaptive algorithm unit 7032, and error accumulator 7033. The error adder 7031 is connected to the decision device 7024 and the adder 7023, and is configured to obtain an error signal according to the decision signal and the equalization signal.

The error accumulator 7033 is connected to a register 7025 in the at least one floating tap 7021 and an error adder 7031, and is configured to update an error accumulated value of the at least one floating tap according to the error signal and a historical decision signal buffered in the at least one floating tap.

The adaptive algorithm unit 7032 is connected to the register 7025 in the at least one fixed tap 7022, the register 7025 in the at least one floating tap 7021, the error adder 7031, the multiplier 7026 in the at least one fixed tap 7022, and the multiplier 7026 in the at least one floating tap 7021, and is configured to update the tap coefficients in the tap in the working state according to the error signal and the historical decision signal buffered in the at least one tap in the working state.

Corresponding to the above embodiment, the present application also provides a communication system, as shown in fig. 10, including: a transmitting apparatus 1001 and a receiving apparatus 1002 described in the above embodiments. Wherein the transmitting device 1001 and the receiving device 1002 are connected by a communication channel.

As a possible implementation, the above communication system may be applied in the field of ICT (Information and Communications Technology, information and communication technology). At this time, the receiving device 1002 may be a high-speed serial interface, including a network device or a computer high-speed interface, for example, a back plane interface, a front plane interface, and an in-board interface, as described with reference to fig. 11.

In a specific implementation, the present application further provides a computer storage medium, where the computer storage medium may store a program, where the program may include some or all of the steps in each embodiment of the tap adjustment method of an equalizer provided by the present application when executed. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a random-access memory (random access memory, RAM), or the like.

It will be apparent to those skilled in the art that the techniques of embodiments of the present application may be implemented in software plus a necessary general purpose hardware platform. Based on such understanding, the technical solutions in the embodiments of the present application may be embodied in essence or what contributes to the prior art in the form of a software product, which may be stored in a storage medium, such as a ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the embodiments or some parts of the embodiments of the present application.

The same or similar parts between the various embodiments in this specification are referred to each other. In particular, for the device embodiment and the terminal embodiment, since they are substantially similar to the method embodiment, the description is relatively simple, and reference should be made to the description in the method embodiment for relevant points.

Claims

1. A tap adjustment method of an equalizer, characterized by being applied to a receiving apparatus, the receiving apparatus comprising: a decision feedback equalizer including at least one floating tap; the at least one floating tap is cached with a history judgment signal, and the signal acquisition moments of the history judgment signals cached by different floating taps are different; the method comprises the following steps:

2. The method as recited in claim 1, further comprising:

3. The method of claim 1, wherein updating the error accumulation value for the at least one floating tap based on the error signal and the buffered historical decision signal in the at least one floating tap comprises:

4. The method of claim 1, further comprising, prior to said determining at least one target tap from said at least one floating tap based on said error accumulation value for said at least one floating tap:

5. The method as recited in claim 4, further comprising:

6. The method according to claim 1, wherein the method further comprises:

and updating the tap coefficient of the at least one target tap according to the error signal and the historical decision signal cached in the at least one target tap.

7. The method of claim 1, wherein said determining at least one target tap among said at least one floating tap based on an error accumulation value for said at least one floating tap comprises:

8. The method of any of claims 1-7, wherein determining at least one target tap from among the at least one floating tap based on an error accumulation value for the at least one floating tap comprises:

9. A receiving apparatus, comprising: a receiver, a decision feedback equalizer, and a processor; wherein the decision feedback equalizer comprises at least one floating tap; the at least one floating tap is cached with a history judgment signal, and the signal acquisition moments of the history judgment signals cached by different floating taps are different;

the receiver is used for periodically acquiring an input signal;

10. The receiving device of claim 9, wherein the receiving device,

the decision feedback equalizer is further configured to update a historical decision signal cached by each floating tap of the at least one floating tap according to the decision signal.

11. The receiving device of claim 9, wherein the receiving device,

the processor is specifically configured to increase, for each floating tap in at least one floating tap, an error accumulated value of the floating tap by a preset threshold value when both the error signal and the history decision signal buffered in the floating tap are positive signals or both the error signal and the history decision signal buffered in the floating tap are negative signals according to the error signal and the history decision signal buffered in the floating tap;

12. The receiving device of claim 9, wherein the receiving device,

the processor is further used for detecting whether the error accumulation number of the at least one floating tap reaches a preset number threshold;

13. The receiving device of claim 12, wherein the receiving device,

the processor is further configured to trigger the receiver to perform step of periodically obtaining an input signal when the number of times of error accumulation of the at least one floating tap does not reach a preset number of times threshold, trigger the decision feedback equalizer to perform step of equalizing the input signal to obtain an equalized signal, determine a decision signal in at least one preset transmission signal according to the equalized signal, and re-perform step of obtaining an error signal according to the decision signal and the equalized signal, and update the error accumulation value of the at least one floating tap until the number of times of error accumulation of the at least one floating tap reaches the preset number of times threshold according to the error signal and a buffered historical decision signal in the at least one floating tap.

14. The receiving device of claim 13, wherein the receiving device,

the processor is further configured to update tap coefficients in the at least one target tap according to the error signal and the buffered historical decision signal in the at least one target tap.

15. The receiving device of claim 9, wherein the receiving device,

The processor is specifically configured to determine, according to the error accumulated value of the at least one floating tap, a preset number of target taps from the at least one floating tap in order from the higher absolute value of the error accumulated value to the lower absolute value of the error accumulated value.

16. The receiving device according to any of the claims 9-15, characterized in that,

the processor is specifically configured to divide the at least one floating tap into at least one floating tap group according to a preset sequence; each floating tap group comprises at least one floating tap

17. A computer readable storage medium, characterized in that the computer readable storage medium comprises a stored program, wherein the program when run controls a device in which the computer readable storage medium is located to perform the method according to any one of claims 1-8.

18. A communication system, comprising: a transmitting device and a receiving device as claimed in any one of claims 9 to 16.