KR100199184B1 - Digital equalizer - Google Patents

Abstract

The present invention provides a circuit having a feed forward filter and a feed backward filter in a digital equalizer circuit and generating a filter coefficient using a weight to improve the precision of the digital equalization operation. To this end, the feed forward filter receives the distorted signal and first-orders the distorted signal by the received filter coefficient. When the detector receives the equalized signal, the detector compares the equalized signal with a predetermined reference value to generate an error signal and simultaneously generates an equalized output signal. The filter coefficient generator gives a weight corresponding to the error signal, generates a filter coefficient that can be adaptively equalized to the error signal, and applies it to the feed forward filter and the feed backward filter. The feedback word filter then receives an output signal and performs a second equalization operation based on the filter coefficients to generate a signal for estimating the distortion of the first equalization signal. Apply as input.

Description

Digital equalizer circuit

1 is a block diagram of a conventional digital equalizer.

2 is a block diagram of a digital equalizer according to the present invention.

* Explanation of symbols for main parts of the drawings

21,27 Filter 22,26 Coefficient Generator

23: detector 24,25: subtractor

28: adder

The present invention relates to an equalizer circuit, and more particularly to a digital equalizer circuit.

In general, a channel for transmitting data or various kinds of information has a severe communication obstacle due to interference, and therefore, a digital equalizer circuit with precise equalization degree is used to overcome this problem. 1 is a configuration of a conventional digital equalizer circuit, the receiving end for overcoming the communication obstacle has a tapped delay line (tapped delay line) structure, the configuration of the equalizer using the Least Mean Square (LMS) adaptive algorithm is shown have.

Looking at the operation of the conventional digital equalizer having the above configuration, the signal 1 is received distorted is applied to the filter (11). At this time, the filter 11 performs the filter operation by the coefficient set by the coefficient generator 15, and thus the equalization operation is performed.

The signal outputting the filter 11 is added by the adder 12 and output as an equalized signal 3 through the detector 13. At this time, the subtractor 14 outputs the adder 12 from the signal 3 outputting the detector 13 to subtract the signal input to the detector 13 and applies it to the coefficient generator 15. The coefficient generator 15 then receives the output of the subtractor 14 and adaptively generates the filter 11 in an LMS manner and applies it as a coefficient of the filter 11. At this time, the adaptive coefficient generation of the LMS method is obtained by differentially deriving the following equation for each coefficient to obtain a new coefficient vector of ξ = 0.

However, the digital equalization scheme as described above does not have a weight vector when coefficients are generated, so that compensation may be implemented using only received error signal components. Therefore, the compensation of the degree of equalization has a disadvantage that is not precise. In addition, the non-wired channel is a multipath fading channel, and the equalizer configuration cannot compensate for distortion and interference between signals due to the equalizer configuration, and the equalizer is in a steady state. ) Requires a lot of time to operate.

Accordingly, an object of the present invention is to provide a circuit capable of compensating for distortion of a received signal by adaptively predicting and equalizing interference between signals in a digital equalizer circuit.

Another object of the present invention is to provide a digital equalizer circuit that detects a received symbol and estimates the interference of the signal value affecting the received symbol from the detected symbol and then removes the interference term before detecting the next symbol. Is in.

It is still another object of the present invention to provide a digital equalizer circuit capable of adaptively generating coefficients by using weights of coefficients of the filters in a digital equalizer including a feed forward filter and a feed backward filter.

Hereinafter, the present invention will be described in detail with reference to the drawings.

2 is a block diagram of a digital equalizer circuit according to the present invention, in which the first filter 21 receives the distorted signal 1 and receives the output of the first coefficient generator 22 as a filter coefficient. The first filter 11 first equalizes the signal 1 received as a feed forward filter by the filter coefficient. The detector 23 compares the difference of the received equalization signal with a prescribed reference signal, calculates an error value, and outputs an equalized signal 3. The subtractor 24 subtracts the input signal of the detector 23 from the output of the detector 23 to calculate an error vector. The subtractor 25 subtracts the output of the first filter 21 from the signal 3 outputting the detector 23 and outputs the subtracted output. The first coefficient generator 22 receives the output of the subtractor 25, analyzes an error vector signal output from the subtractor 25, and assigns a weight to the filter coefficient of the first filter 21. Occurs. The second coefficient generator 26 receives an error vector outputting the subtractor 24 and generates a filter coefficient to compensate for the residual interference signal existing in the first equalized signal by weighting the error vector. do. The second filter 27 receives the output of the subtractor 25 and receives the output of the fraudulent second coefficient generator 26 as a filter coefficient. The second filter 27 receives the output of the subtractor 25 as a feed backward filter and receives the output of the second coefficient generator 26 as a filter coefficient to obtain the first equalized signal. A signal for predicting and compensating for residual interference of the signal is generated. An adder 28 is connected between the output of the first filter 21 and the input of the detector 23, and equalizes the signal by adding the output of the first filter 21 and the output of the second filter 27. Occurs 3.

The present invention will be described in detail based on the configuration of FIG. 2 described above.

Once a symbol is detected in the digital equalizer circuit having the configuration as shown in FIG. 2, the detected symbol is analyzed to estimate an inter-symbol interference (ISI) that affects future symbols. This estimate may eliminate the interference term before detecting the symbol. To this end, the digital equalizer circuit uses two filters, the first filter 21 and the second filter 27, all of which have a TDL (Tappde Delay Line) structure as described above. The second filter 27 is a feed backward filter. The second filter 27 estimates noise and predicts the residual interference signal ISI present at the output of the first filter 21 as a feed forward filter. To apply. Therefore, a more reliable output signal 3 can be obtained than when the distorted signal 1 is received and equalized.

In this case, the coefficient generators 22 and 26, which obtain the filter coefficients of the first filter 21 and the second filter 27, respectively, have a faster convergence speed than the LMS method, and provide better quality equalization. Recursive Least Squsres). The RLS scheme is represented by the following two expressions.

In Formula 2, In is an output of the equalizer, / In represents the output of the detector 23, k represents the number of taps of the equalizer, and w represents a weight. Here, the meaning of w is a value for calculating the weight of the first sample more than the past sample.

First, the signal 1 is a signal transmitted and received on a channel and becomes a signal having distortion and interference between signals. The first filter 21 receiving the signal 1 first equalizes the signal 1, which is performed by using a coefficient output from the first coefficient generator 22. The first coefficient generator 22 generates coefficients in the RLS scheme as described above, which receives the weight from the subtractor 25 by weighting the error vector and adaptively receives the first filter 21. The counting signals are generated so that the equalization of the signal 1 can be performed stably. Accordingly, the first filter 21 is a feed forward filter and performs equalization within the range where error correction is possible by first equalizing the signal 1.

The output of the first filter 21 is applied to the adder 28, and the output of the adder 28 is applied to the input of the detector 23. The detector 23 then maps the output of the adder 28 to an optimization decision point. This generates a signal 3 that receives the output of the adder 28 and compares the difference with the originally defined reference signal to calculate an error value. At this time, the inter-signal 3 becomes an output signal and becomes a symbol for predicting an error of the next symbol.

Receives the signal 3 outputting the detector 23 and the output of the first filter 21, subtracts the first equalized signal outputting the first filter 21 from the signal 3 to the first coefficient It is applied to the generator 22, and this signal becomes an error vector. Using the error vector, the first coefficient generator 22 generates adaptive coefficients in the same manner as in Equation 2 above. At this time, the filter coefficient outputting the first coefficient generator 22 corrects the distortion of the signal according to the calculation result of the signal 3 in which the distortion form of the signal 1 input to the detector 23 and the distortion outputting the detector 23 are compensated. It is a filter coefficient to predict and compensate.

In addition, a subtractor 24 which outputs the adder 28 to receive the signal applied to the detector 23 and the signal 3 outputting the detector 23 subtracts the output of the adder 28 from the signal 3. The error vector for updating the coefficient of the second filter 27 is calculated. Then, the second coefficient generator 26 which receives the error vector outputting the subtractor 24 generates an adaptive coefficient by using the error vector in the same RLS scheme as in the above equation. In this case, the filter coefficient is a filter coefficient for predicting and compensating for the distortion of the signal 1 according to the distortion result of the signal 1 input to the detector 23 and the calculation result of the signal 3 for which the distortion for outputting the detector 23 is compensated. .

Then, the second filter 27 receives the output of the subtractor 25 as an input and receives the output of the second coefficient generator 26 as a count signal. Therefore, the second filter 27 analyzes the signal 3 outputting the detector 23 and compensates in advance the error compensation value for the signal 1 whose channel distortion is predicted. The second filter 27 is a feed backward filter and an output signal is applied to the input of the adder 28. Since the error compensation value predicted as described above is applied to the adder 28, the adder 28 adds an output of the first filter 21 and an output of the second filter 27 to prevent interference between signals. It generates a digital equalization signal whose distortion is compensated for.

Therefore, in the digital equalizer as described above, the signal 1 input by the first filter 21 and the first coefficient generator 22 is first equalized to compensate for distortion and interference between signals, and then the compensation is performed. In a possible state, the second filter 27 and the second coefficient generator 26 may be used to compensate for the predicted signal value according to the first equalized value to perform a complete equalization operation.

As described above, a precise equalization operation can be performed by implementing a digital equalizer using a feed forward filter and a backward filter and by using the RLS method, thereby performing the equalization operation well even in a severe communication failure such as a radio channel. can do.

Claims (2)

1. A digital equalizer circuit, comprising: means for receiving a distorted signal, first equalizing the distorted signal by a filter coefficient received therefrom, receiving an equalized signal, and comparing the equalized signal with a predetermined reference value Detecting means for generating an error signal and simultaneously generating an equalized output signal, means for generating the filter coefficient which is capable of adaptively equalizing the error signal by giving a weight corresponding to the error signal, and the output Means for receiving a signal, and performing a second equalization operation by the filter coefficients to generate a signal for estimating a distortion of the primary equalization signal, and an input of the detection means, and receiving the first and second equalization signals. And means for applying the received equalized signal to the detection means. A digital equalizer circuit, comprising: means for receiving a signal, first means for equalizing the signal by a received first filter coefficient, means for receiving and adding the first and second equalization signals, and the addition; Detection means for receiving a signal, comparing the received signal with a predetermined reference signal to generate an output signal including an error value, and means for subtracting the output signal from the first equalized signal to generate a first error signal And means for generating the first filter coefficient for predicting distortion of a next received signal by adaptively weighting by receiving the first error signal, subtracting an input signal and an output signal of the detection means, and subtracting a second signal. Means for generating an error signal, and means for generating a second filter coefficient for predicting and removing the distortion present in the first equalized signal by receiving and weighting the second error signal. And means for receiving said first error signal and generating said second equalized signal by said second filter coefficient and feeding it back to said adding means.