CN116779417A - Method for forming semiconductor device - Google Patents

Method for forming semiconductor device Download PDF

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Publication number
CN116779417A
CN116779417A CN202310626839.5A CN202310626839A CN116779417A CN 116779417 A CN116779417 A CN 116779417A CN 202310626839 A CN202310626839 A CN 202310626839A CN 116779417 A CN116779417 A CN 116779417A
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China
Prior art keywords
layer
silicon
oxide layer
silicon oxide
deposition
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CN202310626839.5A
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Chinese (zh)
Inventor
相广欣
魏想
贡禕琪
曾招钦
鲍宇
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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Shanghai Huali Integrated Circuit Manufacturing Co Ltd
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Priority to CN202310626839.5A priority Critical patent/CN116779417A/en
Publication of CN116779417A publication Critical patent/CN116779417A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02592—Microstructure amorphous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Abstract

The invention provides a method for forming a semiconductor device, which comprises the steps of depositing a first silicon oxide layer on a semiconductor substrate at a first deposition rate, and depositing a second silicon oxide layer on the first silicon oxide layer at a second deposition rate, wherein the second deposition rate is lower than the first deposition rate, so that the second silicon oxide layer can be slowly deposited on the surface of the first silicon oxide layer at a low second deposition rate, interface defects are avoided, and a better contact surface can be provided for a first amorphous silicon layer. And depositing the first amorphous silicon layer on the second silicon dioxide layer in a low-frequency radio frequency mode, so that the bombardment intensity of process gas of the second deposition process can be reduced, the first amorphous silicon layer and the second silicon dioxide layer have a good contact surface, the adhesiveness between the silicon oxide layer and the amorphous silicon layer is improved, and the sheet defect is improved.

Description

Method for forming semiconductor device
Technical Field
The present invention relates to the field of semiconductor manufacturing technology, and in particular, to a method for forming a semiconductor device.
Background
In the fabrication of semiconductor devices, an amorphous silicon (a-Si) layer is typically required on a semiconductor substrate, which may serve as a hard mask. A silicon oxide layer is generally formed between the amorphous silicon layer and the semiconductor substrate, that is, the silicon oxide layer is formed on the surface of the semiconductor substrate, and the amorphous silicon layer is formed on the surface of the silicon oxide layer. However, the amorphous silicon layer has many incomplete dangling H bonds on the surface, which results in that when the amorphous silicon layer is on the surface of the silicon oxide layer, the contact interface between the amorphous silicon layer and the silicon oxide layer is poor, the adhesiveness is small, and further the problem of flaky defects in partial areas is caused.
Disclosure of Invention
The invention aims to provide a method for forming a semiconductor device, which is used for improving the adhesiveness between an amorphous silicon layer and a silicon oxide layer.
In order to achieve the above object, the present invention provides a method for forming a semiconductor device, comprising:
providing a semiconductor substrate;
depositing a first silicon oxide layer on the semiconductor substrate at a first deposition rate and depositing a second silicon oxide layer on the first silicon oxide layer at a second deposition rate, the second deposition rate being lower than the first deposition rate, using a first deposition process;
and depositing a first amorphous silicon layer on the second silicon dioxide layer in a low-frequency radio frequency mode by adopting a second deposition process, and depositing a second amorphous silicon layer on the first amorphous silicon layer in a high-frequency radio frequency mode.
Optionally, in the method for forming a semiconductor device, the first deposition process and the second deposition process are both plasma enhanced chemical vapor deposition processes.
Optionally, in the method for forming a semiconductor device, in the first deposition process, the first silicon oxide layer and the second silicon oxide layer are formed by a first silicon source and a reaction gas.
Optionally, in the method for forming a semiconductor device, when the first silicon oxide layer is formed, a gas flow rate of the first silicon source is 110sccm to 130sccm; and when the second silicon dioxide layer is formed, the gas flow of the first silicon source is 20 sccm-40 sccm, so that the second deposition rate is lower than the first deposition rate.
Optionally, in the method for forming a semiconductor device, the first silicon source includes silane or tetraethyl orthosilicate; the reactant gas includes nitrous oxide.
Optionally, in the method for forming a semiconductor device, in the second deposition process, the first amorphous silicon layer and the second amorphous silicon layer are formed by a reaction of a second silicon source and a second gas.
Optionally, in the method for forming a semiconductor device, the second silicon source includes silane, and the second gas includes at least one of ammonia, nitrous oxide, nitrogen, and oxygen.
Optionally, in the method for forming a semiconductor device, in the first deposition process, a process temperature is 395 ℃ to 405 ℃.
Optionally, in the method for forming a semiconductor device, in the second deposition process, a process temperature is 295 ℃ to 305 ℃ and a pressure is 5torr to 10torr.
Optionally, in the method for forming a semiconductor device, the power of the low-frequency radio frequency is 450W to 550W; the power of the high-frequency radio frequency is 1300W-1600W.
In the method for forming the semiconductor device, the first silicon oxide layer is deposited on the semiconductor substrate at the first deposition rate, and the second silicon oxide layer is deposited on the first silicon oxide layer at the second deposition rate, wherein the second deposition rate is lower than the first deposition rate, so that the second silicon oxide layer can be slowly deposited on the surface of the first silicon oxide layer at the low second deposition rate, interface defects are avoided, and a better contact surface can be provided for the first amorphous silicon layer. And depositing a first amorphous silicon layer on the second silicon dioxide layer in a low-frequency radio frequency mode, so that the bombardment intensity of process gas of the second deposition process can be reduced, a better contact surface is formed between the first amorphous silicon layer and the second silicon dioxide layer, the adhesiveness between the silicon oxide layer and the amorphous silicon layer is improved, and the sheet defect is improved. In addition, the second amorphous silicon layer is deposited on the first amorphous silicon layer in a high-frequency radio frequency mode, so that the second amorphous silicon layer can be rapidly deposited, and the film forming rate of the second amorphous silicon layer is improved.
Drawings
Fig. 1 is a schematic flow chart of a method for forming a semiconductor device according to an embodiment of the present invention;
fig. 2to 5 are schematic cross-sectional views of structures formed in a method for forming a semiconductor device according to an embodiment of the present invention;
wherein reference numerals are as follows:
100-a semiconductor substrate; 110-a first silicon oxide layer; 120-a second silicon dioxide layer; 130-a first amorphous silicon layer; 140-a second amorphous silicon layer.
Detailed Description
The method for forming the semiconductor device according to the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
As used in this disclosure, the singular forms "a," "an," and "the" include plural referents, the term "or" are generally used in the sense of comprising "and/or" and the term "several" are generally used in the sense of comprising "at least one," the term "at least two" are generally used in the sense of comprising "two or more," and the term "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying any relative importance or number of features indicated. Thus, a feature defining a "first", "second", or "third" may include one or at least two such features, either explicitly or implicitly, as appropriate, and the particular meaning of such terms in this disclosure will be understood by those of ordinary skill in the art.
Fig. 1 is a flowchart illustrating a method for forming a semiconductor device according to an embodiment of the present invention. As shown in fig. 1, the method for forming a semiconductor device provided in this embodiment includes:
step S1: providing a semiconductor substrate;
step S2: depositing a first silicon oxide layer on the semiconductor substrate at a first deposition rate and depositing a second silicon oxide layer on the first silicon oxide layer at a second deposition rate, the second deposition rate being lower than the first deposition rate, using a first deposition process; the method comprises the steps of,
step S3: and depositing a first amorphous silicon layer on the second silicon dioxide layer in a low-frequency radio frequency mode by adopting a second deposition process, and depositing a second amorphous silicon layer on the first amorphous silicon layer in a high-frequency radio frequency mode.
Fig. 2to 5 are schematic cross-sectional views of structures formed in a method for forming a semiconductor device according to an embodiment of the present invention. The method of forming the semiconductor device provided in this embodiment will be described in more detail below with reference to fig. 2to 5.
Referring to fig. 1, step S1 is performed to provide a semiconductor substrate 100, and the semiconductor substrate 100 may be a wafer, but not limited thereto, and the semiconductor substrate 100 may be a semiconductor made of other materials. For example, the semiconductor substrate 100 may be monocrystalline silicon or polycrystalline silicon, may be a semiconductor material such as silicon, germanium, silicon germanium, gallium arsenide, or a composite structure such as silicon on insulator. Those skilled in the art may select the type of the semiconductor substrate 100 according to the semiconductor device formed on the semiconductor substrate 100, and thus the type of the semiconductor substrate 100 should not limit the scope of the present invention.
Referring to fig. 1 in combination with fig. 2, step S2 is performed, using a first deposition process, to deposit a first silicon oxide layer 110 on the semiconductor substrate 100 at a first deposition rate, and to deposit a second silicon oxide layer 120 on the first silicon oxide layer 110 at a second deposition rate, the second deposition rate being lower than the first deposition rate. Wherein the first deposition process is a plasma enhanced chemical vapor deposition process (PECVD, plasma Enhanced Chemical Vapor Deposition).
Specifically, when the first deposition process is performed, the semiconductor substrate 100 is first placed in a process chamber of a plasma enhanced chemical vapor deposition process apparatus, and then a first silicon source and a reaction gas are introduced into the process chamber to form the first silicon oxide layer 110 and the second silicon oxide layer 120.
Further, the first deposition process includes a gas introduction stage and a deposition stage that are sequentially performed. During the gas introduction phase of the first deposition process, a first silicon source and a reactive gas may be introduced into the process chamber. The first silicon source may be a single silicon source gas, for example, the first silicon source may include silane (SiH 4 ) Or tetraethyl orthosilicate (TEOS). And the reaction gas may include nitrous oxide (N) 2 O). It should be understood that the first silicon source and the reactant gas may be not only single component gases but also mixtures of multiple reactant gases, for example, the first silicon source may include other reactant gases containing elemental silicon in addition to silane gas, and the reactant gas may include other gases containing elemental nitrogen in addition to nitrous oxide gas.
In the deposition stage, when the first silicon source is silane and the reaction gas is nitrous oxide gas, the flow rate of monosilane gas in the mixed gas in the process chamber can be smaller than that of the nitrous oxide gas, that is, sufficient nitrous oxide gas in the mixed gas is ensured, so that the silane can react completely as much as possible in the deposition stage. It should be understood that the flow rate of silane in the mixed gas is not limited to be less than the flow rate of nitrous oxide gas, but may be greater than or equal to the flow rate of nitrous oxide gas as the case may be.
In this embodiment, the deposition stage is divided into a first silicon oxide layer 110 deposition stage and a second silicon oxide layer 120 deposition stage which are sequentially performed. In the deposition stage of the first silicon oxide layer 110, controlling the gas flow of the first silicon source to be 110 sccm-130 sccm; for example, 110sccm, 120sccm, or 130sccm, to deposit the first silicon oxide layer 110 on the semiconductor substrate 100 at a first deposition rate, so that the first silicon oxide layer 110 can be rapidly deposited on the surface of the semiconductor substrate 100, and the first silicon oxide layer 110 with a certain thickness can be formed in a process time, thereby meeting the process requirements. In addition, during the deposition phase of the first silicon oxide layer 110, the pressure in the process chamber is 1.3torr to 1.6torr.
In this embodiment, the thickness of the first silicon oxide layer 110 may be, for example, two-thirds to three-quarters of the predetermined thickness of the silicon oxide layer. The silicon oxide layer includes a first silicon oxide layer 110 and a second silicon oxide layer 120, and the predetermined thickness of the silicon oxide layer is the sum of the thickness of the first silicon oxide layer 110 and the thickness of the second silicon oxide layer 120 formed subsequently, that is, the thickness of the first silicon oxide layer 110 and the thickness of the second silicon oxide layer 120 formed subsequently need to satisfy the predetermined thickness of the silicon oxide layer, and the predetermined thickness of the silicon oxide layer may be 500 angstrom to 1000 angstrom, for example, 500 angstrom, 600 angstrom, 700 angstrom or 1000 angstrom. That is, two-thirds to three-fourths of the predetermined thickness of the silicon oxide layer may be formed on the surface of the semiconductor substrate 100 at the first deposition rate, whereby the deposition rate of the silicon oxide layer may be increased to meet the process requirements.
Controlling the gas flow rate of the first silicon source to be 20 sccm-40 sccm in the deposition stage of the second silicon dioxide layer 120; for example, 20 seem, 30 seem, or 40 seem, to deposit the second silicon oxide layer 120 on the first silicon oxide layer 110 at the second deposition rate, so that the second silicon oxide layer 120 is slowly deposited on the surface of the first silicon oxide layer 110 at the low second deposition rate, and interface defects are avoided, thereby providing a better contact surface for the first amorphous silicon layer 130.
In addition, in the deposition stage of the second silicon oxide layer 120, the pressure in the process chamber is 1.1 torr-1.2 torr, so that the pressure in the process chamber of the deposition stage of the second silicon oxide layer 120 is close to the pressure in the process chamber of the deposition stage of the first silicon oxide layer 110, and the stability of the deposition process of the second silicon oxide layer 120 is ensured.
In this embodiment, in the first deposition process, the process temperature, i.e., the temperature in the process chamber, is 395 ℃ to 405 ℃, for example, 395 ℃, 400 ℃, or 405 ℃.
Referring to fig. 3 in combination with fig. 4, step S3 is performed, in which a second deposition process is used to deposit a first amorphous silicon layer 130 on the second silicon oxide layer 120 by means of a low frequency radio frequency, and a second amorphous silicon layer 140 is deposited on the first amorphous silicon layer 130 by means of a high frequency radio frequency. Wherein the first deposition process is a plasma enhanced chemical vapor deposition process (PECVD, plasma Enhanced Chemical Vapor Deposition).
Specifically, when the second deposition process is performed, the semiconductor substrate 100 is first placed in a process chamber of the plasma enhanced chemical vapor deposition process, and then a second silicon source is introduced into the process chamber, and the first amorphous silicon layer 130 and the second amorphous silicon layer 140 are formed by decomposing the second silicon source.
Further, the second deposition process includes a gas introduction stage and a deposition stage that are sequentially performed. During the gas introduction phase of the second deposition process, a second silicon source may be introduced into the process chamber. The second silicon source may be a single silicon source gas, for example, the second silicon source may include silane (SiH 4 ). It should be understood that the second silicon source may be not only a single component gas but also a mixture of multiple reactive gases, for example, the second silicon source may include reactive gases other than silane gases, including other silicon-containing elements. In the reaction gas introducing stage, the rf generator may be in an off state, but not limited thereto, and the rf generator may be in an on state, but the rf power of the rf generator should be small enough to decompose the second silicon source.
In this embodiment, the deposition phase of the second deposition process includes sequentially performing the first amorphous silicon layer 130 deposition phase and the second amorphous silicon layer 140 deposition phase.
As shown in fig. 4, in the deposition stage of the first amorphous silicon layer 130, the first amorphous silicon layer 130 is deposited on the second silicon dioxide layer 120 by means of a low frequency radio frequency, i.e. in this stage, the radio frequency generator is turned on, or the radio frequency generator is adjusted to a low frequency radio frequency power, which may be 450W to 550W, for example, 40W, 45W or 50W. The deposition time may be 2S to 3S. At this time, the second silicon source in the process chamber may react under the low frequency rf power and be decomposed into plasma gas, and bombarded on the surface of the second silicon oxide layer 120 by the plasma gas, thereby depositing the first amorphous silicon layer 130 on the second silicon oxide layer 120. Since the first amorphous silicon layer 130 is formed by using a low-frequency radio frequency mode, the low-frequency radio frequency power is low, so that the bombardment intensity of the process gas of the second deposition process, i.e. the plasma formed by the second silicon source, can be reduced, the reaction time of the plasma in contact with the semiconductor substrate 100 is increased, thereby enabling a better contact surface between the first amorphous silicon layer 130 and the second silicon oxide layer 120, improving the adhesiveness between the silicon oxide layer and the amorphous silicon layer, and further improving the sheet defect.
Further, as shown in fig. 5, after the first amorphous silicon layer 130 is deposited, the second amorphous silicon layer 140 is deposited, and in the deposition stage of the second amorphous silicon layer 140, the second amorphous silicon layer 140 is deposited on the first amorphous silicon layer 130 by means of high-frequency radio frequency. That is, in the deposition stage of the second amorphous silicon layer 140, the rf power is increased, so that the bombardment intensity of the plasma is increased by increasing the rf power, thereby rapidly forming the second amorphous silicon layer 140, increasing the process rate, and meeting the process requirements.
In this embodiment, the power of the high frequency rf is 1300W to 1600W, for example, 1300W, 1350W, 1400W, 1500W or 1600W, so that the power is higher than the rf power during the deposition of the first amorphous silicon layer 130.
In this embodiment, the sum of the thickness of the second amorphous silicon layer 140 and the thickness of the first amorphous silicon layer 130 may be 400 to 500 angstroms, for example 400 angstroms, 450 angstroms or 500 angstroms. The ratio of the thickness of the second amorphous silicon layer 140 to the thickness of the first amorphous silicon layer 130 may be 4:1, so that the thicker second amorphous silicon layer 140 is rapidly formed by a high-frequency radio frequency method, thereby improving the film forming rate and saving the process time.
In addition, in the second deposition process, the process temperature may be 295 to 305 ℃, for example 295 ℃, 300 ℃, or 305 ℃, and the pressure may be 5to 10torr.
In summary, in the method for forming a semiconductor device provided by the embodiment of the invention, by depositing the first silicon oxide layer on the semiconductor substrate at the first deposition rate and depositing the second silicon oxide layer on the first silicon oxide layer at the second deposition rate, the second deposition rate is lower than the first deposition rate, so that the second silicon oxide layer is slowly deposited on the surface of the first silicon oxide layer at the low second deposition rate, interface defects are avoided, and a better contact surface can be provided for the first amorphous silicon layer. And depositing a first amorphous silicon layer on the second silicon dioxide layer in a low-frequency radio frequency mode, so that the bombardment intensity of process gas of the second deposition process can be reduced, a better contact surface is formed between the first amorphous silicon layer and the second silicon dioxide layer, the adhesiveness between the silicon oxide layer and the amorphous silicon layer is improved, and the sheet defect is improved. In addition, the second amorphous silicon layer is deposited on the first amorphous silicon layer in a high-frequency radio frequency mode, so that the second amorphous silicon layer can be rapidly deposited, and the film forming rate of the second amorphous silicon layer is improved.
The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.

Claims (10)

1. A method of forming a semiconductor device, comprising:
providing a semiconductor substrate;
depositing a first silicon oxide layer on the semiconductor substrate at a first deposition rate and depositing a second silicon oxide layer on the first silicon oxide layer at a second deposition rate, the second deposition rate being lower than the first deposition rate, using a first deposition process; the method comprises the steps of,
and depositing a first amorphous silicon layer on the second silicon dioxide layer in a low-frequency radio frequency mode by adopting a second deposition process, and depositing a second amorphous silicon layer on the first amorphous silicon layer in a high-frequency radio frequency mode.
2. The method of forming a semiconductor device of claim 1, wherein the first deposition process and the second deposition process are both plasma enhanced chemical vapor deposition processes.
3. The method of forming a semiconductor device according to claim 1 or 2, wherein in the first deposition process, the first silicon oxide layer and the second silicon oxide layer are formed by a first silicon source and a reaction gas.
4. The method for forming a semiconductor device according to claim 3, wherein a gas flow rate of the first silicon source is 110sccm to 130sccm when the first silicon oxide layer is formed; and when the second silicon dioxide layer is formed, the gas flow of the first silicon source is 20 sccm-40 sccm, so that the second deposition rate is lower than the first deposition rate.
5. The method of forming a semiconductor device of claim 3, wherein the first silicon source comprises silane or ethyl orthosilicate; the reactant gas includes nitrous oxide.
6. The method of forming a semiconductor device according to claim 1, wherein in the second deposition process, the first amorphous silicon layer and the second amorphous silicon layer are formed by a second silicon source.
7. The method of forming a semiconductor device of claim 6, wherein the second silicon source comprises silane.
8. The method of forming a semiconductor device according to claim 1, wherein in the first deposition process, a process temperature is 395 ℃ to 405 ℃.
9. The method of forming a semiconductor device according to claim 1, wherein in the second deposition process, a process temperature is 295 ℃ to 305 ℃ and a pressure is 5torr to 10torr.
10. The method for forming a semiconductor device according to claim 1, wherein the power of the low-frequency radio frequency is 450W to 550W; the power of the high-frequency radio frequency is 1300W-1600W.
CN202310626839.5A 2023-05-30 2023-05-30 Method for forming semiconductor device Pending CN116779417A (en)

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