CN116775410A - CPU utilization rate evaluation and display method, system, terminal, medium and server management system - Google Patents
CPU utilization rate evaluation and display method, system, terminal, medium and server management system Download PDFInfo
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Abstract
The invention provides a CPU utilization rate evaluation and display method, a system, a terminal, a medium and a server management system, wherein a baseboard management controller calculates the current CPU utilization rate of a target CPU device through acquired idle power consumption information, heat power consumption information and current power consumption information of the target CPU device, and records and displays the current CPU utilization rate; according to the invention, the BMC can record and display the CPU utilization rate information, and an operation and maintenance person can directly acquire the workload condition of the server, so that server resources in a machine room can be scheduled and allocated in a targeted manner; and the substrate management controller can directly calculate the CPU utilization rate through the CPU power consumption instead of acquiring the CPU utilization rate through an operating system, so that the occupation of OS resources is avoided, and the CPU utilization rate display can be realized without depending on the CPU resources.
Description
Technical Field
The present invention relates to the field of data processing, and in particular, to a method, a system, a terminal, a medium, and a server management system for evaluating and displaying CPU usage.
Background
With the increasing popularity of applications such as internet, intelligent manufacturing, traffic guidance, etc., the number of data center construction is increasing. Data centers are often equipped with a certain number of servers, and the operating conditions and utilization of the servers often affect the power conversion efficiency of the data center. The CPU utilization rate reflects the working load condition of the server to a certain extent, and by observing and analyzing the CPU utilization rate, the unified management and the load capacity early warning of the data center server by operation and maintenance personnel are facilitated, and the power waste or the calculation risk caused by resource shortage due to excessive idle load are avoided.
A baseboard management controller (BMC, baseboard Management Controller) provides server management and logging services through which an operator can obtain CPU usage. CPU resources are allocated by an Operating System (OS) schedule, and CPU usage is typically obtained by the OS. However, the BMC cannot directly obtain the CPU usage, but can only obtain the CPU usage to the OS through an intelligent platform management interface (IPMI, intelligent Platform Management Interface) command. This solution requires the cooperation of OS level and BMC level software and also occupies CPU resources.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a CPU utilization evaluation and display method, system, terminal, medium and server management system for solving the above-mentioned problems of the prior art.
To achieve the above and other related objects, the present invention provides a CPU utilization evaluation and display method applied to a baseboard management controller, the method comprising: acquiring idle power consumption information and heat power consumption information corresponding to a target CPU device based on the acquired attribute information of the target CPU device; based on the idle power consumption information and the heat power consumption information of the target CPU device, calculating the corresponding CPU utilization rate according to the current power consumption information of the target CPU device acquired in real time, and recording and displaying the calculated CPU utilization rate.
In an embodiment of the present invention, the obtaining the idle power consumption information and the heat power consumption information corresponding to the target CPU device based on the obtained attribute information of the target CPU device includes: acquiring model information corresponding to the target CPU device from the target CPU device; and acquiring idle power consumption information corresponding to the target CPU device in an idle state and heat power consumption information corresponding to the target CPU device in a full-load state based on the model information.
In an embodiment of the present invention, the calculating, based on the idle power consumption information and the heat power consumption information of the target CPU device, the corresponding CPU utilization according to the current power consumption information of the target CPU device obtained in real time includes: acquiring current power consumption information of the target CPU device from a core power supply chip of the target CPU device; and calculating the corresponding CPU utilization rate according to the idle power consumption information, the heat power consumption information and the current power consumption information of the target CPU device.
In an embodiment of the present invention, the calculating the corresponding CPU utilization according to the idle power consumption information, the heat power consumption information, and the current power consumption information of the target CPU device includes: based on a CPU utilization rate calculation formula related to a near linear relation between CPU power consumption and CPU utilization rate, corresponding CPU utilization rates are calculated according to idle power consumption information, heat power consumption information and current power consumption information of the target CPU device.
In an embodiment of the present invention, the calculation formula of the CPU utilization includes:
and wherein the CPU USEAGE P for CPU utilization CPU P is the current power consumption information CPU_IDLE For idle power consumption information and P CPU_TDP Is the heat power consumption information.
In an embodiment of the present invention, the CPU utilization is displayed in a percentage display manner on a WEB console interface of the baseboard management controller.
To achieve the above and other related objects, the present invention provides a CPU utilization evaluation and display system applied to a baseboard management controller, the system comprising: the data acquisition module is used for acquiring idle power consumption information and heat power consumption information corresponding to the target CPU device based on the acquired attribute information of the target CPU device; and the utilization rate evaluation and display module is connected with the data acquisition module and is used for calculating the corresponding CPU utilization rate according to the current power consumption information of the target CPU device acquired in real time based on the idle power consumption information and the heat power consumption information of the target CPU device, and recording and displaying the calculated CPU utilization rate.
To achieve the above and other related objects, the present invention provides a CPU utilization evaluation and display terminal, comprising: one or more memories and one or more processors; the one or more memories are used for storing computer programs; the one or more processors are connected with the memory and are used for running the computer program to execute the CPU utilization rate evaluation and display method.
To achieve the above and other related objects, the present invention provides a computer-readable storage medium storing a computer program which, when executed by one or more processors, performs the CPU utilization evaluation and display method.
To achieve the above and other related objects, the present invention provides a server management system equipped with a plurality of servers, the system comprising: a baseboard management controller and a target CPU device; the substrate management controller is used for acquiring idle power consumption information and heat power consumption information corresponding to the target CPU device based on attribute information of the target CPU device acquired from the target CPU device; based on the idle power consumption information and the heat power consumption information of the target CPU device, calculating the corresponding CPU utilization rate according to the current power consumption information of the target CPU device acquired in real time, and recording and displaying the calculated CPU utilization rate.
As described above, the invention is a CPU usage rate evaluation and display method, system, terminal, medium and server management system, which has the following beneficial effects: calculating the current CPU utilization rate of the target CPU device by the substrate management controller through the acquired idle power consumption information, heat power consumption information and current power consumption information acquired in real time, and recording and displaying the current CPU utilization rate; according to the invention, the BMC can record and display the CPU utilization rate information, and an operation and maintenance person can directly acquire the workload condition of the server, so that server resources in a machine room can be scheduled and allocated in a targeted manner; and the substrate management controller calculates the CPU utilization rate through CPU power consumption instead of acquiring through an operating system, so that the occupation of OS resources is avoided, and the CPU utilization rate display can be realized without depending on the CPU resources.
Drawings
FIG. 1 is a flow chart of a CPU utilization evaluation and display method according to an embodiment of the invention.
FIG. 2 is a diagram showing steps of a CPU utilization evaluation and display method according to an embodiment of the present invention.
FIG. 3 is a graph showing a trend of CPU utilization and CPU power consumption of a 245W CPU according to an embodiment of the present invention.
FIG. 4 is a schematic diagram showing a CPU utilization evaluation and display system according to an embodiment of the invention.
Fig. 5 is a schematic diagram showing a CPU utilization evaluation and display terminal according to an embodiment of the present invention.
Fig. 6 is a schematic structural diagram of a server management system according to an embodiment of the invention.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
In the following description, reference is made to the accompanying drawings, which illustrate several embodiments of the invention. It is to be understood that other embodiments may be utilized and that mechanical, structural, electrical, and operational changes may be made without departing from the spirit and scope of the present invention. The following detailed description is not to be taken in a limiting sense, and the scope of embodiments of the present invention is defined only by the claims of the issued patent. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Spatially relative terms, such as "upper," "lower," "left," "right," "lower," "below," "lower," "above," "upper," and the like, may be used herein to facilitate a description of one element or feature as illustrated in the figures relative to another element or feature.
Throughout the specification, when a portion is said to be "connected" to another portion, this includes not only the case of "direct connection" but also the case of "indirect connection" with other elements interposed therebetween. In addition, when a certain component is said to be "included" in a certain section, unless otherwise stated, other components are not excluded, but it is meant that other components may be included.
The first, second, and third terms are used herein to describe various portions, components, regions, layers and/or sections, but are not limited thereto. These terms are only used to distinguish one portion, component, region, layer or section from another portion, component, region, layer or section. Thus, a first portion, component, region, layer or section discussed below could be termed a second portion, component, region, layer or section without departing from the scope of the present invention.
Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and/or "including" specify the presence of stated features, operations, elements, components, items, categories, and/or groups, but do not preclude the presence, presence or addition of one or more other features, operations, elements, components, items, categories, and/or groups. The terms "or" and/or "as used herein are to be construed as inclusive, or meaning any one or any combination. Thus, "A, B or C" or "A, B and/or C" means "any of the following: a, A is as follows; b, a step of preparing a composite material; c, performing operation; a and B; a and C; b and C; A. b and C). An exception to this definition will occur only when a combination of elements, functions or operations are in some way inherently mutually exclusive.
According to the CPU utilization rate evaluation and display method, the substrate management controller calculates the current CPU utilization rate of the target CPU device through the acquired idle power consumption information, the thermal power consumption information and the current power consumption information acquired in real time, and records and displays the current CPU utilization rate; according to the invention, the BMC can record and display the CPU utilization rate information, and an operation and maintenance person can directly acquire the workload condition of the server, so that server resources in a machine room can be scheduled and allocated in a targeted manner; and the substrate management controller estimates the CPU utilization rate through the CPU power consumption instead of the OS, so that the occupation of OS resources is avoided, and the CPU utilization rate display can be realized without depending on the CPU resources.
Meanwhile, in order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions in the embodiments of the present invention will be further described in detail by the following examples with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Before explaining the present invention in further detail, terms and terminology involved in the embodiments of the present invention will be explained, and the terms and terminology involved in the embodiments of the present invention are applicable to the following explanation:
<1> cpu (central processing unit ); the target CPU device of the present invention is applied to a data center equipped with a certain number of servers. The CPU utilization rate of the target CPU device reflects the working load condition of the server to a certain extent, and the unified management and the load capacity early warning of the data center server by operation and maintenance personnel are facilitated by observing and analyzing the CPU utilization rate.
<2> bmc (baseboard management controller ); the BMC is software which is operated when the server AC is powered on and started, and is operated on an independent ARM chip on the server, wherein the ARM chip is the CPU of the BMC software, and meanwhile, the periphery of the chip is configured with devices such as a RAM, a Flash and the like. BMC is the whole server's caretaker, mainly used server each parts (CPU, memory, hard disk, fan, frame etc.) temperature, health status such as voltage detects, simultaneously according to each temperature acquisition point condition real-time adjustment fan rotational speed guarantees that the server does not produce the overtemperature, and control overall consumption can not too high again, if any unusual appears in veneer part then in time report to upper network management through SNMP protocol, SMTP protocol, the general normative information of multiple industry such as Redfish protocol to the fortune dimension personnel is handled in time, guarantees that the business is harmless.
<3> bmc WEB: a console network interface of the baseboard management controller.
The embodiments of the present invention will be described in detail below with reference to the attached drawings so that those skilled in the art to which the present invention pertains can easily implement the present invention. This invention may be embodied in many different forms and is not limited to the embodiments described herein.
Fig. 1 shows a flowchart of a CPU utilization evaluation and display method in an embodiment of the invention.
When the CPU utilization rate influences the frequency of the CPU operation and the CPU power consumption, the CPU power consumption and the CPU utilization rate have an approximately linear relation. In the management system of the server, the baseboard management controller can directly acquire CPU power consumption, and the scheme is to estimate the CPU utilization rate by utilizing the CPU power consumption.
The method comprises the following steps:
step S1: and acquiring idle power consumption information and heat power consumption information corresponding to the target CPU device based on the acquired attribute information of the target CPU device.
In one embodiment, step S1 includes:
acquiring model information corresponding to the target CPU device from the target CPU device;
and acquiring idle power consumption information corresponding to the target CPU device in an idle state and heat power consumption information corresponding to the target CPU device in a full-load state based on the model information. Specifically, in the idle state, i.e., the CPU utilization is 0, the target CPU device has a basic power consumption, i.e., idle power consumption information; the base power consumption increases with the increase of the CPU utilization rate until the maximum power consumption is TDP power consumption, which is also the maximum power consumption of the CPU under the normal working condition, namely the heat power consumption information. The idle power consumption information and the heat power consumption information can be obtained by the baseboard management controller through the model information of the target CPU device.
Step S2: based on the idle power consumption information and the heat power consumption information of the target CPU device, calculating the corresponding CPU utilization rate according to the current power consumption information of the target CPU device acquired in real time, and recording and displaying the calculated CPU utilization rate.
In an embodiment, the calculating, based on the idle power consumption information and the heat power consumption information of the target CPU device, the corresponding CPU usage according to the current power consumption information of the target CPU device obtained in real time includes:
acquiring current power consumption information of the target CPU device from a core power supply chip (main board VR) of the target CPU device; the baseboard management controller obtains the current power consumption or the instant power consumption of the target CPU device through the main board VR, and the current power consumption or the instant power consumption is related to the CPU usage.
And calculating the corresponding CPU utilization rate according to the idle power consumption information, the heat power consumption information and the current power consumption information of the target CPU device.
In an embodiment, the calculating the corresponding CPU utilization according to the idle power consumption information, the heat power consumption information, and the current power consumption information of the target CPU device includes:
based on a CPU utilization rate calculation formula related to a near linear relation between CPU power consumption and CPU utilization rate, corresponding CPU utilization rates are calculated according to idle power consumption information, heat power consumption information and current power consumption information of the target CPU device.
The CPU utilization rate determines the CPU power consumption, and the CPU utilization rate and the CPU power consumption are approximately in a linear relation.
The CPU power consumption and CPU utilization have the following relationship:
P CPU =(P CPU_TDP -P CPU_IDLE )*CPU USEAGE +P CPU_IDLE ; (1)
wherein the CPU USEAGE P for CPU utilization CPU P is the current power consumption information CPU_IDLE For idle power consumption information and P CPU_TDP Is the heat power consumption information.
In a specific embodiment, as known from the linear relationship between the upper CPU power consumption and the CPU utilization, the calculation formula for obtaining the CPU utilization through deduction includes:
and wherein the CPU USEAGE P for CPU utilization CPU P is the current power consumption information CPU_IDLE For idle power consumption information and P CPU_TDP Is the heat power consumption information.
In an embodiment, the CPU utilization is displayed in a percentage display manner on a WEB console interface of the baseboard management controller.
In order to better illustrate the above-mentioned CPU utilization evaluation and display method, the present invention provides the following embodiments.
Example 1: a CPU usage rate evaluation and display method.
The method is applied to BMC and used for evaluating the CPU utilization rate of 245W CPU; as shown in fig. 2, the CPU utilization evaluation and display method is implemented as follows:
step 1: the system is powered on and the BMC is initialized.
Step 2: and receiving a starting signal, initializing and starting the CPU to work.
Step 3: the BMC acquires the model of the CPU from the CPU, and further acquires P under the condition that the CPU is fully loaded CPU_TDP Information and P in idle state of CPU CPU_IDLE Information.
Step 4: the BMC acquires the power consumption information of the CPU through the CPU VR.
Step 5: and calculating the CPU utilization rate according to the power consumption information.
Step 6: and recording the CPU utilization rate and displaying the CPU utilization rate information on the BMC WEB.
Step 7: if the shutdown signal is not received, the BMC circularly calculates the CPU utilization.
Step 8: and receiving a shutdown signal and ending.
As shown in fig. 3, a trend table diagram of CPU utilization and CPU power consumption of the 245W CPU is shown. In the CPU idle state, the power consumption is about 45 watts. With the increase of the utilization rate, the power consumption gradually rises until the power consumption reaches the maximum power consumption of the CPU. As can be seen from fig. 3, the power consumption of the CPU and the CPU usage are substantially linear, and the present embodiment uses this rule to estimate the CPU usage.
Similar to the principles of the embodiments described above, the present invention provides a CPU usage assessment and display system.
Specific embodiments are provided below with reference to the accompanying drawings:
fig. 4 shows a schematic structural diagram of a CPU utilization evaluation and display system in an embodiment of the present invention.
Applied to a baseboard management controller, the system comprises:
a data acquisition module 11, configured to acquire idle power consumption information and heat power consumption information corresponding to a target CPU device based on acquired attribute information of the target CPU device;
the usage rate evaluation and display module 12 is connected to the data acquisition module 11, and is configured to calculate a corresponding CPU usage rate according to the current power consumption information of the target CPU device acquired in real time based on the idle power consumption information and the thermal power consumption information of the target CPU device, and record and display the calculated CPU usage rate.
It should be noted that, it should be understood that the division of the modules in the embodiment of the system of fig. 4 is merely a division of logic functions, and may be fully or partially integrated into a physical entity or may be physically separated. And these modules may all be implemented in software in the form of calls by the processing element; or can be realized in hardware; the method can also be realized in a mode that a part of modules are called by processing elements and software, and the part of modules are realized in a hardware mode;
for example, each module may be one or more integrated circuits configured to implement the above methods, e.g.: one or more application specific integrated circuits (Application Specific Integrated Circuit, abbreviated as ASIC), or one or more microprocessors (digital signal processor, abbreviated as DSP), or one or more field programmable gate arrays (Field Programmable Gate Array, abbreviated as FPGA), or the like. For another example, when a module above is implemented in the form of a processing element scheduler code, the processing element may be a general-purpose processor, such as a central processing unit (Central Processing Unit, CPU) or other processor that may invoke the program code. For another example, the modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).
Since the implementation principle of the CPU utilization evaluation and display system has been described in the foregoing embodiments, a detailed description thereof is omitted herein.
In one embodiment, the data obtaining module 11 is configured to obtain, from the target CPU device, model information corresponding to the target CPU device; and acquiring idle power consumption information corresponding to the target CPU device in an idle state and heat power consumption information corresponding to the target CPU device in a full-load state based on the model information.
In one embodiment, the usage evaluation and display module 12 is configured to obtain current power consumption information of the target CPU device from a core power supply chip of the target CPU device; and calculating the corresponding CPU utilization rate according to the idle power consumption information, the heat power consumption information and the current power consumption information of the target CPU device.
In an embodiment, the calculating the corresponding CPU utilization according to the idle power consumption information, the heat power consumption information, and the current power consumption information of the target CPU device includes: based on a CPU utilization rate calculation formula related to a near linear relation between CPU power consumption and CPU utilization rate, corresponding CPU utilization rates are calculated according to idle power consumption information, heat power consumption information and current power consumption information of the target CPU device.
In one embodiment, the calculation formula of the CPU utilization includes:
and wherein the CPU USEAGE P for CPU utilization CPU P is the current power consumption information CPU_IDLE For idle power consumption information and P CPU_TDP Is the heat power consumption information.
In an embodiment, the CPU utilization is displayed in a percentage display manner on a WEB console interface of the baseboard management controller.
Fig. 5 shows a schematic diagram of the CPU utilization evaluation and display terminal 50 in an embodiment of the present invention.
The CPU usage evaluation and display terminal 50 includes: a memory 51 and a processor 52. The memory 51 is used for storing a computer program; the processor 52 runs a computer program to implement the CPU utilization evaluation and display method as described in fig. 2.
Alternatively, the number of the memories 51 may be one or more, and the number of the processors 52 may be one or more, and one is taken as an example in fig. 5.
Optionally, the processor 52 in the CPU utilization evaluation and display terminal 50 loads one or more instructions corresponding to the process of the application program into the memory 51 according to the steps described in fig. 1, and the processor 52 executes the application program stored in the first memory 51, so as to implement various functions in the CPU utilization evaluation and display method as described in fig. 1.
Optionally, the memory 51 may include, but is not limited to, high speed random access memory, nonvolatile memory. Such as one or more disk storage devices, flash memory devices, or other non-volatile solid-state storage devices; the processor 52 may include, but is not limited to, a central processing unit (Central Processing Unit, CPU for short), a network processor (Network Processor, NP for short), etc.; but also digital signal processors (Digital Signal Processing, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field-programmable gate arrays (Field-Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
Alternatively, the processor 52 may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU for short), a network processor (Network Processor, NP for short), etc.; but also digital signal processors (Digital Signal Processing, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field-programmable gate arrays (Field-Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
The present invention also provides a computer readable storage medium storing a computer program which when run implements a CPU utilization evaluation and display method as shown in fig. 1. The computer-readable storage medium may include, but is not limited to, floppy diskettes, optical disks, CD-ROMs (compact disk-read only memories), magneto-optical disks, ROMs (read-only memories), RAMs (random access memories), EPROMs (erasable programmable read only memories), EEPROMs (electrically erasable programmable read only memories), magnetic or optical cards, flash memory, or other type of media/machine-readable medium suitable for storing machine-executable instructions. The computer readable storage medium may be an article of manufacture that is not accessed by a computer device or may be a component used by an accessed computer device.
Fig. 6 shows a schematic structural diagram of a server management system according to an embodiment of the present invention.
The server management system is provided with a plurality of servers, and uniformly manages and pre-warns the load capacity of each server.
The system comprises: a baseboard management controller 1 and a target CPU device 2;
wherein the baseboard management controller 1 is configured to obtain idle power consumption information and heat power consumption information corresponding to the target CPU device 2 based on attribute information of the target CPU device 2 obtained from the target CPU device 2; based on the idle power consumption information and the heat power consumption information of the target CPU device 2, calculating a corresponding CPU utilization rate according to the current power consumption information of the target CPU device 2 acquired in real time, and recording and displaying the calculated CPU utilization rate.
Since the baseboard management controller 1 can implement the CPU utilization evaluation and display method shown in fig. 1, that is, the implementation principle has been described in the foregoing embodiments, the description thereof is not repeated here.
The server management system is convenient for operation and maintenance personnel to uniformly manage the central server and pre-warn the load capacity by observing and analyzing the target CPU device 2 through the substrate management controller 1, and avoids power waste caused by excessive idle load of resources or calculation risk caused by shortage of resources.
In summary, according to the CPU utilization evaluation and display method, system, terminal, medium and server management system of the present invention, the baseboard management controller calculates the current CPU utilization of the target CPU device by the obtained idle power consumption information, heat power consumption information and current power consumption information obtained in real time, and records and displays the current CPU utilization; according to the invention, the BMC can record and display the CPU utilization rate information, and an operation and maintenance person can directly acquire the workload condition of the server, so that server resources in a machine room can be scheduled and allocated in a targeted manner; and the substrate management controller calculates the CPU utilization rate through CPU power consumption instead of acquiring through an operating system, so that the occupation of OS resources is avoided, and the CPU utilization rate display can be realized without depending on the CPU resources. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. It is therefore intended that all equivalent modifications and changes made by those skilled in the art without departing from the spirit and technical spirit of the present invention shall be covered by the appended claims.
Claims (10)
1. A method for evaluating and displaying CPU usage applied to a baseboard management controller, the method comprising:
acquiring idle power consumption information and heat power consumption information corresponding to a target CPU device based on the acquired attribute information of the target CPU device;
based on the idle power consumption information and the heat power consumption information of the target CPU device, calculating the corresponding CPU utilization rate according to the current power consumption information of the target CPU device acquired in real time, and recording and displaying the calculated CPU utilization rate.
2. The CPU utilization evaluation and display method according to claim 1, wherein the acquiring idle power consumption information and heat power consumption information corresponding to the target CPU device based on the acquired attribute information of the target CPU device includes:
acquiring model information corresponding to the target CPU device from the target CPU device;
and acquiring idle power consumption information corresponding to the target CPU device in an idle state and heat power consumption information corresponding to the target CPU device in a full-load state based on the model information.
3. The CPU utilization evaluation and display method according to claim 2, wherein the calculating the corresponding CPU utilization from the current power consumption information of the target CPU device acquired in real time based on the idle power consumption information and the heat power consumption information of the target CPU device includes:
acquiring current power consumption information of the target CPU device from a core power supply chip of the target CPU device;
and calculating the corresponding CPU utilization rate according to the idle power consumption information, the heat power consumption information and the current power consumption information of the target CPU device.
4. The CPU utilization evaluation and display method as claimed in claim 3, wherein the calculating the corresponding CPU utilization from the idle power consumption information, the thermal power consumption information, and the current power consumption information of the target CPU device includes:
based on a CPU utilization rate calculation formula related to a near linear relation between CPU power consumption and CPU utilization rate, corresponding CPU utilization rates are calculated according to idle power consumption information, heat power consumption information and current power consumption information of the target CPU device.
5. The CPU utilization evaluation and display method as claimed in claim 4, wherein the calculation formula of the CPU utilization includes:
and wherein the CPU USEAGE P for CPU utilization CPU P is the current power consumption information CPU_IDLE For idle power consumption information and P CPU_TDP Is the heat power consumption information.
6. The method for evaluating and displaying CPU utilization as in claim 1, wherein the CPU utilization is displayed as a percentage display on a WEB console interface of the baseboard management controller.
7. A CPU utilization evaluation and display system, for use in a baseboard management controller, comprising:
the data acquisition module is used for acquiring idle power consumption information and heat power consumption information corresponding to the target CPU device based on the acquired attribute information of the target CPU device;
and the utilization rate evaluation and display module is connected with the data acquisition module and is used for calculating the corresponding CPU utilization rate according to the current power consumption information of the target CPU device acquired in real time based on the idle power consumption information and the heat power consumption information of the target CPU device, and recording and displaying the calculated CPU utilization rate.
8. A CPU utilization evaluation and display terminal, comprising: one or more memories and one or more processors;
the one or more memories are used for storing computer programs;
the one or more processors being coupled to the memory for running the computer program to perform the method of any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that a computer program is stored, which, when being executed by one or more processors, performs the method of any of claims 1 to 6.
10. A server management system, characterized by being equipped with a plurality of servers, the system comprising:
a baseboard management controller and a target CPU device;
the substrate management controller is used for acquiring idle power consumption information and heat power consumption information corresponding to the target CPU device based on attribute information of the target CPU device acquired from the target CPU device; based on the idle power consumption information and the heat power consumption information of the target CPU device, calculating the corresponding CPU utilization rate according to the current power consumption information of the target CPU device acquired in real time, and recording and displaying the calculated CPU utilization rate.
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011016081A1 (en) * | 2009-08-04 | 2011-02-10 | Hitachi, Ltd. | Storage system, control method thereof, and program to adjust power consumption per workload |
CN103856337A (en) * | 2012-11-28 | 2014-06-11 | 华为技术有限公司 | Resource occupation rate acquiring method, providing method, system and server thereof |
US20200285511A1 (en) * | 2019-03-09 | 2020-09-10 | International Business Machines Corporation | Tool for Identifying Sources of Operating System Jitter from Power Consumption Measurements |
CN113961413A (en) * | 2020-07-21 | 2022-01-21 | 中国移动通信有限公司研究院 | Server power consumption testing method and device |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011016081A1 (en) * | 2009-08-04 | 2011-02-10 | Hitachi, Ltd. | Storage system, control method thereof, and program to adjust power consumption per workload |
CN103856337A (en) * | 2012-11-28 | 2014-06-11 | 华为技术有限公司 | Resource occupation rate acquiring method, providing method, system and server thereof |
US20200285511A1 (en) * | 2019-03-09 | 2020-09-10 | International Business Machines Corporation | Tool for Identifying Sources of Operating System Jitter from Power Consumption Measurements |
CN113961413A (en) * | 2020-07-21 | 2022-01-21 | 中国移动通信有限公司研究院 | Server power consumption testing method and device |
Non-Patent Citations (1)
Title |
---|
济人萌生: "归一化、标准化、零均值化作用及区别", pages 1 - 3, Retrieved from the Internet <URL:https://zhuanlan.zhihu.com/p/183591302> * |
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