CN116760042B - Bus voltage balance control system and method - Google Patents
Bus voltage balance control system and method Download PDFInfo
- Publication number
- CN116760042B CN116760042B CN202311023459.9A CN202311023459A CN116760042B CN 116760042 B CN116760042 B CN 116760042B CN 202311023459 A CN202311023459 A CN 202311023459A CN 116760042 B CN116760042 B CN 116760042B
- Authority
- CN
- China
- Prior art keywords
- bus
- compensation circuit
- voltage
- triangular wave
- balance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 38
- 230000000295 complement effect Effects 0.000 claims abstract description 6
- 230000007935 neutral effect Effects 0.000 claims abstract description 6
- 239000003990 capacitor Substances 0.000 claims description 42
- 230000007423 decrease Effects 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 10
- 238000004146 energy storage Methods 0.000 description 8
- 230000002457 bidirectional effect Effects 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/12—Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/28—Arrangements for balancing of the load in a network by storage of energy
- H02J3/32—Arrangements for balancing of the load in a network by storage of energy using batteries with converting means
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
- H02J3/381—Dispersed generators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/38—Means for preventing simultaneous conduction of switches
- H02M1/385—Means for preventing simultaneous conduction of switches with means for correcting output voltage deviations introduced by the dead time
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4833—Capacitor voltage balancing
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2300/00—Systems for supplying or distributing electric power characterised by decentralized, dispersed, or local generation
- H02J2300/20—The dispersed energy generation being of renewable origin
- H02J2300/22—The renewable source being solar energy
- H02J2300/24—The renewable source being solar energy of photovoltaic origin
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The application discloses a bus voltage balance control system and a bus voltage balance control method; the system comprises a bus system and a balance bridge module; the DC/AC unit side of the bus system is a three-level circuit; the balance bridge module is connected to the DC/AC unit side of the bus system, so that a first compensation circuit and a second compensation circuit are formed between the positive bus and the negative bus of the DC/AC unit side of the bus system and the midpoint of the bus respectively through the balance bridge module; the first compensation circuit and the second compensation circuit conduct alternately and complementarily so as to keep the bus voltage of the bus system balanced. The method switches the working mode of the balance bridge module according to the positive and negative bus voltage differences of the bus system and the value of the neutral point current of the bus. The application has the beneficial effects that: the setting mode of the compensation circuit is simple, the complementary driving mode of the compensation circuit is easy to implement, and the balance of bus voltage can be effectively realized.
Description
Technical Field
The application relates to the technical field of power electronics, in particular to a bus voltage balance control system and a bus voltage balance control method.
Background
In conventional photovoltaic systems, such as photovoltaic energy storage systems; in off-grid mode, there is a need to connect an unbalanced load, particularly a nonlinear unbalanced load. The situation can cause serious unbalance of bus voltage, and the conventional bus voltage balancing method by using the three-level control method can not achieve the purpose of bus voltage balancing.
The bus voltage balance is effectively controlled; as shown in fig. 1, a photovoltaic energy storage system typically incorporates a balancing bridge for balancing the bus voltage. However, the control of the existing balance bridge is relatively complex, so that a simple control method of the balance bridge is urgently needed in practical application.
Disclosure of Invention
One of the objects of the present application is to provide a bus voltage balancing control system that is easy to implement.
Another object of the present application is to provide a bus voltage balance control method that is easy to implement.
In order to achieve at least one of the above objects, the present application adopts the following technical scheme: a bus voltage balance control system comprises a bus system and a balance bridge module; the balance bridge module is connected to the DC/AC unit side of the bus system, so that a first compensation circuit and a second compensation circuit are formed between the positive bus and the negative bus of the DC/AC unit side of the bus system and the midpoint of the bus respectively through the balance bridge module; the first compensation circuit and the second compensation circuit are conducted in an alternating complementary mode so that bus voltage of the bus system is balanced; a capacitor is connected between the positive bus and the negative bus at the DC/AC unit side of the bus system and the midpoint of the bus respectively; the capacitor corresponding to the first compensation circuit is an upper capacitor, and the voltage of the upper capacitor is v dc1 The method comprises the steps of carrying out a first treatment on the surface of the The capacitance corresponding to the second compensation circuit is a lower capacitance, and the voltage is v dc2 The method comprises the steps of carrying out a first treatment on the surface of the When v dc1 ＞v dc2 The method comprises the steps of carrying out a first treatment on the surface of the The lower capacitor charges and the upper capacitor discharges, thereby causing v dc1 Decline, v dc2 An increase; when v dc1 ＜v dc2 The method comprises the steps of carrying out a first treatment on the surface of the The upper capacitor charges and the lower capacitor discharges, thereby causing v dc1 Increase, v dc2 Descending; when v dc1 =v dc2 When the bus bar system is in a steady state.
Preferably, the balancing bridge module comprises a first switching unit and a second switching unit; one end of the first switch unit is connected with a positive bus, and the other end of the first switch unit is connected with a bus midpoint through an inductor, so that the first compensation circuit is formed between the positive bus and the bus midpoint of the bus system through the first switch unit and a corresponding capacitor; one end of the second switch unit is connected with the negative bus, and the other end of the second switch unit is connected with the midpoint of the bus through an inductor, so that the second compensation circuit is formed between the negative bus and the midpoint of the bus through the second switch unit and a corresponding capacitor.
Preferably, the DC/AC unit adopts a three-level topological structure; or, the DC/AC unit adopts a two-level topological structure, and a pair of capacitance midpoints which are connected in series between the positive bus and the negative bus at the DC/AC unit side of the bus system are bus midpoints.
Preferably, the first switching unit and the second switching unit are both semiconductor devices, and the first switching unit and the second switching unit are complementarily driven at 50% duty ratio, respectively.
Preferably, the first switching unit and the second switching unit form driving by using a triangular wave comparison.
Preferably, the theoretical value of the triangular wave comparison value CMP isThe method comprises the steps of carrying out a first treatment on the surface of the Taking dead time of the balance bridge module into consideration, adding offset to the triangular wave comparison value CMP to balance steady-state error of the dead time; wherein (1)>Is the maximum amplitude of the triangular wave.
Preferably, the absolute value of the offset of the triangular wave comparison value isThe method comprises the steps of carrying out a first treatment on the surface of the Wherein (1)>Is dead time, T s Is the period of the triangular wave.
Preferably, the current i at the midpoint of the bus o_bal When the value is greater than 0, the bias of the triangular wave comparison value isThe method comprises the steps of carrying out a first treatment on the surface of the The balancing bridge module freewheels through the second compensation circuit in dead time; current i at the midpoint of the bus o_bal When < 0, the bias of the triangular wave comparison value is +.>The method comprises the steps of carrying out a first treatment on the surface of the The balancing bridge module freewheels through the first compensation circuit during dead time.
A bus voltage balance control method is applied to the bus voltage balance control system and comprises the following steps:
s100: detecting the voltage difference of positive and negative buses of a bus system;
s200: when the absolute value of the voltage difference is smaller than the set threshold value, the balance bridge module complementarily drives the bus voltage at a 50% duty ratio so as to balance the bus voltage; at this time, the triangular wave comparison value does not need to be added with offset;
s300: when the absolute value of the voltage difference is larger than the set threshold value, the balance bridge module complementarily drives the bus voltage at a duty ratio of 50 percent so as to balance the bus voltage; the triangular wave comparison value is suitable for adding the offset according to the condition of the neutral point current value of the bus system.
Preferably, the offset addition for the triangular wave comparison value in step S300 includes the following specific procedures:
s310: calculating the midpoint current i of the bus system o_bal Average value of (2);
s320: if the average value is within the set threshold value range, the balance bridge module complementarily drives the bus voltage with a duty ratio of 50%, and the offset is not required to be added;
s330: if the average value is outside the set threshold range, the balance bridge module complementarily drives the bus voltage with a 50% duty ratio to balance the bus voltage, and adds an offset to the triangular wave comparison value.
Compared with the prior art, the application has the beneficial effects that:
the compensation circuits are respectively arranged between the positive bus and the negative bus of the bus system and the midpoint of the bus, and then the bus voltage of the bus system is balanced through the compensation driving of the compensation circuits. Compared with the traditional mode, the compensation circuit is simple in setting mode, and the complementary driving mode of the compensation circuit is easy to implement.
Drawings
Fig. 1 is a schematic diagram of an overall circuit structure of a bus voltage balance control system according to the present application.
Fig. 2 is a schematic diagram of a specific installation structure of the balance bridge module and the bus bar system in the present application.
Fig. 3 is a schematic waveform diagram of the balanced bridge module according to the present application when the balanced bridge module is driven by a triangle wave.
Fig. 4 is a schematic diagram of an equivalent circuit structure of the balance bridge module in the present application.
Fig. 5 is a schematic diagram of driving waveforms of the balanced bridge module added to the dead zone according to the present application.
Fig. 6 is a schematic diagram of a triangle wave driving waveform after adding a bias to the balance bridge module in the present application.
Fig. 7 is a schematic diagram of a triangle wave driving waveform after adding an offset to the balance bridge module in the present application.
Fig. 8 is a schematic diagram of a switching flow of the working state of the balance bridge module in the present application.
In the figure: a photovoltaic energy storage system 100, a DC/AC unit 110, a DC/DC unit 120, a photovoltaic panel 130, a battery 140, a bi-directional DC/DC unit 150, a balancing bridge module 200.
Detailed Description
The present application will be further described with reference to the following specific embodiments, and it should be noted that, on the premise of no conflict, new embodiments may be formed by any combination of the embodiments or technical features described below.
In the description of the present application, it should be noted that, for the azimuth words such as terms "center", "lateral", "longitudinal", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., the azimuth and positional relationships are based on the azimuth or positional relationships shown in the drawings, it is merely for convenience of describing the present application and simplifying the description, and it is not to be construed as limiting the specific scope of protection of the present application that the device or element referred to must have a specific azimuth configuration and operation.
It should be noted that the terms "first," "second," and the like in the description and in the claims are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
One aspect of the present application provides a bus voltage balancing control system, as shown in fig. 1 and 2, wherein a preferred embodiment includes a bus system and a balancing bridge module 200. The balancing bridge module 200 is connected to the DC/AC unit 110 side of the bus system such that a first compensation circuit is formed between the positive bus of the DC/AC unit 110 side of the bus system and the midpoint of the bus by the balancing bridge module 200, while a second compensation circuit is formed between the negative bus of the DC/AC unit 110 side of the bus system and the midpoint of the bus by the balancing bridge module 200. When the bus system is operating, the balance bridge module 200 may be started to operate, where the first compensation circuit and the second compensation circuit are alternately and complementarily turned on, so that the bus voltage of the bus system is balanced. It can be understood that compared with the traditional voltage balancing mode, the first compensation circuit and the second compensation circuit are simple in arrangement mode, and the complementary driving mode during voltage compensation is easy to implement, so that the balance of bus voltage can be better realized. Meanwhile, the first compensation circuit and the second compensation circuit can be suitable for any scene with bus voltage balance requirements. I.e., the variety of bus bar systems, is numerous, including but not limited to the photovoltaic energy storage system 100; however, for convenience of description, the following embodiments will be described in detail with reference to the photovoltaic energy storage system 100 shown in fig. 1.
Specifically, as shown in fig. 1, the photovoltaic energy storage system 100 includes a DC/AC unit 110, a DC/DC unit 120, a photovoltaic panel 130, a battery 140, and a bi-directional DC/DC unit 150. The output end of the photovoltaic panel 130 is connected with the input end of the DC/DC unit 120, the output end of the DC/DC unit 120 is connected with the input end of the DC/AC unit 110, and the output end of the DC/AC unit 110 is connected with a power grid; the photovoltaic power generation system may be formed by the connection between the DC/AC unit 110, the DC/DC unit 120, the photovoltaic panel 130, and the power grid. The battery 140 is connected to one end of the bidirectional DC/DC unit 150, and the other end of the bidirectional DC/DC unit 150 is connected in parallel to the output terminal of the DC/DC unit 120. When the photovoltaic energy storage system 100 is in off-grid mode and an unbalanced load is connected, one end of the unbalanced load is connected to the midpoint of the input side bus of the DC/AC unit 110, and the other end is connected to the output side of the DC/AC unit 110. The balancing bridge module 200 is connected to the input side of the DC/AC unit 110 of the photovoltaic system.
In this embodiment, as shown in fig. 2, capacitors are connected between the positive and negative buses and the midpoint of the bus on the DC/AC unit 110 side of the bus system. The balance bridge module 200 includes a first switching unit and a second switching unit; one end of the first switch unit is connected with a positive bus of the bus system, and the other end of the first switch unit is connected with a bus midpoint of the bus system through an inductor, so that a first compensation circuit is formed between the positive bus of the bus system and the bus midpoint through the first switch unit and a corresponding capacitor. One end of the second switch unit is connected with a negative bus of the bus system, and the other end of the second switch unit is connected with a bus midpoint of the bus system through an inductor, so that a second compensation circuit is formed between the negative bus of the bus system and the bus midpoint through the second switch unit and a corresponding capacitor.
It is understood that the DC/AC unit 110 may be a two-level topology, or may be a three-level topology. When the DC/AC unit 110 adopts a two-level topology, an ideal midpoint of two capacitors connected in series between the positive and negative buses on the DC/AC unit 110 side of the bus system can be used as a virtual bus midpoint. When the DC/AC unit 110 adopts a three-level topology, the specific location of the midpoint of the bus is well known to those skilled in the art.
Meanwhile, the first compensation circuit and the second compensation circuit can pass throughThe capacitor is charged and discharged to balance the voltage of the bus system. Wherein the first switch unit and the second switch unit can share an inductance L bal 。
In this embodiment, as shown in fig. 2, the first switch unit and the second switch unit each use a controllable semiconductor device, and the specific structures thereof are various, including but not limited to a controllable thyristor, a field effect transistor, and the like; for easy understanding, the first and second switching units preferably employ field effect transistors S bal_1 And S is bal_2 . The first and second switching units may be complementarily driven at 50% duty cycles, respectively, when the balance bridge module 200 is operated, which is simple to implement and easy to operate.
In this embodiment, as shown in fig. 3, the driving modes of the first switch unit and the second switch unit are various, including but not limited to triangular wave comparison driving. For convenience of understanding, the first switching unit and the second switching unit are described below by taking triangular wave driving as an example.
For ease of understanding, the specific operation of the balancing bridge module 200 may be described in detail as shown in fig. 2-4.
Let the capacitor corresponding to the first compensation circuit be the upper capacitor C 1 The voltage is v dc1 The method comprises the steps of carrying out a first treatment on the surface of the The capacitance corresponding to the second compensation circuit is the lower capacitance C 2 The voltage is v dc2 . The equivalent circuit of the balanced bridge module 200 is shown in fig. 4, because the first and second switching units operate complementarily for 50% duty cycle, the bus midpoint voltage v of the bus system o_bal The expression of (2) is:
。
when v o_bal When=0, the positive and negative bus voltages of the bus system are in a balanced state, i.e. the bus system is in a steady state; no voltage balancing is required at this time.
When v o_bal > 0, i.e. v dc1 ＞v dc2 At this time, the bus midpoint current i of the bus system o_bal Start to increase positively and finally make the lower capacitance C 2 Charging and charging the upper capacitor C 1 Discharging to v dc1 Decline, v dc2 Increase up to v dc1 =v dc2 。
When v o_bal < 0, i.e. v dc1 ＜v dc2 At this time, the bus midpoint current i of the bus system o_bal Start to increase reversely, and finally lead the upper capacitor C to be 1 Charging and lower capacitor C 2 Discharging to v dc1 Increase, v dc2 Descending until v dc1 =v dc2 。
According to the working process, the working mode with the duty ratio of 50% can balance the upper capacitance and the lower capacitance.
It should be appreciated that the balanced bridge module 200 is a half-bridge topology that has dead time between the upper half-bridge and the lower half-bridge for output protection when PWM output is being performed. Thus, in the actual operation process of the balance bridge module 200, the dead time returns to cause steady-state errors of the upper capacitor and the lower capacitor.
Specifically, the dead time isThe driving diagram of the triangular wave comparison shown in fig. 5 can be obtained by substituting the driving diagram into the triangular wave comparison.
Then the current i is at the midpoint of the bus system o_bal >0, at dead timeIn the balancing bridge module 200, the freewheeling is performed by the lower half bridge, i.e. the second compensation circuit; the corresponding bus midpoint voltage v o_bal The expression of (2) is:
。
wherein Ts is the period of the triangular wave; v (V) dc Representing the positive and negative bus voltage differences of the bus system.
Then in steady state the bus midpoint voltage v o_bal Should be zero, bring inIn the formula v can be obtained dc1 -v dc2 =The method comprises the steps of carrying out a first treatment on the surface of the Therefore, there is a steady state error between the upper and lower capacitors, the steady state error has a value of +>。
Similarly, when the bus midpoint current i of the bus system o_bal <0, at dead timeIn the balancing bridge module 200, the first compensation circuit performs freewheeling through the upper half bridge, so that the corresponding bus midpoint voltage v o_bal The expression of (2) is:
。
in steady state, the bus midpoint voltage v o_bal Should be zero, and v can be obtained by taking the above formula dc1 -v dc2 =Therefore, there is a steady state error between the upper and lower capacitors, the value of which is +.>。
In order to suppress steady state error, one embodiment of the present application, as shown in FIGS. 6 and 7, the theoretical value of the triangular wave comparison value CMP isThe method comprises the steps of carrying out a first treatment on the surface of the Taking the dead time of the balance bridge module 200 into consideration, the steady-state error of the voltage difference due to the dead time is compensated by adding an offset to the triangular wave comparison value CMP. Wherein (1)>Is the maximum amplitude of the triangular wave.
In the present embodiment, as shown in fig. 6 and 7, threeThe absolute offset of the angle wave comparison value CMP is。
It will be appreciated that when the bus midpoint current i of the bus system o_bal At > 0, at dead timeThe inner balance bridge module 200 will freewheel through the second compensation circuit such that the actual value of the triangular wave comparison value CMP is lower than +.>Then the bias of the triangular wave comparison value CMP is +.>And then can obtain the triangular wave comparison value. Current i at the midpoint of the bus system o_bal When < 0, in dead time->The internal balance bridge module 200 freewheels through the first compensation circuit so that the actual value of the triangular wave comparison value CMP is higher thanThen the bias of the triangular wave comparison value CMP is +.>Furthermore, a triangular wave comparison value can be obtained>。
For ease of understanding, the specific operation of the balanced bridge module 200 after the offset is set will be described.
When the neutral point current i of the bus o_bal >At 0, as shown in FIG. 6, the triangular wave comparison value CMP is determined byMove up to. When dead time is not considered, the corresponding bus midpoint voltage v o_bal The expression of (2) is:
。
in consideration of dead timeAfter that, the balancing bridge module 200 in dead time freewheels through the lower half bridge, i.e. the second compensation circuit, and the corresponding bus midpoint voltage v o_bal The expression of (2) is:
。
when the neutral point current i of the bus o_bal <0, as shown in FIG. 7, the triangular wave comparison value CMP is calculated fromMove down to。
In consideration of dead timeWhen the balancing bridge module 200 freewheels through the upper half bridge, i.e. the first compensation circuit, the corresponding bus midpoint voltage v o_bal The expression of (2) is:
。
from the above, it can be seen that: when no offset is added, there is a steady state error between the upper and lower capacitances. After adding a bias amount considering dead time, the voltage v at the midpoint of the bus in steady state o_bal Zero, v can be obtained dc1 -v dc2 =0, i.e. the steady state error between the upper and lower capacitances is compensated.
It should be appreciated that the voltage and current of the bus of a photovoltaic energy storage system or other bus system may not always remain constant during normal operation, i.e., the bus voltage and current of the bus system are both in a fluctuating state within a small range during normal operation; the driving mode of the balance bridge module 200 may be restricted in order to reduce the workload of the balance bridge module 200.
In order to start the balance bridge module 200 infrequently, another aspect of the present application provides a bus voltage balance control method, as shown in fig. 8, specifically including the following steps:
s100: voltage difference V between positive and negative bus of bus system dc1 -V dc2 And (5) detecting.
S200: when the absolute value of the voltage difference is smaller than the set threshold V limit When the balance bridge module 200 is complementarily driven with a 50% duty cycle to balance the bus voltage; the triangular wave comparison value does not need to be added with offset.
S300: when the absolute value of the voltage difference is greater than the set threshold, the balance bridge module 200 is complementarily driven at 50% duty ratio to perform balancing of the bus voltage; and the triangular wave comparison value can be added with offset according to the condition of the neutral point current value of the bus system.
It will be appreciated that for threshold V limit And the specific value of (3) can be selected by the person skilled in the art according to the actual needs.
In this embodiment, as shown in fig. 8, the offset addition for the triangular wave comparison value in step S300 includes the following specific procedures:
s310: calculating the midpoint current i of the bus system o_bal Average value of (2).
S320: if the average value is within the set threshold value [ -I limit ，I limit ]Within this range, the balancing bridge module 200 is complementarily driven at 50% duty cycle to balance the bus voltage without adding a bias amount.
S330: if the average value isOutside the set threshold range, i.e.) o_bal ＞I limit Or i o_bal ＜-I limit The balance bridge module 200 is complementarily driven at a 50% duty ratio to perform balancing of the bus voltage and adds an offset to the triangular wave comparison value.
It will be appreciated that for threshold I limit And the specific value of (3) can be selected by the person skilled in the art according to the actual needs.
It should be noted that there are mainly two driving modes of the balance bridge module 200. First kind: the first switch unit and the second switch unit are respectively driven in a complementary mode at a duty ratio of 50%, but the offset is not required to be added to the triangular wave comparison value; second kind: the first switching unit and the second switching unit are complementarily driven at a duty ratio of 50% respectively, while adding an offset to the triangular wave comparison value. The second driving mode of the balance bridge module 200 has a larger load than the first driving mode, and is not easy to be performed for a long time. Therefore, the switching between driving modes can be reduced as much as possible by the control method, and the voltage difference steady-state error of the system can be reduced as much as possible. The driving mode switching method is easy to implement and simple and feasible.
It will also be appreciated that the upper capacitance C is described when the current at the midpoint of the bus is outside of the set threshold range 1 And lower capacitor C 2 The charge and discharge degree of the capacitor is larger, and larger dead time can be generated between the upper capacitor and the lower capacitor; then an offset needs to be added to the triangle wave comparison value to balance the larger steady state error due to the larger dead time. On the contrary, the charge and discharge degree between the upper capacitor and the lower capacitor is smaller, at this time, the dead time generated between the upper capacitor and the lower capacitor is shorter, and the influence on the bus voltage balance is smaller, and only the two switch units of the balance bridge module 200 are required to be driven complementarily with the 50% duty ratio respectively.
The foregoing has outlined the basic principles, features, and advantages of the present application. It will be understood by those skilled in the art that the present application is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present application, and various changes and modifications may be made therein without departing from the spirit and scope of the application, which is defined by the appended claims. The scope of the application is defined by the appended claims and equivalents thereof.
Claims (5)
1. The bus voltage balance control system is characterized by comprising a bus system and a balance bridge module; the balance bridge module is connected to the DC/AC unit side of the bus system, so that a first compensation circuit and a second compensation circuit are formed between the positive bus and the negative bus of the DC/AC unit side of the bus system and the midpoint of the bus respectively through the balance bridge module;
the first compensation circuit and the second compensation circuit are conducted in an alternating complementary mode so that bus voltage of the bus system is balanced;
a capacitor is connected between the positive bus and the negative bus at the DC/AC unit side of the bus system and the midpoint of the bus respectively; the capacitor corresponding to the first compensation circuit is an upper capacitor, and the voltage of the upper capacitor is v dc1 The method comprises the steps of carrying out a first treatment on the surface of the The capacitance corresponding to the second compensation circuit is a lower capacitance, and the voltage is v dc2 ；
When v dc1 ＞v dc2 The method comprises the steps of carrying out a first treatment on the surface of the The lower capacitor charges and the upper capacitor discharges, thereby causing v dc1 Decline, v dc2 An increase;
when v dc1 ＜v dc2 The method comprises the steps of carrying out a first treatment on the surface of the The upper capacitor charges and the lower capacitor discharges, thereby causing v dc1 Increase, v dc2 Descending;
when v dc1 =v dc2 When the bus system is in a steady state;
the balance bridge module comprises a first switch unit and a second switch unit;
one end of the first switch unit is connected with a positive bus, and the other end of the first switch unit is connected with a bus midpoint through an inductor, so that the first compensation circuit is formed between the positive bus and the bus midpoint of the bus system through the first switch unit and a corresponding capacitor;
one end of the second switch unit is connected with the negative bus, and the other end of the second switch unit is connected with the midpoint of the bus through an inductor, so that the second compensation circuit is formed between the negative bus and the midpoint of the bus through the second switch unit and a corresponding capacitor;
the first switch unit and the second switch unit adopt triangular wave comparison to form driving; theoretical value of triangular wave comparison value CMP is 0.5C max The method comprises the steps of carrying out a first treatment on the surface of the The steady-state error of dead time is balanced by adding offset to the triangular wave comparison value CMP; wherein C is max Is the maximum amplitude of the triangular wave;
the absolute value of the offset of the triangular wave comparison value is%）C max The method comprises the steps of carrying out a first treatment on the surface of the Wherein (1)>Is dead time, T s Is the period of the triangular wave;
current i at the midpoint of the bus o_bal When the bias value is more than 0, the bias value of the triangular wave comparison value is%）C max The method comprises the steps of carrying out a first treatment on the surface of the The balancing bridge module freewheels through the second compensation circuit in dead time;
current i at the midpoint of the bus o_bal When the bias value is less than 0, the bias value of the triangular wave comparison value is [ - ]）C max The method comprises the steps of carrying out a first treatment on the surface of the The balancing bridge module freewheels through the first compensation circuit during dead time.
2. The bus voltage balance control system of claim 1, wherein: the DC/AC unit is of a three-level topological structure;
or, the DC/AC unit is in a two-level topological structure, and a pair of capacitance midpoints connected in series between the positive bus and the negative bus at the DC/AC unit side of the bus system are bus midpoints.
3. The bus voltage balance control system of claim 1, wherein: the first switch unit and the second switch unit are semiconductor devices, and the first switch unit and the second switch unit are complementarily driven at a 50% duty cycle respectively.
4. A control method applied to the bus voltage balance control system according to claim 1, characterized by comprising the steps of:
s100: detecting the voltage difference of positive and negative buses of a bus system;
s200: when the absolute value of the voltage difference is smaller than the set threshold value, the balance bridge module complementarily drives the bus voltage at a 50% duty ratio so as to balance the bus voltage; at this time, the triangular wave comparison value does not need to be added with offset;
s300: when the absolute value of the voltage difference is larger than the set threshold value, the balance bridge module complementarily drives the bus voltage at a duty ratio of 50 percent so as to balance the bus voltage; the triangular wave comparison value is suitable for adding the offset according to the condition of the neutral point current value of the bus system.
5. The control method of the bus voltage balance control system according to claim 4, characterized by: the offset addition to the triangular wave comparison value in step S300 includes the following specific procedures:
s310: calculating the midpoint current i of the bus system o_bal Average value of (2);
s320: if the average value is within the set threshold range, the offset is not required to be added to the triangular wave comparison value;
s330: if the average value is outside the set threshold range, it is necessary to add an offset to the triangular wave comparison value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311023459.9A CN116760042B (en) | 2023-08-15 | 2023-08-15 | Bus voltage balance control system and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311023459.9A CN116760042B (en) | 2023-08-15 | 2023-08-15 | Bus voltage balance control system and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116760042A CN116760042A (en) | 2023-09-15 |
| CN116760042B true CN116760042B (en) | 2023-11-03 |
Family
ID=87959401
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311023459.9A Active CN116760042B (en) | 2023-08-15 | 2023-08-15 | Bus voltage balance control system and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116760042B (en) |
Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05328728A (en) * | 1992-05-18 | 1993-12-10 | Sanken Electric Co Ltd | Ac/dc converter |
| CN102843055A (en) * | 2012-09-04 | 2012-12-26 | 江苏中航动力控制有限公司 | Neutral-point potential balance control device and method for three-level inverter |
| CN102882413A (en) * | 2012-06-11 | 2013-01-16 | 合肥工业大学 | Three-level inverter dead-time compensation algorithm based on modulated wave correction |
| WO2013029610A2 (en) * | 2011-08-31 | 2013-03-07 | Danfoss Solar Inverters A/S | Circuit and method for balancing dc-bus capacitor voltages in power converters |
| CN103036464A (en) * | 2012-12-06 | 2013-04-10 | 湖南大学 | Photovoltaic array topological structure, grid-connected system based on photovoltaic array topological structure and photovoltaic array control method |
| CN103607131A (en) * | 2013-12-03 | 2014-02-26 | 上海理工大学 | Neutral point potential balancing control system and method of three-level inverter |
| KR101399120B1 (en) * | 2014-03-13 | 2014-05-27 | (주)티피에스 | Power converter |
| KR101556933B1 (en) * | 2015-03-06 | 2015-10-05 | (주)티피에스 | Uninterruptible Power Supply |
| CN105743335A (en) * | 2016-04-25 | 2016-07-06 | 佛山市新光宏锐电源设备有限公司 | DC bus voltage compensation circuit for uninterruptable power supply |
| CN106817032A (en) * | 2017-03-24 | 2017-06-09 | 合肥博鳌电气科技有限公司 | A kind of neutral balance circuit and control method for half-bridge three-level direct current converter |
| CN113691105A (en) * | 2021-07-28 | 2021-11-23 | 漳州科华技术有限责任公司 | Balance bridge voltage-sharing control method and power supply |
| CN115833575A (en) * | 2022-12-15 | 2023-03-21 | 华为数字能源技术有限公司 | Energy storage converter, control method of balancing circuit and energy storage system |
| CN116054546A (en) * | 2022-11-30 | 2023-05-02 | 漳州科华技术有限责任公司 | Bus balance bridge control method and device and power supply system |
| CN116191482A (en) * | 2023-03-13 | 2023-05-30 | 中国矿业大学 | Control system and method for unbalanced load of three-level voltage restorer |
| CN116232057A (en) * | 2022-12-06 | 2023-06-06 | 深圳科士达科技股份有限公司 | Balance bridge circuit control method, device, electronic equipment and readable storage medium |
-
2023
- 2023-08-15 CN CN202311023459.9A patent/CN116760042B/en active Active
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05328728A (en) * | 1992-05-18 | 1993-12-10 | Sanken Electric Co Ltd | Ac/dc converter |
| WO2013029610A2 (en) * | 2011-08-31 | 2013-03-07 | Danfoss Solar Inverters A/S | Circuit and method for balancing dc-bus capacitor voltages in power converters |
| CN102882413A (en) * | 2012-06-11 | 2013-01-16 | 合肥工业大学 | Three-level inverter dead-time compensation algorithm based on modulated wave correction |
| CN102843055A (en) * | 2012-09-04 | 2012-12-26 | 江苏中航动力控制有限公司 | Neutral-point potential balance control device and method for three-level inverter |
| CN103036464A (en) * | 2012-12-06 | 2013-04-10 | 湖南大学 | Photovoltaic array topological structure, grid-connected system based on photovoltaic array topological structure and photovoltaic array control method |
| CN103607131A (en) * | 2013-12-03 | 2014-02-26 | 上海理工大学 | Neutral point potential balancing control system and method of three-level inverter |
| KR101399120B1 (en) * | 2014-03-13 | 2014-05-27 | (주)티피에스 | Power converter |
| KR101556933B1 (en) * | 2015-03-06 | 2015-10-05 | (주)티피에스 | Uninterruptible Power Supply |
| CN105743335A (en) * | 2016-04-25 | 2016-07-06 | 佛山市新光宏锐电源设备有限公司 | DC bus voltage compensation circuit for uninterruptable power supply |
| CN106817032A (en) * | 2017-03-24 | 2017-06-09 | 合肥博鳌电气科技有限公司 | A kind of neutral balance circuit and control method for half-bridge three-level direct current converter |
| CN113691105A (en) * | 2021-07-28 | 2021-11-23 | 漳州科华技术有限责任公司 | Balance bridge voltage-sharing control method and power supply |
| CN116054546A (en) * | 2022-11-30 | 2023-05-02 | 漳州科华技术有限责任公司 | Bus balance bridge control method and device and power supply system |
| CN116232057A (en) * | 2022-12-06 | 2023-06-06 | 深圳科士达科技股份有限公司 | Balance bridge circuit control method, device, electronic equipment and readable storage medium |
| CN115833575A (en) * | 2022-12-15 | 2023-03-21 | 华为数字能源技术有限公司 | Energy storage converter, control method of balancing circuit and energy storage system |
| CN116191482A (en) * | 2023-03-13 | 2023-05-30 | 中国矿业大学 | Control system and method for unbalanced load of three-level voltage restorer |
Non-Patent Citations (1)
| Title |
|---|
| 交错DC_DC三电平逆变器中点电位控制方法仿真研究;夏鲲等;《系统仿真学报》;第26卷(第8期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN116760042A (en) | 2023-09-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP3343749A1 (en) | Multi-level inverter | |
| CN100521442C (en) | Power factor correcting converter | |
| CN1428924A (en) | Switch power supply device | |
| CN107223304B (en) | Multilevel converter with energy storage | |
| CN111525815B (en) | Bidirectional DCDC conversion circuit, energy storage converter and charge-discharge control method | |
| CN103001297B (en) | Series capacitor bank resonant type voltage balance charging method and system | |
| CN109149986B (en) | Three-level-like hybrid modular multilevel converter and control method thereof | |
| EP3255771B1 (en) | Bidirectional dc-dc convertor | |
| AU2012266985A1 (en) | Inverter apparatus and solar photovoltaic grid-connected system using the same | |
| CN103840657A (en) | Power converter, and voltage balancing method of input capacitor | |
| JPWO2018070496A1 (en) | Power conversion system | |
| CN103312165A (en) | High-frequency multiphase interleaved conversion device and control method | |
| EP2950438A1 (en) | Five level inverter | |
| CN103701345A (en) | Five-level inverter | |
| CN109367417A (en) | Two-stage bidirectional power inverter and control method with charging and V2G function | |
| CN115242092A (en) | Flying capacitor three-level DCDC converter, photovoltaic system and control method | |
| CN116760042B (en) | Bus voltage balance control system and method | |
| CN111697861B (en) | Multilevel soft switch inversion driving system and voltage window switching method thereof | |
| CN111130371B (en) | Nine level dc-to-ac converter of 2 times step up based on switched capacitor | |
| CN106160479A (en) | Two stage power translation circuit and method | |
| CN218162234U (en) | Balance circuit applied to T-type three-level inverter | |
| WO2023230920A1 (en) | Dc/dc conversion circuit, dc/dc converter and power supply device | |
| CN103812225B (en) | A kind of asymmetric chain type mixed energy storage system and control method thereof | |
| CN105576971B (en) | Input, the continuous three level Buck converters of output current | |
| CN114400894A (en) | Bidirectional DCDC conversion circuit and control method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |