CN116743638A - Test method and system for automatically detecting time stamp synchronization of Ethernet switch - Google Patents
Test method and system for automatically detecting time stamp synchronization of Ethernet switch Download PDFInfo
- Publication number
- CN116743638A CN116743638A CN202310713543.7A CN202310713543A CN116743638A CN 116743638 A CN116743638 A CN 116743638A CN 202310713543 A CN202310713543 A CN 202310713543A CN 116743638 A CN116743638 A CN 116743638A
- Authority
- CN
- China
- Prior art keywords
- module
- upper computer
- communication module
- bus communication
- time stamp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010998 test method Methods 0.000 title claims description 6
- 238000004891 communication Methods 0.000 claims abstract description 56
- 238000012360 testing method Methods 0.000 claims abstract description 50
- 238000012544 monitoring process Methods 0.000 claims abstract description 5
- 230000001360 synchronised effect Effects 0.000 claims description 23
- 230000002457 bidirectional effect Effects 0.000 claims description 9
- 238000004590 computer program Methods 0.000 claims description 3
- 230000003993 interaction Effects 0.000 claims description 3
- 238000011161 development Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 abstract description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/10—Active monitoring, e.g. heartbeat, ping or trace-route
- H04L43/106—Active monitoring, e.g. heartbeat, ping or trace-route using time related information in packets, e.g. by adding timestamps
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/06—Generation of reports
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
Abstract
The invention relates to a method and a system for testing the time stamp synchronization of an Ethernet switch, wherein the system comprises a PC upper computer, a power control module, a programmable power supply, an interference flow generation module, a time synchronization module, a bus communication module and a DUT; the PC upper computer can coordinate the control of the power control module, the interference flow generation module, the time synchronization monitoring module and the bus communication module, and achieve the automatic execution of capturing and comparing the Ethernet system time stamp. And recording data sent and received by the bus communication module, comparing and monitoring the time stamp of the message, judging whether the test result is correct or not, and generating a webpage version test report. The test system can automatically test and execute and has automatic result judgment, realizes the automatic test of the Ethernet switch time stamp synchronization, can completely cover development requirement specifications by configuring the system, improves test quality and coverage degree, and ensures the consistency of test results.
Description
Technical Field
The invention belongs to the technical field of whole vehicle testing, and particularly relates to a testing method and system for automatically detecting the time stamp synchronization of an Ethernet switch.
Background
The synchronous test of the switch to the time stamp is a test which is necessary to be done by the switch in the vehicle-mounted Ethernet, and is an important test link for ensuring the normal communication of the relevant nodes of the whole vehicle Ethernet.
At present, a commonly adopted mode is to evaluate whether the test of the timestamp synchronization of the controller switch is correct or not by manually simulating the interference flow. The coverage degree of the test range is low, and the consistency of the test results is poor. The controller is difficult to locate the problem reasons when the function defect problem occurs or the problem occurs in the whole-vehicle combined test in the test verification process of the Ethernet switch time stamp synchronization, and is not beneficial to the problem investigation or reproduction.
Disclosure of Invention
The invention aims to provide a test method and a test system for automatically detecting the time stamp synchronization of an Ethernet switch, which are used for solving the problems of automatic test on the time stamp synchronization of the Ethernet switch, improving the test quality and coverage degree and ensuring the consistency of test results.
The invention aims at realizing the following technical scheme:
the Ethernet switch time stamp synchronous test system consists of a PC upper computer, a power control module, a programmable power supply, an interference flow generation module, a time synchronization module, a bus communication module and a tested controller DUT;
the PC upper computer is respectively connected with the power control module, the interference flow generation module, the time synchronization module and the bus communication module, and can realize control coordination of the power control module, the interference flow generation module, the time synchronization monitoring module and the bus communication module, and realize automatic execution of capturing and comparing the Ethernet system time stamp. The data sent and received by the bus communication module are recorded, the time stamp of the message is compared and monitored, whether the test result is correct or not is judged, and a webpage version test report is generated;
the power control module is connected with the programmable power supply and controls the programmable power supply according to the instruction of the PC upper computer;
the interference flow generation module sends effective Following tracking information according to an instruction of a PC upper computer and an instruction node, and sends the information to the bus communication module;
the time synchronization module is connected with the total communication module, and can send effective Sync synchronization information according to an instruction of the PC upper computer and an instruction node and send the information to the total communication module;
the bus communication module is connected with the DUT, simulates effective load information according to the instruction of the PC upper computer, injects Sync synchronous information and FollowUp trace information received from the interference flow generating module and the time synchronous module into the simulated effective load information, and then sends the effective load information to a port CH-1 of the DUT through an IPV4 bidirectional Ethernet port CH-A.
Furthermore, the PC upper computer and the programmable power supply adopt an external 220V three-phase power supply to supply power to the PC upper computer and the programmable power supply.
Further, the PC upper computer is connected with the interference flow generation module by adopting a USB data line, and the PC upper computer controls the interference flow generation module to send a FollowUp tracking message.
Further, the PC upper computer is connected with the time synchronization module by adopting a USB data line, and the time synchronization module is controlled by the PC upper computer to send Sync synchronization messages.
Further, the PC upper computer is connected with the power control module by an RJ45 data line, and the PC upper computer performs program control on the power mode in the power control module.
Further, the power control module is connected with the programmable power supply through a USB data line, and the power control module correspondingly controls the output voltage of the programmable power supply according to a power mode controlled by a PC upper computer program.
Further, the PC upper computer is connected with the general communication module by a DB9 line. The PC upper computer controls the bus communication module to simulate effective load information, the bus control module transmits signal messages on the Ethernet line to the PC upper computer, and the PC upper computer records the messages and analyzes and judges the message data;
the interference flow generation module is connected with the bus communication module by a DB9 line, and transmits a FollowUp tracking message to the bus communication module;
the time synchronization module is connected with the bus communication module by DB9 wires, and transmits Sync synchronization information to the bus communication module.
Further, the programmable power supply is connected with the DUT by adopting a matched power line, a standard socket is reserved in the test system, the programmable power supply provides 12V power KL30, IG power KL15 and a ground end GND for the DUT, and the programmable power supply is provided with three independent adjustable voltage output channels for providing power supply for the DUT, so that the switching of the power supply states IGOn and IGOff of the KL30 port and the KL15 port of the DUT can be realized.
Furthermore, the bus communication module is connected with the DUT by adopting an IPV4 standard bidirectional Ethernet connecting line, so that bidirectional data interaction is realized.
A test method for automatically detecting the time stamp synchronization of an Ethernet switch comprises the following steps:
A. the interference flow generation module and the time synchronization module send effective Sync synchronization information and FollowUp tracking information through the bus communication module;
B. the bus communication module sends a payload, wherein the size of the payload is 1500 bytes;
C. the bus communication module captures the Ethernet channel synchronous traffic for 350 seconds each time and captures the time stamp thereof;
D. waiting for 60 seconds on the DUT port CH-1, and calculating the protocol time, wherein the protocol time is the protocol time reconstructed by a time stamp field of each step of Sync synchronous message and every two steps of message pairs formed by the Sync synchronous message plus a FollowUp trace message received from the DUT;
E. for each synchronization message, the difference between the entry timestamp captured in step C and the time in step D is calculated, checking if the differences calculated in step E are all within +/-200 ns.
Compared with the prior art, the invention has the beneficial effects that:
the test system can automatically test and execute and has automatic result judgment, the invention realizes the automatic test on the Ethernet switch time stamp synchronization, and the system can completely cover development requirement specification by configuration, thereby improving test quality and coverage degree and ensuring consistency of test results.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of a test system for automatically detecting Ethernet switch timestamp synchronization in accordance with the present invention.
Detailed Description
The invention is further illustrated by the following examples:
example 1
As shown in FIG. 1, the Ethernet switch time stamp synchronous test system of the invention is composed of a PC upper computer, a power control module, a programmable power supply, an interference flow generation module, a time synchronization module, a bus communication module and a DUT.
The PC upper computer can realize control coordination of the power supply control module, the interference flow generation module, the time synchronization monitoring module and the bus communication module, and realize automatic execution of capturing and comparing the Ethernet system time stamp. And the data sent and received by the bus communication module are recorded, the time stamp of the message is compared and monitored, whether the test result is correct or not is judged, and a webpage version test report is generated.
And the power control module controls the programmable power supply according to the instruction of the PC upper computer. The programmable power supply is provided with three independent adjustable voltage output channels for supplying power to the DUT. Switching of KL30 port On-Off control and power supply states IG On and IG Off of KL15 port of the controlled DUT can be achieved.
The interference flow generation module sends effective Following tracking information according to the instruction of the PC upper computer and the instruction node, and sends the information to the bus communication module.
And the time synchronization module sends an effective Sync synchronization message according to an instruction of the PC upper computer and an instruction node, and sends the message to the total communication module.
The bus communication module simulates effective load information according to PC upper computer instructions, and injects Sync synchronous information and FollowUp tracking information received from the interference flow generating module and the time synchronous module into the simulated effective load information, and then sends the effective load information to a port CH-1 of the DUT through an IPV4 bidirectional Ethernet port CH-A.
The PC upper computer and the programmable power supply adopt an external 220V three-phase power supply to supply power to the PC upper computer and the programmable power supply.
And the PC upper computer is connected with the interference flow generation module by adopting a USB data line. And the PC upper computer controls the interference flow generation module to send a follow-up message.
And the PC upper computer is connected with the time synchronization module by adopting a USB data line. And the PC upper computer controls the time synchronization module to send Sync synchronization information.
And the PC upper computer is connected with the power control module by adopting an RJ45 data line. And the PC upper computer is used for performing program control on the power supply mode in the power supply control module.
The power control module is connected with the programmable power supply by adopting a USB data line. The power control module controls the output voltage of the programmable power supply correspondingly according to a power mode controlled by a PC upper computer program.
And the PC upper computer is connected with the total communication module by a DB9 line. The PC upper computer controls the bus communication module to simulate the effective load information, the bus control module transmits the signal message on the Ethernet line to the PC upper computer, and the PC upper computer records the message and analyzes and judges the message data.
The interference flow generating module is connected with the bus communication module by DB9 wires. The interference flow generation module sends a FollowUp tracking message to the bus communication module.
The time synchronization module is connected with the bus communication module by DB9 wires. The time synchronization module sends a Sync synchronization message and transmits the Sync synchronization message to the bus communication module.
And the programmable power supply is connected with the DUT (device under test) by adopting a matched power line, and a standard socket is reserved in the test system. The programmable power supply provides 12V power KL30, IG power KL15 and a ground end GND for the DUT.
And the bus communication module is connected with the DUT by adopting an IPV4 standard bidirectional Ethernet connecting wire, so that bidirectional data interaction is realized.
Example 2
The invention discloses a test method for automatically detecting the time stamp synchronization of an Ethernet switch, which comprises the following steps:
1. the interference flow generation module and the time synchronization module send effective Sync synchronization information and FollowUp tracking information through the bus communication module.
2. The bus communication module transmits a payload having a payload size of 1500 bytes.
3. The bus communication module captures the ethernet channel synchronization traffic for 350 seconds each time and captures its timestamp.
4. On DUT port CH-1, wait 60 seconds and calculate the protocol time for each step of Sync message and the reconstructed protocol time for the timestamp field of each two steps of message pair consisting of Sync message plus FollowUp trace message received from DUT.
5. For each synchronization message, the difference between the entry timestamp captured in step 3 and the time in step 4 is calculated, checking if the differences calculated in step 5 are all within +/-200 ns.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (10)
1. A test system for ethernet switch timestamp synchronization, characterized by: the system consists of a PC upper computer, a power control module, a programmable power supply, an interference flow generation module, a time synchronization module, a bus communication module and a DUT (under-test controller);
the PC upper computer is respectively connected with the power control module, the interference flow generation module, the time synchronization module and the bus communication module, and can realize control coordination of the power control module, the interference flow generation module, the time synchronization monitoring module and the bus communication module, and realize automatic execution of capturing and comparing the Ethernet system time stamp. The data sent and received by the bus communication module are recorded, the time stamp of the message is compared and monitored, whether the test result is correct or not is judged, and a webpage version test report is generated;
the power control module is connected with the programmable power supply and controls the programmable power supply according to the instruction of the PC upper computer;
the interference flow generation module sends effective Following tracking information according to an instruction of a PC upper computer and an instruction node, and sends the information to the bus communication module;
the time synchronization module is connected with the total communication module, and can send effective Sync synchronization information according to an instruction of the PC upper computer and an instruction node and send the information to the total communication module;
the bus communication module is connected with the DUT, simulates effective load information according to the instruction of the PC upper computer, injects Sync synchronous information and FollowUp trace information received from the interference flow generating module and the time synchronous module into the simulated effective load information, and then sends the effective load information to a port CH-1 of the DUT through an IPV4 bidirectional Ethernet port CH-A.
2. The ethernet switch time stamp synchronized test system of claim 1, wherein: the PC upper computer and the programmable power supply adopt an external 220V three-phase power supply to supply power to the PC upper computer and the programmable power supply.
3. The ethernet switch time stamp synchronized test system of claim 1, wherein: the PC upper computer is connected with the interference flow generation module by adopting a USB data line, and the PC upper computer controls the interference flow generation module to send a FollowUp tracking message.
4. The ethernet switch time stamp synchronized test system of claim 1, wherein: and the PC upper computer is connected with the time synchronization module by adopting a USB data line, and the time synchronization module is controlled by the PC upper computer to send Sync synchronization messages.
5. The ethernet switch time stamp synchronized test system of claim 1, wherein: the PC upper computer is connected with the power control module by an RJ45 data line, and the PC upper computer performs program control on the power mode in the power control module.
6. The ethernet switch time stamp synchronized test system of claim 1, wherein: the power control module is connected with the programmable power supply through a USB data line, and the power control module controls the output voltage of the programmable power supply correspondingly according to a power mode controlled by a PC upper computer program.
7. The ethernet switch time stamp synchronized test system of claim 1, wherein: and the PC upper computer is connected with the total communication module by a DB9 line. The PC upper computer controls the bus communication module to simulate effective load information, the bus control module transmits signal messages on the Ethernet line to the PC upper computer, and the PC upper computer records the messages and analyzes and judges the message data;
the interference flow generation module is connected with the bus communication module by a DB9 line, and transmits a FollowUp tracking message to the bus communication module;
the time synchronization module is connected with the bus communication module by DB9 wires, and transmits Sync synchronization information to the bus communication module.
8. The ethernet switch time stamp synchronized test system of claim 1, wherein: the programmable power supply is connected with the DUT by adopting a matched power line, a standard socket is reserved in the test system, the programmable power supply provides 12V power KL30, IG power KL15 and a grounding end GND for the DUT, and the programmable power supply is provided with three independent adjustable voltage output channels for providing power supply for the DUT, so that the switching of the On-Off control of the KL30 port and the supply states IG On and IG Off of the KL15 port of the DUT can be realized.
9. The ethernet switch time stamp synchronized test system of claim 1, wherein: and the bus communication module is connected with the DUT by adopting an IPV4 standard bidirectional Ethernet connecting wire, so that bidirectional data interaction is realized.
10. The test method for automatically detecting the time stamp synchronization of the Ethernet switch is characterized by comprising the following steps:
A. the interference flow generation module and the time synchronization module send effective Sync synchronization information and FollowUp tracking information through the bus communication module;
B. the bus communication module sends a payload, wherein the size of the payload is 1500 bytes;
C. the bus communication module captures the Ethernet channel synchronous traffic for 350 seconds each time and captures the time stamp thereof;
D. waiting for 60 seconds on the DUT port CH-1, and calculating the protocol time, wherein the protocol time is the protocol time reconstructed by a time stamp field of each step of Sync synchronous message and every two steps of message pairs formed by the Sync synchronous message plus a FollowUp trace message received from the DUT;
E. for each synchronization message, the difference between the entry timestamp captured in step C and the time in step D is calculated, checking if the differences calculated in step E are all within +/-200 ns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310713543.7A CN116743638A (en) | 2023-06-16 | 2023-06-16 | Test method and system for automatically detecting time stamp synchronization of Ethernet switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310713543.7A CN116743638A (en) | 2023-06-16 | 2023-06-16 | Test method and system for automatically detecting time stamp synchronization of Ethernet switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116743638A true CN116743638A (en) | 2023-09-12 |
Family
ID=87905758
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310713543.7A Pending CN116743638A (en) | 2023-06-16 | 2023-06-16 | Test method and system for automatically detecting time stamp synchronization of Ethernet switch |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116743638A (en) |
-
2023
- 2023-06-16 CN CN202310713543.7A patent/CN116743638A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0370929A3 (en) | Kernel testing interface and method for automating diagnostics of microprocessor-based systems | |
| CN111157940B (en) | Flexible DC electronic transformer simulation system | |
| CN104539473A (en) | Whole-group verification method and system for network virtual secondary loop of intelligent substation | |
| CN107819647B (en) | Intelligent substation station control layer network tester | |
| CN108897647B (en) | Test system, test method and device | |
| CN103686813A (en) | Device and method for testing automatic switching stability of wireless AP (access point) channels | |
| CN103558849B (en) | A kind of method of pure electric automobile control strategy debugging and network test | |
| CN109031005B (en) | Distributed relay protection device testing method and relay protection tester | |
| CN108111265A (en) | A kind of unification of communication protocol automated testing method | |
| CN116743638A (en) | Test method and system for automatically detecting time stamp synchronization of Ethernet switch | |
| CN111708661A (en) | Pressure testing system and method suitable for central gateway | |
| CN203405731U (en) | An off-line service life testing system of an electric vehicle controller | |
| CN108200545B (en) | WLAN signaling test system and test method | |
| CN111273156B (en) | Online test system for GaN millimeter wave power amplifier chip | |
| CN110138691B (en) | Switch spanning tree protocol anti-loop stability test method and tool | |
| CN112181726A (en) | System and method for verifying consistency of redundant backup measurement and control and four-unified measurement and control | |
| CN105872164A (en) | Adapter cable, test result writing method, test result writing apparatus, mobile terminal and test system | |
| CN116708257A (en) | CAN network AutoSar network management parameter test method and system | |
| CN105044552A (en) | Fault diagnosis method, system and device for distribution network automation system | |
| CN111586548A (en) | Method and system for realizing coding of multiple automobile sound equipment based on CAN bus | |
| CN116684334A (en) | MVB slave device state protocol test system and test method | |
| CN111323770B (en) | Test positioning system and method thereof | |
| CN117170350B (en) | Service testing method and device, electronic equipment and storage medium | |
| CN212064018U (en) | LoRaWAN gateway module detection device based on raspberry group | |
| CN109283920A (en) | A kind of test device and a kind of test method of DCS system connecting fault |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |