CN116736964A - Self-adaptive control method for power consumption of memory system, electronic equipment and medium - Google Patents
Self-adaptive control method for power consumption of memory system, electronic equipment and medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
- G06F11/3062—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations where the monitored property is the power consumption
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Abstract
The invention relates to the technical field of computers, in particular to a self-adaptive control method, electronic equipment and medium for power consumption of a memory system, wherein the method comprises the following steps of S1, monitoring running state identification of the memory system in real time; step S2, if the idle time is changed into the second mark, recording the idle starting time, and if the idle time reaches a preset first time threshold D 1 Entering a low power consumption state; step S3, when the running state is monitored to be changed into a first identifier, recording idle ending time, and determining idle recording time; step S4, based on D 1 Setting a discrete key sequence; step S5, determining corresponding key values based on intervals corresponding to the idle recording time, adding 1 to the number value corresponding to the corresponding key values, adding 1 to the total idle recording time, and updating D when the total idle recording time is greater than a preset number threshold 1 The process returns to step S1. The invention can adapt to the change of the behavior of the memory system in a self-adaptive way, set accurate adjustment parameters and reduce the power consumption of the memory system.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method for adaptively controlling power consumption of a memory system, an electronic device, and a medium.
Background
The power consumption control of the memory is a key element for determining the power consumption of the system, in the existing memory system, low-power consumption measures such as clock management, power management and the like are generally set, and various low-power consumption modes are defined on a Dynamic Random Access Memory (DRAM). However, the existing memory system power consumption control method relies on a specific assumption of a memory system behavior model, and further sets a fixed adjustment parameter, so that the driving hardware enters a specific low-power consumption mode under the condition that the driving hardware meets the requirement, and the existing memory power consumption control method can improve the power consumption of the memory system to a certain extent, but the memory system has more complex memory access behavior along with the increase of the application complexity of the memory system, so that the existing system memory power consumption control method has at least the following disadvantages: (1) the change of the memory system behavior cannot be timely adapted; (2) the accuracy of setting adjustment parameters is insufficient; (3) poor coupling between the adjustment parameter value and the hardware system. Therefore, how to adaptively adapt to the change of the memory system behavior, set accurate adjustment parameters, and reduce the power consumption of the memory system is a technical problem to be solved.
Disclosure of Invention
The invention aims to provide a self-adaptive control method, electronic equipment and medium for power consumption of a memory system, which can self-adaptively adapt to the change of the behavior of the memory system, set accurate adjustment parameters and reduce the power consumption of the memory system.
According to a first aspect of the present invention, there is provided a method for adaptively controlling power consumption of a memory system, including:
step S1, monitoring running state identifiers corresponding to a memory system in real time, wherein the running state identifiers are first identifiers when unprocessed system requests exist in the memory system, and the running state identifiers are second identifiers when unprocessed system requests do not exist in the memory system;
step S2, if the running state identifier is changed into the second identifier, recording idle starting time, and if the idle time reaches a preset first time threshold D 1 Controlling the memory system to enter a low-power consumption state;
step S3, when the running state is monitored to be changed into a first identifier, recording idle ending time, and determining idle recording time based on the idle starting time and the idle ending time;
step S4, based on D 1 Setting a discrete key sequence (D 2 1 ,D 2 2 ,…,D 2 n ,…,D 2 N ,D 1 ,D 3 1 ,D 3 2 ,…,D 3 m …,D 3 M ) Wherein D is 2 n To be arranged at D 1 The nth bond, D 3 m To be arranged at D 1 The M-th key is then N is in the range of 1 to N, M is in the range of 1 to M, N is arranged in D 1 The total number of previous keys, M being arranged in D 1 The total number of keys after that, the difference between any two adjacent keys in the discrete sequence is U, u= (D) 1 -D 2 1 ) N, M is greater than or equal to N, each key value is correspondingly provided with an interval [ key value-U/2, key value +U/2 ]]A quantity value, the initial value of which is 0;
step S5, determining corresponding key values based on the interval corresponding to the idle recording time, adding 1 to the number value corresponding to the corresponding key value, adding 1 to the total idle recording time, wherein the initial value of the total idle recording time is 0, and updating D based on the key with the highest number value corresponding to the current key value when the total idle recording time is greater than the preset number threshold value 1 Step S1 is executed back.
According to a second aspect of the present invention, there is provided an electronic device comprising: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being arranged to perform the method according to the first aspect of the invention.
According to a third aspect of the present invention there is provided a computer readable storage medium storing computer executable instructions for performing the method of the first aspect of the present invention.
Compared with the prior art, the invention has obvious advantages and beneficial effects. By means of the technical scheme, the self-adaptive control method for the power consumption of the memory system, the electronic equipment and the medium can achieve quite technical progress and practicality, and have wide industrial utilization value, and the self-adaptive control method has at least the following beneficial effects:
according to the invention, the idle record time set is generated by setting the first time threshold, the first time threshold is adaptively adjusted based on the idle record time set, the memory system is controlled to enter a low-power consumption state based on the first time threshold, and the first time threshold can be repeatedly updated, so that the accuracy of the first time threshold is continuously improved, the change of the behavior of the memory system can be adaptively adapted, and the power consumption of the memory system is more reasonably reduced.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a method for adaptively controlling power consumption of a memory system according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.
The embodiment of the invention provides a self-adaptive control method for power consumption of a memory system, as shown in fig. 1, comprising the following steps:
step S1, monitoring running state identifiers corresponding to the memory system in real time, wherein the running state identifiers are first identifiers when unprocessed system requests exist in the memory system, and the running state identifiers are second identifiers when unprocessed system requests do not exist in the memory system.
The memory system refers to a processing system that needs to be based on memory operations, for example, a processing system that needs to process a read instruction and a write instruction. When the memory system receives the system requests, the system requests are processed in the memory system, possibly according to the request sequence of the system requests or not according to the request sequence of the system requests, and the processing is determined according to the specific application requirements. Specifically, an identification bit may be set in the memory system, which is used to identify the running state of the memory system, where the memory system can set a corresponding running state identification according to whether there is an unprocessed system request currently.
Step S2, if the running state identifier is changed into the second identifier, recording idle starting time, and if the idle time reaches a preset first time threshold D 1 And controlling the memory system to enter a low-power consumption state.
Wherein, in the memory system, an initial first time threshold D is set 1 Continuously adjusting the first time threshold D according to the data in the idle record time set 1 So that the first time threshold D 1 Can adapt to the change of system behavior, for the first time threshold D 1 Performing self-adaptive calibration and improving the first time threshold D 1 Accuracy of (3).
And step S3, when the running state is monitored to be changed into the first identifier, recording the idle ending time, and determining the idle recording time based on the idle starting time and the idle ending time.
The running state is changed into a first identifier, which indicates that the memory system receives a new system instruction again to start processing.
Step S4, based on D 1 Setting a discrete key sequence (D 2 1 ,D 2 2 ,…,D 2 n ,…,D 2 N ,D 1 ,D 3 1 ,D 3 2 ,…,D 3 m …,D 3 M ) Wherein D is 2 n To be arranged at D 1 The nth bond, D 3 m To be arranged at D 1 The M-th key is then N is in the range of 1 to N, M is in the range of 1 to M, N is arranged in D 1 The total number of previous keys, M being arranged in D 1 The total number of keys after that, the difference between any two adjacent keys in the discrete sequence is U, u= (D) 1 -D 2 1 ) N, M is greater than or equal to N, each key value is correspondingly provided with an interval [ key value-U/2, key value +U/2 ]]And a quantity value, the initial value of which is 0.
It should be noted that, after the running state identifier is changed to the second identifier, a new system request may be received again in a short time, so that the memory system enters the running state again, which may result in a short idle recording time, and the system needs to consume a certain amount of power when switching from the running state to the low power consumption state, so if the running state is changed to the low power consumption state too short, the new system request may cause an increase in the power consumption of the memory system, and the D needs to be set reasonably 2 1 。
Step S5, determining corresponding key values based on the interval corresponding to the idle recording time, adding 1 to the number value corresponding to the corresponding key value, adding 1 to the total idle recording time, wherein the initial value of the total idle recording time is 0, and updating D based on the key with the highest number value corresponding to the current key value when the total idle recording time is greater than the preset number threshold value 1 Step S1 is executed back.
It will be appreciated that by repeatedly executing steps S1-S5 by constantly returning to step S1, the first time threshold D can be made 1 More accurate and adapted to the behaviour of the hardware system.
It should be noted that, the number of the preset time periods is comprehensively determined based on factors such as a specific application scenario, accuracy to be achieved, and the like. Updating the first time threshold D based on idle recording times in an idle recording time set by setting a reasonable number of time periods 1 The first time threshold D is improved 1 Coupling with hardware system, avoiding improper firstTime threshold D 1 The resulting entry into and exit from low power states is wasteful of power consumption and lost in performance.
In one embodiment, in step S1, the memory system receives one or more system requests, processes the received system requests, when there is at least one unprocessed system request, the running state identifier is set to the first identifier, and if there is no unprocessed system request currently, the running state identifier is set to the second identifier.
The system requests may be discrete or continuous, and when the memory system receives a plurality of system requests, the system requests may be processed according to the request sequence of the system requests, or may not be processed according to the request sequence of the system requests, which depends on the specific application requirements.
As an embodiment, in the step S2, controlling the memory system to enter a low power consumption state includes:
and S21, executing at least one operation of reducing frequency, closing a clock and closing a power supply on the memory system, so that the memory system enters a low-power consumption state.
Wherein the power consumption of the memory system can be reduced by at least one of reducing the frequency, turning off the clock, and turning off the power supply.
In the step S4, how to reasonably set D 2 1 Particularly critical, as a preferred example, D 2 1 =（P 1 +P 2 ）/P 0 Wherein P is 1 Power consumption required to be consumed by the memory system from an operation state to a low power consumption state, P 2 Power consumption required to be consumed by the memory system from a low power consumption state to an operation state, P 0 And the power consumption of the memory system in the running state in unit time is realized. Only more than D is stored in the idle record time set 2 1 When the idle recording time is greater than D 2 1 When the memory system enters the low power mode, the power consumption saved by the memory system is necessarily larger than P 1 +P 2 Then describe the blankIdle recording time is longer than D 2 1 When the memory system enters a low power mode, it is beneficial for saving power consumption.
For different application scenarios, different strategies may be employed to update the first time threshold D 1 The following is described by two examples:
embodiment 1,
As one embodiment, the memory system is set to a long-term standby state, and in step S5, the key with the highest number value corresponding to the current key value is updated D 1 Comprising the following steps:
step S51, setting D 1 =tx, tx belongs to [ D 2 1 ，D max ] ，D max The key with the highest number value corresponding to the current key value.
In step S51, a key with the highest number value corresponding to the current key value is updated to D 1 Comprising the following steps:
step S511, direct setting D 1 And returning to the step S1, wherein the key is equal to the key with the highest number value corresponding to the current key value.
Correspondingly, the step S2 further includes:
step S22, after the memory system enters a low power consumption state, if the memory system receives a new system request, the memory system is controlled to enter an operation state.
It should be noted that, for the case of long-term standby, only the memory system needs to receive a new system request, and then the memory system is controlled to enter the running state, without actively waking up the memory system.
Embodiment II,
The memory system is set to a non-long-term standby state,
in the step S5, the key with the highest number value corresponding to the current key value is updated D 1 Comprising the following steps:
step S501, setting D 1 =ty, ty belongs to [ D 2 1 ，D max ），D max For the key with the highest number value corresponding to the current key value, D max Is arranged to jump out automaticallyTime. And because the memory system is set to a non-long-term standby state, the embodiment performs one-step consideration and obtains D based on data statistics max In many cases the probability is high at D max When a new system request comes, in the prior art, the memory system needs to be woken up again when the new system request comes, and a certain time is required for switching from the low-power-consumption state to the running state, so that a certain delay is caused, and the embodiment further sets the time for automatically waking up the memory system. Specifically, the step S2 further includes:
step S22, after the memory system enters the low power consumption state, if the current D 1 D not being initially set 1 Step S23 is performed, otherwise step S24 is performed.
Step S23, the memory system reaches D in idle time 1 And controlling the memory system to enter a low-power consumption state. If D is reached in idle time max Before the memory system receives a new system request, the memory system is controlled to enter an operating state when the memory system receives the new system request; if the idle time reaches D max And automatically controlling the memory system to enter an operating state.
Step S24, the memory system reaches D in idle time 1 And when the memory system is controlled to enter a low-power-consumption state, if the memory system receives a new system request after the memory system enters the low-power-consumption state, controlling the memory system to enter an operation state.
It will be appreciated that if D is present 1 D not being initially set 1 Then it is explained that the current memory system is at least for D 1 Calibrated once, thus D can be reached in idle time max And automatically controlling the memory system to enter an operating state, so that the next system request can be processed quickly when arriving, and the time delay is reduced. It will be appreciated that if D is reached during idle time max Before the memory system receives a new system request, the memory system is controlled to enter an operating state when the memory system receives the new system request. If the current D 1 Is the initial D 1 Description of the current D 1 Has not been calibrated and there is no corresponding D max And controlling the memory system to enter an operating state only when a new system request is received by the memory system. Thereby, delay and power consumption of the request are considered, and system performance is improved.
It should be noted that some exemplary embodiments are described as a process or a method depicted as a flowchart. Although a flowchart depicts steps as a sequential process, many of the steps may be implemented in parallel, concurrently, or with other steps. Furthermore, the order of the steps may be rearranged. The process may be terminated when its operations are completed, but may have additional steps not included in the figures. The processes may correspond to methods, functions, procedures, subroutines, and the like.
The embodiment of the invention also provides electronic equipment, which comprises: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being configured to perform the methods of embodiments of the present invention.
The embodiment of the invention also provides a computer readable storage medium, which stores computer executable instructions for executing the method according to the embodiment of the invention.
According to the embodiment of the invention, the idle record time set is generated by setting the first time threshold, the first time threshold is adaptively adjusted based on the idle record time set, the memory system is controlled to enter a low-power consumption state based on the first time threshold, the first time threshold can be repeatedly updated, the accuracy of the first time threshold is continuously improved, and therefore, the change of the behavior of the memory system can be adaptively adapted, and the power consumption of the memory system is more reasonably reduced.
The present invention is not limited to the above-mentioned embodiments, but is intended to be limited to the following embodiments, and any modifications, equivalents and modifications can be made to the above-mentioned embodiments without departing from the scope of the invention.
Claims (10)
1. The self-adaptive control method for the power consumption of the memory system is characterized by comprising the following steps of:
step S1, monitoring running state identifiers corresponding to a memory system in real time, wherein the running state identifiers are first identifiers when unprocessed system requests exist in the memory system, and the running state identifiers are second identifiers when unprocessed system requests do not exist in the memory system;
step S2, if the running state identifier is changed into the second identifier, recording idle starting time, and if the idle time reaches a preset first time threshold D 1 Controlling the memory system to enter a low-power consumption state;
step S3, when the running state is monitored to be changed into a first identifier, recording idle ending time, and determining idle recording time based on the idle starting time and the idle ending time;
step S4, based on D 1 Setting a discrete key sequence (D 2 1 ,D 2 2 ,…,D 2 n ,…,D 2 N ,D 1 ,D 3 1 ,D 3 2 ,…,D 3 m …,D 3 M ) Wherein D is 2 n To be arranged at D 1 The nth bond, D 3 m To be arranged at D 1 The M-th key is then N is in the range of 1 to N, M is in the range of 1 to M, N is arranged in D 1 The total number of previous keys, M being arranged in D 1 The total number of keys after that, the difference between any two adjacent keys in the discrete sequence is U, u= (D) 1 -D 2 1 ) N, M is greater than or equal to N, each key value is correspondingly provided with an interval [ key value-U/2, key value+U/2]A quantity value, the initial value of which is 0;
step S5, determining corresponding key values based on the interval corresponding to the idle recording time, adding 1 to the number value corresponding to the corresponding key value, adding 1 to the total idle recording time, wherein the initial value of the total idle recording time is 0, and updating D based on the key with the highest number value corresponding to the current key value when the total idle recording time is greater than the preset number threshold value 1 Step S1 is executed back.
2. The method of claim 1, wherein the step of determining the position of the substrate comprises,
in the step S1, the memory system receives one or more system requests, processes the received system requests, when at least one unprocessed system request exists, the running state identifier is set to the first identifier, and if there is no unprocessed system request currently, the running state identifier is set to the second identifier.
3. The method of claim 1, wherein the step of determining the position of the substrate comprises,
in the step S4: d (D) 2 1 =（P 1 +P 2 ）/P 0 Wherein P is 1 Power consumption required to be consumed by the memory system from an operation state to a low power consumption state, P 2 Power consumption required to be consumed by the memory system from a low power consumption state to an operation state, P 0 And the power consumption of the memory system in the running state in unit time is realized.
4. A method according to claim 1 or 3, characterized in that,
the memory system is set to a long-term standby state, and in step S5, the key with the highest number value corresponding to the current key value is updated based on the key D 1 Comprising the following steps:
step S51, setting D 1 =tx, tx belongs to [ D 2 1 ，D max ] ，D max The key with the highest number value corresponding to the current key value.
5. The method of claim 4, wherein the step of determining the position of the first electrode is performed,
in the step S51, the key with the highest number value corresponding to the current key value is updated D 1 Comprising the following steps:
step S511, direct setting D 1 And returning to the step S1, wherein the key is equal to the key with the highest number value corresponding to the current key value.
6. The method of claim 5, wherein the step of determining the position of the probe is performed,
the step S2 further includes:
step S22, after the memory system enters a low power consumption state, if the memory system receives a new system request, the memory system is controlled to enter an operation state.
7. A method according to claim 1 or 3, characterized in that,
the memory system is set to a non-long-term standby state, and in step S5, the key with the highest number value corresponding to the current key value is updated based on the key D 1 Comprising the following steps:
step S501, setting D 1 =ty, ty belongs to [ D 2 1 ，D max ），D max For the key with the highest number value corresponding to the current key value, D max Set as the auto-jump time.
8. The method of claim 7, wherein the step of determining the position of the probe is performed,
the step S2 further includes:
step S22, after the memory system enters the low power consumption state, if the current D 1 D not being initially set 1 Step S23 is executed, otherwise step S24 is executed:
step S23, the memory system reaches D in idle time 1 When the memory system is in a low-power consumption state, the memory system is controlled; if D is reached in idle time max Before, the memory system receives a new system request, thenWhen the memory system receives a new system request, controlling the memory system to enter an operating state; if the idle time reaches D max Automatically controlling the memory system to enter an operating state;
step S24, the memory system reaches D in idle time 1 And when the memory system is controlled to enter a low-power-consumption state, if the memory system receives a new system request after the memory system enters the low-power-consumption state, controlling the memory system to enter an operation state.
9. An electronic device, comprising:
at least one processor;
and a memory communicatively coupled to the at least one processor;
wherein the memory stores instructions executable by the at least one processor, the instructions being arranged to perform the method of any of the preceding claims 1-8.
10. A computer readable storage medium, characterized in that computer executable instructions are stored for performing the method of any of the preceding claims 1-8.
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