CN116736065A - Power semiconductor on-resistance testing device - Google Patents
Power semiconductor on-resistance testing device Download PDFInfo
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- CN116736065A CN116736065A CN202310750115.1A CN202310750115A CN116736065A CN 116736065 A CN116736065 A CN 116736065A CN 202310750115 A CN202310750115 A CN 202310750115A CN 116736065 A CN116736065 A CN 116736065A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 84
- 238000012360 testing method Methods 0.000 title claims abstract description 74
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 18
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 18
- 230000005669 field effect Effects 0.000 claims description 13
- 238000000034 method Methods 0.000 description 10
- 238000005259 measurement Methods 0.000 description 5
- 239000000523 sample Substances 0.000 description 5
- 230000015556 catabolic process Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000003491 array Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
- G01R15/144—Measuring arrangements for voltage not covered by other subgroups of G01R15/14
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
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- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention provides a power semiconductor on-resistance testing device, which comprises a main circuit and a testing circuit, wherein the main circuit comprises: a first power supply; the driving unit is connected with the power semiconductor to be tested; one end of the follow current unit is connected with the positive electrode of the first power supply; one end of the first inductor is connected with the other end of the follow current unit, and the other end of the first inductor is connected with a first pole of the power semiconductor to be tested; the two ends of the second inductor are respectively and correspondingly connected with the two ends of the follow current unit; and one end of the third inductor is connected with the second pole of the power semiconductor to be tested, the other end of the third inductor is connected with the cathode of the first power supply, and the test circuit comprises: one end of the first resistor is connected with a first pole of the power semiconductor to be tested; the anode of the Zener diode is connected with the other end of the third inductor, and the cathode of the Zener diode is connected with the other end of the first resistor; and the input end of the operation unit is connected with the cathode of the zener diode, and the output end of the operation unit is connected to the oscilloscope. The invention can reduce the cost, improve the safety, is convenient for debugging and has higher test precision.
Description
Technical Field
The invention relates to the technical field of power device electrical performance test, in particular to a power semiconductor on-resistance test device.
Background
Under the conditions of continuous expansion of the application field of electronic products and continuous development of the technology of power semiconductor devices, the technology of testing the power semiconductor devices is also continuously promoted. The power semiconductor device testing technique refers to a technique for performing performance measurement and quality inspection on power semiconductor devices, and aims to ensure that the devices work normally and meet performance specifications. Although testing techniques continue to evolve, there are still some problems, including:
the test presents a safety risk: due to the high voltage and high current characteristics of the power semiconductor device, certain safety risks and use restrictions of test equipment exist during the test.
The test accuracy is not enough: the accuracy of signal sources and measuring instruments used in the traditional power semiconductor testing technology limits the improvement of testing accuracy, when the power device is turned on and off under the high-voltage condition, the voltage span is overlarge, the testing equipment needs a larger measuring range for capturing the on voltage, distortion is easy to cause, and the testing difficulty is high.
Search of the existing literature found that:
patent literature (publication number: CN 115060953A) discloses a voltage clamping circuit for dynamic on-resistance test of a power device, wherein the dynamic on-resistance of the power device to be tested is measured by a double-pulse hard switch test method, on-current is measured by a coaxial resistance current sensor, on-voltage is measured by a voltage clamping circuit with quick response, off-voltage in the switching voltage of the power device to be tested is fixed at a specified voltage value by the voltage clamping circuit, and the dynamic on-resistance is obtained by the ratio of the on-voltage to the on-current. However, the test circuit in the patent is directly electrically connected with the main circuit, and disturbance in the circuit may affect the test result, so that the accuracy of the test result is low.
The patent literature (publication number: CN 111337807A) provides a high-frequency high-voltage dynamic on-resistance test circuit of a switching device, which can realize high-voltage effective clamping, and effectively improve oscillation by introducing a measuring branch with zero-voltage and zero-current switches. However, the circuit used in the patent is complex, and the testing steps are more, so that the debugging is not facilitated.
Disclosure of Invention
The invention aims to solve the technical problems, and provides a power semiconductor on-resistance testing device which can reduce cost, improve safety, is convenient to debug and has higher testing precision.
The technical scheme adopted by the invention is as follows:
a power semiconductor on-resistance testing device, comprising a main circuit and a testing circuit, wherein the main circuit comprises: a first power supply; the driving unit is connected with the control electrode of the power semiconductor to be tested; one end of the follow current unit is connected with the positive electrode of the first power supply; one end of the first inductor is connected with the other end of the follow current unit, and the other end of the first inductor is connected with the first pole of the power semiconductor to be tested; the two ends of the second inductor are correspondingly connected with the two ends of the follow current unit respectively; one end of the third inductor is connected with the second pole of the power semiconductor to be tested, the other end of the third inductor is connected with the negative pole of the first power supply, and the test circuit comprises: one end of the first resistor is connected with the first pole of the power semiconductor to be tested; the anode of the zener diode is connected with the other end of the third inductor, and the cathode of the zener diode is connected with the other end of the first resistor; and the input end of the operation unit is connected with the cathode of the zener diode, and the output end of the operation unit is connected to the oscilloscope.
In addition, the power semiconductor on-resistance testing device provided by the invention can also have the following additional technical characteristics:
according to one embodiment of the invention, the driving unit comprises: the negative electrode of the second power supply is connected with the negative electrode of the first power supply; and one end of the second resistor is connected with the positive electrode of the second power supply, and the other end of the second resistor is connected with the control electrode of the power semiconductor to be tested.
According to one embodiment of the invention, the first power supply is a direct current voltage source, and the second power supply is a PWL folding line power supply.
According to one embodiment of the invention, the freewheel unit comprises a MOSFET with a gate-source short circuit, wherein the drain electrode of the MOSFET is used as one end of the freewheel unit, and the gate electrode and the source short circuit of the MOSFET are used as the other end of the freewheel unit.
According to an embodiment of the present invention, the operation unit includes an in-phase proportional operation circuit with a voltage division circuit, the in-phase proportional operation circuit with a voltage division circuit including: the output end of the first operational amplifier is used as the output end of the operation unit; one end of the third resistor is connected with the output end of the first operational amplifier, and the other end of the third resistor is connected with the inverting input end of the first operational amplifier; one end of the fourth resistor is used as an input end of the operation unit, and the other end of the fourth resistor is connected with the non-inverting input end of the first operation amplifier; one end of the fifth resistor is connected with the other end of the third resistor, and the other end of the fifth resistor is grounded; and one end of the sixth resistor is connected with the non-inverting input end of the first operational amplifier, and the other end of the sixth resistor is grounded. The in-phase proportion operation circuit with the voltage division circuit can further reduce the voltage signal according to proportion, and the output signal can be directly connected to the FNC of the oscilloscope, so that the use of an oscilloscope probe is avoided, the testing precision can be further improved, and the use cost is saved.
According to one embodiment of the invention, the arithmetic unit comprises a voltage follower comprising: the output end of the second operational amplifier is used as the output end of the operation unit; a seventh resistor, one end of which is used as an input end of the operation unit, and the other end of which is connected with the non-inverting input end of the second operational amplifier; and one end of the eighth resistor is connected with the output end of the second operational amplifier, and the other end of the eighth resistor is connected with the inverting input end of the second operational amplifier. The influence of disturbance in the circuit on a test result can be effectively reduced through the isolation of the voltage follower, and the test accuracy is improved.
According to one embodiment of the invention, the zener diode to first resistor voltage sharing ratio is less than 1:X, wherein X is greater than 1.
According to an embodiment of the present invention, the third resistor and the sixth resistor have the same resistance, and the fourth resistor and the fifth resistor have the same resistance.
According to an embodiment of the present invention, the seventh resistor and the eighth resistor have equal resistance values.
According to one embodiment of the present invention, the power semiconductor to be tested is a silicon carbide field effect transistor, a gate of the silicon carbide field effect transistor is the control electrode, a drain of the silicon carbide field effect transistor is the first electrode, and a source of the silicon carbide field effect transistor is the second electrode.
The invention has the beneficial effects that:
according to the power semiconductor on-resistance testing device provided by the invention, the on-resistance of the power semiconductor to be tested can be obtained through testing by arranging the main circuit and the testing circuit which are relatively independent, the circuit structure is simple, the safety is high, and the cost is saved; the voltage division ratio of the Zener diode and the first resistor can be timely adjusted according to the conducting voltage of the power semiconductor to be tested, so that the voltage division ratio is convenient to debug, and the testing precision is high.
Drawings
FIG. 1 is a schematic block diagram of a power semiconductor on-resistance testing device according to an embodiment of the invention;
FIG. 2 is a schematic circuit diagram of an arithmetic unit according to an embodiment of the present invention including an in-phase proportional arithmetic circuit with a voltage divider circuit;
FIG. 3 is a schematic circuit diagram of an arithmetic unit including a voltage follower according to an embodiment of the present invention;
FIG. 4 is a waveform of the switch voltage and the input/output voltage of the in-phase proportional operation circuit with voltage dividing circuit according to an embodiment of the present invention;
fig. 5 is a waveform of input and output voltages of a switching voltage and voltage follower according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
As shown in fig. 1, the power semiconductor on-resistance testing device according to the embodiment of the invention includes a main circuit 10 and a testing circuit 20, wherein the main circuit 10 includes: the power supply comprises a first power supply V1, a driving unit 11, a follow current unit 12, a first inductor L1, a second inductor L2 and a third inductor L3, wherein the driving unit 11 is connected with a control electrode of a power semiconductor DUT to be tested; one end of the freewheel unit 12 is connected to the positive electrode of the first power supply V1; one end of a first inductor L1 is connected with the other end of the follow current unit 12, and the other end of the first inductor L1 is connected with a first pole of the power semiconductor DUT to be tested; two ends of the second inductor L2 are correspondingly connected with two ends of the follow current unit 12 respectively; one end of the third inductor L3 is connected with a second pole of the power semiconductor DUT to be tested, and the other end of the third inductor L3 is connected with the negative pole of the first power supply V1; the test circuit 20 includes: the power semiconductor DUT comprises a first resistor R1, a zener diode D1 and an operation unit 21, wherein one end of the first resistor R1 is connected with a first pole of the power semiconductor DUT to be tested; the anode of the zener diode D1 is connected with the other end of the third inductor L3, and the cathode of the zener diode D1 is connected with the other end of the first resistor R1; an input end of the operation unit 21 is connected with a cathode of the zener diode D1, and an output end of the operation unit 21 is connected to an oscilloscope.
As shown in fig. 1, the main circuit 10 and the test circuit 20 of the power semiconductor on-resistance test device according to the embodiment of the invention are relatively independent, and the disturbance in the test circuit 20 does not affect the voltage of the power semiconductor DUT to be tested in the main circuit 10, so that the test accuracy is high.
In one embodiment of the present invention, the first power source V1 may be a dc voltage source.
In one embodiment of the present invention, as shown in fig. 2 and 3, the driving unit 12 may include: a second power supply V2 and a second resistor R2. Wherein the negative electrode of the second power supply V2 is connected with the negative electrode of the first power supply V1; one end of the second resistor R2 is connected with the positive electrode of the second power supply V2, and the other end of the second resistor R2 is connected with the control electrode of the power semiconductor to be tested. The second power source V2 may be a PWL power source with a broken line, and the second resistor 22 needs to have a suitable resistance value according to actual requirements.
In one embodiment of the present invention, as shown in fig. 2 and 3, the freewheel unit 11 may include a MOSFET with a gate-source shorted, a drain of the MOSFET is used as one end of the freewheel unit 11, a gate and a source of the MOSFET are shorted as the other end of the freewheel unit 11, and an internal several-sound diode of the MOSFET after the gate-source is shorted may be used as the freewheel diode. Preferably, a silicon carbide field effect transistor of model C3M0075120D may be used as the MOSFET of the freewheel unit 11. In addition, the freewheel unit 11 may use another freewheel diode having a high dc reverse withstand voltage instead of the MOSFET.
In one embodiment of the present invention, the power semiconductor DUT to be tested may be a silicon carbide field effect transistor, preferably model C3M0075120D, with the gate of the silicon carbide field effect transistor being the control electrode, the drain of the silicon carbide field effect transistor being the first electrode, and the source of the silicon carbide field effect transistor being the second electrode. In addition, the power semiconductor DUT to be tested can be the dynamic on-resistance of other high-frequency power devices.
In one embodiment of the present invention, as shown in fig. 2, the operation unit 21 may include an in-phase ratio operation circuit with a voltage division circuit, the in-phase ratio operation circuit with a voltage division circuit including: the first operational amplifier U1, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the third power supply V3. Wherein the output end of the first operational amplifier U1 can be used as the output end of the operation unit 21; one end of the third resistor R3 is connected with the output end of the first operational amplifier U1, and the other end of the third resistor R3 is connected with the inverting input end of the first operational amplifier U1; one end of the fourth resistor R4 can be used as an input end of the operation unit, and the other end of the fourth resistor R4 is connected with the non-inverting input end of the first operational amplifier U1; one end of the fifth resistor R5 is connected with the other end of the third resistor R3, and the other end of the fifth resistor R5 is grounded; one end of the sixth resistor R6 is connected with the non-inverting input end of the first operational amplifier U1, and the other end of the sixth resistor R6 is grounded; the positive electrode of the third power supply V3 is connected with the positive electrode end of the power supply of the first operational amplifier U1, and the negative electrode of the third power supply V3 is grounded. Wherein the bandwidth of the first operational amplifier U1 is at least 10 times of the switching frequency. In the figure, ui is the voltage measured at the input terminal of the operation unit 21, U0 is the voltage measured at the output terminal of the operation unit 21, and UD2 is the gate-source voltage of the power semiconductor DUT to be tested.
When the in-phase proportional operation circuit with the voltage dividing circuit is selected, the input end of the in-phase proportional operation circuit is connected with the cathode of the zener diode D1, the output end of the in-phase proportional operation circuit is directly connected with the FNC of the oscilloscope, an oscilloscope probe is not required, the probe can be indirectly protected, and the cost is saved. At this time, the voltage Ui (i.e. the on voltage of the power semiconductor to be tested) measured at the input terminal of the operation unit 21 is the voltage from the cathode to the anode of the zener diode D1.
In an embodiment of the present invention, the voltage relationship between the output end and the input end in the in-phase proportional operation circuit with the voltage dividing circuit may be u0= (R3/R5) ×ui=0.2ui, and for realizing the proportional relationship, the resistance values of the third resistor R3 and the sixth resistor R6 in the same-direction input end need to be set to be equal, and the resistance values of the fourth resistor R4 and the fifth resistor R5 are set to be equal.
In one embodiment of the invention, the first operational amplifier U1 in the in-phase proportional operation circuit with the voltage dividing circuit can be AD8038, and the operational amplifier of the model has the characteristics of low power consumption, low cost and the like and can work with extremely low quiescent current and low noise.
In another embodiment of the present invention, as shown in fig. 3, the operation unit 21 includes a voltage follower, and the voltage follower may include a second operational amplifier U2, a seventh resistor R7, an eighth resistor R8, and a fourth power supply V4. Wherein the output end of the second operational amplifier U2 can be used as the output end of the operation unit 21; one end of the seventh resistor R7 can be used as an input end of the operation unit, and the other end of the seventh resistor R7 is connected with the non-inverting input end of the second operational amplifier U2; one end of the eighth resistor R8 is connected with the output end of the second operational amplifier U2, and the other end of the eighth resistor R8 is connected with the inverting input end of the second operational amplifier U2; the positive pole of the fourth power supply V4 is connected with the positive pole of the power supply of the second operational amplifier U2, and the negative pole of the fourth power supply V4 is grounded. In the figure, ui is the voltage measured at the input terminal of the operation unit 21, U0 is the voltage measured at the output terminal of the operation unit 21, and UD2 is the gate-source voltage of the power semiconductor DUT to be tested.
When the voltage follower is selected, the input end of the voltage follower is connected to the cathode of the zener diode D1, and the output end is connected to the oscilloscope probe, so that the main circuit 10 is isolated from the power semiconductor DUT to be tested, and the influence of disturbance in the circuit on the test result can be reduced. At this time, the voltage Ui (i.e. the on voltage of the power semiconductor to be tested) measured at the input terminal of the operation unit 21 is the voltage from the cathode to the anode of the zener diode D1.
In an embodiment of the present invention, the voltage relationship between the output terminal and the input terminal in the voltage follower may be ui=u0, and the seventh resistor R7 and the eighth resistor R8 need to be set to have equal resistance values for achieving the proportional relationship.
In one embodiment of the present invention, the second operational amplifier U2 in the voltage follower may be AD8038, and the operational amplifier of this type has the characteristics of low power consumption, low cost, etc., and can operate with extremely low quiescent current and low noise.
In one embodiment of the present invention, the selection of the zener diode D1 and the first resistor R1 needs to be selected according to the turn-on voltage of the power semiconductor DUT to be tested, and accurate measurement needs to be achieved by adjusting a suitable voltage-sharing ratio. The voltage equalizing ratio of the zener diode D1 to the first resistor R1 should be less than 1:x, where x is greater than 1. Therefore, in the on-resistance test of the power semiconductor DUT to be tested, the highest voltage from the cathode to the anode of the zener diode D1 is 1/(X+1) of the drain-source voltage when the power semiconductor DUT to be tested is turned off, so that the voltage of the two ends of the zener diode D1 is smaller than the reverse breakdown voltage of the zener diode D1, and the on-voltage of the power semiconductor DUT to be tested can be obtained more accurately.
In one embodiment of the present invention, the turn-on voltage of the power semiconductor DUT to be tested is about 1.4V, the zener diode D1 is preferably BZX84B10VLY model, the reverse breakdown voltage is about 10V, and the voltage equalizing ratio of the zener diode D1 to the first resistor R1 is about 1:49, the voltage across the zener diode D1 during testing is prevented from being greater than the reverse breakdown voltage of the zener diode D1.
In one embodiment of the present invention, the oscilloscope in test circuit 20 has an AD sample of 8 bits (256), and the power semiconductor DUT being tested is a silicon carbide MOSFET with a drain-source voltage that is typically high when turned off and a drain-source voltage that is low when turned on. Assuming that the drain-source voltage of the silicon carbide MOSFET is 500V when the silicon carbide MOSFET is turned off and the drain-source voltage is about 1V when the silicon carbide MOSFET is turned on, if the Zener diode D1 and the first resistor R1 are not connected into the test circuit 20, the conventional oscilloscope is directly used for measuring the on-resistance of the silicon carbide MOSFET, the AD sampling precision of the oscilloscope is about (500-1)/256=1.95, and the measuring error is very large; if the zener diode D1 and the first resistor R1 are connected to the test circuit 20, when the DUT is turned off, the voltage of the 500V drain-source voltage connected to the oscilloscope can be controlled to be about 10V through the zener diode D1, the sampling accuracy of the oscilloscope AD is about (10-1)/256=0.035, the measurement accuracy is greatly improved, the switching of the scope of the oscilloscope to meet the requirement of the test accuracy is avoided, and a certain margin is reserved for accurate measurement under the condition of high voltage or high current.
The following describes the operation principle of the power semiconductor on-resistance testing device according to the present invention for conducting on-resistance testing of a power semiconductor DUT to be tested in combination with a specific embodiment of the present invention.
In one embodiment of the present invention, the operation unit 21 includes an in-phase proportional operation circuit with a voltage dividing circuit. When the on-resistance test is performed by using the in-phase proportional operation circuit with the voltage dividing circuit, the waveforms of the input and output voltages of the operation unit are shown in fig. 4. The power semiconductor DUT to be tested is in an off state before testing, when no current passes through the main circuit 10, the zener diode D1 breaks down and the two-terminal voltage clamps. During testing, at time t0, the driving unit 12 applies a first pulse, when the first trigger pulse reaches the gate of the power semiconductor DUT to be tested, the gate-source voltage of the power semiconductor DUT to be tested increases until the power semiconductor DUT to be tested is turned on, and the second inductor L2 starts to charge. At time t1, namely when the first trigger pulse is ended, the gate-source voltage of the power semiconductor DUT to be tested is reduced to enable the power semiconductor DUT to be turned off, and at the moment, the current on the second inductor L2 completes freewheeling through the parasitic body diode of the MOSFET. At time t2, the driving unit 12 applies a second pulse, the DUT is turned on again, the current of the second inductor L2 is commutated to the DUT again, at this time, since the DUT turn-on voltage is low, the reverse breakdown voltage of the zener diode D1 is not enough, the equivalent resistance of the zener diode D1 in reverse blocking is far greater than the first resistor R1 connected in series therewith, the DUT turn-on voltage is almost all applied across the zener diode D1, and the voltages across the two ends thereof are output to the oscilloscope through the operation unit 21. At time t3, the power semiconductor DUT to be tested is turned off again, and the current on the third inductor L3 is the on current of the power semiconductor DUT to be tested. Therefore, the measurement of the on-voltage and on-current of the power semiconductor DUT to be tested can be completed in the second pulse triggering stage (the stages t 2-t 3).
It should be noted that, when the anode of the zener diode D1 is connected to the third inductor L3 and the cathode is connected to the drain of the power semiconductor DUT to be tested through the first resistor R1, and the input terminal of the operation unit 21 is connected to the cathode of the zener diode D1, the detected voltages from the cathode to the anode of the zener diode D1 can be considered to be equal to the turn-on voltage of the power semiconductor DUT to be tested.
Therefore, the on-resistance of the power semiconductor DUT to be tested can be calculated from the current value of the third inductor L3 and the input terminal voltage of the operation unit 21 measured when the power semiconductor DUT to be tested is turned on.
When the voltage follower is used to perform on-resistance test on the power semiconductor DUT to be tested, the input/output voltage waveform of the operation unit 21 is shown in fig. 5, and the specific operation principle is the same as above.
According to the power semiconductor on-resistance testing device provided by the invention, the on-resistance of the power semiconductor to be tested can be obtained through testing by arranging the main circuit and the testing circuit which are relatively independent, the circuit structure is simple, the safety is high, and the cost is saved; the voltage division ratio of the Zener diode and the first resistor can be timely adjusted according to the conducting voltage of the power semiconductor to be tested, so that the voltage division ratio is convenient to debug, and the testing precision is high.
In the description of the present invention, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. The meaning of "a plurality of" is two or more, unless specifically defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily for the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and further implementations are included within the scope of the preferred embodiment of the present invention in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present invention.
Logic and/or steps represented in the flowcharts or otherwise described herein, e.g., a ordered listing of executable instructions for implementing logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium may even be paper or other suitable medium upon which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It is to be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as is well known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
Those of ordinary skill in the art will appreciate that all or part of the steps carried out in the method of the above-described embodiments may be implemented by a program to instruct related hardware, and the program may be stored in a computer readable storage medium, where the program when executed includes one or a combination of the steps of the method embodiments.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing module, or each unit may exist alone physically, or two or more units may be integrated in one module. The integrated modules may be implemented in hardware or in software functional modules. The integrated modules may also be stored in a computer readable storage medium if implemented as software functional modules and sold or used as a stand-alone product.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (10)
1. A power semiconductor on-resistance testing device is characterized by comprising a main circuit and a testing circuit, wherein,
the main circuit includes:
a first power supply;
the driving unit is connected with the control electrode of the power semiconductor to be tested;
one end of the follow current unit is connected with the positive electrode of the first power supply;
one end of the first inductor is connected with the other end of the follow current unit, and the other end of the first inductor is connected with the first pole of the power semiconductor to be tested;
the two ends of the second inductor are correspondingly connected with the two ends of the follow current unit respectively;
one end of the third inductor is connected with the second pole of the power semiconductor to be tested, the other end of the third inductor is connected with the negative pole of the first power supply,
the test circuit includes:
one end of the first resistor is connected with the first pole of the power semiconductor to be tested;
the anode of the zener diode is connected with the other end of the third inductor, and the cathode of the zener diode is connected with the other end of the first resistor;
and the input end of the operation unit is connected with the cathode of the zener diode, and the output end of the operation unit is connected to the oscilloscope.
2. The power semiconductor on-resistance testing device according to claim 1, wherein the driving unit includes:
the negative electrode of the second power supply is connected with the negative electrode of the first power supply;
and one end of the second resistor is connected with the positive electrode of the second power supply, and the other end of the second resistor is connected with the control electrode of the power semiconductor to be tested.
3. The power semiconductor on-resistance testing device of claim 2, wherein the first power source is a dc voltage source and the second power source is a PWL foldback power source.
4. The power semiconductor on-resistance testing device according to claim 1, wherein the freewheel unit includes a MOSFET with a gate-source short circuit, a drain of the MOSFET being one end of the freewheel unit, and a gate and a source short circuit of the MOSFET being the other end of the freewheel unit.
5. The power semiconductor on-resistance test apparatus according to claim 1, wherein the operation unit includes an in-phase proportional operation circuit with a voltage division circuit, the in-phase proportional operation circuit with a voltage division circuit including:
the output end of the first operational amplifier is used as the output end of the operation unit;
one end of the third resistor is connected with the output end of the first operational amplifier, and the other end of the third resistor is connected with the inverting input end of the first operational amplifier;
one end of the fourth resistor is used as an input end of the operation unit, and the other end of the fourth resistor is connected with the non-inverting input end of the first operation amplifier;
one end of the fifth resistor is connected with the other end of the third resistor, and the other end of the fifth resistor is grounded;
and one end of the sixth resistor is connected with the non-inverting input end of the first operational amplifier, and the other end of the sixth resistor is grounded.
6. The power semiconductor on-resistance testing device according to claim 1, wherein the operation unit includes a voltage follower including:
the output end of the second operational amplifier is used as the output end of the operation unit;
a seventh resistor, one end of which is used as an input end of the operation unit, and the other end of which is connected with the non-inverting input end of the second operational amplifier;
and one end of the eighth resistor is connected with the output end of the second operational amplifier, and the other end of the eighth resistor is connected with the inverting input end of the second operational amplifier.
7. The power semiconductor on-resistance testing device of claim 1, wherein a voltage sharing ratio of the zener diode to the first resistor is 1:X, wherein X is greater than 1.
8. The power semiconductor on-resistance testing device according to claim 5, wherein the third resistor and the sixth resistor have the same resistance, and the fourth resistor and the fifth resistor have the same resistance.
9. The power semiconductor on-resistance testing device according to claim 6, wherein the seventh resistance is equal to the eighth resistance in resistance.
10. The power semiconductor on-resistance testing apparatus according to any one of claims 1 to 9, wherein the power semiconductor to be tested is a silicon carbide field effect transistor, a gate of the silicon carbide field effect transistor is the control electrode, a drain of the silicon carbide field effect transistor is the first electrode, and a source of the silicon carbide field effect transistor is the second electrode.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310750115.1A CN116736065A (en) | 2023-06-25 | 2023-06-25 | Power semiconductor on-resistance testing device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310750115.1A CN116736065A (en) | 2023-06-25 | 2023-06-25 | Power semiconductor on-resistance testing device |
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| CN202310750115.1A Pending CN116736065A (en) | 2023-06-25 | 2023-06-25 | Power semiconductor on-resistance testing device |
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