CN116719380A - Voltage tracking system with long-acting retention characteristic and voltage tracking method - Google Patents

Voltage tracking system with long-acting retention characteristic and voltage tracking method Download PDF

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Publication number
CN116719380A
CN116719380A CN202310873172.9A CN202310873172A CN116719380A CN 116719380 A CN116719380 A CN 116719380A CN 202310873172 A CN202310873172 A CN 202310873172A CN 116719380 A CN116719380 A CN 116719380A
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China
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voltage
signal
potentiometer
node
coupled
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江涛
刘海
洪少林
孙乔
金战华
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Uni Trend Technology China Co Ltd
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Uni Trend Technology China Co Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561Voltage to current converters

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Electronic Switches (AREA)

Abstract

The application belongs to the technical field of electronic circuits, and particularly relates to a voltage tracking system with long-acting retention characteristic and a voltage tracking method, comprising the following steps: the holding output module comprises a constant current source, a potentiometer and an output driving circuit which are electrically connected in sequence, wherein the constant current source outputs constant current to the potentiometer, the potentiometer generates holding voltage according to the constant current, and the output driving circuit outputs the holding voltage; the comparison module is used for comparing the amplitude between the holding voltage and the voltage to be tracked and outputting a logic signal; the control module is used for generating a controllable resistance network direction signal according to the logic signal and the manual reset signal, wherein the controllable resistance network direction signal comprises an upward tracking signal and a downward tracking signal; the potentiometer is configured to adjust its resistance according to the up tracking signal or the down tracking signal. The voltage tracking system can realize automatic adjustment of the holding voltage, and ensures that the output voltage output by the system is not easy to decline and unstable along with time.

Description

Voltage tracking system with long-acting retention characteristic and voltage tracking method
Technical Field
The application relates to the technical field of electronic circuits, in particular to a voltage tracking system with long-acting retention characteristic and a voltage tracking method.
Background
In the related art, when the system needs to keep outputting, the output voltage output by the system is easy to fade continuously along with time, so that the output cannot be kept, and the normal use of the system is affected.
It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not form the prior art that is already known to those of ordinary skill in the art.
Content of the application
In view of at least one of the above technical problems, the application provides a voltage tracking system and a voltage tracking method with long-acting maintaining characteristics, which solve the problems that when the system needs to maintain output, the output voltage output by the system is easy to fade continuously along with time and cannot maintain output and influence the normal use of the system.
In a first aspect of an embodiment of the present application, there is provided a voltage tracking system having a long-lasting hold characteristic, comprising:
the holding output module comprises a constant current source, a potentiometer and an output driving circuit which are electrically connected in sequence, wherein the constant current source outputs constant current to the potentiometer, the potentiometer generates holding voltage according to the constant current, the output driving circuit outputs the holding voltage, and the potentiometer is configured to be variable in resistance;
the comparison module is used for comparing the amplitude between the holding voltage and the voltage to be tracked and outputting a logic signal, and the voltage to be tracked is configured as an external sampling input;
the control module is used for generating a controllable resistance network direction signal according to the logic signal and the manual reset signal, wherein the controllable resistance network direction signal comprises an upward tracking signal and a downward tracking signal;
the potentiometer is configured to adjust the self resistance according to the upward tracking signal or the downward tracking signal so that the holding voltage gradually keeps consistent with the voltage to be tracked.
The application has the following technical effects: the voltage tracking system circuit is simple and reliable in structure and simple to operate, and can automatically adjust the holding voltage, so that the holding voltage can be consistent with the voltage to be tracked, and further, the output voltage output by the system is not easy to fade along with time and is unstable.
In some possible implementations, the potentiometer is configured to gradually increase the resistance value to increase the holding voltage according to the up tracking signal.
In some possible implementations, the potentiometer is configured to gradually decrease the resistance value to decrease the holding voltage according to the downward tracking signal.
In some possible implementations, the output driving circuit includes a first buffer amplifier, a low-pass filter, and a second buffer amplifier connected in sequence, the first buffer amplifier being electrically connected to the potentiometer, the second buffer amplifier being electrically connected to the comparison module, the second buffer amplifier being configured to output the holding voltage.
In some possible implementations, the voltage tracking system further includes a clock module configured to obtain the enable signal output by the control module, the clock module further configured to output a clock signal based on the enable signal, the clock signal for providing a tracking beat for the potentiometer.
In some possible implementations, the control module includes a D flip-flop, a two-input and gate, a first not gate, a second not gate, a first buffer, a second buffer, a first node, a second node, and a third node, an input of the first not gate is coupled to the comparison module, an output of the first not gate is coupled to the first node, an input of the second buffer is coupled to the first node, an output of the second buffer is coupled to the potentiometer, a first end of the D flip-flop is coupled to the first node, a second end of the D flip-flop is coupled to the second node, a third end of the D flip-flop is coupled to the third node, an input of the second not gate is coupled to the third node, an output of the second not gate is coupled to the clock module, an input of the first buffer is coupled to the manual input, an output of the first buffer is coupled to the second node, a first end of the two-input and gate is coupled to the second node, a second end of the two-input and gate is coupled to the third node, and a third input of the second and gate is used to lock the signal.
In some possible implementations, the clock module includes a two-input nand gate, a first resistor, a first capacitor, a fourth node and a fifth node, a first end of the two-input nand gate is coupled to the second nand gate, a second end of the two-input nand gate is coupled to the fourth node, a third end of the two-input nand gate is coupled to the fifth node, and two ends of the first resistor are respectively coupled to the fourth node and the fifth node; one end of the first capacitor is coupled with the fourth node, the other end of the first capacitor is grounded, and the fifth node is used for outputting a clock signal.
The second aspect of the embodiment of the application provides a voltage tracking method, which comprises a holding output module and a comparison module, wherein the holding output module comprises a constant current source, a potentiometer and an output driving circuit which are electrically connected in sequence, the constant current source outputs constant current to the potentiometer, the potentiometer generates holding voltage according to the constant current, the output driving circuit outputs the holding voltage, the potentiometer is configured to have variable resistance, and the comparison module is configured to compare the amplitude between the holding voltage and the voltage to be tracked and output a logic signal;
the method further comprises the steps of:
generating a controllable resistance network direction signal according to the logic signal and the manual reset signal, wherein the controllable resistance network direction signal comprises an upward tracking signal and a downward tracking signal;
the potentiometer is configured to adjust the self resistance according to the upward tracking signal or the downward tracking signal so that the holding voltage gradually keeps consistent with the voltage to be tracked.
In some possible implementations, the potentiometer is configured to gradually increase the resistance value to increase the holding voltage according to the up tracking signal.
In some possible implementations, the potentiometer is configured to gradually decrease the resistance value to decrease the holding voltage according to the downward tracking signal.
The application will be further described with reference to the drawings and examples.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following description will briefly explain the embodiments or the drawings needed in the prior art, and it is obvious that the drawings in the following description are only some embodiments of the present application and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a voltage tracking system according to an embodiment of the present application;
FIG. 2 is a schematic circuit diagram of a control module according to an embodiment of the present application;
FIG. 3 is a schematic circuit diagram of a clock module according to an embodiment of the present application;
FIG. 4 is a diagram illustrating a state transition of a control module according to an embodiment of the present application;
Detailed Description
In order that the above objects, features and advantages of the application will be readily understood, a more particular description of the application will be rendered by reference to the appended drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. The present application may be embodied in many other forms than described herein and similarly modified by those skilled in the art without departing from the spirit of the application, whereby the application is not limited to the specific embodiments disclosed below.
In the related art, when the system needs to keep outputting, the output voltage output by the system is easy to fade continuously along with time, so that the output cannot be kept, and the normal use of the system is affected. The voltage tracking system circuit is simple and reliable in structure and simple to operate, and can automatically adjust the holding voltage, so that the holding voltage can be consistent with the voltage to be tracked, and further, the output voltage output by the system is not easy to fade along with time and is unstable.
Referring to fig. 1, fig. 2, fig. 3 and fig. 4, fig. 1 is a schematic structural diagram of a voltage tracking system according to an embodiment of the application; FIG. 2 is a schematic circuit diagram of a control module according to an embodiment of the present application; FIG. 3 is a schematic circuit diagram of a clock module according to an embodiment of the present application; FIG. 4 is a diagram illustrating a state transition of a control module according to an embodiment of the present application; in a first aspect of the embodiments of the present application, a voltage tracking system with long-lasting hold characteristics is provided, including a hold output module 100, a comparison module 200, a control module 300, and a clock module 400.
Referring to fig. 1, the specific structure and principle of the voltage tracking system will be described in detail.
The holding output module 100 comprises a constant current source 110, a potentiometer 120 and an output driving circuit 130 which are electrically connected in sequence, wherein the constant current source 110 outputs constant current to the potentiometer 120, the potentiometer 120 generates holding voltage according to the constant current, the output driving circuit 130 outputs the holding voltage, and the potentiometer 120 is configured to be variable in resistance;
the comparison module 200 is used for comparing the magnitude of the amplitude between the holding voltage and the voltage to be tracked and outputting a logic signal, wherein the voltage to be tracked is configured as an external sampling input;
the control module 300 is configured to generate a controllable resistance network direction signal according to the logic signal and the manual reset signal, where the controllable resistance network direction signal includes an up tracking signal and a down tracking signal;
the potentiometer 120 is configured to adjust its resistance value according to the up tracking signal or the down tracking signal, so that the holding voltage gradually coincides with the voltage to be tracked.
In the embodiment of the present application, the constant current source 110 is used for providing a low noise reference current, and the circuit structure and the principle thereof are well known to those skilled in the art, so that the description thereof is omitted herein.
In the embodiment of the present application, the potentiometer 120 is used to realize linear resistance increment or decrement, and its structure and principle are well known to those skilled in the art, so they are not described herein.
In the embodiment of the present application, the comparison module 200 is used for comparing the magnitude between the holding voltage and the voltage to be tracked and outputting a logic signal, and the comparison module 200 may include a comparator composed of an operational amplifier, and the circuit structure and principle thereof are well known to those skilled in the art, so that the description thereof is omitted herein. The logic signals may include high level signals and low level signals.
Wherein, under the condition that the holding voltage is larger than the voltage to be tracked, a high-level signal is output. In the case where the holding voltage is smaller than the voltage to be tracked, a low level signal is output.
In the embodiment of the present application, the control module 300 may generate a controllable resistance network direction signal according to the logic signal and the manual reset signal, where the controllable resistance network direction signal is used to make the potentiometer 120 adjust the resistance of the potentiometer itself, so that the holding voltage gradually keeps consistent with the voltage to be tracked. When the holding voltage is consistent with the voltage to be tracked, the control module 300 issues a lock signal, locks the holding voltage, and keeps the holding voltage constant.
The manual reset signal is input by manual operation, and the manual reset signal can also comprise a high-level signal and a low-level signal. Further, the specific input signal operation mode of the manual reset signal is not particularly limited, and may be a button input structure, for example, when a button is pressed, a high level signal is kept input, and when the button is pressed here for reset, a low level signal is input.
In other embodiments, the specific input signal operation mode of the manual reset signal may be a knob input structure, for example, when the knob is turned to a high signal gear, the high signal is kept input, and when the knob is turned to a low signal gear, the low signal is kept input.
It should be noted that the direction signal of the controllable resistance network includes an up tracking signal and a down tracking signal, and specifically, when the direction signal of the controllable resistance network is the up tracking signal, the potentiometer 120 gradually increases the resistance value, so that the holding voltage increases. When the controllable resistance network direction signal is a tracking signal, the potentiometer 120 gradually decreases the resistance value, so that the holding voltage is reduced.
In some possible implementations, the output driving circuit 130 includes a first buffer amplifier, a low-pass filter, and a second buffer amplifier, which are sequentially connected, the first buffer amplifier is electrically connected to the potentiometer 120, the second buffer amplifier is electrically connected to the comparison module 200, and the second buffer amplifier is configured to output the holding voltage.
In the embodiment of the present application, the first buffer amplifier and the second buffer amplifier are used for isolating the potentiometer 120 from the terminal load, so as to prevent the potentiometer 120 from generating output traction due to the change of the terminal load.
In some possible implementations, the voltage tracking system further includes a clock module 400, the clock module 400 being configured to obtain the enable signal output by the control module 300, the clock module 400 being further configured to output a clock signal according to the enable signal, the clock signal being used to provide a tracking beat for the potentiometer 120.
In an embodiment of the application, the clock signal is used to generate the target frequency. In practical applications, the potentiometer 120 performs resistance change according to the clock signal and the controllable resistance network direction signal, that is, the clock signal provides periodic beats to the potentiometer 120. For example, the potentiometer 120 is used for adjusting the resistance of the potentiometer under each beat according to the direction signal of the controllable resistance network. In this way, it can be ensured that the resistance change is not confused and that the control module 300 has enough time to perform logic processing.
In some possible implementations, referring to fig. 2, the control module 300 includes a D flip-flop 310, a two-input and gate 320, a first not gate 330, a second not gate 340, a first buffer 350, a second buffer 360, a first node N10, a second node N20, and a third node N30, an input of the first not gate 330 is coupled to the comparison module 200, an output of the first not gate 330 is coupled to the first node N10, an input of the second buffer 360 is coupled to the first node N10, an output of the second buffer 360 is coupled to the potentiometer 120, a first end of the D flip-flop 310 is coupled to the first node N10, a second end of the D flip-flop 310 is coupled to the second node N20, a third end of the D flip-flop 310 is coupled to the third node N30, an input of the second not gate 340 is coupled to the third node N30, an output of the second not gate 340 is coupled to the clock module 400, an input of the first buffer 350 is coupled to the manual input of the first buffer 350 is coupled to the second node N20, an output of the second not gate 320 is coupled to the third node N30, and an output of the gate 320 is coupled to the third node N30.
In the embodiment of the present application, the D flip-flop 310 is designed as a latch structure, for example, when the comparison module 200 outputs a low level signal, the processing of the high level signal through the first not gate 330 triggers the latch function of the D flip-flop 310.
When the D flip-flop 310 triggers the latch state and the manual reset signal is inactive, the lock signal outputs a logic high level, indicating that the voltage to be tracked has been tracked. Otherwise, the lock signal outputs a logic low level, indicating that the voltage to be tracked is being tracked.
In addition, table 1 is a truth table for the control module 300 as follows:
TABLE 1
In table 1, x represents no input, 0 represents a low level signal, 1 represents a high level signal, and ∈when the high level signal transitions to the low level signal.
Referring to fig. 2 and table 1, in order to improve the stability of the input signal of the manual input terminal, the first buffer 350 is provided. When the manual reset signal is low, the D flip-flop 310 will be reset and the lock signal will output a logic low; when the manual reset signal is high, the D flip-flop 310 will be released from reset.
Referring to fig. 4, fig. 4 is a transition diagram of an operation state of the control module 300, where S0 represents a system reset state, S1 represents an up tracking state, S2 represents a down tracking state, and S3 represents a tracking lock state.
In some possible implementations, the clock module 400 includes a two-input nand gate 410, a first resistor, a first capacitor C1, a fourth node N40, and a fifth node N50, wherein a first end of the two-input nand gate 410 is coupled to the second nand gate 340, a second end of the two-input nand gate 410 is coupled to the fourth node N40, a third end of the two-input nand gate 410 is coupled to the fifth node N50, and two ends of the first resistor R1 are respectively coupled to the fourth node N40 and the fifth node N50; one end of the first capacitor C1 is coupled to the fourth node N40, the other end of the first capacitor C1 is grounded, and the fifth node N50 is configured to output a clock signal.
In a second aspect of the embodiment of the present application, a voltage tracking method is provided, the method includes a holding output module 100 and a comparison module 200, the holding output module 100 includes a constant current source 110, a potentiometer 120 and an output driving circuit 130 electrically connected in sequence, the constant current source 110 outputs a constant current to the potentiometer 120, the potentiometer 120 generates a holding voltage according to the constant current, the output driving circuit 130 outputs the holding voltage, the potentiometer 120 is configured to have a variable resistance value, the comparison module 200 is configured to compare the magnitude between the holding voltage and a voltage to be tracked, and output a logic signal;
the method further comprises the steps of:
generating a controllable resistance network direction signal according to the logic signal and the manual reset signal, wherein the controllable resistance network direction signal comprises an upward tracking signal and a downward tracking signal;
the potentiometer 120 is configured to adjust its resistance value according to the up tracking signal or the down tracking signal, so that the holding voltage gradually coincides with the voltage to be tracked.
In some possible implementations, the potentiometer 120 is configured to gradually increase the resistance to increase the holding voltage according to the up tracking signal.
In some possible implementations, the potentiometer 120 is configured to gradually decrease the resistance value to decrease the holding voltage according to the downward tracking signal.
It should be understood that, in various embodiments of the present application, the sequence numbers of the foregoing processes do not mean the order of execution, and the order of execution of the processes should be determined by the functions and internal logic thereof, and should not constitute any limitation on the implementation process of the embodiments of the present application.
It should also be understood that, in the embodiment of the present application, the term "and/or" is merely an association relationship describing the association object, indicating that three relationships may exist. For example, a and/or B may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps described in connection with the embodiments disclosed herein may be embodied in electronic hardware, in computer software, or in a combination of the two, and that the elements and steps of the examples have been generally described in terms of function in the foregoing description to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided by the present application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of elements is merely a logical functional division, and there may be additional divisions of actual implementation, e.g., multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. In addition, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices, or elements, or may be an electrical, mechanical, or other form of connection.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment of the present application.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above is merely a preferred embodiment of the present application, and is not intended to limit the present application in any way. Any person skilled in the art can make many possible variations and modifications to the technical solution of the present application or modifications to equivalent embodiments using the methods and technical contents disclosed above, without departing from the scope of the technical solution of the present application. Therefore, all equivalent changes according to the shape, structure and principle of the present application are covered in the protection scope of the present application.

Claims (10)

1. A voltage tracking system having a long-term retention feature, comprising:
the constant current source outputs constant current to the potentiometer, the potentiometer generates holding voltage according to the constant current, the output driving circuit outputs the holding voltage, and the potentiometer is configured to be variable in resistance;
the comparison module is used for comparing the amplitude between the holding voltage and the voltage to be tracked and outputting a logic signal, and the voltage to be tracked is configured as an external sampling input;
the control module is used for generating a controllable resistance network direction signal according to the logic signal and the manual reset signal, wherein the controllable resistance network direction signal comprises an upward tracking signal and a downward tracking signal;
the potentiometer is configured to adjust the resistance value of the potentiometer according to the upward tracking signal or the downward tracking signal so that the holding voltage gradually keeps consistent with the voltage to be tracked.
2. The voltage tracking system with long-term hold feature of claim 1, wherein the potentiometer is configured to gradually increase a resistance value to increase the hold voltage in accordance with the up-tracking signal.
3. The voltage tracking system with long-term hold feature of claim 1, wherein the potentiometer is configured to gradually decrease the resistance value to decrease the hold voltage in accordance with the downward tracking signal.
4. The voltage tracking system with long-term retention feature of claim 1, wherein the output driver circuit comprises a first buffer amplifier, a low pass filter, and a second buffer amplifier connected in sequence, the first buffer amplifier being electrically connected to the potentiometer, the second buffer amplifier being electrically connected to the comparison module, the second buffer amplifier being configured to output a retention voltage.
5. The voltage tracking system with long-term retention feature of claim 1, further comprising a clock module configured to obtain an enable signal output by the control module, the clock module further configured to output a clock signal based on the enable signal, the clock signal for providing a tracking beat for the potentiometer.
6. The voltage tracking system with long-term retention of claim 5, wherein the control module comprises a D flip-flop, a two-input and gate, a first not gate, a second not gate, a first buffer, a second buffer, a first node, a second node, and a third node, an input of the first not gate is coupled to the comparison module, an output of the first not gate is coupled to the first node, an input of the second buffer is coupled to the first node, an output of the second buffer is coupled to the potentiometer, a first end of the D flip-flop is coupled to the first node, a second end of the D flip-flop is coupled to the second node, a third end of the D flip-flop is coupled to the third node, an input of the second not gate is coupled to the third node, an output of the second not gate is coupled to the clock module, an input of the first buffer is coupled to the second input of the second buffer is coupled to the second node, an input of the second not gate is coupled to the third node, and a second input of the second not gate is coupled to the third node.
7. The voltage tracking system with long-term retention of claim 6, wherein the clock module comprises a two-input nand gate, a first resistor, a first capacitor, a fourth node, and a fifth node, a first end of the two-input nand gate being coupled to the second not gate, a second end of the two-input nand gate being coupled to the fourth node, a third end of the two-input nand gate being coupled to the fifth node, and both ends of the first resistor being coupled to the fourth node and the fifth node, respectively; one end of the first capacitor is coupled with a fourth node, the other end of the first capacitor is grounded, and the fifth node is used for outputting the clock signal.
8. The voltage tracking method is characterized by comprising a holding output module and a comparison module, wherein the holding output module comprises a constant current source, a potentiometer and an output driving circuit which are electrically connected in sequence, the constant current source outputs constant current to the potentiometer, the potentiometer generates holding voltage according to the constant current, the output driving circuit outputs the holding voltage, the potentiometer is configured to be variable in resistance value, and the comparison module is configured to compare the magnitude between the holding voltage and the voltage to be tracked and output a logic signal;
the method further comprises the steps of:
generating a controllable resistance network direction signal according to the logic signal and the manual reset signal, wherein the controllable resistance network direction signal comprises an upward tracking signal and a downward tracking signal;
the potentiometer is configured to adjust the resistance value of the potentiometer according to the upward tracking signal or the downward tracking signal so that the holding voltage gradually keeps consistent with the voltage to be tracked.
9. The voltage tracking method according to claim 8, wherein the potentiometer is configured to gradually increase a resistance value to increase the holding voltage according to the upward tracking signal.
10. The voltage tracking method according to claim 8, wherein the potentiometer is configured to gradually decrease a resistance value in accordance with the downward tracking signal, so that the holding voltage is decreased.
CN202310873172.9A 2023-07-14 2023-07-14 Voltage tracking system with long-acting retention characteristic and voltage tracking method Pending CN116719380A (en)

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