CN116699909B - Array substrate and display panel - Google Patents

Array substrate and display panel Download PDF

Info

Publication number
CN116699909B
CN116699909B CN202310982012.8A CN202310982012A CN116699909B CN 116699909 B CN116699909 B CN 116699909B CN 202310982012 A CN202310982012 A CN 202310982012A CN 116699909 B CN116699909 B CN 116699909B
Authority
CN
China
Prior art keywords
electrode
branch
main
domain
branch electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202310982012.8A
Other languages
Chinese (zh)
Other versions
CN116699909A (en
Inventor
李冰玉
柴立
李毕荣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou China Star Optoelectronics Technology Co Ltd
Original Assignee
Suzhou China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou China Star Optoelectronics Technology Co Ltd filed Critical Suzhou China Star Optoelectronics Technology Co Ltd
Priority to CN202310982012.8A priority Critical patent/CN116699909B/en
Publication of CN116699909A publication Critical patent/CN116699909A/en
Application granted granted Critical
Publication of CN116699909B publication Critical patent/CN116699909B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Liquid Crystal (AREA)

Abstract

The application discloses an array substrate and a display panel, wherein a first connecting part is connected with two first branch electrodes, and a second connecting part is connected with two second branch electrodes. The first main electrode section between the two first branch electrodes or between the two second branch electrodes is broken, and the first connecting part or the second connecting part can transmit signals, so that the risk of signal interruption caused by the breakage of the main electrodes is reduced. The first connecting portions and the second connecting portions are respectively and alternately connected with the other end of the 2k-1 first branch electrode and the other end of the 2k first branch electrode, the other end of the 2k second branch electrode and the other end of the 2k+1 second branch electrode, two adjacent first connecting portions are arranged at intervals, two adjacent second connecting portions are arranged at intervals, signal transmission is ensured, meanwhile, the arrangement area of the first connecting portions and the second connecting portions is reduced, aggregation of liquid crystals is reduced, accordingly, the inversion uniformity of the liquid crystals is improved, and the generation of display dark fringes is reduced.

Description

Array substrate and display panel
Technical Field
The application belongs to the technical field of display, and particularly relates to an array substrate and a display panel.
Background
The current array substrate includes a plurality of pixel electrodes, each including at least one main electrode. As shown in fig. 1, the main electrode E01 of the pixel electrode is easily broken due to stress concentration, and when any one of the main electrode E01 breaks, signal transmission is completely interrupted, thereby causing a defective display of a pixel region corresponding to the broken pixel electrode. The prior art discloses a technical solution for signal conduction when the main electrode E01 breaks by providing the sub-electrode E02 at the edge of the pixel electrode, as shown in fig. 2. However, the arrangement of the sub-electrodes E02 on both sides of the main electrode E01 tends to cause the liquid crystal at the main electrode E01 and the sub-electrodes E02 to be inverted and disturbed, and further causes dark lines at the main electrode E01 and the sub-electrodes E02 to be uneven in display.
Therefore, there is a need for an array substrate design that reduces the risk of signal interruption. And the signal transmission is ensured, the uniformity of the liquid crystal inversion is improved, and the generation of display dark fringes is reduced.
Disclosure of Invention
The application aims to provide an array substrate and a display panel, which can reduce the risk of signal interruption, ensure signal transmission, improve the uniformity of liquid crystal inversion and reduce the generation of display dark lines.
In order to solve the technical problems, the application provides an array substrate, which comprises a substrate and a pixel electrode arranged on the substrate, wherein the pixel electrode is provided with a first domain area and a second domain area.
The pixel electrode includes:
a first main electrode extending in a first direction, the first domain and the second domain being disposed on opposite sides of the first main electrode;
a second main electrode extending in a second direction, the first direction intersecting the second direction;
the first branch electrodes extend along a third direction, are arranged at intervals along the first direction and are positioned in the first domain, the third direction is respectively intersected with the first direction and the second direction, and one end of each first branch electrode is connected with the first main electrode;
the first connecting part is connected with the other end of the 2k-1 th first branch electrode and the other end of the 2k-1 nd first branch electrode, wherein k is more than or equal to 1 and k is an integer, and two adjacent first connecting parts are arranged at intervals;
the second branch electrodes extend along a fourth direction and are arranged at intervals along the first direction and are positioned in the second domain, the fourth direction is respectively intersected with the first direction and the second direction, and one end of each second branch electrode is connected with the first main electrode;
the second connecting parts are connected with the other end of the 2k second branch part electrode and the other end of the 2k+1 second branch part electrode, and two adjacent second connecting parts are arranged at intervals.
In some embodiments, the pixel electrode further has a third domain and a fourth domain, the third domain and the fourth domain being disposed on opposite sides of the first main portion electrode, and the third domain and the first domain being located on opposite sides of the second main portion electrode, and the fourth domain and the second domain being located on opposite sides of the second main portion electrode.
The pixel electrode further includes:
the third branch electrodes extend along a fifth direction, are arranged at intervals along the first direction and are positioned in the third domain, the fifth direction is respectively intersected with the first direction and the second direction, and one end of each third branch electrode is connected with the first main electrode;
the third connecting part is used for connecting the other end of the 2k-th third branch electrode with the other end of the 2k+1-th third branch electrode, and two adjacent third connecting parts are arranged at intervals;
a plurality of fourth branch electrodes extending in a sixth direction and arranged at intervals along the first direction and located in the fourth domain, wherein the sixth direction intersects the first direction and the second direction respectively, and one end of the fourth branch electrode is connected with the first main electrode;
and the fourth connecting part is connected with the other end of the 2k-1 th fourth branch electrode and the other end of the 2k fourth branch electrode, and two adjacent fourth connecting parts are arranged at intervals.
In some embodiments, an extension direction of the first branch electrode and an extension direction of the second branch electrode have the same intersection point on the first main electrode, and an extension direction of the third branch electrode and an extension direction of the fourth branch electrode have the same intersection point on the first main electrode.
In some embodiments, the pixel electrode further comprises:
a fifth branch electrode extending along the third direction and located in the first domain, wherein one end of the fifth branch electrode is connected with the middle part of the second main electrode;
a fifth connecting portion connecting the other end of the fifth branch electrode and the end of the second main electrode;
a sixth branch electrode extending along the sixth direction and located in the fourth domain, wherein one end of the sixth branch electrode is connected to the middle part of the second main electrode;
and a sixth connecting portion connecting the other end of the sixth branch electrode with the end of the second main electrode.
In some embodiments, the pixel electrode further comprises:
a seventh branch electrode extending along the fourth direction and located in the second domain, one end of the seventh branch electrode being connected to the second main electrode;
a seventh connecting portion connecting the other end of the seventh branch electrode with the other end of the adjacent second branch electrode;
an eighth branch electrode extending along the fifth direction and located in the third domain, wherein one end of the eighth branch electrode is connected with the second main electrode;
and an eighth connection part connecting the other end of the eighth branch electrode with the other end of the adjacent third branch electrode.
In some embodiments, the width of the end of the first main portion electrode is greater than the width of the middle portion of the first main portion electrode, the end of the first main portion electrode being open with a first opening;
the width of the end part of the second main part electrode is larger than that of the middle part of the second main part electrode, and a second opening is formed in the end part of the second main part electrode.
In some embodiments, the shape of the end of the first main portion electrode, the shape of the first opening, the shape of the end of the second main portion electrode, and the shape of the second opening are all triangular.
In some embodiments, the array substrate further includes a thin film transistor and a connection electrode, where the connection electrode is spaced from the pixel electrode and is close to the third domain, and the connection electrode is electrically connected to the thin film transistor;
the pixel electrode further comprises a ninth branch electrode, the ninth branch electrode extends along the fifth direction, the ninth branch electrode is located in the third domain area and located at one side, far away from the second main electrode, of the third branch electrode, one end of the ninth branch electrode is connected with the first main electrode, and the other end of the ninth branch electrode is connected with the connecting electrode.
In some embodiments, the connection electrode includes a via portion and a ninth connection portion extending along the sixth direction, the ninth connection portion connecting the other end of the ninth branch electrode and the via portion;
the number of the ninth branch electrodes is at least two, the two ninth branch electrodes are arranged at intervals along the first direction, the number of the ninth connecting parts is at least two, the two ninth branch electrodes are arranged at intervals along the first direction, and one ninth branch electrode is correspondingly connected with one ninth connecting part.
The application also provides a display panel, which comprises the array substrate, a color film substrate and a liquid crystal layer. The array substrate and the color film substrate are oppositely arranged, and the liquid crystal layer is arranged between the array substrate and the color film substrate.
According to the array substrate and the display panel provided by the embodiment of the application, the first connecting part is arranged to be connected with the two first branch electrodes, and the second connecting part is arranged to be connected with the two second branch electrodes. Even if the first main section electrode segment between the two first branch electrodes or between the two second branch electrodes breaks, the first connection or the second connection can still transmit signals, and the risk of signal interruption caused by the breaking of the main section electrodes can be reduced. The first connecting portions and the second connecting portions are alternately connected with the other end of the 2k-1 first branch electrode and the other end of the 2k first branch electrode respectively, and the other end of the 2k second branch electrode and the other end of the 2k+1 second branch electrode, wherein k is more than or equal to 1 and k is an integer, two adjacent first connecting portions are arranged at intervals, two adjacent second connecting portions are arranged at intervals, signal transmission can be ensured, the areas of the first connecting portions and the second connecting portions can be reduced, aggregation of liquid crystal at the first connecting portions and the second connecting portions can be reduced, the reverse uniformity of the liquid crystal can be improved, and generation of display dark lines can be reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic top view of an array substrate according to the prior art;
FIG. 2 is a schematic top view of another prior art array substrate;
fig. 3 is a schematic top view of an array substrate according to an embodiment of the present application;
FIG. 4 is a schematic top view of another array substrate according to an embodiment of the present application;
fig. 5 is a schematic cross-sectional structure of a display panel according to an embodiment of the present application.
Reference numerals:
a display panel 1000;
an array substrate 100; a liquid crystal layer 200; a color film substrate 300;
a substrate 110; a pixel electrode 120; a connection electrode 130;
a first main electrode E10; a second main electrode E20;
an end E11 of the first main electrode; an intermediate portion E12 of the first main portion electrode; an end E21 of the second main electrode; an intermediate portion E22 of the second main portion electrode;
a first branch electrode 121; a second leg electrode 122; a third branch electrode 123; a fourth leg electrode 124; a fifth leg electrode 125; a sixth leg electrode 126; a seventh leg electrode 127; an eighth leg electrode 128; a ninth leg electrode 129;
a first connection portion L1; a second connection portion L2; a third connection portion L3; a fourth connection portion L4; a fifth connecting portion L5; a sixth connecting portion L6; a seventh connecting portion L7; an eighth connection portion L8;
a first opening K1; a second opening K2;
a via portion 131; a ninth connection portion L9;
a first domain S1; a second domain S2; a third domain S3; a fourth domain S4;
a first direction X; a second direction Y; a third direction Z; a fourth direction U; a fifth direction V; and a sixth direction W.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application.
It should be noted that, in the description of the present application, it should be understood that the directions or positional relationships indicated by "upper", "lower", "front", "rear", "left", "right", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements to be referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an array substrate 100 according to an embodiment of the application. The array substrate 100 includes a substrate 110 and a pixel electrode 120 disposed on the substrate 110.
Specifically, the pixel electrode 120 includes a first main electrode E10, a second main electrode E20, a first branch electrode 121, a second branch electrode 122, and first and second connection portions L1 and L2. The first main electrode E10 extends in the first direction X, and the second main electrode E20 extends in the second direction Y. The first and second domains S1 and S2 of the pixel electrode 120 are disposed at opposite sides of the first main electrode E10.
The first branch electrodes 121 are disposed in the first domain S1, extend along the third direction Z, and are arranged at intervals along the first direction X. One end of the first branch electrode 121 is connected to the first main electrode E10. The first connection part L1 connects the other end of the 2k-1 th first branch electrode 121 with the other end of the 2 k-th first branch electrode 121, k is equal to or greater than 1 and k is an integer. The adjacent two first connecting portions L1 are disposed at intervals.
The second branch electrodes 122 are disposed in the second domain S2, extend along the fourth direction U, and are arranged at intervals along the first direction X. One end of the second branch electrode 122 is connected to the first main electrode E10. The second connection portion L2 connects the other end of the 2k-th second branch electrode 122 with the other end of the 2k+1-th second branch electrode 122. The two adjacent second connection portions L2 are disposed at intervals.
The first direction X and the second direction Y are intersected, the third direction Z is intersected with the first direction X and the second direction Y respectively, and the fourth direction U is intersected with the first direction X and the second direction Y respectively.
The array substrate 100 provided in the embodiment of the application is provided with a first connecting portion L1 for connecting two first branch electrodes 121 and a second connecting portion L2 for connecting two second branch electrodes 122. Even if the first main electrode E10 segment between the two first branch electrodes 121 or between the two second branch electrodes 122 breaks, the first connection portion L1 or the second connection portion L2 can still transmit signals, and the risk of signal interruption due to the break of the main electrode can be reduced. The first connecting part L1 and the second connecting part L2 are respectively and alternately connected with the other end of the 2k-1 first branch electrode 121 and the other end of the 2k first branch electrode 121, and the other end of the 2k second branch electrode 122 and the other end of the 2k+1 second branch electrode 122, wherein k is more than or equal to 1 and k is an integer, two adjacent first connecting parts L1 are arranged at intervals, two adjacent second connecting parts L2 are arranged at intervals, and the areas of the first connecting parts L1 and the second connecting parts L2 can be reduced while ensuring signal transmission, so that aggregation of liquid crystals at the first connecting parts L1 and the second connecting parts L2 is reduced, the uniformity of liquid crystal inversion is improved, and the occurrence of display dark marks is reduced.
Similarly, the pixel electrode 120 further has a third domain S3 and a fourth domain S4. The third and fourth domains S3 and S4 are disposed at opposite sides of the first main electrode E10. The opposite side referred to herein, as shown in fig. 3 and 4, the third domain S3 may be on the left side of the first main electrode E10, the fourth domain S4 may be on the right side of the first main electrode E10, or the third domain S3 may be on the right side of the first main electrode E10, and the fourth domain S4 may be on the left side of the first main electrode E10. The same applies to the first domain S1 and the second domain S2 disposed on opposite sides of the first main electrode E10, and the description thereof is omitted herein. The third domain S3 and the first domain S1 are located at opposite sides of the second main electrode E20, and the fourth domain S4 and the second domain S2 are located at opposite sides of the second main electrode E20.
With continued reference to fig. 3, the pixel electrode 120 further includes a third branch electrode 123, a fourth branch electrode 124, a third connection portion L3, and a fourth connection portion L4.
The third branch electrodes 123 are located in the third domain S3, extend along the fifth direction V, and are arranged at intervals along the first direction X. One end of the third branch electrode 123 is connected to the first main electrode E10. The third connection portion L3 connects the other end of the 2k-th third branch electrode 123 and the other end of the 2k+1-th third branch electrode 123. The adjacent two third connecting parts L3 are arranged at intervals.
The fourth branch electrodes 124 are located in the fourth domain S4, extend along the sixth direction W, and are arranged at intervals along the first direction X. One end of the fourth branch electrode 124 is connected to the first main electrode E10. The fourth connection portion L4 connects the other end of the 2k-1 th fourth branch electrode 124 with the other end of the 2 k-th fourth branch electrode 124. The adjacent two fourth connecting parts L4 are arranged at intervals.
The fifth direction V intersects the first direction X and the second direction Y, respectively, and the sixth direction W intersects the first direction X and the second direction Y, respectively.
The third connection portion L3 connects the two third branch electrodes 123 and the fourth connection portion L4 is provided to connect the two fourth branch electrodes 124. Even if the first main electrode E10 segment between the two third branch electrodes 123 or between the two fourth branch electrodes 124 breaks, the third connection portion L3 or the fourth connection portion L4 can still transmit signals, and the risk of signal interruption due to the main electrode breaking can be reduced. The third connecting part L3 and the fourth connecting part L4 are respectively and alternately connected with the other end of the 2k-1 th third branch electrode 123 and the other end of the 2k third branch electrode 123, and the other end of the 2k fourth branch electrode 124 and the other end of the 2k+1 th fourth branch electrode 124, wherein k is more than or equal to 1 and k is an integer, two adjacent third connecting parts L3 are arranged at intervals, two adjacent fourth connecting parts L4 are arranged at intervals, and the areas of the third connecting parts L3 and the fourth connecting parts L4 can be reduced while signal transmission is ensured, so that aggregation of liquid crystals at the third connecting parts L3 and the fourth connecting parts L4 is reduced, the uniformity of liquid crystal inversion is improved, and the generation of display dark fringes is reduced.
In the present embodiment, the first branch electrode 121 and the second branch electrode 122 are disposed axisymmetrically with respect to the first main electrode E10. The third branch electrode 123 and the fourth branch electrode 124 are disposed axisymmetrically with respect to the first main electrode E10. That is, the branch electrodes of the first and second domains S1 and S2 are axisymmetrically disposed, and the branch electrodes of the third and fourth domains S3 and S4 are axisymmetrically disposed, so that the effect of viewing the display panel 1000 from the view angle near the first and third domains S1 and S3 and viewing the display panel 1000 from the view angle near the second and fourth domains S2 and S4 is more uniform. The third direction Z and the fourth direction U intersect, the fifth direction V and the fourth direction U are parallel and opposite, and the sixth direction W and the third direction Z are parallel and opposite. The branch electrodes of the four domains are arranged centrally and symmetrically with respect to the intersection of the first main electrode E10 and the second main electrode E20, so that the effect of viewing the display panel 1000 from each viewing angle is more uniform.
In this embodiment, the extending direction of a first branch electrode 121 and the extending direction of a second branch electrode 122 have the same intersection point on the first main electrode E10. The extending direction of a third branch electrode 123 and the extending direction of a fourth branch electrode 124 have the same intersection point on the first main electrode E10. By arranging the extending direction of the first branch electrode 121 and the extending direction of the second branch electrode 122 to have the same intersecting point on the first main electrode E10, the 2k-1 st first branch electrode 121 and the 2k first branch electrode 121, the 2k second branch electrode 122 and the 2k+1 st second branch electrode 122 are alternately connected at one end far from the first main electrode E10, so that signal transmission at all positions on the first main electrode E10 can be ensured, and the parts, which are not ensured to be transmitted by the first connection part L1 or the second connection part L2, on the first main electrode E10 due to the fact that the extending directions of the first branch electrode 121 and the second branch electrode 122 are staggered on the first main electrode E10 are reduced. It can be appreciated that the signal transmission may be affected by the breakage of the portion of the first main electrode E10 which is not secured by the first connection portion L1 or the second connection portion L2. Similarly, the extending direction of the third branch electrode 123 and the extending direction of the fourth branch electrode 124 have the same intersection point on the first main electrode E10, so that signal transmission of the first main electrode E10 can be further ensured.
In the present embodiment, the pixel electrode 120 further includes a fifth branch electrode 125, a fifth connection portion L5, and a sixth branch electrode 126, a sixth connection portion L6. The fifth branch electrode 125 extends along the third direction Z and is located in the first domain S1. The fifth branch electrode 125 is disposed on a side of the first branch electrode 121 near the second main electrode E20, and is spaced apart from the first branch electrode 121 along the first direction X. One end of the fifth branch electrode 125 is connected to the intermediate portion E22 of the second main electrode. The fifth connection portion L5 connects the other end of the fifth branch electrode 125 and the end E21 of the second main electrode. The fifth connection portion L5 and the fifth branch electrode 125 are connected such that a conductive path is formed between the middle portion E22 and the end portion of the second main portion electrode, and the second main portion electrode E20 breaks at a portion between the connected middle portion and end portion, and a signal can still be conducted through the conductive path formed by the fifth connection portion L5 and the fifth branch electrode 125, thereby ensuring that the transmission of the signal is not interrupted.
The sixth branch electrode 126 extends along the sixth direction W and is located in the fourth domain S4. The sixth branch electrode 126 is located on a side of the fourth branch electrode 124 adjacent to the second main electrode E20, and is arranged at intervals along the first direction X from the fourth branch electrode 124. One end of the sixth branch electrode 126 is connected to the intermediate portion E22 of the second main electrode. The sixth connection portion L6 connects the other end of the sixth branch electrode 126 and the end E21 of the second main electrode. The connection of the sixth connection portion L6 and the sixth branch electrode 126 also forms a conductive path between the middle portion E22 and the end portion of the second main electrode, ensuring the transmission of signals.
Further, the pixel electrode 120 further includes a seventh branch electrode 127, a seventh connection portion L7, and eighth branch electrodes 128, eighth connection portions L8. The seventh branch electrode 127 extends along the fourth direction U and is located in the second domain S2. The seventh branch electrode 127 is located on a side of the second branch electrode 122 close to the second main electrode E20, and is arranged at a distance from the second branch electrode 122 along the first direction X. One end of the seventh branch electrode 127 is connected to the second main electrode E20. The seventh connection portion L7 connects the other end of the seventh branch electrode 127 and the other end of the adjacent second branch electrode 122. Since one end of the second branch electrode 122 is connected to the first main electrode E10, the connection of the second branch electrode 122, the seventh connection portion L7, and the seventh branch electrode 127 forms a conductive path between the first main electrode E10 and the second main electrode E20. The signal may still be conducted through the conductive path formed by the second branch electrode 122, the seventh connection part L7 and the seventh branch electrode 127 by breaking between the connected parts of the first main electrode E10 and the second main electrode E20, thereby ensuring that the transmission of the signal is not interrupted.
The eighth branch electrode 128 extends along the fifth direction V and is located in the third domain S3. The eighth branch electrode 128 is located on a side of the third branch electrode 123 close to the second main electrode E20, and is arranged at intervals along the first direction X from the third branch electrode 123. One end of the eighth branch electrode 128 is connected to the second main electrode E20. The eighth connection portion L8 connects the other end of the eighth branch electrode 128 with the other end of the adjacent third branch electrode 123. The connection of the third branch electrode 123, the eighth connection portion L8, and the eighth branch electrode 128 also forms a conductive path between the first main electrode E10 and the second main electrode E20, ensuring the transmission of signals.
In this embodiment, the array substrate 100 further includes a thin film transistor and a connection electrode 130. The thin film transistor is disposed in a thin film transistor layer disposed between the substrate 110 and the pixel electrode 120. That is, the thin film transistor layer is disposed on the substrate 110, the pixel electrode 120 is disposed on the thin film transistor layer, the connection electrode 130 is disposed on the same layer as the pixel electrode 120, and the connection electrode 130 is adjacent to the third domain S3. The pixel electrode 120 is disposed in the display region, and the connection electrode 130 is disposed in the non-display region. The connection electrode 130 is electrically connected to the thin film transistor.
The pixel electrode 120 further includes a ninth branch electrode 129. The ninth branch electrode 129 is located at the third domain area S3 and at a side of the third branch electrode 123 away from the second main electrode E20, so that the ninth branch electrode 129 is conveniently connected to the connection electrode 130 disposed near the third domain area S3. The ninth branch electrode 129 has one end connected to the first main electrode E10 and the other end connected to the connection electrode 130. The ninth leg electrode 129 is provided extending in the fifth direction V. Since the ninth branch electrode 129 is disposed in the third domain region S3, the ninth branch electrode 129 and the third branch electrode 123 are disposed along the fifth direction V in an extending manner, and the ninth branch electrode 129 and the third branch electrode 123 are arranged at intervals along the first direction X, it is ensured that the arrangement of the branch electrodes in the third domain region S3 is uniform, and the liquid crystal at the corresponding position is uniformly inverted.
Alternatively, the first branch electrode 121 is disconnected from the first domain S1 at a portion remote from the second main electrode E20, and the first connection portion L1 is not provided for connection. The first branch electrode 121 is disconnected from the first domain S1 at a position far from the connection electrode 130, which is advantageous in saving the process. Since the connection electrode 130 is close to the third domain S3 and far from the first domain S1, the disconnection of the first branch electrode 121 at the position where the first domain S1 is far from the connection electrode 130 has less influence on the signal transmission of the pixel electrode 120.
Alternatively, the connection electrode 130 includes a via portion 131 and a ninth connection portion L9. The via portion 131 of the connection electrode 130 is provided at the same layer as the pixel electrode 120 with a space therebetween, and the via portion 131 is connected to the thin film transistor layer through a via. The via 131 is connected to the ninth branch electrode 129 via a ninth connection portion L9. One end of the ninth connection portion L9 is connected to the via 131, and the other end is connected to the ninth branch electrode 129. The ninth connection portion L9 is provided extending in the sixth direction W. Since the ninth connection portion L9 is located in a region close to the third domain S3, the extension of the ninth connection portion L9 along the sixth direction W may improve the uniformity of the inversion of the liquid crystal therein, which is beneficial to the alignment of the liquid crystal.
Optionally, the number of ninth leg electrodes 129 is at least two. The two ninth branch electrodes 129 are arranged at intervals along the first direction X. The number of the ninth connection portions L9 is at least two. The two ninth branch electrodes 129 are arranged at intervals along the first direction X. A ninth branch electrode 129 is correspondingly connected to a ninth connection portion L9. By providing at least two ninth connection portions L9 and at least two ninth branch portion electrodes 129 connected in one-to-one correspondence to form two conductive paths, when one of the conductive paths breaks and cannot transmit signals, the other conductive path can ensure connection of signals.
Referring to fig. 4, fig. 4 is a schematic structural diagram of another array substrate 100 according to an embodiment of the application. The embodiment of fig. 4 differs from the embodiment of fig. 3 in that: first, the first domain S1 and the second domain S2 are on different opposite sides of the first main electrode E10, and the third domain S3 and the fourth domain S4 are on different opposite sides of the first main electrode E10; secondly, the end E11 of the first main electrode is provided with a first opening K1, the end E21 of the second main electrode is provided with a second opening K2.
In the present embodiment, the width of the end portion E11 of the first main portion electrode is larger than the width of the intermediate portion E12 of the first main portion electrode. The end E11 of the first main electrode is provided with a first opening K1. Since the width of the end portion E11 of the first main portion electrode is larger than the width of the intermediate portion E12 of the first main portion electrode, the corresponding liquid crystal at the end E11 of the first main electrode is more likely to be aggregated. The end E11 of the first main electrode is provided with the first opening K1, so that the aggregation phenomenon of liquid crystal at the end E11 of the first main electrode can be slowed down, the liquid crystal is further enabled to be uniformly reversed, and the generation of dark fringes is reduced. The width of the end E21 of the second main electrode is greater than the width of the intermediate E22 of the second main electrode. The end E21 of the second main electrode is provided with a second opening K2. The aggregation phenomenon of the liquid crystal at the end E21 of the second main part electrode can be slowed down, the liquid crystal is further enabled to be uniformly reversed, and the generation of dark fringes is reduced.
Alternatively, the shape of the end E11 of the first main electrode, the shape of the first opening K1, the shape of the end E21 of the second main electrode, and the shape of the second opening K2 are all triangular. The end E11 of the first main electrode and the end E21 of the second main electrode are triangular, so that two side edges of the end E11 of the first main electrode may be parallel to the extending directions of the first branch electrode 121 and the second branch electrode 122, and the edge of the end E21 of the second main electrode may be parallel to the extending directions of the adjacent first branch electrode 121, second branch electrode 122, third branch electrode 123 or fourth branch electrode 124, so as to further ensure that the liquid crystal is inverted uniformly. The shape of the first opening K1 is matched with the shape of the end E11 of the first main electrode, so that the width of the end E11 of the first main electrode is close to the width of the first branch electrode 121 or the second branch electrode 122, and the shape of the second opening K2 is matched with the shape of the end E21 of the second main electrode, so that the width of the end E21 of the second main electrode is close to the width of the first branch electrode 121 or the second branch electrode 122, thereby preventing liquid crystal from gathering at the end E11 of the first main electrode, further improving the uniformity of liquid crystal inversion and avoiding the generation of dark fringes. The shape of the end E11 of the first main electrode, the shape of the first opening K1, the shape of the end E21 of the second main electrode, and the shape of the second opening K2 may be rectangular or semicircular, and the present application is not limited thereto.
Referring to fig. 5, the present application further provides a display panel 1000. The display panel 1000 includes the array substrate 100 described above, and further includes a color film substrate 300 and a liquid crystal layer 200. The array substrate 100 is disposed opposite to the color film substrate 300, the liquid crystal layer 200 is disposed between the array substrate 100 and the color film substrate 300. Due to the arrangement of the branch electrodes and the connection portions of the pixel electrodes 120 in the array substrate 100, the liquid crystal layer 200 of the display panel 1000 is more uniformly inverted, the moire phenomenon is improved, and the display effect of the display panel 1000 is improved.
The array substrate 100 and the display panel 1000 provided by the present application are described in detail above.
According to the array substrate and the display panel provided by the embodiment of the application, the first connecting part is arranged to be connected with the two first branch electrodes, and the second connecting part is arranged to be connected with the two second branch electrodes. Even if the first main section electrode segment between the two first branch electrodes or between the two second branch electrodes breaks, the first connection or the second connection can still transmit signals, and the risk of signal interruption caused by the breaking of the main section electrodes can be reduced. The first connecting portions and the second connecting portions are alternately connected with the other end of the 2k-1 first branch electrode and the other end of the 2k first branch electrode respectively, and the other end of the 2k second branch electrode and the other end of the 2k+1 second branch electrode, wherein k is more than or equal to 1 and k is an integer, two adjacent first connecting portions are arranged at intervals, two adjacent second connecting portions are arranged at intervals, signal transmission can be ensured, the areas of the first connecting portions and the second connecting portions can be reduced, aggregation of liquid crystal at the first connecting portions and the second connecting portions can be reduced, the reverse uniformity of the liquid crystal can be improved, and generation of display dark lines can be reduced.
The principles and embodiments of the present application have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present application and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the application can be made without departing from the principles of the application and these modifications and adaptations are intended to be within the scope of the application as defined in the following claims.

Claims (10)

1. An array substrate is characterized by comprising a substrate and a pixel electrode arranged on the substrate, wherein the pixel electrode is provided with a first domain area and a second domain area, and the pixel electrode comprises:
a first main electrode extending in a first direction, the first domain and the second domain being disposed on opposite sides of the first main electrode;
a second main electrode extending in a second direction, the first direction intersecting the second direction;
the first branch electrodes extend along a third direction, are arranged at intervals along the first direction and are positioned in the first domain, the third direction is respectively intersected with the first direction and the second direction, and one end of each first branch electrode is connected with the first main electrode;
the first connecting part is connected with the other end of the 2k-1 th first branch electrode and the other end of the 2k-1 nd first branch electrode, wherein k is more than or equal to 1 and k is an integer, and two adjacent first connecting parts are arranged at intervals;
the second branch electrodes extend along a fourth direction and are arranged at intervals along the first direction and are positioned in the second domain, the fourth direction is respectively intersected with the first direction and the second direction, and one end of each second branch electrode is connected with the first main electrode;
the second connecting part is used for connecting the other end of the 2k second branch part electrode with the other end of the 2k+1 second branch part electrode, and two adjacent second connecting parts are arranged at intervals;
a fifth branch electrode extending along the third direction and located in the first domain, wherein one end of the fifth branch electrode is connected with the middle part of the second main electrode;
a fifth connecting portion, which is provided with a third connecting portion, the fifth connecting part is connected with the fifth branch electrode and the other end of the second main electrode.
2. The array substrate of claim 1, wherein the pixel electrode further has a third domain and a fourth domain, the third domain and the fourth domain being disposed on opposite sides of the first main electrode, and the third domain and the first domain being located on opposite sides of the second main electrode, the fourth domain and the second domain being located on opposite sides of the second main electrode;
the pixel electrode further includes:
the third branch electrodes extend along a fifth direction, are arranged at intervals along the first direction and are positioned in the third domain, the fifth direction is respectively intersected with the first direction and the second direction, and one end of each third branch electrode is connected with the first main electrode;
the third connecting part is used for connecting the other end of the 2k-th third branch electrode with the other end of the 2k+1-th third branch electrode, and two adjacent third connecting parts are arranged at intervals;
a plurality of fourth branch electrodes extending in a sixth direction and arranged at intervals along the first direction and located in the fourth domain, wherein the sixth direction intersects the first direction and the second direction respectively, and one end of the fourth branch electrode is connected with the first main electrode;
and the fourth connecting part is connected with the other end of the 2k-1 th fourth branch electrode and the other end of the 2k fourth branch electrode, and two adjacent fourth connecting parts are arranged at intervals.
3. The array substrate of claim 2, wherein an extending direction of the first branch electrode and an extending direction of the second branch electrode have the same intersecting point on the first main electrode, and an extending direction of the third branch electrode and an extending direction of the fourth branch electrode have the same intersecting point on the first main electrode.
4. The array substrate of claim 2, wherein the pixel electrode further comprises:
a sixth branch electrode extending along the sixth direction and located in the fourth domain, wherein one end of the sixth branch electrode is connected to the middle part of the second main electrode;
and a sixth connecting portion connecting the other end of the sixth branch electrode with the end of the second main electrode.
5. The array substrate of claim 2, wherein the pixel electrode further comprises:
a seventh branch electrode extending along the fourth direction and located in the second domain, one end of the seventh branch electrode being connected to the second main electrode;
a seventh connecting portion connecting the other end of the seventh branch electrode with the other end of the adjacent second branch electrode;
an eighth branch electrode extending along the fifth direction and located in the third domain, wherein one end of the eighth branch electrode is connected with the second main electrode;
and an eighth connection part connecting the other end of the eighth branch electrode with the other end of the adjacent third branch electrode.
6. The array substrate of claim 1, wherein a width of an end portion of the first main portion electrode is greater than a width of a middle portion of the first main portion electrode, the end portion of the first main portion electrode being provided with a first opening;
the width of the end part of the second main part electrode is larger than that of the middle part of the second main part electrode, and a second opening is formed in the end part of the second main part electrode.
7. The array substrate of claim 6, wherein the shape of the end of the first main electrode, the shape of the first opening, the shape of the end of the second main electrode, and the shape of the second opening are all triangular.
8. The array substrate according to claim 2, further comprising a thin film transistor and a connection electrode, wherein the connection electrode is spaced apart from the pixel electrode and is adjacent to the third domain, and the connection electrode is electrically connected to the thin film transistor;
the pixel electrode further comprises a ninth branch electrode, the ninth branch electrode extends along the fifth direction, the ninth branch electrode is located in the third domain area and located at one side, far away from the second main electrode, of the third branch electrode, one end of the ninth branch electrode is connected with the first main electrode, and the other end of the ninth branch electrode is connected with the connecting electrode.
9. The array substrate according to claim 8, wherein the connection electrode includes a via portion and a ninth connection portion extending along the sixth direction, the ninth connection portion connecting the other end of the ninth branch portion electrode and the via portion;
the number of the ninth branch electrodes is at least two, the two ninth branch electrodes are arranged at intervals along the first direction, the number of the ninth connecting parts is at least two, the two ninth branch electrodes are arranged at intervals along the first direction, and one ninth branch electrode is correspondingly connected with one ninth connecting part.
10. The display panel is characterized by comprising the array substrate according to any one of claims 1-9, further comprising a color film substrate and a liquid crystal layer, wherein the array substrate and the color film substrate are oppositely arranged, and the liquid crystal layer is arranged between the array substrate and the color film substrate.
CN202310982012.8A 2023-08-07 2023-08-07 Array substrate and display panel Active CN116699909B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310982012.8A CN116699909B (en) 2023-08-07 2023-08-07 Array substrate and display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310982012.8A CN116699909B (en) 2023-08-07 2023-08-07 Array substrate and display panel

Publications (2)

Publication Number Publication Date
CN116699909A CN116699909A (en) 2023-09-05
CN116699909B true CN116699909B (en) 2023-10-31

Family

ID=87834258

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310982012.8A Active CN116699909B (en) 2023-08-07 2023-08-07 Array substrate and display panel

Country Status (1)

Country Link
CN (1) CN116699909B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010128211A (en) * 2008-11-27 2010-06-10 Sharp Corp Liquid crystal display
CN202221503U (en) * 2011-06-03 2012-05-16 深圳市华星光电技术有限公司 Pixel electrode and liquid crystal display array substrate
CN107367873A (en) * 2017-09-15 2017-11-21 深圳市华星光电半导体显示技术有限公司 A kind of liquid crystal display panel and its pixel cell
CN109031822A (en) * 2018-07-25 2018-12-18 深圳市华星光电半导体显示技术有限公司 A kind of liquid crystal display panel
CN109283755A (en) * 2018-08-15 2019-01-29 咸阳彩虹光电科技有限公司 A kind of dot structure, pixel unit and display panel
CN111474775A (en) * 2020-05-09 2020-07-31 Tcl华星光电技术有限公司 Display panel and display device
CN114879418A (en) * 2022-07-11 2022-08-09 惠科股份有限公司 Array substrate and display panel

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010128211A (en) * 2008-11-27 2010-06-10 Sharp Corp Liquid crystal display
CN202221503U (en) * 2011-06-03 2012-05-16 深圳市华星光电技术有限公司 Pixel electrode and liquid crystal display array substrate
CN107367873A (en) * 2017-09-15 2017-11-21 深圳市华星光电半导体显示技术有限公司 A kind of liquid crystal display panel and its pixel cell
CN109031822A (en) * 2018-07-25 2018-12-18 深圳市华星光电半导体显示技术有限公司 A kind of liquid crystal display panel
CN109283755A (en) * 2018-08-15 2019-01-29 咸阳彩虹光电科技有限公司 A kind of dot structure, pixel unit and display panel
CN111474775A (en) * 2020-05-09 2020-07-31 Tcl华星光电技术有限公司 Display panel and display device
CN114879418A (en) * 2022-07-11 2022-08-09 惠科股份有限公司 Array substrate and display panel

Also Published As

Publication number Publication date
CN116699909A (en) 2023-09-05

Similar Documents

Publication Publication Date Title
US8144282B2 (en) Liquid crystal display device having first and second pixel electrodes overlapping a common electrode and connected to first and second switching elements respectively
US8072569B2 (en) Fringe field switching liquid crystal display panel
JP2001091972A (en) Liquid crystal display device
CN104793421B (en) Array substrate, display panel and display device
US20120033149A1 (en) Array substrate, liquid crystal panel and liquid crystal display
CN103713432A (en) Display device and electronic equipment
CN101937155A (en) Liquid crystal display panel and liquid crystal display
KR20100000721A (en) Array substrate for liquid crystal display device
KR100313071B1 (en) Liquid crystal display apparatus
CN115145082A (en) Pixel structure, array substrate and display panel
CN107247371B (en) Pixel electrode structure of liquid crystal display panel and liquid crystal display panel
CN116699909B (en) Array substrate and display panel
WO2023070726A1 (en) Array substrate and display panel
KR100633315B1 (en) Structure of common line for LCD and Storage line for in plain switching mode LCD
CN111123590B (en) Pixel array substrate
CN102279493A (en) Pixel unit and liquid crystal display device
WO2018228265A1 (en) Array substrate, preparation method therefor and display panel
CN206471102U (en) A kind of test device and display panel
KR100250972B1 (en) Liquid crystal display device
CN109407424B (en) Liquid crystal display panel and device
CN111061100A (en) Display panel
CN113900305A (en) Display panel and display device
KR100989165B1 (en) In-Plane Switching Mode Liquid Crystal Display device and method for fabricating the same
US20200124924A1 (en) Array substrate, display panel and display device
CN102290412B (en) Pixel structure

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant