CN116699567A - Photon detection chip and photon detection module - Google Patents

Abstract

The application provides a photon detection chip and a photon detection module, wherein the photon detection chip comprises a plurality of photon detection elements, a plurality of first switch selectors and a first converter, and the connection relation between the first converter and at least one photon detection element in the photon detection elements is controlled by the at least one first switch selector. The photon detection chip provided by the application has the programmable characteristic, and the light spot mode of the light spot detector chip can be changed by changing the configuration of the first switch selector, so that the photon detection chip can be suitable for different application scenes and meets the market demands.

Description

Photon detection chip and photon detection module

Technical Field

The present application relates to the field of photoelectric detection, and in particular, to a photon detection chip and a photon detection module.

Background

In electro-optical ranging, a photon detecting element in a detector is used for detecting light reflected back and converting an optical signal into an electrical signal, and a converter in the detector is used for calculating time from emission to reflection of the light according to the electrical signal, and a time of flight (TOF) method of photons can be used for determining a distance between an observed object and an observer. The principle of the time-of-flight method is that, when the speed of light c is known, the time t that the light is reflected back from the observer position to the observed object is obtained, and the distance d between the observed object and the observer is calculated from t, that is, d=c×t/2.

At present, one type of detector chip in the market only corresponds to detection of one type of light spot mode, and the light spot mode is fixed and unchanged, namely, the light spot mode cannot be changed after leaving a factory. With the continual updating of various lidar system customization requirements, current detector chips have failed to meet market demands.

Disclosure of Invention

The application provides a photon detection chip and a photon detection module, wherein the photon detection chip has programmable characteristics, and the logical connection relation among all photon detection elements can be changed by changing the configuration of all first switch selectors in the detector chip, namely, the light spot mode of the detection chip is changed.

In a first aspect, the present application provides a photon detection chip comprising a plurality of photon detection elements, a plurality of first switch selectors, and a first converter, the connection relationship between the first converter and at least one photon detection element of the plurality of photon detection elements being determined by at least one first switch selector.

In the present application, one switch selector may determine the connection between the first converter and one photon detection element, or one switch selector may determine the connection between the first converter and a plurality of photon detection elements, or a plurality of switch selectors may determine the connection between the first converter and one photon detection element or a plurality of photon detection elements, or the like. Therefore, the photon detection chip provided by the application has a plurality of connection relations among the photon detection elements, the first switch selectors and the first converters, can correspondingly realize a plurality of light spot modes, and can be suitable for various application scenes.

Based on the first aspect, in a possible implementation manner, the plurality of first switch selectors are used to implement physical connection between the plurality of photon detection elements.

The physical connection between the plurality of first switch selectors and the plurality of photon detection elements refers to a connection relationship of the plurality of photon detection elements and the plurality of first switch selectors on a static structure, and particularly, reference may be made to the related description of the physical connection below.

Based on the first aspect, in a possible implementation manner, each of the plurality of first switch selectors includes a plurality of switches therein, and the logic connection between the two or more photon detection elements is realized by controlling states of the one or more switches in the first switch selector.

It can be understood that the first switch selector includes one or more switches, and changing the state of one or more switches can change the logic connection relationship between two or more photon detection elements, and by changing the state of each switch in the first switch selector in the detector, the logic connection relationship between each photon detection element in the detector can be changed, so as to change the light spot mode of the detector, so that the detection chip can be suitable for various application scenarios, and different design requirements can be met.

Based on the first aspect, in a possible implementation manner, the photon detection chip further includes a plurality of second switch selectors and a plurality of buses, each of the plurality of first switch selectors is physically connected to a first bus of the plurality of buses through one second switch selector, the first bus is connected to the first converter, and the second switch selector is used for controlling signals on the first switch selector to be selectively transmitted to the first converter.

It will be appreciated that the physical connection between the respective photon detection element and the respective first switch selector, each of the first switch selectors being physically connected to one of the plurality of buses through a second switch selector, the buses being physically connected to the converter, wherein the second switch selector is operable to control the selective transmission of the signal selector on the first switch selector to the converter.

Based on the first aspect, in a possible implementation manner, one first switch selector of the plurality of first switch selectors includes four ports, wherein two ports are used for connecting one photon detection element, and the other two ports are used for connecting one first switch selector.

Based on the first aspect, in a possible implementation manner, the plurality of photon detection elements are arranged in a plurality of rows or a plurality of columns.

Based on the first aspect, in a possible implementation manner, each switch selector set is physically connected to one bus of the plurality of buses, wherein one switch selector set refers to a plurality of first switch selectors located on the same row or the same column.

Based on the first aspect, in a possible implementation manner, each first switch selector is controlled by a 4-bit register.

In a second aspect, the present application provides a photon detection module comprising a photon detection chip as described in the first aspect or any one of the possible implementations of the first aspect.

Based on the second aspect, in a possible implementation manner, the photon detection module includes any one of a laser radar detector, an infrared detector and a visible light sensor.

Drawings

FIG. 1 is a schematic view of a spot mode of a detector chip according to the present application;

FIG. 2 is a schematic diagram of a portion of a detector chip according to the present application;

FIG. 3 is a schematic diagram of a part of a detector chip in a scenario according to the present application;

FIG. 4 is a schematic diagram of a portion of a detector chip according to the present application;

FIG. 5 is a schematic diagram of a portion of a detector chip according to the present application;

fig. 6A is a schematic structural diagram of a first switch selector according to the present application;

FIG. 6B is a schematic diagram of a first switch selector according to another embodiment of the present application;

FIG. 6C is a schematic diagram of a first switch selector according to another embodiment of the present application;

FIG. 7 is a schematic diagram of a logic connection between a portion of a photon detecting element and a portion of a first switch selector in a scenario provided by the present application;

FIG. 8 is a schematic diagram of a logic connection between a portion of a photon detection component and a portion of a first switch selector according to another embodiment of the present application;

FIG. 9 is a schematic diagram illustrating a logical connection between a portion of the photon detecting elements and a portion of the first switch selectors in yet another scenario provided by the present application;

FIG. 10 is a schematic diagram of a logic connection between a portion of a photon detection component and a portion of a first switch selector according to another embodiment of the present application;

FIG. 11 is a schematic diagram of mapping relationships among each photon detecting element, each first switch selector and a bus in a scenario provided by the present application;

FIG. 12 is a schematic diagram illustrating a connection relationship between a first switch selector and a bus according to the present application;

fig. 13 is a schematic diagram of mapping relationships among each photon detecting element, each first switch selector, and a bus in still another scenario provided by the present application.

Detailed Description

Before describing embodiments of the present application, the terminology used in the present application will be described.

Physical connection refers to the connection of two devices through the actual line, where the line refers to the carrier or physical medium carrying the signals or messages. For example, the actual line may be a signal line. In the application, each first switch selector is physically connected with each photon detection element, or a plurality of first switch selectors are used for realizing the related content related to physical connection among a plurality of photon detection elements, and the like, which means that in a static structure, a plurality of first switch selectors and a plurality of photon detectors are connected through lines, and mainly expresses the connection relation in the static structure. The physical connection is relative to the logical connection.

Logical connections refer to connection relationships that are subdivided on the basis of physical connections. In the present application, "each of the plurality of first switch selectors includes a plurality of switches, and logic connection between two or more photon detection elements is achieved by controlling states of the plurality of switches in the one first switch selector," or the plurality of first switch selectors are used for controlling logic connection relations between the plurality of photon detection elements, or by changing configurations of the one or more first switch selectors, logic connection relations between the plurality of photon detection elements and the like may be changed to relate to logic connection.

The plurality of first switch selectors and the plurality of photon detection elements are physically connected, and it is understood that the ports of the plurality of first switch selectors are connected with the ports of the plurality of photon detection elements, but all the first switch selectors are not configured or all the first switch selectors are in an off state; in the case of physical connection, even if a photon falls on the photon detecting element, the photon detecting element detects the photon, and after converting the optical signal into an electrical signal, the electrical signal cannot be transmitted to the back-end circuit, because the first switch selector connected to the photon detecting element is in an off state, and the signal cannot pass through. For example, referring to fig. 5 below in the specification, the physical connection between the plurality of first switch selectors and the plurality of photon detection elements is implemented in fig. 5.

The plurality of first switch selectors are used for controlling the logic connection relation between the plurality of photon detection elements, and it is understood that all or part of the first switch selectors are configured on the basis of realizing connection between ports of the plurality of first switch selectors and ports of the plurality of photon detection elements, and all or part of the first switch selectors are configured to mean that not all the first switch selectors are in an open state, or that is, part of the first switch selectors are in an open state, and part of the first switch selectors are in a closed state. In the present application, one of the first switch selectors may include one or more switches, and all or part of the first switch selectors may be configured so that a part of the switches in the part of the first switch selectors are in a closed state and a part of the switches are in a closed state. In some scenarios, the switch or switches or first switch selector or switches in the closed state can connect two or more photon detection elements that convert an optical signal to an electrical signal that can be transmitted to the back-end circuit through the closed switch (the first switch selector where it is located) when a photon falls in the region where the two or more connected photon detection elements are located. Thus, in the case of a logical connection, the switch in the closed state (the first switch selector in which it is located) enables the transmission of signals. For example, the right side of fig. 7, the right side of fig. 8, the right side of fig. 9, and the right side of fig. 10 are all logical connections, as implemented in the following description.

The light spot mode refers to the enabling relation between the light spot and each photon detection element, and comprises the positions where the light spot can enable the photon detection elements, and the arrangement form and the number of the enabled photon detection elements. For example, referring to fig. 1, fig. 1 is a schematic view of a spot mode of a detector chip according to the present application. In fig. 1, a small square indicates a photon detecting element, a plurality of photon detecting elements are distributed in a two-dimensional array, and a2 x 2 array of photon detecting elements circled by a shadow frame indicates a region that can be enabled. In fig. 1, the detector corresponds to a spot pattern in which the spots enable 2 x 2 arrays of shadow portions, each enabled 2 x 2 array being spaced 2 columns apart in the horizontal direction and 1 row apart in the vertical direction.

In a conventional detector chip, the enabling relationship between the light spot and the photon detection element is fixed, and the mapping relationship between the converter and the photon detection element is also fixed, for example, in fig. 1, only each 2×2 array area is connected to the converter through a signal line, and the photon detection elements in other areas are not connected to the converter. With the continual updating of various lidar system customization requirements, current detector chips have failed to meet market demands.

The application provides a photon detection chip, which has the programmable characteristic that the logic connection of each photon detection element in the detector, namely the light spot mode, can be changed through programming. The photon detection chip provided by the application is described below.

The photon detection chip comprises a plurality of photon detection elements and a plurality of first switch selectors, wherein the plurality of first switch selectors are used for physically connecting the plurality of photon detection elements. For example, referring to fig. 2, fig. 2 is a schematic diagram of a connection relationship between a plurality of photon detecting elements and a plurality of first switch selectors according to the present application. In fig. 2, a large box represents one photon detection element, and a small box represents one first switch selector, and the respective photon detection elements are physically connected by a plurality of first switch selectors in accordance with the connection form shown in fig. 2. In the example of fig. 2, each first switch selector includes four ports, where two ports are respectively connected to one photon detection element, and the other two ports are respectively connected to the first switch selector.

In the example of fig. 2, each photon-detecting element is square or rectangular, and each photon-detecting element is arranged in a row or column. In practical implementation, the shape of each photon detecting element may be square or rectangular, and arranged in rows or columns as shown in fig. 2, and the shape and arrangement of each photon detecting element may also be other, for example, the shape of each photon detecting element is regular hexagon, honeycomb arrangement, the shape of each photon detecting element may also be regular octagon, regular decagon, etc. Fig. 2 is merely for illustration, and the shape and arrangement of each photon detecting element are not particularly limited in the present application.

In one example, the photon detection element may be implemented by a photodiode, which may be a single photon diode or a single photon avalanche diode, etc., for converting a received optical signal into an electrical signal, and a quenching circuit for rapidly extracting a digital pulse signal from the electrical signal, quenching the electrical signal by reducing a reverse bias voltage of the photodiode, and restoring the photodiode to a rest cut-off state or cut-off mode so as to enter a new round of state to be measured. If the photon detection element is implemented by a photodiode and a quenching circuit, the schematic diagram of fig. 2 can be expanded to be represented as the schematic diagram shown in fig. 3.

Alternatively, the physical connection between each photon-detecting element and each first switch selector in the detector chip may also be a schematic diagram as shown in fig. 4. Also in the schematic of fig. 4, the large box represents the photon detection element and the small box represents the first switch selector. In practice, rotating the diagram of fig. 2 by 90 degrees in a clockwise or counter-clockwise direction results in the diagram of fig. 4, the rows in the diagram of fig. 2 becoming the columns in the diagram of fig. 4, and the columns in the diagram of fig. 2 becoming the rows in the diagram of fig. 4.

Alternatively, the physical connection between each photon detecting element and each first switch selector in the detecting chip may also be represented as a schematic diagram as shown in fig. 5, where the schematic diagrams in fig. 5 and fig. 2 are substantially the same, and each first switch selector has four ports, where two ports are respectively connected to one photon detecting element, and the other two ports are respectively connected to one first switch selector.

In any one of the examples of fig. 2 to 5, the connection relationship between the four ports of each first switch selector may be configured by the states of the four switches, that is, each first switch selector may be implemented by the four switches, the connection relationship between the four ports may be changed by controlling the open/close states of the four switches, and each first switch selector may be controlled by a 4-bit register. If "1" indicates a high level H, it indicates that one of the switches in the first switch selector is in a closed state, and "0" indicates a low level L, it indicates that one of the switches in the first switch selector is in an open state, as shown in fig. 6A, when the register is configured to 1000, it indicates that one of the switches is in a closed state, and the other switches are in an open state, where two ends of the switch in the closed state are connected, for example, between the upper port and the left port in fig. 6A, of course, the upper port may be connected to the right port, the lower port may be connected to the left port, or the lower port may be connected to the right port; referring to fig. 6B, when the register is configured to 1100, two adjacent switches are in a closed state, and other switches are in an open state, where two ends of the switches in the closed state are connected, for example, the upper port and the left port, and the upper port and the right port in fig. 6B are all connected, and of course, the lower port and the left port, the lower port and the right port are all connected, or the upper port and the right port, the lower port and the right port are all connected, or the upper port and the left port, and the lower port and the left port are all connected; referring to fig. 6C, when the register is configured to 1111, which indicates that the four switches are all in the closed state, connections are established between the upper port and the left port, between the upper port and the right port, between the lower port and the left port, and between the lower port and the right port. The register may also be in other configurations, such as when the register is configured to 0100 or 0010 or 0001, indicating that one switch is in the closed state, as with 1000; when there are two "1" s in the 4-bit register, it means that there are two switches in the closed state, if two "1" s are adjacent, for example 0110, 0011, it means that there are two adjacent switches in the closed state, if two "1" s are not adjacent, for example 0101, 1010, it means that two switches in the closed state are not adjacent, specifically, which two switches are in the closed state can be specifically set according to specific situations; when there are three "1" s in the 4-bit register, no matter where the "1" is, it indicates that there are three switches in the closed state, and in particular, which three switches are in the closed state can be set according to the specific situation.

The state of each switch in each first switch selector is controlled by configuring each first switch selector, and the logical connection relation among a plurality of photon detection elements is changed, so that the light spot mode of the detector is changed. For example, the logical connection relationship between a part of the first switch selector and a part of the photon detection element corresponding to the light spot mode shown in fig. 1 is shown in fig. 7. For ease of viewing, the spot pattern shown in fig. 1 is drawn to the left of fig. 7, and for ease of understanding and description, "enable array 1", "enable array 2", "enable array 3" are labeled in the left diagram of fig. 7, as shown in the left diagram of fig. 7. The right side of fig. 7 shows the logical connection relationship between a part of the first switch selectors corresponding to the spot mode of the left side and a part of the photon detection elements, wherein the large box represents one photon detection element, the small box represents one first switch selector, and for convenience of description, the part of the photon detection elements are marked with numbers, and the first switch selectors configured in the right side of fig. 7 are marked with shadows (gray). In fig. 7, the photon detection elements a11, a12, a21, and a22 correspond to the enable array 1, the first switch selector between the photon detection elements a11, a12 may be configured as 0011 (or may also be 1100, etc.), and the first switch selector between the photon detection elements a21, a22 may be configured as 1100 (or may also be 0011, etc.); the configuration of the first switch selector between the photon detection elements a15, a16, a25, and a16 and the configuration of the first switch selector between the photon detection elements a11, a12 may be the same, and the configuration of the first switch selector between the photon detection elements a25, a26 and the configuration of the first switch selector between the photon detection elements a21, a22 may be the same, corresponding to the enable array 2; the configuration of the first switch selector between the photon detection elements a41, a42, a51, and a52 corresponding to the enable array 3 may be the same as the configuration of the first switch selector between the photon detection elements a11, a12, and the configuration of the first switch selector between the photon detection elements a51, a52 may be the same as the configuration of the first switch selector between the photon detection elements a21, a 22. In addition, as can also be seen from the right-hand side view, the enable array 1 and the enable array 2, the enable array 3 and the enable array 4 are all separated by 2 columns in the horizontal direction, and the enable array 1 and the enable array 3, and the enable array 2 and the enable array 4 are all separated by 1 row in the vertical direction.

In fig. 7, the first switch selector hatched (gray) indicates that the first switch selector is configured, and the first switch selector that is white may be understood as not configured, or alternatively, the first switch selector that is white may be understood as 0000, that is, all low, and each switch in each first switch selector is in an off state. Essentially, unconfigured, i.e., meaning that the respective switch is in an open state.

In one example, the logical connection relationship between a portion of the first switch selector and a portion of the photon detection element corresponding to the light spot mode in the left side diagram of fig. 7 may also be as shown in fig. 8. Also in fig. 8, photon detection elements a11, a12, a21, and a22 correspond to enable array 1, photon detection elements a15, a16, a25, and a26 correspond to enable array 2, and photon detection elements a41, a42, a51, and a52 correspond to enable array 3. It should be noted that the logical connection relationships shown in fig. 8 and the right-hand diagram of fig. 7 are the same, and the corresponding spot modes shown in the left-hand diagram of fig. 7 are two different implementations, and the configuration of the first switch selector added in fig. 8 is optional compared with the right-hand diagram of fig. 7.

For another example, the left side of fig. 9 shows yet another light spot pattern, and the right side shows the logical relationship between a portion of the photon detection elements and a portion of the first switch selectors corresponding to the light spot pattern. The right hand side of fig. 9 shows a photon detection element with a large box and a first switch selector with a small box. For ease of understanding and description, "enable array 4," "enable array 5," "enable array 6," and "enable array 7" are labeled in the left-hand diagram, and the first switch selector configured in the right-hand diagram of fig. 9 is labeled gray for ease of viewing. As can be seen from fig. 9, the photon detection elements B11, B12, B21, B22 correspond to the enable array 4, the photon detection elements B23, B24, B33, B34, B43, B44 correspond to the enable array 5, the photon detection elements B15, B16, B25, B26 correspond to the enable array 6, the photon detection elements B41, B42, B51, B52 correspond to the enable array 7, and as can also be seen from the right side of fig. 9, the enable array 4, the enable array 6, and the enable array 7 are all arrays of 2×2, the enable array 5 is an array of 3*2, the enable array 5 has a downward displacement in the vertical direction relative to the enable array 4, and the space between the enable array 7 and the enable array 4 is 1 row.

In one example, the logical connection relationship between a portion of the first switch selector and a portion of the photon detection element corresponding to the light spot mode in the left side diagram of fig. 9 may also be as shown in fig. 10. Similarly, in fig. 10, the photon detection elements B11, B12, B21, B22 correspond to the enable array 4, the photon detection elements B23, B24, B33, B34, B43, B44 correspond to the enable array 5, the photon detection elements B15, B16, B25, B26 correspond to the enable array 6, and the photon detection elements B41, B42, B51, B52 correspond to the enable array 7. It should be noted that the logical connection relationships shown in fig. 10 and the right-hand diagram of fig. 9 are the same, and the corresponding spot modes shown in the left-hand diagram of fig. 9 are two different implementations, and the configuration of the added first switch selector in fig. 10 is optional compared with the configuration of the first switch selector in the right-hand diagram of fig. 9.

Optionally, the first switch selector may further include a switch or other plurality of switches for controlling the logical connection relationship between the plurality of photon detection elements. The above examples are merely for illustrating how each of the first switch selectors is connected to each of the photon detection elements and how the logical connection relationship between each of the photon detection elements is controlled, and are not intended to limit the present application, which is not particularly limited to the number of switches included in the first switch selector and the logical relationship between which of the photon detection elements the switches are controlled.

It should be noted that, in the actual implementation of the detector, the rows or columns located at the edges may be photon detection elements, or may be first switch selectors, which may be specifically designed according to specific situations, and specifically configured according to specific designs, and the present application is not limited thereto.

The photon detection chip further comprises a plurality of second switch selectors, a plurality of buses and a plurality of converters, wherein the converters are used for calculating photon flight time according to the electric signals sent by the photon detection elements. The above describes the physical connection and logical connection between the plurality of first switch selectors and the plurality of photon detection elements. The functions of the bus and the second switch selectors, and the relationships between the plurality of photon detection elements and the plurality of first switch selectors and the plurality of bus, the plurality of second switch selectors and the plurality of converters are described below.

Referring to fig. 11, fig. 11 is an exemplary diagram of a relationship among a plurality of photon detection elements, a plurality of first switch selectors, and a plurality of buses provided in the present application. The left diagram of fig. 11 is a diagram of the logical connection relationship between a portion of the photon detecting elements corresponding to the light spot mode of fig. 1 and a portion of the first switch selector (i.e., the right diagram of fig. 7), and the right diagram shows a bus and a converter schematic diagram corresponding to the logical connection relationship. In one example, in fig. 11, a first switch selector of a row corresponds to one bus, and each bus is connected to one converter, for example, in fig. 11, a first switch selector of a first row corresponds to the first bus, a first switch selector of a second row corresponds to the fifth bus, a first switch selector of a fifth row corresponds to the second bus …, and a first switch selector of a sixth row corresponds to the sixth bus. Each bus includes a plurality of bus nodes, such as "one bus node" shown in the right-hand diagram of fig. 11, and for each row of first switch selectors, each first switch selector in the row corresponds to one bus node, for example, a first row of first switch selectors corresponds to a first bus node of the first bus, and a second first switch selector corresponds to a second bus node … of the first bus, and a seventh first switch selector corresponds to a seventh bus node of the first bus.

The correspondence between the first switch selector and the bus node may be implemented by a second switch selector. Referring to the schematic diagram shown in fig. 12, the bottom layer is a first switch selector, the upper layer is a bus, the bus includes a bus node, the first switch selector of the bottom layer is connected to the bus node of the bus through a second switch selector, and the connection relationship between any of the first switch selectors and the bus in fig. 11 can be connected in the manner shown in fig. 12. For example, in fig. 11, each first switch selector in the first row may be connected to the first bus through a second switch selector, each first switch selector in the second row may be connected to the second bus through a second switch selector …, specifically, the first switch selector in the first row may be connected to the first bus node of the first bus through a second switch selector, and the second first switch selector in the first row may be connected to the second bus node of the first bus through a second switch selector ….

The second switch selector, like the first switch selector, includes one or more switches, and controls whether or not to transmit the signal on the first switch selector to the converter through the bus by controlling the states of the plurality of switches. In one implementation, the second switch selector includes four switches, each of which is connected to four ports of the first switch selector, i.e., one switch is connected to one port of the first switch selector, and each switch is used to control whether a signal on the port connected to the switch is transmitted to the converter through the bus. In this implementation, the control of the second switch selector may be implemented by a 4-bit register. In a further implementation, in case of determining the spot mode, the configuration, i.e. the determination, of the respective first switch selector may be performed by several switches depending on the specific configuration of the respective first switch selector. For example, if the configuration of the first switch selector is 1000, the second switch selector may be implemented by 1 switch, if the configuration of the first switch selector is 1100, the second switch selector may be implemented by 2 switches, and so on. Control of the second switch selector may be achieved by a register.

The bus node includes a buffer for preventing signal degradation. Optionally, the bus node may further comprise a logic or gate, which may be used to prevent signal collisions on one bus.

In one implementation, when photons fall on the enable array 1 region formed by the photon detection elements a11, a12, a21, a22 and the enable array 2 region formed by the photon detection elements a15, a16, a25, a26, the signals generated by the photon detection elements in the enable array 1 region can be transmitted to the first converter through the first bus, the signals generated by the photon detection elements in the enable array 2 region can be transmitted to the second converter through the second bus, or the signals generated by the photon detection elements in the enable array 1 region can be transmitted to the second converter through the second bus, and the signals generated by the photon detection elements in the enable array 2 region can be transmitted to the first converter through the first bus. That is, to avoid signal collisions, signals may be transmitted to different converters over different buses.

As shown in the example of fig. 11, when the area of the enable array 1 composed of the photon detection elements a11, a12, a21, a22, the enable array 2 composed of the photon detection elements a15, a16, a25, a26, the area of the enable array 3 composed of the photon detection elements a41, a42, a51, a52, and the area of the enable array 4 composed of the photon detection elements a45, a46, a55, a56 have photons incident at the same time, the signals generated by the photon detection elements in the area of the enable array 2 can be mapped onto the sixth bus node of the first bus through the sixth first switch selector located in the first row, and the signals are transmitted to the first converter through the first bus; the signals generated by the photon detection elements of the enabled array 1 area can be mapped onto a second bus node of a second bus through a second first switch selector positioned on a second row, and the signals are transmitted to a second converter through the second bus; the signals generated by the photon detection elements in the area of the enabling array 3 can be mapped onto a second bus node of a fourth bus through a second first switch selector positioned in a fourth row, and the signals are transmitted to a fourth converter through the fourth bus; the signals generated by the photon detection elements of the area of the enable array 4 can be mapped onto a sixth bus node of a fifth bus through a sixth first switch selector located in a fifth row, and the signals can be transmitted to a fifth converter through the fifth bus.

For another example, the left side diagram of fig. 13 is a diagram of a logical connection relationship between a portion of the photon detecting elements corresponding to the light spot mode of fig. 9 and a portion of the first switch selector (i.e., the right side diagram of fig. 9), and the right side diagram shows a bus and converter schematic diagram corresponding to the logical connection relationship. When the area of the enable array 4 composed of the photon detection elements B11, B12, B21, B22, the area of the enable array 5 composed of the photon detection elements B23, B24, B33, B34, B43, B44, the area of the enable array 6 composed of the photon detection elements B15, B16, B25, B26, the area of the enable array 7 composed of the photon detection elements B41, B42, B51, B52, and the area of the enable array 8 composed of the photon detection elements B45, B46, B55, B56 have photons incident at the same time, the signals generated by the photon detection elements of the area of the enable array 6 can be mapped onto a sixth bus node of a seventh bus through a sixth first switch selector located in the first row, and the signals are transmitted to a seventh converter through the seventh bus; the signals generated by the photon detection elements of the area of the enabling array 4 can be mapped onto a second bus node of an eighth bus through a second first switch selector positioned on a second row, and the signals are transmitted to an eighth converter through the eighth bus; the signals generated by the photon detection elements in the area of the enabling array 5 can be mapped onto a fourth bus node of a ninth bus through a fourth first switch selector positioned in a third row, and the signals are transmitted to a ninth converter through the ninth bus; the signals generated by the photon detection elements of the area of the enabling array 7 can be mapped onto the second bus node of the tenth bus through the second first switch selector positioned on the fourth row, and the signals are transmitted to the tenth converter through the tenth bus; the signals generated by the photon detection elements of the area of the enable array 8 can be mapped onto a sixth bus node of an eleventh bus via a sixth first switch selector located in a fifth row, through which the signals are transmitted to the eleventh converter.

In one implementation, when there are photons falling simultaneously in the enable array 1 region composed of the photon detection elements a11, a12, a21, a22 and the enable array 2 region composed of the photon detection elements a15, a16, a25, a26, the same bus may be used to transmit the signals generated by the photon detection elements of the enable array 1 region and the signals generated by the photon detection elements of the enable array 2 region to the converters in a time sharing manner, for example, at a first time, the signals generated by the photon detection elements of the enable array 1 region are transmitted to the first converter through the first bus, and at a second time, the signals generated by the photon detection elements of the enable array 2 region are transmitted to the first converter through the first bus. Of course, it is also possible to transmit the signals generated by the photon detection elements of the area of the enable array 1 and the signals generated by the photon detection elements of the area of the enable array 2 to the second converter via the second bus at different times.

In one scenario, when a plurality of photons simultaneously fall on the enable array 1 region composed of the photon detection elements a11, a12, a21, a22 and the enable array 2 region composed of the photon detection elements a15, a16, a25, a26 at a certain time, only the signal generated by the photon detection element of one of the enable array regions may be transmitted to the converter, for example, only the signal generated by the photon detection element of the enable array 1 region may be transmitted to the converter, or only the signal generated by the photon detection element of the enable array 2 region may be transmitted to the converter.

Alternatively, in fig. 11 and fig. 13, the first switch selectors on a column may share a bus, where each bus is connected to a converter, that is, each first switch selector on each column is connected to each bus node of one bus through the second switch selector, and when a photon falls into an enabled area or an enabled photon detecting element, the photon may be mapped to a certain bus through the corresponding first switch selector, and transmitted to the converter through the bus.

The mapping between each photon detecting element and the bus described in fig. 11 to 13 is only one possible implementation, and the mapping between each photon detecting element and the bus may also be implemented in other manners, and fig. 11 to 13 do not limit the present application.

Alternatively, the detector chip described in the present application may be implemented in a two-layer structure, where the connection between each first switch selector and each photon detection element is one layer, and the bus is another layer, and the two layers may be connected by a second switch selector.

It can be seen that the present application provides a photon detection chip having programmable characteristics. In the photon detection chip, the plurality of first switch selectors are used for realizing connection among the plurality of photon detection elements, and the logical connection relation among the plurality of photon detection elements, namely the light spot mode, can be changed by changing the configuration of one or more first switch selectors. Therefore, by using the detector chip provided by the application, each first switch selector can be specifically configured according to specific application scenes, and when the application scenes change, the configuration of the first switch selector can be adjusted or changed according to specific situations. The detector chip provided by the application has strong compatibility, can be suitable for various scenes, and can meet the market demands.

In addition, the light spot mode of the traditional detector chip is fixed and cannot be changed after leaving the factory, if the assembly precision of the detector chip is poor, the position where photons fall into is deviated, for example, the photons fall on the edge of an enabling area or outside the enabling area, so that the photon detection element cannot detect the photons, and therefore the converter cannot receive signals, and the detector chip cannot work normally or the detection precision is inaccurate. Compared with the traditional detector chip, the detector chip provided by the application can change the configuration of the first switch selector in a programming mode, adjust the enabling area, reduce errors and improve detection precision; the detector chip provided by the application can also avoid the spot position error caused by aging of the traditional detector chip.

The application also provides a photon detection module which comprises any one of the photon detection chips which can be realized, and the photon detection module can be any one of a laser radar detector and an infrared detector, and even can be a visible light sensor.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to the related descriptions of other embodiments.

In the above embodiments, it may be implemented in whole or in part by software, hardware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product may contain code. When the computer program product is read and executed by a computer, some or all of the steps described in the method embodiments above may be implemented. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line), or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium, or a semiconductor medium, etc.

The steps in the method of the embodiment of the application can be sequentially adjusted, combined or deleted according to actual needs; the units in the device of the embodiment of the application can be divided, combined or deleted according to actual needs.

The foregoing has outlined rather broadly the more detailed description of embodiments of the application, wherein the principles and embodiments of the application are explained in detail using specific examples, the above examples being provided solely to facilitate the understanding of the method and core concepts of the application; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.

Claims (10)

1. A photon detection chip comprising a plurality of photon detection elements, a plurality of first switch selectors, and a first converter, a connection relationship between the first converter and at least one photon detection element of the plurality of photon detection elements being determined by the at least one first switch selector.

2. The photon detection chip according to claim 1, wherein the plurality of first switch selectors are configured to enable physical connection between the plurality of photon detection elements.

3. The photon detection chip according to claim 1 or 2, wherein each of the plurality of first switch selectors comprises one or more switches therein, the logic connection between two or more photon detection elements being achieved by controlling the state of the one or more switches in the first switch selector.

4. A photon detection chip according to any one of claims 1 to 3, further comprising a plurality of second switch selectors and a plurality of buses, each of the plurality of first switch selectors being physically connected to a first bus of the plurality of buses through a second switch selector, the first bus being connected to the first converter, the second switch selector being operable to control selective transmission of signals on the first switch selectors to the first converter.

5. The photon detection chip according to any one of claims 1 to 4, wherein one of the plurality of first switch selectors comprises four ports, wherein two ports are each for connecting one photon detection element and two other ports are each for connecting one first switch selector.

6. The photon detection chip according to claim 5, wherein the plurality of photon detection elements are arranged in a plurality of rows or a plurality of columns.

7. The photon detection chip according to claim 6, wherein each set of switch selectors is physically connected to one of the plurality of buses, wherein one set of switch selectors refers to a plurality of first switch selectors located on a same row or a same column.

8. The photon detection chip according to any one of claims 1 to 7, wherein each first switch selector is controlled by a 4-bit register.

9. A photon detection module comprising a photon detection chip according to any one of claims 1 to 8.

10. The photon detection module according to claim 9, wherein the photon detection module comprises any one of a lidar detector, an infrared detector, and a visible light sensor.