CN116681907A

CN116681907A - Matching precision detection method of metal capacitor, controller and storage medium

Info

Publication number: CN116681907A
Application number: CN202310513915.1A
Authority: CN
Inventors: 熊剑锋; 刘弋波; 赖鼐; 龚晖
Original assignee: Zhuhai Miaocun Technology Co ltd
Current assignee: Zhuhai Miaocun Technology Co ltd
Priority date: 2023-05-08
Filing date: 2023-05-08
Publication date: 2023-09-01
Anticipated expiration: 2043-05-08
Also published as: CN116681907B

Abstract

The invention discloses a method for detecting matching precision of metal capacitors, a controller and a storage medium, wherein first capacitance parameters of a plurality of metal capacitors to be matched in a circuit diagram to be detected are obtained; performing first matching detection processing according to a preset circuit diagram matching standard and a first capacitance parameter to obtain circuit diagram matching precision; determining a target circuit diagram meeting the circuit matching design requirement according to the circuit diagram matching precision; acquiring second capacitance parameters of a plurality of metal capacitances to be matched in a layout to be detected, which is generated according to a target circuit diagram; performing second matching detection processing according to a preset layout matching standard and second capacitance parameters to obtain layout matching precision; and determining a target layout meeting the layout matching design requirement according to the layout matching precision. According to the scheme provided by the embodiment of the invention, the detection efficiency of the metal capacitor matching precision can be improved, and the integrity and the accuracy of the metal capacitor matching precision detection can be effectively ensured.

Description

Matching precision detection method of metal capacitor, controller and storage medium

Technical Field

The invention relates to the technical field of integrated circuit design, in particular to a method for detecting matching precision of a metal capacitor, a controller and a storage medium.

Background

In the integrated circuit design process, there is a need for metal capacitance matching in various analog circuits, such as metal capacitance in ADC circuits and DAC circuits. Because the capacitance of metal capacitors is relatively stable, circuit designers typically employ metal capacitors for metal-capacitor matching designs. However, in the chip manufacturing process, there is often a mismatch of metal capacitors, and the reasons for the mismatch of metal capacitors can be classified into random mismatch and systematic mismatch. The random mismatch refers to mismatch caused by microscopic fluctuation of parameters affecting the characteristics of the metal capacitor, such as the size of the metal capacitor, the thickness of an oxide layer, and the like. The system mismatch refers to metal capacitance mismatch caused by process deviation, contact hole metal capacitance, temperature gradient, process parameter gradient and the like. In the circuit design and layout design process, random mismatch and system mismatch are required to be reduced to achieve higher matching precision, so that the matching precision of metal capacitors to be matched is required to be detected.

In the related art, the detection method for the matching precision of the metal capacitor comprises the following steps: and covering all the metal capacitors to be matched by using a specific layer, and then detecting whether virtual metal capacitors with the size meeting the requirement exist around the metal capacitor array. Under the traditional method, the matching precision between the metal capacitors needing to be matched cannot be detected, and the matching precision between the metal capacitors needs to be checked manually. However, manual detection is time-consuming, the detection efficiency is low, and the detection integrity and accuracy cannot be guaranteed.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein.

The embodiment of the invention provides a metal capacitor matching precision detection method, a controller and a computer storage medium, which can improve the metal capacitor matching precision detection efficiency and effectively ensure the integrity and accuracy of metal capacitor matching precision detection.

In a first aspect, an embodiment of the present invention provides a method for detecting matching accuracy of a metal capacitor, including:

acquiring first capacitance parameters of a plurality of metal capacitances to be matched in a circuit diagram to be detected;

performing first matching detection processing according to a preset circuit diagram matching standard and the first capacitance parameter to obtain circuit diagram matching precision;

determining a target circuit diagram meeting the circuit matching design requirement according to the circuit diagram matching precision;

acquiring second capacitance parameters of a plurality of metal capacitances to be matched in a layout to be detected generated according to the target circuit diagram;

performing second matching detection processing according to a preset layout matching standard and the second capacitance parameter to obtain layout matching precision;

and determining a target layout meeting the layout matching design requirement according to the layout matching precision.

In some embodiments, the first capacitance parameter comprises: metal capacitance type, finger width, finger length, finger spacing, finger index, bottom metal layer, top metal layer and multiple;

the first matching detection processing is performed according to a preset circuit diagram matching standard and the first capacitance parameter to obtain circuit diagram matching precision, and the method comprises the following steps:

obtaining a first circuit matching result under the conditions that the metal capacitance types are different, or the finger widths are different, or the finger lengths are different, or the finger distances are different, or the bottom metal layers are different, or the top metal layers are different, or the hand indexes are different;

obtaining a second circuit matching result under the condition that the metal capacitance type, the finger width, the finger length, the finger distance, the bottom metal layer, the top metal layer and the finger number are the same, but the multiples are different;

obtaining a third circuit matching result under the condition that the metal capacitance type, the finger width, the finger length, the finger distance, the bottom metal layer, the top metal layer, the hand index and the multiple are the same, but the multiple is not a multiple of 4;

And under the conditions that the metal capacitance type, the finger width, the finger length, the finger distance, the bottom metal layer, the top metal layer, the hand index and the multiple are the same, and the multiple is a multiple of 4, obtaining a fourth circuit matching result.

In some embodiments, the determining the target circuit diagram meeting the circuit matching design requirement according to the circuit diagram matching precision includes:

correspondingly modifying the first capacitance parameter under the condition that the circuit diagram matching precision is the first circuit matching result or the second circuit matching result or the third circuit matching result, so as to obtain the target circuit diagram;

and determining the circuit diagram to be detected as the target circuit diagram under the condition that the circuit diagram matching precision is the fourth circuit matching result.

In some embodiments, the second capacitance parameter comprises: metal capacitance area information, positive electrode information, negative electrode information and positive and negative electrode connecting wire information of each metal capacitance minimum unit;

wherein the metal capacitance region information includes: finger width, finger length, finger spacing, capacitance zone center point coordinates;

the positive electrode information includes: positive electrode length, positive electrode width, positive electrode center point coordinates;

The negative electrode information includes: the length of the negative electrode, the width of the negative electrode and the coordinates of the central point of the negative electrode;

the positive and negative electrode connecting line information: the length of the connecting wire metal, the width of the connecting wire metal, the size of a single contact hole, the number of the contact holes and the relative positions of the contact holes on the connecting wire metal.

In some embodiments, the performing a second matching detection process according to a preset layout matching standard and the second capacitance parameter to obtain a layout matching precision includes:

according to a preset basic matching standard, performing basic matching detection processing on the second capacitance parameters of the plurality of metal capacitors to be matched to obtain a basic matching result;

outputting an interruption detection report and modifying the second capacitance parameters until the second capacitance parameters are detected to be consistent under the condition that the base matching result is that the second capacitance parameters of the plurality of metal capacitances to be matched are inconsistent;

under the condition that the basic matching result is that the second capacitance parameters of the plurality of metal capacitors to be matched are consistent, performing characteristic matching detection processing according to a preset matching characteristic standard and the second capacitance parameters to obtain layout matching precision; wherein the characteristic matching detection process includes: a compact match detection process, a consistency match detection process, a symmetry match detection process, a dispersion match detection process, and a directional match detection process.

In some embodiments, the performing the characteristic matching detection process according to the preset matching characteristic standard and the second capacitance parameter to obtain the layout matching precision includes:

calculating according to the second capacitance parameter to obtain a metal capacitance array distribution pattern;

the compact match detection process includes: obtaining an array shape, an array length and an array width according to the metal capacitor array distribution pattern; obtaining a first compact matching result or a second compact matching result or a third compact matching result according to the array shape, the length-width ratio value of the array length and the array width and a preset ratio range;

the consistency matching detection process includes: determining a reference centroid according to the metal capacitor array distribution pattern; calculating mass center coordinates of a plurality of metal capacitors to be matched according to the second capacitance parameters; obtaining a first consistency matching result or a second consistency matching result or a third consistency matching result according to the distance between each centroid coordinate and the reference centroid and a preset distance range;

the symmetry matching detection process includes: establishing a reference coordinate system comprising an X axis and a Y axis by taking a reference centroid determined in the metal capacitor array distribution graph as an origin; judging according to the coordinate information of each metal capacitor to be matched to obtain a first symmetry matching result or a second symmetry matching result or a third symmetry matching result;

The dispersibility matching detection process includes: obtaining the number of metal capacitors in each row and each column in the metal capacitor array according to the distribution pattern of the metal capacitor array and the second capacitance parameter; obtaining the ratio of the number of the row metal capacitors according to the number of the metal capacitors; comparing the ratio of the number of the row metal capacitors with the ratio of the total multiple to obtain a first dispersity matching result or a second dispersity matching result or a third dispersity matching result;

the directivity match detection process includes: calculating chiral values of a plurality of metal capacitors to be matched according to the second capacitance parameters; and detecting according to the plurality of chiral values to obtain a first directional matching result or a second directional matching result or a third directional matching result.

In some embodiments, the determining, according to the layout matching precision, the target layout meeting the layout matching design requirement includes:

correspondingly modifying the second capacitance parameter under the condition that the first compactness matching result, the first consistency matching result, the first dispersivity matching result or the first direction matching result is obtained, so as to obtain the target layout;

Under the condition that the second compactness matching result, the second consistency matching result, the second dispersivity matching result or the second directivity matching result is obtained, modifying the second capacitance parameter according to a preset layout matching design requirement to obtain the target layout;

and determining the layout to be detected as the target layout under the condition that the third compactness matching result, or the third consistency matching result, or the third dispersivity matching result, or the third directionality matching result is obtained.

In some embodiments, the method further comprises:

under the condition that the circuit diagram matching precision is obtained, generating and outputting a circuit diagram matching result report according to the circuit diagram matching precision;

and under the condition that the layout matching precision is obtained, generating and outputting a layout matching result report according to the layout matching precision.

In a second aspect, an embodiment of the present invention provides a controller, including a memory, a processor, and a computer program stored in the memory and capable of running on the processor, where the processor implements the method for detecting matching accuracy of a metal capacitor according to any one of the first aspects when the processor executes the computer program.

In a third aspect, an embodiment of the present invention provides a computer-readable storage medium storing computer-executable instructions for performing the method for detecting matching accuracy of a metal capacitor according to any one of the first aspects.

The embodiment of the invention comprises the following steps: after first capacitance parameters of a plurality of metal capacitances to be matched in a circuit diagram to be detected are obtained, first matching detection processing is carried out according to preset circuit diagram matching standards and the first capacitance parameters, and circuit diagram matching accuracy is obtained; then, determining a target circuit diagram meeting the circuit matching design requirement according to the circuit diagram matching precision; then, second capacitance parameters of a plurality of metal capacitances to be matched in the layout to be detected, which are generated according to the target circuit diagram, are obtained; then, performing second matching detection processing according to a preset layout matching standard and a second capacitance parameter to obtain layout matching precision; and finally, determining a target layout meeting the layout matching design requirement according to the layout matching precision. By sequentially detecting the matching precision of the metal capacitor in the circuit design stage and the layout design stage, under the condition that the matching precision of the circuit diagram in the circuit diagram design stage meets the circuit matching design requirement, the layout is generated based on the target circuit diagram, so that the project period is shortened, the detection time is shortened, and the overall detection efficiency is improved to a certain extent; and continuously detecting the matching precision of the metal capacitor on the layout in the layout design stage to obtain the matching precision of the layout, and finally obtaining the target layout meeting the requirements of the layout matching design, thereby ensuring the integrity and the accuracy of detection. In other words, the matching precision detection is sequentially carried out in the circuit design stage and the layout design stage, so that the detection time is effectively shortened, the metal capacitance matching precision detection efficiency can be improved, and the integrity and the accuracy of the metal capacitance matching precision detection are effectively ensured.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

Drawings

FIG. 1 is a flow chart of a method for detecting matching accuracy of a metal capacitor according to an embodiment of the present invention;

FIG. 2 is a flow chart illustrating a specific method of step S120 in FIG. 1;

FIG. 3 is a schematic overall flow diagram of a circuit diagram accuracy detection process according to one embodiment of the present invention;

FIG. 4 is a flowchart illustrating a specific method of step S130 in FIG. 1;

FIG. 5 is a flowchart illustrating a specific method of step S150 in FIG. 1;

FIG. 6 is a schematic overall flow diagram of a compact match detection process, a consistent match detection process, and a symmetric match detection process in a characteristic match detection process;

fig. 7 is a schematic overall flow chart of the dispersion matching detection process and the directivity matching detection process in the characteristic matching detection process;

FIG. 8 is a schematic diagram of metal capacitors to be matched in a circuit provided by one embodiment of the present invention;

FIG. 9 is a schematic diagram of a circuit diagram form and layout form of a metal capacitor provided in one embodiment of the present invention;

FIG. 10 is a schematic diagram of a metal capacitance minimum unit in a layout according to an embodiment of the present invention;

FIG. 11 is a schematic diagram of a metal capacitor array in a layout provided in accordance with one embodiment of the present invention;

fig. 12 is a schematic diagram of a hardware structure of a controller according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.

It should be noted that although a logical order is illustrated in the flowchart, in some cases, the steps illustrated or described may be performed in an order different from that in the flowchart. The terms first, second and the like in the description and in the claims and in the above-described figures, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.

In the description of the embodiments of the present invention, the descriptions of the terms "one embodiment/implementation," "another embodiment/implementation," or "certain embodiments/implementations," "the above embodiments/implementations," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or examples is included in at least two embodiments or implementations of the present disclosure. In the present disclosure, schematic representations of the above terms do not necessarily refer to the same illustrative embodiment or implementation. It should be noted that although a logical order is illustrated in the flowchart, in some cases, the steps illustrated or described may be performed in an order different from that in the flowchart.

After acquiring first capacitance parameters of a plurality of metal capacitors to be matched in a circuit diagram to be detected, firstly, carrying out first matching detection processing according to a preset circuit diagram matching standard and the first capacitance parameters to obtain circuit diagram matching precision; then, determining a target circuit diagram meeting the circuit matching design requirement according to the circuit diagram matching precision; then, second capacitance parameters of a plurality of metal capacitances to be matched in the layout to be detected, which are generated according to the target circuit diagram, are obtained; then, performing second matching detection processing according to a preset layout matching standard and a second capacitance parameter to obtain layout matching precision; and finally, determining a target layout meeting the layout matching design requirement according to the layout matching precision. Therefore, the invention effectively shortens the detection time by sequentially carrying out the matching precision detection in the circuit design stage and the layout design stage, can improve the detection efficiency of the matching precision of the metal capacitor, and effectively ensures the integrity and the accuracy of the matching precision detection of the metal capacitor.

Embodiments of the present invention will be further described below with reference to the accompanying drawings.

In a first aspect, as shown in fig. 1, the method may include, but is not limited to, steps S110 to S160.

Step S110: acquiring first capacitance parameters of a plurality of metal capacitances to be matched in a circuit diagram to be detected;

step S120, performing first matching detection processing according to a preset circuit diagram matching standard and a first capacitance parameter to obtain circuit diagram matching precision;

step S130: determining a target circuit diagram meeting the circuit matching design requirement according to the circuit diagram matching precision;

step S140: acquiring second capacitance parameters of a plurality of metal capacitances to be matched in a layout to be detected, which is generated according to a target circuit diagram;

step S150: performing second matching detection processing according to a preset layout matching standard and second capacitance parameters to obtain layout matching precision;

step S160: and determining a target layout meeting the layout matching design requirement according to the layout matching precision.

In this embodiment, after obtaining first capacitance parameters of a plurality of metal capacitances to be matched in a circuit diagram to be detected by adopting the method for detecting matching accuracy of metal capacitances including steps S110 to S160, first performing first matching detection processing according to a preset circuit diagram matching standard and the first capacitance parameters to obtain circuit diagram matching accuracy; then, determining a target circuit diagram meeting the circuit matching design requirement according to the circuit diagram matching precision; then, second capacitance parameters of a plurality of metal capacitances to be matched in the layout to be detected, which are generated according to the target circuit diagram, are obtained; then, performing second matching detection processing according to a preset layout matching standard and a second capacitance parameter to obtain layout matching precision; and finally, determining a target layout meeting the layout matching design requirement according to the layout matching precision. By sequentially detecting the matching precision of the metal capacitor in the circuit design stage and the layout design stage, under the condition that the matching precision of the circuit diagram in the circuit diagram design stage meets the circuit matching design requirement, the layout is generated based on the target circuit diagram, so that the project period is shortened, the detection time is shortened, and the overall detection efficiency is improved to a certain extent; and continuously detecting the matching precision of the metal capacitor on the layout in the layout design stage to obtain the matching precision of the layout, and finally obtaining the target layout meeting the requirements of the layout matching design, thereby ensuring the integrity and the accuracy of detection. In other words, the matching precision detection is sequentially carried out in the circuit design stage and the layout design stage, so that the detection time is effectively shortened, the metal capacitance matching precision detection efficiency can be improved, and the integrity and the accuracy of the metal capacitance matching precision detection are effectively ensured.

In the conventional layout design flow, the detection of the matching accuracy of the metal capacitor is usually performed after the layout design is completed. If the matching precision of the metal capacitors to be matched does not meet the design requirement after the layout design is completed, the size of the metal capacitors needs to be modified on a design circuit diagram, simulation is conducted again based on the circuit diagram, the layout is redesigned, and the design period is doubled. If the matching precision of the metal capacitor is found to not meet the design requirement in the circuit design stage, the front simulation of the circuit can be carried out without reworking, and the hidden danger of redesign caused by the reworking does not exist in the layout design stage. In the embodiment of the invention, the matching precision detection is carried out in the circuit design stage and the layout design stage respectively, and after the circuit diagram meeting the circuit matching design requirement is obtained, the matching precision of the metal capacitors in the layout is continuously generated and detected, so that the design period is shortened, and the circuit design efficiency is improved.

It should be noted that, the default value of the matching precision standard in the preset circuit diagram matching standard can adapt to most application scenes and application requirements, and if special application scenes and application requirements exist, the circuit diagram matching standard can be adjusted within a reasonable range so as to meet the user requirements.

In some embodiments, the first capacitance parameter acquired in step S110 includes: metal capacitance type, finger Width (FW), finger Length (FL), finger pitch (FS), finger Number (NF), bottom Metal Layer (BML), top Metal Layer (TML), and multiple (M).

In some embodiments, step S120 is further described with reference to fig. 2, and step S120 may include, but is not limited to, steps S210 to S240.

Step S210: under the conditions of different metal capacitance types, different finger widths, different finger lengths, different finger pitches, different bottom metal layers, different top metal layers, or different finger numbers, a first circuit matching result is obtained.

Step S220: and under the condition that the metal capacitance type, the finger width, the finger length, the finger spacing, the bottom metal layer, the top metal layer and the finger number are the same, but the multiples are different, obtaining a second circuit matching result.

Step S230: and under the condition that the metal capacitance type, the finger width, the finger length, the finger spacing, the bottom metal layer, the top metal layer, the hand index and the multiple are the same, but the multiple is not the multiple of 4, obtaining a third circuit matching result.

Step S240: and under the conditions that the metal capacitance type, the finger width, the finger length, the finger spacing, the bottom metal layer, the top metal layer, the hand index and the multiple are the same, and the multiple is a multiple of 4, obtaining a fourth circuit matching result.

In the embodiment of the invention, through the steps S210 to S240, the first matching detection processing is performed in the circuit design stage, and the obtained circuit diagram matching precision can provide reliable reference for modifying the parameters of the metal capacitors in the circuit diagram.

It should be noted that the matching result characterizes the matching degree. That is, the first circuit match result indicates no match, the second circuit match result indicates low level match, the third circuit match result indicates medium level match, and the fourth circuit match result indicates high level match.

Specifically, the preset circuit diagram matching standard is:

mismatch: different types of metal capacitance, different Finger Widths (FW), different Finger Lengths (FL), different finger pitches (FS), different Bottom Metal Layers (BML), different Top Metal Layers (TML), or different finger Numbers (NF).

Low-level matching: the metal capacitors are the same in type, the Finger Width (FW) is the same, the Finger Length (FL) is the same, the Finger Spacing (FS) is the same, the Bottom Metal Layer (BML) is the same, the Top Metal Layer (TML) is the same, the finger Number (NF) is the same, and the multiples (M) are different.

Moderately matching: the metal capacitors are the same in type, the fingers are the same in width (FW), the fingers are the same in length (FL), the fingers are the same in spacing (FS), the bottom metal layers are the same in thickness (BML), the top metal layers are the same in Thickness (TML), the fingers are the same in Number (NF), and the multiple (M) is not a multiple of 4.

Height matching: the metal capacitors are the same in type, the Finger Width (FW) is the same, the Finger Length (FL) is the same, the Finger Spacing (FS) is the same, the Bottom Metal Layer (BML) is the same, the Top Metal Layer (TML) is the same, the finger Number (NF) is the same, and the multiple (M) is the multiple of 4.

Referring to fig. 3, fig. 3 is a schematic overall flowchart of a circuit diagram precision detection process according to an embodiment of the present invention. Determining a target circuit diagram meeting the circuit matching design requirement according to the circuit diagram matching precision, wherein the target circuit diagram at least comprises the following steps:

step S310: and acquiring a first capacitance parameter of each metal capacitor.

Step S320: judging whether the metal capacitance type, the finger width, the finger length, the finger spacing, the bottom metal layer, the top metal layer and the finger number are the same, if yes, jumping to execute step S330; if not, a non-matching result is obtained.

Step S330: judging whether the multiples are the same, if so, jumping to execute step S340; if not, obtaining a low-level matching result.

Step S340: judging whether the multiple is a multiple of 4, if so, obtaining a high matching result; if not, obtaining a moderate matching result.

By means of fig. 2 and 3, matching results showing different degrees of matching can be obtained.

In some embodiments, step S130 is further described, and step S130 may include, but is not limited to, steps S410 to S420.

Step S410: under the condition that the circuit diagram matching precision is a first circuit matching result or a second circuit matching result or a third circuit matching result, correspondingly modifying a first capacitance parameter to obtain a target circuit diagram;

step S420: and under the condition that the circuit diagram matching precision is the fourth circuit matching result, determining the circuit diagram to be detected as a target circuit diagram.

Through steps S410 to S420, processing is performed based on different circuit matching results, and finally, a target circuit diagram meeting the circuit matching design requirement is determined; by timely modifying errors in the designed circuit diagram, the whole design period is shortened, and the circuit design efficiency is improved. The overall detection efficiency is improved to a certain extent.

Specifically, under the condition that the matching precision is unmatched, correspondingly modifying unmatched capacitance parameters in the first capacitance parameters; under the condition that the matching precision is low-level matching or medium-level matching, the matching precision can be modified according to the matching design requirement of the metal capacitor; in case the matching accuracy is a high match, then no modification of the first capacitance parameter is required.

The steps S210 to S240 and S410 to S420 correspond to the process of detecting the matching accuracy of the metal capacitors to be matched in the circuit diagram in the present invention, and the complete process is as follows:

1) Acquiring parameter information of metal capacitors to be matched in a circuit diagram;

2) Detecting the matching precision of the metal capacitors to be matched according to the acquired parameter information of each metal capacitor;

3) Outputting a detection result report;

4) Modifying parameters of the metal capacitor in the circuit diagram according to the detection result report;

5) Repeating the steps 1-4 until the detection result meets the requirement;

6) And (5) finishing detection.

In some embodiments, the second capacitance parameter acquired in step S140 includes: metal capacitance area information, positive electrode information, negative electrode information and positive and negative electrode connecting wire information of each metal capacitance minimum unit; wherein, the metal capacitance area information includes: finger width, finger length, finger spacing, capacitance zone center point coordinates; the positive electrode information includes: positive electrode length, positive electrode width and positive electrode center point coordinates; the negative electrode information includes: the length, width and center point coordinates of the cathode; positive and negative electrode connection line information: the length of the connecting wire metal, the width of the connecting wire metal, the size of a single contact hole, the number of the contact holes and the relative positions of the contact holes on the connecting wire metal.

In some embodiments, further describing step S150, step S150 may include, but is not limited to, steps S510 through S530.

Step S510: according to a preset basic matching standard, performing basic matching detection processing on second capacitance parameters of a plurality of metal capacitors to be matched to obtain a basic matching result;

step S520: outputting an interrupt detection report and modifying the second capacitance parameters until the second capacitance parameters are detected to be consistent under the condition that the base matching result is that the second capacitance parameters of the plurality of metal capacitors to be matched are inconsistent;

step S530: under the condition that the basic matching result is that the second capacitance parameters of the plurality of metal capacitors to be matched are consistent, performing characteristic matching detection processing according to a preset matching characteristic standard and the second capacitance parameters to obtain layout matching precision; wherein the characteristic matching detection process includes: a compact match detection process, a consistency match detection process, a symmetry match detection process, a dispersion match detection process, and a directional match detection process.

Through steps S510 to S530, a basic matching result is obtained through basic matching detection processing, and subsequent processing is selected based on the basic matching result. In one aspect, in the case that the second capacitance parameters of the plurality of metal capacitances to be matched are inconsistent, interrupt detection is performed and an interrupt detection report is output, and the second capacitance parameters are modified based on the interrupt detection report until the second capacitance parameters are re-detected to be consistent. That is, the judgment of interrupting the detection flow is added when the matching precision of the metal capacitor to be matched in the detection layout is detected, and the subsequent detection is not continued under the condition that the metal capacitor does not meet the basic matching standard, so that the time spent for detecting the layout is greatly shortened. On the other hand, under the condition that the second capacitance parameters of the plurality of metal capacitors to be matched are consistent, layout detection is respectively carried out according to the matching characteristics such as compactness, consistency, symmetry, dispersity, directivity and the like, namely compact matching detection processing, consistency matching detection processing, symmetry matching detection processing, dispersity matching detection processing and directivity matching detection processing are respectively carried out; the integrity and the accuracy of the detection of the matching precision of the metal capacitor are effectively guaranteed.

Specifically, step S510 and step S520 are further described. Wherein, the basic matching standard (namely, the basic condition of matching) is as follows: the Finger Width (FW), the Finger Length (FL), the Finger Spacing (FS), the positive electrode length, the positive electrode width, the negative electrode length, the negative electrode width and the positive and negative electrode connecting line information of all the metal capacitors to be matched are identical, namely the minimum units of the metal capacitors in the layout to be detected are identical. If the basic matching standard is not met, the detection is not matched, the interruption is detected, and a detection report break is output. The second capacitance parameter needs to be modified in the layout to be detected, and the detection is repeated until the basic matching standard is met.

In some embodiments, further description is made on the step S530 "performing a characteristic matching detection process according to a preset matching characteristic standard and a second capacitance parameter, to obtain layout matching accuracy", where the matching characteristic standard includes: compactness, consistency, symmetry, dispersion and directionality matching criteria, step S530 includes:

firstly, calculating according to the second capacitance parameter to obtain a metal capacitance array distribution pattern. Specifically: and calculating a distribution pattern of the metal capacitor array to be matched according to the acquired second capacitance parameter, wherein the distribution pattern is a minimum pattern of a minimum unit which can completely cover all metal capacitors.

And then, respectively carrying out compact matching detection processing, consistency matching detection processing, symmetry matching detection processing, dispersion matching detection processing and directivity matching detection processing on the metal capacitor array distribution graph according to the compact matching standard, the consistency matching standard, the symmetry matching standard, the dispersion matching standard and the directivity matching standard, and correspondingly obtaining a compact matching result, a consistency matching result, a symmetry matching result, a dispersion matching result and a directivity matching result.

Next, the compactness matching detection process, the consistency matching detection process, the symmetry matching detection process, the dispersibility matching detection process, and the directivity matching detection process are described further, respectively.

The compactness match detection process includes: obtaining an array shape, an array length and an array width according to the metal capacitor array distribution pattern; and obtaining a first compact matching result or a second compact matching result or a third compact matching result according to the array shape, the length-width ratio value of the array length and the array width and a preset ratio range.

It will be appreciated that different compact matching results represent different degrees of compact matching. That is, the first compact match result indicates no match, the second compact match result indicates a low or medium level match, and the third compact match result indicates a high level match.

As an example, the specific procedure of the compact matching detection process is as follows:

after calculating a metal capacitor array distribution pattern to be matched according to the acquired parameter information, the pattern is a minimum pattern of a minimum unit capable of completely covering all metal capacitors; detecting the shape and the size of each side of the graph, judging the matching precision according to the detection result, and determining the compactness matching standard as follows:

mismatch: the pattern is not rectangular;

low-level matching: the graph is rectangular, and the ratio of the length to the width is more than or equal to 1.3 (other numerical values can be set);

moderately matching: the graph is rectangular, and the ratio of the length to the width is more than 1 and less than 1.3 (other values can be set);

height matching: the graph is square;

after the detection result is obtained, the detection result is written into a layout matching result report.

The consistency matching detection process includes: determining a reference centroid according to the distribution pattern of the metal capacitor array; calculating to obtain mass center coordinates of a plurality of metal capacitors to be matched according to the second capacitance parameters; and obtaining a first consistency matching result or a second consistency matching result or a third consistency matching result according to the distance between each centroid coordinate and the reference centroid and a preset distance range.

It will be appreciated that different consistency match results represent different degrees of consistency match. The first consistency matching result represents non-matching, the second consistency matching result represents low-level matching or medium-level matching, and the third consistency matching result represents high-level matching.

As an example, the specific procedure of the consistency matching detection process is as follows:

and after the distribution pattern of the metal capacitor array is obtained according to the detection, taking the central point of the metal capacitor array as the reference mass center of the matching array. According to the parameter information of each detected metal capacitor, calculating to obtain the barycenter coordinate of each metal capacitor, detecting the distance between the barycenter coordinate of each metal capacitor and the reference barycenter coordinate, judging the matching precision according to the distance, and the consistency matching standard is as follows:

mismatch: the distance between the barycenter coordinate of each metal capacitor and the reference barycenter coordinate is more than or equal to 1pitch;

low-level matching: the distance between the barycenter coordinate of each metal capacitor and the reference barycenter coordinate is more than or equal to 0.3pitch and less than 1pitch;

moderately matching: the distance between the barycenter coordinates of each metal capacitor and the reference barycenter coordinates is smaller than 0.3pitch;

height matching: the barycenter coordinates of the metal capacitors are completely coincident with the reference barycenter coordinates;

Wherein 1pitch represents the pitch of the center coordinates of the metal capacitance regions of the adjacent metal capacitance minimum units. It will be appreciated that the pitch may be adjustable in size and may be modified according to the circumstances.

The symmetry matching detection process includes: establishing a reference coordinate system comprising an X axis and a Y axis by taking a reference centroid determined in a metal capacitor array distribution graph as an origin; and judging according to the coordinate information of each metal capacitor to be matched to obtain a first symmetry matching result or a second symmetry matching result or a third symmetry matching result.

It will be appreciated that different symmetry matching results represent different degrees of symmetry matching. The first symmetry matching result represents non-matching, the second symmetry matching result represents low-degree matching or medium-degree matching, and the third symmetry matching result represents high-degree matching.

As an example, the specific procedure of the symmetry matching detection process is as follows:

and after the metal capacitance array distribution pattern is obtained according to the detection, taking the central point of the metal capacitance array distribution pattern as the reference mass center of the matching array. And establishing a coordinate system by taking the reference centroid as an origin to obtain an X axis and a Y axis, wherein the distribution patterns of the metal capacitor array are symmetrical about the X axis and the Y axis respectively and are symmetrical about the center of the origin. And detecting symmetry judgment matching precision of each metal capacitor in the array about an X axis, a Y axis and an origin, wherein the symmetry matching standard is as follows:

Mismatch: each metal capacitor in the array is not centrosymmetric with respect to an origin;

low-level matching: each metal capacitor in the array is centrally symmetric about an origin and asymmetric about both the X-axis and the Y-axis;

moderately matching: each metal capacitor in the array is centrally symmetric about an origin and is symmetric about only one of an X-axis or a Y-axis;

height matching: each metal capacitor in the array is centrally symmetrical about an origin and symmetrical about both an X axis and a Y axis;

The dispersibility matching detection process includes: obtaining the number of metal capacitors in each row and each column in the metal capacitor array according to the distribution pattern of the metal capacitor array and the second capacitance parameter; obtaining the ratio of the number of the row metal capacitors according to the number of the metal capacitors; and comparing the ratio of the number of the row metal capacitors with the ratio of the total multiple to obtain a first dispersity matching result or a second dispersity matching result or a third dispersity matching result.

It will be appreciated that different dispersion matching results represent different degrees of dispersion matching. Wherein the first dispersive match result indicates no match, the second dispersive match result indicates low or medium level match, and the third dispersive match result indicates high level match.

As an example, the specific procedure of the decentralized match detection process is as follows:

the matching metal capacitors are distributed according to an array and divided into a row and b columns, the number of minimum units of each metal capacitor in each column of each row is detected according to the obtained position information of each metal capacitor, the number ratio of the minimum units of each metal capacitor in each row and each column is calculated, the number ratio is compared with the total multiple (M) ratio to judge the matching precision, and the dispersion matching standard is as follows:

mismatch: half the number ratio of minimum units of each metal capacitor in the downstream or half the following is the same as the total multiple (M) ratio of each metal capacitor.

Low-level matching: the number ratio of minimum units of each metal capacitor of more than half of the rows and more than half of the columns is the same as the total multiple (M) ratio of each metal capacitor.

Moderately matching: the number ratio of the minimum metal capacitance units of all rows and more than half of the columns is the same as the total multiple of the metal capacitance (M), or the number ratio of the minimum metal capacitance units of all columns and more than half of the columns is the same as the total multiple of the metal capacitance (M).

Height matching: the number ratio of the minimum metal capacitance units of all rows and all columns is the same as the total multiple (M) ratio of the metal capacitances.

The "more than half" and "less than half" set herein may be modified to a specific percentage according to the actual situation.

It will be appreciated that different directional matching results represent different degrees of directional matching. Wherein the first directional matching result indicates no match, the second directional matching result indicates low-level match or medium-level match, and the third directional matching result indicates high-level match.

As an example, the specific procedure of the directional matching detection process is as follows:

and calculating the chiral value of each metal capacitor according to the detected parameter information of each metal capacitor to be matched. The method for calculating the chiral value comprises the following steps: the number a of the positive electrodes of the metal capacitance minimum units to be matched on the left side (or the upper side) of the metal capacitance area and the number b of the positive electrodes on the right side (or the lower side) of the metal capacitance area are detected. Chiral value of metal capacitance= (a-b)/(a+b). The directivity matching precision is detected by comparing the chiral values of the respective metal capacitors, and the directivity matching criteria are as follows:

Mismatch: the chiral values of the metal capacitors are different, and the deviation is more than 10% (can be set).

Low-level matching: the chiral values of the metal capacitors are different and the deviation is within 10 percent (can be set).

Moderately matching: the chiral values of the metal capacitors are the same and are not 0.

Height matching: the chiral values of the metal capacitors are the same and 0.

In some embodiments, after the matching precision detection of compactness, consistency, symmetry, dispersibility and directionality of the metal capacitors to be matched in the layout to be detected is completed, a layout matching result report comprising matching precision results of all detection items is output, so that a layout designer can be effectively helped to comprehensively know the matching condition of the metal capacitors, and the efficiency of layout design is improved.

With reference to fig. 6 and 7, a complete description of the second matching detection process of the metal capacitor performed in the layout design stage is provided, including the following steps:

step S610: and acquiring a second capacitance parameter of each metal capacitor.

Step S620: judging whether the second capacitance parameter meets a preset matching basic standard, and if not, outputting an interruption detection report; if yes, the process goes to step S631 for compact matching detection, or to step S641 for consistent matching detection, or to step S651 for symmetric matching detection, or to step S661 for scattered matching detection, or to step S671 for directional matching detection.

The compactness match detection process includes:

step S631: determining whether the metal capacitor array distribution pattern is rectangular, if so, jumping to execute step S632; if not, a non-matching result is obtained.

Step S632: judging whether the length-width ratio value of the array of the metal capacitor array distribution pattern is smaller than 1.3, if so, jumping to execute the step S633; if not, obtaining a low-level matching result.

Step S633: judging whether the length-width ratio value is equal to 1, if so, obtaining a high matching result; if not, obtaining a moderate matching result.

The consistency matching detection process includes:

step S641: judging whether the distance between the barycenter coordinates of each metal capacitor and the reference barycenter coordinates is less than 1pitch, if so, jumping to execute the step S642; if not, a non-matching result is obtained.

Step S642: judging whether the distance between the barycenter coordinates of each metal capacitor and the reference barycenter coordinates is smaller than 0.3pitch, if so, jumping to execute the step S643; if not, obtaining a low-level matching result.

Step S643: judging whether the distance between the centroid coordinates of each metal capacitor and the reference centroid coordinates is equal to 0, if so, obtaining a high matching result; if not, obtaining a moderate matching result. It will be appreciated that the centroid coordinates of the metal capacitors are at a distance of 0 from the reference centroid coordinates, and that the centroid coordinates of the respective metal capacitors are fully coincident with the reference centroid coordinates.

The symmetry matching detection process includes:

step S651: judging whether each metal capacitor in the array is symmetrical about the center of the origin, if so, jumping to execute step S652; if not, a non-matching result is obtained.

Step S652: judging whether each metal capacitor in the array is symmetrical about an X axis and a Y axis, and if so, obtaining a high matching result; if not, the process goes to step S653.

Step S653: judging whether each metal capacitor in the array is symmetrical about one of an X axis or a Y axis, and if so, obtaining a moderate matching result; if not, outputting a low-level matching result.

The dispersibility matching detection process includes:

step S661: judging whether the number ratio of the minimum units of the metal capacitors of more than half of the rows and more than half of the columns is the same as the total multiple (M) ratio of the metal capacitors, if not, obtaining a mismatch result; if yes, go to step S662.

Step S662: judging whether the number ratio of the minimum metal capacitance units of all rows and more than half of columns is the same as the total multiple (M) ratio of the metal capacitances, or the number ratio of the minimum metal capacitance units of all columns and more than half of columns is the same as the total multiple (M) ratio of the metal capacitances, if not, obtaining a low-level matching result; if yes, step S663 is performed in a jump mode.

Step S663: judging whether the number ratio of the minimum units of all the metal capacitors in all the rows and all the columns is the same as the total multiple (M) ratio of all the metal capacitors; if yes, a high matching result is obtained; if not, obtaining a moderate matching result.

The directivity match detection process includes:

step S671: judging whether the chiral values of the metal capacitors are the same, if so, jumping to execute step S672; if not, jumping to execute step S673;

step S672: judging whether the chiral value of each metal capacitor is equal to 0, if so, obtaining a high matching result; if not, obtaining a moderate matching result;

step S673: judging whether the deviation value is 10% or not, if so, obtaining a mismatch result; if not, obtaining a low-level matching result.

Through the steps S610 to S673, the detection of the matching accuracy of the compactness, consistency, symmetry, dispersibility and directionality of the metal capacitor is completed; the integrity and the accuracy of metal capacitance matching precision detection are guaranteed.

In some embodiments, step S160 is further described, step S160 includes:

correspondingly modifying the second capacitance parameter under the condition of obtaining a first compactness matching result, or a first consistency matching result, or a first dispersivity matching result, or a first direction matching result, so as to obtain a target layout;

Under the condition that a second compactness matching result, or a second consistency matching result, or a second dispersivity matching result, or a second directivity matching result is obtained, modifying a second capacitance parameter according to a preset layout matching design requirement to obtain a target layout;

and determining the layout to be detected as a target layout under the condition that a third compactness matching result, or a third consistency matching result, or a third dispersivity matching result, or a third directionality matching result is obtained.

And correspondingly modifying the second capacitance parameter in time according to different matching results to determine the target layout or directly determining the target layout. The method is beneficial to improving the detection efficiency of the matching precision of the layout and shortening the design period.

In some embodiments, the method further comprises: under the condition that the circuit diagram matching precision is obtained, generating and outputting a circuit diagram matching result report according to the circuit diagram matching precision; and under the condition that the layout matching precision is obtained, generating and outputting a layout matching result report according to the layout matching precision. And summarizing the detection result of the circuit diagram design stage into a circuit diagram matching result report, and summarizing the detection result of the layout design stage into a layout matching result report, thereby facilitating the check of a designer and improving the working efficiency.

The invention detects the matching precision process of the metal capacitor to be matched in the layout, and the complete process is as follows:

1) Acquiring parameter information of metal capacitors to be matched in a layout;

2) Detecting whether each metal capacitor to be matched meets the basic condition of matching;

3) Performing matching precision detection of metal capacitance compactness;

4) Performing matching precision detection of metal capacitance consistency;

5) Performing matching accuracy detection of metal capacitance symmetry;

6) Performing matching precision detection of metal capacitance dispersibility;

7) Performing matching precision detection of the directivity of the metal capacitor;

8) Outputting detection result reports of all detection items;

9) Modifying the corresponding layout according to the detection result, and repeating the detection until the matching precision of each inspection item meets the requirement;

10 A) the detection is completed.

Referring to fig. 8, it can be understood that there are N metal capacitors that need to be matched in the designed circuit diagram. In the design stage of the circuit diagram, the embodiment of the invention can carry out matching precision detection on N metal capacitors needing to be matched.

Referring to fig. 9, fig. 9 (a) shows a metal capacitor unit in a circuit diagram, and the corresponding first capacitance parameters include, but are not limited to: finger Width (FW), finger Length (FL), finger pitch (FS), finger count (NF), bottom Metal Layer (BML), top Metal Layer (TML), multiple (M). In fig. 9 (b), two (m=2) minimum units of the metal capacitances corresponding to (a) in the layout design are shown, and in the step of detecting whether each metal capacitance to be matched satisfies the basic condition of matching in the layout design stage, that is, the minimum unit (b) of the metal capacitance to be ensured to be identical in the layout design is shown.

Referring to fig. 10, the metal capacitance minimum unit includes a capacitance region and positive and negative electrode connection lines. It can be appreciated that the second capacitance parameters of the metal capacitors in the layout include: metal capacitance area information, positive electrode information, negative electrode information and positive and negative electrode connecting wire information. As shown in fig. 10 in particular, the metal capacitance region information includes, but is not limited to, the following: finger Width (FW), finger Length (FL), finger pitch (FS). In addition, the metal capacitance minimum unit further includes: multiple layers of metal overlaps with the same shape, multiple layers of via overlaps with the same shape, and a mark layer of the area where the capacitor is located.

Referring to fig. 11, in the process of detecting the matching precision of the metal capacitance compactness, a distribution pattern of a metal capacitance array to be matched is calculated through the acquired parameter information, wherein the pattern is a minimum pattern which can completely cover all metal capacitance minimum units, namely, the matching array of a plurality of metal capacitance minimum unit layouts to be matched is included in fig. 11, the length and the width of the metal capacitance matching array are the length and the width in the process of detecting the matching precision of the metal capacitance compactness, and the matching array is divided into a row b and the matching precision detection process of the corresponding metal capacitance dispersibility.

In summary, the method for detecting matching accuracy of metal capacitors provided by the embodiment of the invention has the following improvements in technical scheme:

firstly, it is: and detecting the matching precision of the metal capacitors to be matched in the circuit diagram, and providing a matching precision standard.

Secondly, it is: the judgment of interrupting the detection flow is added when the matching precision of the metal capacitors to be matched in the layout is detected.

Thirdly, the method comprises the following steps: the detection is performed according to matching characteristics such as compactness, consistency, symmetry, dispersivity, directivity and the like.

Fourth, it is: the detection of five characteristics of metal capacitance matching gives a matching precision standard and a default value thereof respectively, and the matching precision standard can be trimmed according to actual requirements.

Fifth, it is: and all results are written into one result report, so that the results are convenient to view.

The matching precision detection method of the metal capacitor provided by the embodiment of the invention has the following beneficial effects:

firstly, it is: the matching precision of the metal capacitors to be matched can be judged in the circuit design stage, and the project period is greatly shortened. If the matching precision of the metal capacitors to be matched is found to be insufficient to meet the design requirement after the layout design is completed, the size of the metal capacitors needs to be modified on the circuit, the front simulation of the circuit needs to be reworked, and the layout needs to be redesigned, which is equivalent to twice the design period. If the matching precision of the metal capacitor is found to not meet the design requirement in the circuit design stage, the front simulation of the circuit can be carried out without reworking, and the layout design also has no hidden trouble of redesign caused by the reworking.

Secondly, it is: the detection time is greatly shortened by adding the judgment of interrupting the detection flow when the matching precision of the metal capacitor is matched in the detection layout, and the detection efficiency of the matching precision is improved. Because the metal capacitance does not meet the basic requirement of matching, the detection at the back can be omitted, and the time spent on the detection on the layout can be greatly shortened.

Thirdly, the method comprises the following steps: according to the five matching characteristics, the matching precision of the metal capacitors to be matched on the layout can be more comprehensively known through detection, and the integrity and the accuracy of the detection of the matching precision of the metal capacitors are ensured.

Fourth, it is: according to the final detection result report, the place causing the unmatched metal capacitance layout can be visually checked, and a layout designer can formulate an optimal layout modification scheme, so that the layout design time is shortened. The result is written into a result report, so that a layout designer can be helped to comprehensively know the matching condition of the metal capacitor, and the efficiency of the layout design is improved.

Fifth, it is: the matching precision is adjustable, so that the method can adapt to more application scenes and application requirements. The default value of the matching precision standard can adapt to most application scenes and application requirements, and if special application scenes and application requirements exist, the matching precision standard is also supported by adjusting in a reasonable range.

In a second aspect, referring to fig. 12, an embodiment of the present invention provides a controller 1200, including: the matching accuracy detection method of the metal capacitor according to the first aspect is implemented by the processor 1210 when the processor 1210 executes the computer program, and the computer program stored in the memory 1220 and executable on the processor.

Processor 1210 and memory 1220 may be connected by a bus or other means.

The processor 1210 may be implemented by a general-purpose central processing unit, a microprocessor, an application specific integrated circuit, or one or more integrated circuits, etc. for executing relevant programs to implement the technical solutions provided by the embodiments of the present invention.

Memory 1220 acts as a non-transitory computer readable storage medium that may be used to store non-transitory software programs as well as non-transitory computer executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some implementations, memory 1220 may optionally include memory located remotely from the processor, which may be connected to the processor via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The non-transitory software program and instructions required to implement the matching accuracy detection method of a metal capacitor of the above-described embodiments are stored in a memory, and when executed by a processor, perform the matching accuracy detection method of a metal capacitor of the above-described embodiments, for example, perform the method steps shown in fig. 1 to 7 described above.

The apparatus embodiments or system embodiments described above are merely illustrative, in which elements illustrated as separate components may or may not be physically separate, i.e., may be located in one place, or may be distributed over multiple network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In a third aspect, an embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions that are executed by a processor or controller, for example, by one of the processors in the above apparatus embodiments, to cause the processor to perform the method for detecting matching accuracy of metal capacitance in the above embodiments, for example, to perform the method steps shown in fig. 1 to 7 described above.

Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.

While the preferred embodiments of the present invention have been described in detail, the present invention is not limited to the above embodiments, and various equivalent modifications and substitutions can be made by those skilled in the art without departing from the spirit of the present invention, and these equivalent modifications and substitutions are intended to be included in the scope of the present invention.

Claims

1. The method for detecting the matching precision of the metal capacitor is characterized by comprising the following steps of:

2. The method for detecting matching accuracy of a metal capacitor according to claim 1, wherein the first capacitance parameter includes: metal capacitance type, finger width, finger length, finger spacing, finger index, bottom metal layer, top metal layer and multiple;

3. The method for detecting matching accuracy of metal capacitors according to claim 2, wherein said determining a target circuit diagram satisfying a circuit matching design requirement according to the circuit diagram matching accuracy comprises:

4. The method for detecting matching accuracy of a metal capacitor according to claim 1, wherein the second capacitance parameter includes: metal capacitance area information, positive electrode information, negative electrode information and positive and negative electrode connecting wire information of each metal capacitance minimum unit;

5. The method for detecting matching accuracy of metal capacitors according to claim 4, wherein said performing a second matching detection process according to a preset layout matching standard and said second capacitor parameter to obtain layout matching accuracy comprises:

6. The method for detecting matching precision of a metal capacitor according to claim 5, wherein the performing characteristic matching detection processing according to a preset matching characteristic standard and the second capacitor parameter to obtain the layout matching precision includes:

7. The method for detecting matching accuracy of metal capacitors as set forth in claim 6, wherein said determining a target layout satisfying layout matching design requirements according to said layout matching accuracy comprises:

8. The method for detecting matching accuracy of a metal capacitor according to claim 1, further comprising:

9. A controller comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the method for matching accuracy detection of metal capacitances according to any of claims 1 to 8 when executing the computer program.

10. A computer-readable storage medium storing computer-executable instructions for performing the matching accuracy detection method of a metal capacitor according to any one of claims 1 to 8.