CN116670967A - Charging and discharging circuit and terminal equipment - Google Patents

Charging and discharging circuit and terminal equipment Download PDF

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Publication number
CN116670967A
CN116670967A CN202180087066.7A CN202180087066A CN116670967A CN 116670967 A CN116670967 A CN 116670967A CN 202180087066 A CN202180087066 A CN 202180087066A CN 116670967 A CN116670967 A CN 116670967A
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CN
China
Prior art keywords
transistor
charge
voltage
circuit
discharge
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CN202180087066.7A
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Chinese (zh)
Inventor
张啸诚
杨令
贾立刚
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The application provides a charge-discharge circuit and terminal equipment, relates to the technical field of electronics, and is used for solving the problem that the voltage and the power of a power adapter and a load are limited. The charge-discharge circuit provided by the application comprises an overvoltage protection circuit, a boost conversion circuit and a buck conversion circuit. The input end of the overvoltage protection circuit and the input end of the boost conversion circuit are both coupled with the input end of the charge-discharge circuit, the output end of the overvoltage protection circuit, the output end of the boost conversion circuit and the first end of the buck conversion circuit are all coupled with a first node, the first node is the first output end of the charge-discharge circuit, the first end of the boost conversion circuit is coupled with the grounding end, the second end of the buck conversion circuit is coupled with the second output end of the charge-discharge circuit, and the third end of the buck conversion circuit is coupled with the grounding end.

Description

Charging and discharging circuit and terminal equipment Technical Field
The present application relates to the field of electronic technologies, and in particular, to a charging and discharging circuit and a terminal device.
Background
At present, mobile terminal equipment such as notebook computers, tablet computers, mobile phones, vehicle-mounted equipment and wearable equipment is required to discharge a battery in the terminal equipment to provide energy for loads of the terminal equipment under the use scene without an external power supply, and the battery in the terminal equipment is required to obtain energy from the external power supply to provide energy for the loads of the terminal equipment and charge the battery in the terminal equipment at the same time under the use scene with the external power supply. Therefore, a charge-discharge circuit is required for maintaining the operation of the terminal device. The prior art provides the following two charge-discharge circuits.
The first charge-discharge circuit is shown in FIG. 1, and comprises a buck-boost conversion circuit and a charge-discharge transistor M 15 And a controller, the input end of the buck-boost converting circuit is used as the input end of the charge-discharge circuit to be connected with a power Adapter (APT), the output end of the buck-boost converting circuit is used as the first output end of the charge-discharge circuit to be connected with a load, and the output end of the buck-boost converting circuit is also connected with the charge-discharge transistor M 15 Connected with the charge-discharge transistor M 15 For charging and discharging the battery pack, the controller is used for controlling the buck-boost converting circuit and the charge-discharge transistor M 15 . Wherein the buck-boost conversion circuit comprises 4 transistors (denoted as M 11 To M 14 ) And an inductance L 1 . Specifically, during the charging process of the charge-discharge circuit, the APT provides an input voltage VI, at T 1 Time controller control M 11 And M 13 Conducting to store the energy of the input voltage VI at L 1 In T 2 Time controller control M 12 、M 14 And M 15 On to convert the stored energy into an output voltage VO for powering the load and through M 15 Charging the battery pack; during the discharging process, the controller controls M 15 Conduction and battery packThe released energy passes through M 15 To power a load.
The second charge-discharge circuit is shown in FIG. 2, and comprises a pass-through circuit, a buck conversion circuit, and a charge-discharge transistor M 25 And a controller, the input end of the pass-through circuit is used as the input end of the charge-discharge circuit to be connected with the APT, the output end of the pass-through circuit is used as the first output end of the charge-discharge circuit to be connected with the load, the output end of the pass-through circuit is also used as the input end of the buck conversion circuit and the charge-discharge transistor M 25 The output end of the buck conversion circuit is used as the second output end of the charge-discharge circuit for connecting with the charge-discharge transistor M 25 Connected with the charge-discharge transistor M 25 For charging and discharging the battery pack, the controller is used for controlling the direct-current circuit, the buck conversion circuit and the charging and discharging transistor M 25 . Wherein the pass circuit comprises 2 transistors (denoted as M 21 And M 22 ) The buck conversion circuit includes 2 transistors (denoted as M 23 And M 24 ) And an inductance L 2 . Specifically, during the charging process of the charge-discharge circuit, the APT provides an input voltage VI, at T 1 Time controller control M 21 、M 22 And M 23 On, a part of the energy of the input voltage VI is directly supplied to the load, the other part of the energy is stored in L2, and the controller controls M at the moment T2 24 Conducting to convert the stored energy into an output voltage VO to charge the battery pack; during the discharging process, the controller controls M 25 Conduction, energy released by the battery pack passes through M 25 To power a load.
The two charge-discharge circuits can support power adapters with different output voltages and provide energy for the load under the scene of whether an external power supply exists or not so as to maintain the operation of the load. However, the voltage supplied to the load in the first charge-discharge circuit must be kept approximately equal to the voltage of the battery pack, thereby limiting the voltage and power of the load. The output voltage of the power adapter in the second charge-discharge circuit directly supplies power to the load after passing through the pass-through circuit, so that the output voltage of the power adapter is higher than the voltage of the load, and therefore, higher requirements are put on the power adapter.
Disclosure of Invention
The embodiment of the application provides a charge-discharge circuit and terminal equipment, wherein the charge-discharge circuit can support adapters with different output voltages and can solve the problem that the voltage and the power of a load are limited in the prior art.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical scheme:
in a first aspect, there is provided a charge-discharge circuit including: an overvoltage protection circuit, a boost conversion circuit and a buck conversion circuit; the input end of the overvoltage protection circuit and the input end of the boost conversion circuit are both coupled with the input end of the charge-discharge circuit, the output end of the overvoltage protection circuit, the output end of the boost conversion circuit and the first end of the buck conversion circuit are all coupled with a first node, the first node is the first output end of the charge-discharge circuit, the first end of the boost conversion circuit is coupled with the grounding end, the second end of the buck conversion circuit is coupled with the second output end of the charge-discharge circuit, and the third end of the buck conversion circuit is coupled with the grounding end.
In the above technical scheme, when the input end of the charge-discharge circuit receives different input voltages such as fixed high voltage, adjustable high voltage or low voltage, different circuit modules in the charge-discharge circuit are in a working state so as to correspondingly convert the input voltages into load voltages meeting load requirements and simultaneously realize charging of the battery pack. The input end of the charge-discharge circuit can receive different input voltages such as fixed high voltage, adjustable high voltage or low voltage, and the like, so that the charge-discharge circuit can support power adapters with different output voltages, and the problem that the power adapters are limited is solved. In addition, when the input end of the charge-discharge circuit receives a fixed high voltage or an adjustable high voltage, the overvoltage protection circuit can be directly used for outputting a load voltage according to the fixed high voltage or the adjustable high voltage, and when the input end of the charge-discharge circuit receives a low voltage, the boost conversion circuit can be used for carrying out boost conversion on the low voltage and then outputting the load voltage, so that under the condition of different input voltages, the load voltage received by the load is high voltage, the problem that the voltage and the power of the load are limited is solved, and the power supply efficiency is further improved.
In a possible implementation manner of the first aspect, the charge and discharge circuit further includes: and a charge-discharge transistor having one pole coupled to the first output terminal and the other pole coupled to the second output terminal. In the technical scheme, the charging and discharging transistor can output the charging voltage according to the load voltage in the charging process, and can output the load voltage according to the discharging voltage in the discharging process, so that the electric energy loss is minimum when the charging and discharging transistor is used for charging and discharging, and the charging and discharging efficiency of the charging and discharging circuit is improved.
In a possible implementation manner of the first aspect, the charge and discharge circuit further includes: and the control circuit is used for controlling the overvoltage protection circuit, the boost conversion circuit, the buck conversion circuit and the charge-discharge transistor respectively. In the above technical scheme, when the input end of the charge-discharge circuit receives different input voltages, the control circuit controls whether the overvoltage protection circuit, the boost conversion circuit, the buck conversion circuit and the charge-discharge transistor are in a working state, so as to correspondingly convert the input voltages into load voltages meeting load requirements, and simultaneously realize charging of the battery pack.
In a possible implementation manner of the first aspect, the input terminal of the charge-discharge circuit is configured to receive an input voltage, the first output terminal is configured to provide a load voltage, and the second output terminal is configured to provide a charging voltage or receive a discharging voltage. In the above technical solution, when an input voltage is provided at an input end of the charge-discharge circuit, the charge-discharge circuit performs voltage conversion on the input voltage received by the input end, so as to output a load voltage at the first output end and output a charging voltage at the second output end, thereby completing power supply to the load and charging to the battery pack; when the input end of the charge-discharge circuit has no input voltage, the second output end can be used for receiving the discharge voltage, and the charge-discharge circuit converts the discharge voltage into the load voltage, so that the power supply to the load is completed.
In a possible implementation manner of the first aspect, the overvoltage protection circuit includes a first transistor and a second transistor; one pole of the first transistor is coupled with the input end of the overvoltage protection circuit, one pole of the second transistor is coupled with the output end of the overvoltage protection circuit, the other pole of the first transistor and the other pole of the second transistor are the same pole and are coupled, and the grid electrode of the first transistor and the grid electrode of the second transistor are respectively used for receiving a first control signal. In the above technical scheme, a simple overvoltage protection circuit is provided, so that overvoltage protection is realized.
In a possible implementation manner of the first aspect, during the charging process of the charging and discharging circuit and when the input terminal of the charging and discharging circuit receives a first voltage greater than a first threshold value, the first control signal is configured to: the first transistor and the second transistor are turned on. In the above technical scheme, when the input end of the charge-discharge circuit receives the first voltage in the charge process of the charge-discharge circuit, the first control signal is used for turning on the first transistor and the second transistor, and the first transistor and the second transistor output the load circuit according to the first voltage, so that power supply to the load is realized, and overvoltage protection to the charge-discharge circuit is further realized.
In a possible implementation manner of the first aspect, the boost conversion circuit includes a third transistor, a fourth transistor, a fifth transistor, and a first inductance; one pole of the third transistor is coupled to the input end of the boost converter circuit, the other pole of the third transistor is coupled to one end of the first inductor, the other end of the first inductor is coupled to one pole of the fourth transistor and one pole of the fifth transistor, the other pole of the fourth transistor is coupled to the output end of the boost converter circuit, the other pole of the fifth transistor is coupled to the ground, and the gate of the third transistor, the gate of the fourth transistor and the gate of the fifth transistor are respectively used for receiving the second control signal, the third control signal and the fourth control signal. In the above technical scheme, a simple boost conversion circuit is provided, so that boost conversion is realized.
In a possible implementation manner of the first aspect, during the charging process of the charging and discharging circuit, and when the input terminal of the charging and discharging circuit receives a second voltage smaller than a second threshold value, the second control signal and the fourth control signal are used for turning on the third transistor and the fifth transistor, respectively, and the third control signal is used for turning off the fourth transistor, or the second control signal and the third control signal are used for turning on the fourth transistor and the third transistor, respectively, and the fourth control signal is used for turning off the fifth transistor, respectively. In the above technical scheme, when the second voltage is received at the input end of the charge-discharge circuit in the charge process of the charge-discharge circuit, the second control signal, the third control signal and the fourth control signal are respectively used for turning on or off the third transistor, the fourth transistor and the fifth transistor, so as to boost and convert the second voltage into the load voltage meeting the load requirement, thereby realizing power supply to the load and further improving the power supply efficiency of the charge-discharge circuit.
In a possible implementation manner of the first aspect, the buck conversion circuit includes a sixth transistor, a seventh transistor, and a second inductor; one pole of the sixth transistor is coupled to the first end of the buck conversion circuit, the other pole of the sixth transistor is coupled to one pole of the seventh transistor, the other pole of the seventh transistor is coupled to the ground, one end of the second inductor is coupled to the other pole of the sixth transistor, the other end of the second inductor is coupled to the second end of the buck conversion circuit, and the gates of the sixth transistor and the seventh transistor are respectively used for receiving a fifth control signal and a sixth control signal. In the above technical solution, a simple buck conversion circuit is provided, so as to realize buck conversion.
In a possible implementation manner of the first aspect, during charging of the charge-discharge circuit, and when the input terminal of the charge-discharge circuit receives a first voltage greater than a first threshold, and the first voltage is a fixed voltage, the fifth control signal is used to turn on the sixth transistor and the sixth control signal is used to turn off the seventh transistor, or the fifth control signal is used to turn off the sixth transistor and the sixth control signal is used to turn on the seventh transistor; and/or during the discharging process of the charging and discharging circuit, the fifth control signal is used for turning off the sixth transistor and the sixth control signal is used for turning on the seventh transistor, or the fifth control signal is used for turning on the sixth transistor and the sixth control signal is used for turning off the seventh transistor. In the above technical solution, the fifth control signal and the sixth control signal are used for turning on or off the sixth transistor and the seventh transistor, respectively, so as to buck-convert the fixed voltage received by the input terminal of the buck-conversion circuit into a charging voltage, thereby realizing charging of the battery pack; and/or converting the charging voltage to a load voltage, thereby enabling power to the load.
In a possible implementation manner of the first aspect, the buck conversion circuit includes a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a first capacitor, a second capacitor, and a second inductor; the sixth transistor, the seventh transistor, the eighth transistor and the ninth transistor are coupled in series between the first end and the third end of the buck conversion circuit, the coupling point of the sixth transistor and the seventh transistor is a second node, the coupling point of the seventh transistor and the eighth transistor is a third node, the coupling point of the eighth transistor and the ninth transistor is a fourth node, the first capacitor is coupled between the second node and the fourth node, the second capacitor is coupled between the third node and the ground, one end of the second inductor is coupled with one of the second node, the third node or the fourth node, the other end of the second inductor is coupled with the second end of the buck conversion circuit, and the gates of the sixth transistor, the seventh transistor, the eighth transistor and the ninth transistor are respectively used for receiving a fifth control signal, a sixth control signal, a seventh control signal and an eighth control signal. In the above technical scheme, a buck conversion circuit is provided, so as to realize buck conversion, and the first capacitor, the second capacitor and the second inductor in the buck conversion circuit reduce the loss of electric energy in the buck conversion process, and further improve the conversion efficiency.
In a possible implementation manner of the first aspect, when the first voltage is a fixed voltage and the input terminal of the charge-discharge circuit receives a first voltage greater than a first threshold, the fifth control signal and the seventh control signal are used to turn on the sixth transistor and the eighth transistor, respectively, and the sixth control signal and the eighth control signal are used to turn off the seventh transistor and the ninth transistor, respectively, or the fifth control signal and the seventh control signal are used to turn off the sixth transistor and the eighth transistor, respectively, and the sixth control signal and the eighth control signal are used to turn on the seventh transistor and the ninth transistor, respectively; and/or during discharging of the charge-discharge circuit, the sixth control signal and the eighth control signal are respectively used for turning on the seventh transistor and the ninth transistor and the fifth control signal and the seventh control signal are respectively used for turning off the sixth transistor and the eighth transistor, or the fifth control signal and the seventh control signal are respectively used for turning on the sixth transistor and the eighth transistor and the sixth control signal and the eighth control signal are respectively used for turning off the seventh transistor and the ninth transistor. In the above technical solution, the fifth control signal, the sixth control signal, the seventh control signal, and the eighth control signal are respectively used for turning on or off the sixth transistor, the seventh transistor, the eighth transistor, and the ninth transistor, so as to buck-convert the fixed voltage received by the input terminal of the buck-conversion circuit into the load voltage, thereby realizing charging of the battery pack; and/or converting the charging voltage into the load voltage, so as to realize power supply to the load, and in addition, the first capacitor, the second capacitor and the second inductor in the buck conversion circuit reduce the loss of electric energy in the buck conversion process, and further improve the conversion efficiency. .
In a possible implementation manner of the first aspect, during charging of the charge-discharge circuit, when the input end of the charge-discharge circuit receives a first voltage greater than a first threshold, and the first voltage is a fixed voltage, the overvoltage protection circuit is configured to output a load voltage according to the first voltage; the buck conversion circuit is used for converting the load voltage into a charging voltage. In the technical scheme, the fixed voltage can directly supply power for the load through the overvoltage protection circuit, so that the power supply to the load is realized, the power supply efficiency is further improved, and in addition, the charging voltage can be used for charging the battery pack, so that the battery pack is charged.
In a possible implementation manner of the first aspect, during charging of the charge-discharge circuit, when the input end of the charge-discharge circuit receives a first voltage greater than a first threshold value and the first voltage is an adjustable voltage, the overvoltage protection circuit is configured to output a load voltage according to the first voltage; the charge-discharge transistor is used for converting the load voltage into a charging voltage. In the technical scheme, the adjustable voltage can directly supply power to the load through the overvoltage protection circuit, so that the power supply to the load is realized, the power supply efficiency is improved, and in addition, the load voltage directly charges the battery pack through the charge-discharge transistor, so that the battery pack is charged, and the charging efficiency is further improved.
In a possible implementation manner of the first aspect, during charging of the charge-discharge circuit, when an input terminal of the charge-discharge circuit receives a second voltage (the second voltage may include a fixed low voltage and an adjustable low voltage) that is smaller than a second threshold value, the boost conversion circuit is configured to output a load voltage according to the second voltage; the charge-discharge transistor is used for converting the load voltage into a charging voltage. In the above technical scheme, the second voltage is boosted and converted into the load voltage meeting the load requirement by the boost conversion circuit, so that the power supply to the load is realized, and the power supply efficiency is improved.
In a possible implementation manner of the first aspect, during discharging of the charge-discharge circuit, the buck conversion circuit is further configured to convert the discharge voltage into the load voltage. In the technical scheme, the buck conversion circuit converts the discharge voltage into the load voltage, so that the discharge of the battery pack is realized.
In a possible implementation manner of the first aspect, during discharging of the charge-discharge circuit, the charge-discharge transistor is further configured to convert a discharge voltage into a load voltage. In the technical scheme, the charging and discharging transistor converts the discharging voltage into the load voltage, so that the discharging of the battery pack is realized, and the discharging voltage directly supplies power to the load through the charging and discharging transistor, so that the loss of electric energy is reduced, and the discharging efficiency is further improved.
In a second aspect there is provided a power chip comprising a charge-discharge circuit provided as described above or any one of the possible implementations of the first aspect.
In a third aspect, there is provided a terminal device comprising a load, a battery pack and a charge-discharge circuit provided for in any one of the possible implementations of the first aspect or the first aspect, a first output of the charge-discharge circuit being coupled to the load, a second output of the charge-discharge circuit being coupled to the battery pack.
It will be appreciated that any of the above-described devices may be used to perform the corresponding methods provided above, and thus, the advantages achieved by the device may refer to the advantages of the corresponding methods provided above, and will not be described herein.
Drawings
Fig. 1 is a schematic diagram of a charge-discharge circuit according to the prior art;
fig. 2 is a schematic diagram of another charge-discharge circuit according to the prior art;
fig. 3 is a schematic structural diagram of a terminal device according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of a charging system according to an embodiment of the present application;
Fig. 5 is a schematic structural diagram of a charge-discharge circuit according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of another charge-discharge circuit according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of another charge-discharge circuit according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of another charge-discharge circuit according to an embodiment of the present application;
fig. 9 is a schematic diagram illustrating an operating state of a buck conversion circuit according to an embodiment of the present application;
fig. 10 is a schematic diagram illustrating an operation state of another buck conversion circuit according to an embodiment of the present application;
FIG. 11 is a schematic diagram illustrating an operation state of a buck conversion circuit according to an embodiment of the present application;
fig. 12 is a schematic structural diagram of a charge-discharge circuit according to an embodiment of the present application;
fig. 13 is a schematic structural diagram of another charge-discharge circuit according to an embodiment of the present application;
fig. 14 is a schematic structural diagram of another charge-discharge circuit according to an embodiment of the present application.
Detailed Description
In the present application, "at least one" means one or more, and "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a alone, a and B together, and B alone, wherein a, B may be singular or plural. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a and b, a and c, b and c, or a, b and c, wherein a, b, c may be single or plural.
Embodiments of the present application employ words of "first" and "second" to distinguish between objects having similar names or functions or actions, and those skilled in the art will appreciate that the words of "first" and "second" do not limit the number or order of execution. The term "coupled" is used to indicate electrically connected, including directly via wires or connectors, or indirectly via other devices. Thus "coupled" should be seen as broadly connected to electronic communications.
The transistors in the embodiments of the present application may refer to metal oxide semiconductor (metal oxide semiconductor, MOS), and the types of the transistors may include N-type metal oxide semiconductor (N-type metal oxide semiconductor, NMOS) and P-type metal oxide semiconductor (P-type metal oxide semiconductor, PMOS) transistors, and the transistors may also be other types of transistors, such as gallium nitride type transistors, where the transistors in the embodiments of the present application are all illustrated by NMOS. The transistor may be a switching transistor or a power transistor, and the difference between the switching transistor and the power transistor is that the power transistor is a MOS transistor with smaller on-resistance, for example, the power transistor may be a MOS transistor with on-resistance in milliohm (mΩ) level. In addition, two transistors coupled in series herein may mean that the source of a first transistor of the two transistors is connected to the drain of a second transistor, and that both the drain of the first transistor and the source of the second transistor are connected to an external circuit.
The technical scheme provided by the embodiment of the application can be applied to various terminal equipment comprising a charging and discharging circuit. The terminal device may include, but is not limited to, personal computers, server computers, mobile devices (such as cell phones, tablet computers, media players, etc.), wearable devices, vehicle-mounted devices, consumer terminal devices, mobile robots, drones, etc. The specific structure of the terminal device will be described below.
Fig. 3 is a schematic structural diagram of a terminal device according to an embodiment of the present application, where the terminal device is illustrated by taking a notebook computer as an example. As shown in fig. 3, the terminal device may include: memory 101, processor 102, sensor component 103, multimedia component 104, power supply 105, and input/output interface 106.
Wherein the memory 101 may be used to store data, software programs, and software modules; the device mainly comprises a storage program area and a storage data area, wherein the storage program area can store an operating system and application programs required by at least one function, such as a sound playing function or an image playing function; the storage data area may store data created according to the use of the terminal device, such as audio data, image data, or table data. In addition, the terminal device may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device.
The processor 102 is a control center of the terminal device, connects respective parts of the entire device using various interfaces and lines, and performs various functions of the terminal device and processes data by running or executing software programs and/or software modules stored in the memory 101 and calling data stored in the memory 101, thereby performing overall monitoring of the terminal device. Optionally, the processor 102 may include one or more processing units, for example, the processor 102 may include a central processing unit (central processing unit, CPU), an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor and/or a neural network processor (neural-network processing unit, NPU), and the like. Wherein the different processing units may be separate devices or may be integrated in one or more processors.
The sensor assembly 103 includes one or more sensors for providing status assessment of various aspects for the terminal device. The sensor assembly 103 may include an acceleration sensor, a gyro sensor, a magnetic sensor, a pressure sensor, or a temperature sensor, among others, and acceleration/deceleration, azimuth, on/off state of the terminal device, relative positioning of the assembly, or temperature change of the terminal device may be detected by the sensor assembly 103, or the like. The sensor assembly 103 may further comprise a light sensor, and the sensor assembly 103 may further comprise a light sensor for detecting light of the surrounding environment.
The multimedia component 104 provides a screen of an output interface between the terminal device and the user, which may be a touch panel, and when the screen is a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may sense not only the boundary of a touch or slide action, but also the duration and pressure associated with the touch or slide operation. In addition, the multimedia component 104 may include at least one camera, e.g., the multimedia component 104 may include a front-facing camera and/or a rear-facing camera. The front camera and/or the rear camera may receive external multimedia data when the terminal device is in an operation mode, such as a photographing mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.
The power supply 105 is used to provide power to the various components of the terminal device, and the power supply 105 may include a power management system, one or more power supplies, or other components associated with the terminal device generating, managing, and distributing power. In an embodiment of the present application, the power supply 105 may include a charging and discharging circuit provided herein, and the power supply 105 may further include a battery pack, where the charging and discharging circuit may be used to supply power to the above components, and may also be used to charge the battery pack, and the battery pack may also be used to supply power to the above components.
The input/output interface 106 provides an interface between the processor 102 and a peripheral interface module, such as a keyboard, mouse, or universal serial bus (universal serial bus, USB) device, etc.
Although not shown, the terminal device may further include an audio component and a communication component, for example, the audio component includes a microphone, and the communication component includes a wireless fidelity (wireless fidelity, wiFi) module or a bluetooth module, which are not described herein. It will be appreciated by those skilled in the art that the terminal device structure shown in fig. 3 is not limiting of the terminal device and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.
Fig. 4 is a schematic structural diagram of a charging system according to an embodiment of the present application, where the charging system includes: a power adapter and a terminal device. The terminal device comprises a charge-discharge circuit, a load and a battery pack, wherein the load can be a processor, a memory, a multimedia component and the like. The charge-discharge circuit has an input end, a first output end and a second output end, the output end of the power adapter can be used for being connected with the input end of the charge-discharge circuit, the first output end of the charge-discharge circuit can be used for being connected with the load, and the second output end of the charge-discharge circuit can be used for being connected with the battery pack. The power adapter may be used to provide an input voltage to the terminal device, the charge-discharge circuit may be used to convert the input voltage provided by the power adapter into an output voltage, and the battery pack may be used to store and discharge electrical energy. When the power adapter provides an input voltage for the terminal equipment, the charge-discharge circuit can convert the input voltage into an output voltage, and the output voltage can be used for supplying power to the load and charging the battery pack; when the input end of the charge-discharge circuit can not receive the input voltage, the battery pack can provide discharge voltage, and the discharge voltage can supply power for the load through the charge-discharge circuit.
Fig. 5 is a schematic structural diagram of a charge-discharge circuit according to an embodiment of the present application, where the charge-discharge circuit may be applied to the terminal device provided above. As shown in fig. 5, the charge-discharge circuit includes: an overvoltage protection circuit 201, a boost conversion circuit 202, and a buck conversion circuit 203.
In an embodiment of the application, the charge-discharge circuit has an input terminal, a first output terminal and a second output terminal. The input end of the overvoltage protection circuit 201 and the input end of the boost converter circuit 202 are coupled to the input end of the charge-discharge circuit, the output end of the overvoltage protection circuit 201, the output end of the boost converter circuit 202 and the first end of the buck converter circuit 203 are coupled to a first node P1, the first node P1 is the first output end of the charge-discharge circuit, the first end of the boost converter circuit 202 is coupled to the Ground (GND), the second end of the buck converter circuit 203 is coupled to the second output end of the charge-discharge circuit, and the third end of the buck converter circuit 203 is coupled to the Ground (GND).
Wherein the input of the charge-discharge circuit is operable to receive an input voltage, which may be provided by a power adapter of the terminal device, the first output is operable to provide a load voltage, which may be operable to power a load of the terminal device, the second output is operable to provide a charging voltage, which may be operable to charge a battery pack, and the second output is further operable to receive a discharging voltage provided by the battery pack.
During charging, the power adapter may be used to provide an input voltage to the charge-discharge circuit, which may convert the input voltage to a load voltage that may be used to power a load and a charging voltage that may be used to charge a battery. In the discharging process, the power adapter does not provide input voltage any more, at this time, the input end of the charging and discharging circuit does not provide input voltage, the battery pack provides discharging voltage, and the discharging voltage supplies power for the load through the charging and discharging circuit.
The input terminal of the charge-discharge circuit provided above can receive different input voltages, and the charge mode of the charge-discharge circuit can be divided into 3 types according to the difference of the input voltages received by the input terminal, and the working states of different circuit modules in the charge-discharge circuit in the 3 charge modes are respectively described in detail below.
In the first charging mode, when the input terminal of the charge/discharge circuit receives a first voltage greater than a first threshold and the first voltage is a fixed voltage (the first voltage may be simply referred to as a fixed high voltage at this time), the overvoltage protection circuit 201 and the buck conversion circuit 203 are both in an operating state, and the boost conversion circuit 202 does not operate. Specifically, the input end of the overvoltage protection circuit 201 may be configured to receive the fixed high voltage, the output end of the overvoltage protection circuit 201 may be configured to output a load voltage according to the fixed high voltage, the load voltage may be configured to supply power to a load, the first end of the buck conversion circuit 203 may be configured to receive the load voltage, the buck conversion circuit 203 may be configured to buck-convert the load voltage into a charging voltage, and the second end of the buck conversion circuit 203 may be configured to output the charging voltage, and the charging voltage may be configured to charge the battery. In the charging mode, the fixed high voltage directly supplies power to the load through the overvoltage protection circuit 201, and at this time, the power supply efficiency of the charging and discharging circuit is the highest, so that the voltage and power required by the load are ensured.
The first threshold may be set in advance, and a specific value of the first threshold may be set according to the magnitude of the battery voltage. For example, when the voltage of the battery pack is 12V, the specific value of the first threshold is 12V, and when the voltage of the battery pack is 16V, the specific value of the first threshold is 16V.
In the second charging mode, when the input terminal of the charge/discharge circuit receives a first voltage greater than a first threshold and the first voltage is an adjustable voltage (the first voltage may be simply referred to as an adjustable high voltage at this time), the overvoltage protection circuit 201 and the buck conversion circuit 203 are both in an operating state, and the boost conversion circuit 202 does not operate. Specifically, the input end of the overvoltage protection circuit 201 may be configured to receive the adjustable high voltage, the output end of the overvoltage protection circuit 201 may be configured to output a load voltage according to the adjustable high voltage, the load voltage may be configured to supply power to a load, the first end of the buck conversion circuit 203 may be configured to receive the load voltage, the buck conversion circuit 203 may be configured to buck-convert the load voltage into a charging voltage, and the second end of the buck conversion circuit 203 may be configured to output the charging voltage, and the charging voltage may be configured to charge the battery. In the charging mode, the adjustable high voltage directly supplies power to the load through the overvoltage protection circuit 201, and the power supply efficiency of the charging and discharging circuit is the highest at this time, so that the voltage and power required by the load are ensured.
In the above two charging modes, the first voltage may be referred to as a fixed high voltage when the first voltage is a fixed voltage, and the first voltage may be referred to as an adjustable high voltage when the first voltage is an adjustable voltage. Wherein the adjustable high voltage may be changed with the change of the battery voltage, for example, when the battery voltage is changed from 12V to 16V, the adjustable high voltage may also be changed from 12V to 16V, and the fixed high voltage is not changed with the change of the battery voltage. In addition, the high voltage of the fixed high voltage and the adjustable high voltage received by the input end of the charge-discharge circuit is relative to the battery voltage, and the high voltage can be a voltage greater than the battery voltage.
In the third charging mode, when the input terminal of the charge/discharge circuit receives a second voltage (at this time, the second voltage may be referred to as a low voltage) smaller than the second threshold, the boost converter circuit 202 and the buck converter circuit 203 are in an operating state, and the overvoltage protection circuit 201 does not operate. Specifically, the input end of the boost converter circuit 202 is configured to receive the low voltage, the boost converter circuit 202 is configured to boost the low voltage to obtain a load voltage, the output end of the boost converter circuit 202 is configured to output the load voltage, the load voltage is configured to supply power to a load, the first end of the buck converter circuit 203 is configured to receive the load voltage, the buck converter circuit 203 is configured to buck-convert the load voltage to a charging voltage, the second end of the buck converter circuit 203 is configured to output the charging voltage, and the charging voltage is configured to charge the battery. In the charging mode, the boost converter circuit 202 can be used to boost-convert the low voltage after receiving the low voltage, and the load voltage after boost conversion is used to supply power to the load, so as to ensure the voltage and power required by the load.
It should be noted that, the second threshold is less than or equal to the first threshold, and the second voltage is less than or equal to the first voltage. For example, when the first threshold is 12V, the second threshold is less than or equal to 12V, and when the first voltage is 14V, the second voltage is 10V. Wherein the second voltage may include a fixed low voltage and an adjustable low voltage. The adjustable low voltage is changed with the change of the battery voltage, for example, when the battery voltage is changed from 12V to 10V, the adjustable low voltage is also changed from 12V to 10V, and the fixed low voltage is not changed with the change of the battery voltage. The low voltage of the fixed low voltage and the adjustable low voltage received by the input terminal of the charge-discharge circuit is relative to the battery voltage, and the low voltage may be a voltage less than or equal to the battery voltage.
Furthermore, when the input end of the charge-discharge circuit cannot receive the input voltage, the charge-discharge circuit can also discharge through the battery pack. The mode in which the charge-discharge circuit discharges through the buck converter circuit 203 is hereinafter referred to as a first discharge mode, in which neither the overvoltage protection circuit 201 nor the boost converter circuit 202 operates, and the buck converter circuit 203 is in an operating state. Specifically, the second end of the buck converter 203 may be configured to receive a discharge voltage provided by the battery pack, the buck converter 203 may be configured to convert the discharge voltage to a load voltage, and the first end of the buck converter 203 may be configured to output the load voltage, where the load voltage may be configured to power the load.
Further, the overvoltage protection circuit 201, the boost conversion circuit 202, and the buck conversion circuit 203 provided above may all be controlled by the control circuit 204. When the input terminals of the charge/discharge circuit receive different input voltages, the control circuit 204 can be used to control different circuit modules in the charge/discharge circuit to be in different operating states. For example, when the input end of the charge-discharge circuit receives a fixed high voltage, the control circuit 204 may be configured to control the overvoltage protection circuit 201 and the buck conversion circuit 203 to be in an operating state, and control the boost conversion circuit 202 to be not operated; when the input end of the charge-discharge circuit receives the adjustable high voltage, the control circuit 204 can be used for controlling the overvoltage protection circuit 201 and the buck conversion circuit 203 to be in a working state and controlling the boost conversion circuit 202 not to work; when the input end of the charge-discharge circuit receives a low voltage, the control circuit 204 can be used to control the boost converter circuit 202 and the buck converter circuit 203 to be in an operating state, and control the overvoltage protection circuit 201 to be not operated.
It should be noted that the charge-discharge circuit may or may not include the control circuit 204, and the embodiment of the present application is not limited thereto. Fig. 6 illustrates an example in which the charge/discharge circuit includes a control circuit 204.
In the charge-discharge circuit provided by the embodiment of the application, when the input end of the charge-discharge circuit receives different input voltages such as fixed high voltage, adjustable high voltage or low voltage, the control circuit 204 can be used for controlling different circuit modules in the charge-discharge circuit to be in a working state so as to correspondingly convert the input voltage into the load voltage meeting the load requirement and simultaneously realize the charge of the battery pack. The input end of the charge-discharge circuit can receive different input voltages such as fixed high voltage, adjustable high voltage or low voltage, and the like, so that the charge-discharge circuit can support power adapters with different output voltages, and the problem that the power adapters are limited is solved. In addition, when the input end of the charge-discharge circuit receives a fixed high voltage or an adjustable high voltage, the overvoltage protection circuit 201 can be directly used for outputting a load voltage according to the fixed high voltage or the adjustable high voltage, and when the input end of the charge-discharge circuit receives a low voltage, the boost conversion circuit 202 can be used for performing boost conversion on the low voltage and then outputting the load voltage, so that under the condition of different input voltages, the load voltage received by the load is high voltage, thereby solving the problem that the voltage and the power of the load are limited, and further improving the power supply efficiency.
Further, as shown in fig. 6, the charge-discharge circuit further includes a charge-discharge transistor M0. One pole (e.g., drain) of the charge-discharge transistor is coupled to the first output terminal, and the other pole (e.g., source) of the charge-discharge transistor is coupled to the second output terminal. The on/off of the charge/discharge transistor can be controlled by the control circuit 204. For example, the control circuit 204 can control the on/off of the charge/discharge transistor M0 by a control signal.
When the charge and discharge circuit includes the charge and discharge transistor M0, the second charge mode and the third charge mode provided above may be replaced with a fourth charge mode and a fifth charge mode, which are described in detail below, respectively.
In the fourth charging mode, when the input terminal of the charge/discharge circuit receives the adjustable high voltage, the control circuit 204 can be used to control the overvoltage protection circuit 201 to be in an operating state, the charge/discharge transistor M0 to be in an operating state, and neither the boost conversion circuit 202 nor the buck conversion circuit 203 to be operated. Specifically, the input end of the overvoltage protection circuit 201 is configured to receive the adjustable high voltage, and the output end of the overvoltage protection circuit 201 is configured to output a load voltage according to the adjustable high voltage, where the load voltage can be used to supply power to a load; the drain of the charge-discharge transistor M0 may be used to receive the load voltage, and the source of the charge-discharge transistor M0 may be used to output a charging voltage according to the load voltage, where the charging voltage may be used to charge the battery pack. In the charging mode, the adjustable high voltage directly supplies power to the load after passing through the overvoltage protection circuit 201, and the load voltage directly charges the battery pack through the charge-discharge transistor M0, so that the fourth charging mode has higher charging efficiency than the second charging mode, and at this time, the power supply efficiency and the charging efficiency of the charge-discharge circuit are the highest.
In the fifth charging mode, when the input terminal of the charge/discharge circuit receives a low voltage, the control circuit 204 can be used to control the boost converter 202 to be in an operating state, the charge/discharge transistor M0 to be in an operating state, and neither the overvoltage protection circuit 201 nor the buck converter 203 to operate. Specifically, the input end of the boost converter circuit 202 is configured to receive the low voltage, the boost converter circuit 202 is configured to boost-convert the low voltage into a load voltage, the output end of the boost converter circuit 202 is configured to output the load voltage, the load voltage is configured to supply power to a load, the drain electrode of the charge-discharge transistor M0 is configured to receive the load voltage, the source electrode of the charge-discharge transistor M0 is configured to output a charging voltage according to the load voltage, and the charging voltage is configured to charge a battery pack. In this mode, the low voltage is boost-converted by the boost conversion circuit 202 to supply power to the load, and the load voltage directly charges the battery pack through the charge-discharge transistor M0, so that the fifth charging mode has a higher charging efficiency than the third charging mode described above.
When the charge and discharge circuit includes the charge and discharge transistor M0, the charge and discharge circuit may further include a second discharge mode. In the second discharging mode, the control circuit 204 can be used to control the charge-discharge transistor M0 to be in an operating state, and the overvoltage protection circuit 201, the boost converter circuit 202 and the buck protection circuit 203 are all not operated. Specifically, the source of the charge-discharge transistor M0 may be configured to receive a discharge voltage provided by the battery pack, and the drain of the charge-discharge transistor M0 may be configured to output a load voltage according to the discharge voltage, where the load voltage may be configured to power the load. Compared with the first discharging mode, the second discharging mode is characterized in that the discharging voltage provided by the battery pack directly supplies power to the load through the charging and discharging transistor M0 without conversion of other circuits, so that the discharging efficiency is improved, and the electric energy loss is reduced.
It should be noted that, during the charging process of the charge-discharge circuit, when the buck converter 203 is operated, the first end of the buck converter 203 may be used to receive the load voltage, the second end of the buck converter 203 may be used to output the charge voltage, so that the first end of the buck converter 203 may be also referred to as the input end of the buck converter 203, and the second end of the buck converter 203 may be also referred to as the output end of the buck converter 203. During discharging, when the buck converter 203 is operated, the first terminal of the buck converter 203 may be used to output a load voltage, and the second terminal of the buck converter 203 may be used to receive a discharging voltage, such that the first terminal of the buck converter 203 may also be referred to as an output terminal of the buck converter 203, and the second terminal of the buck converter 203 may also be referred to as an input terminal of the buck converter 203.
The specific structure of the different circuit modules in the charge-discharge circuit provided above will be described below by taking the charge-discharge circuit shown in fig. 7 and 8 as an example. Fig. 7 and 8 illustrate an example in which the charge/discharge circuit includes a control circuit 204, and the gate of the charge/discharge transistor M0 is configured to receive the zeroth control signal S0.
In one possible embodiment, the overvoltage protection circuit 201 includes a first transistor M1 and a second transistor M2. The drain of M1 is coupled to the input terminal of the overvoltage protection circuit 201, the source of M1 is coupled to the source of M2, the drain of M2 is coupled to the output terminal of the overvoltage protection circuit 201, the gate of M1 and the gate of M2 are coupled to a node OVP1, and the node OVP1 is coupled to the control circuit 204 and is operable to receive the first control signal S1. In the charge-discharge process, if the overvoltage protection circuit 201 is in a working state, the first control signal S1 turns on the first transistor M1 and the second transistor M2 during the charge process, and the first control signal S1 turns off the first transistor M1 and the second transistor M2 during the discharge process.
In another possible embodiment, the boost converter circuit 202 includes a third transistor M3, a fourth transistor M4, and a fifth transistor M5, and a first inductance L1. Wherein the drain of M3 is coupled to the input terminal of the buck-boost converting circuit 203, the source of M3 is coupled to the first terminal of L1, the second terminal of L1 is coupled to the source of M4 and the drain of M5, the drain of M4 is coupled to the output terminal of the buck-boost converting circuit 203, and the source of M5 is coupled to the ground terminal (GND). Wherein the gate of M3 and the control circuit 204 are coupled to the node OVP2 and operable to receive the second control signal S2 via the node OVP2, the gate of M4 is operable to receive the third control signal S3, and the gate of M5 is operable to receive the fourth control signal S4.
In the charge-discharge process, if the boost converter 202 is in an operating state, in the charge process, the operating mode of the boost converter 202 is divided into two states (respectively denoted as state 1 and state 2), and the boost converter 202 alternately switches between these 2 states during the charge process to complete the charge process. Wherein, the state 1 specifically is: the second control signal S2 and the fourth control signal S4 are respectively used for turning on the third transistor M3 and the fifth transistor M5, the third control signal S3 is used for turning off the fourth transistor M4, and the input voltage received by the input end of the boost converter circuit 202 is stored in the first inductor L1 through the third transistor M3 and the fifth transistor M5; the state 2 is specifically: the second control signal S2 and the third control signal S3 are respectively used for turning on the third transistor M3 and the fourth transistor M4, and the fourth control signal S4 is used for turning off the fifth transistor M5 so as to convert the electric energy stored in the first inductor L1 into a load voltage and output the load voltage from the output end of the boost converter circuit 202. During discharge, the boost converter circuit 202 does not operate.
In yet another possible embodiment, as shown in fig. 7, the buck conversion circuit 203 includes a sixth transistor M6, a seventh transistor M7, and a second inductance L2. Wherein the drain of M6 is coupled to the first terminal of the buck converter 203, the source of M6 is coupled to the drain of M7, the source of M7 is coupled to Ground (GND), the first terminal of L2 is coupled to the source of M6, and the second terminal of L2 is coupled to the second terminal of the buck converter 203. The gate of M6 is operable to receive the fifth control signal S5, the gate of M7 is operable to receive the sixth control signal S6.
In the charge-discharge process, if the buck conversion circuit 203 works, the operation mode of the buck conversion circuit 203 is divided into two states (respectively indicated as state 3 and state 4), and the buck conversion circuit 203 alternately switches the 2 states during the charge-discharge process to complete the charge process or the discharge process. Wherein, the state 3 specifically is: the fifth control signal S5 is used for turning on the sixth transistor M6, the sixth control signal S6 is used for turning off the seventh transistor M7, and the voltage input at the first end of the buck conversion circuit 203 is stored in the second inductor L2 through the sixth transistor M6; the state 4 is specifically: the fifth control signal S5 is used for turning off the sixth transistor M6, and the sixth control signal S6 is used for turning on the seventh transistor M7 to convert the electric energy stored in the second inductor L2 into a charging voltage and output the charging voltage from the second end of the buck converter 203.
Alternatively, as shown in fig. 8, the buck conversion circuit 203 includes a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a first capacitor C1, and a second inductor L2. Wherein M6, M7, M8 and M9 are coupled in series between the first end and the third end of the buck converter 203, the coupling point of M6 and M7 is the second node P2, the coupling point of M7 and M8 is the third node P3, the coupling point of M8 and M9 is the fourth node P4, C1 is coupled between the point P2 and the point P4, the first end of L2 is coupled with one of the nodes P2, P3 and P4, and the second end of L2 is coupled with the second end of the buck converter 203. The gate of M6 may be used to receive the fifth control signal S5, the gate of M7 may be used to receive the sixth control signal S6, the gate of M8 may be used to receive the seventh control signal S7, and the gate of M9 may be used to receive the eighth control signal S8. Optionally, the buck conversion circuit 203 may further include a second capacitor C2, and the second capacitor C2 is coupled between the third node P3 and the Ground (GND). The following embodiment will take the buck conversion circuit 203 including 4 transistors as an example.
It should be noted that, when the buck converter 203 includes four transistors, the buck converter 203 may have a plurality of operation modes according to the connection position of the first end of the second inductor L2 in the buck converter 203, and in particular, in a schematic design stage, the connection position of the first end of the second inductor L2 is determined according to the magnitude of the input voltage provided by the power adapter and the magnitude of the battery voltage. Specifically, when the voltage of the battery pack is less than or equal to 25% of the voltage of the power adapter, the first end of the second inductor L2 is connected to the fourth node P4 to achieve the highest efficiency, and at this time, the RMS (root mean square) current flowing through the first capacitor C1, the second capacitor C2 and the second inductor L2 is minimum, and the loss of electric energy is minimum. When the voltage of the battery pack is greater than 25% of the power adapter voltage and less than 75% of the power adapter voltage, the first terminal of the second inductor L2 is connected to the third node P3 to achieve the highest efficiency, and the RMS (root mean square) current flowing through the first capacitor C1, the second capacitor C2 and the second inductor L2 is the smallest, and the loss of electric energy is the smallest. When the voltage of the battery pack is greater than or equal to 75% of the voltage of the power adapter, the first end of the second inductor L2 is connected to the second node P2 to achieve the highest efficiency, and at this time, the RMS (root mean square) current flowing through the first capacitor C1 and the second inductor L2 is minimum, and the loss of electric energy is minimum.
In the charge and discharge process of the charge and discharge circuit, if the buck conversion circuit 203 is in an operation state and the first end of the second inductor L2 is connected to the second node P2 and the fourth node P4, as shown in fig. 9 and 10, respectively, the operation mode includes 2 states (respectively indicated as a state 11 and a state 12), and the buck conversion circuit 203 alternately switches the 2 states during the charge and discharge process to complete the charge process or the discharge process. The state 11 is shown in fig. 9 (a) and fig. 10 (a), specifically: the fifth control signal S5 and the seventh control signal S7 are respectively used for turning on the sixth transistor M6 and the eighth transistor M8, the sixth control signal S6 and the eighth control signal S8 are respectively used for turning off the seventh transistor M7 and the ninth transistor M9, and the load voltage input at the first end of the buck conversion circuit 203 is stored in the first capacitor C1, the second capacitor C2 and the second inductor L2 after passing through the sixth transistor M6 and the eighth transistor M8. The state 12 is shown in fig. 9 (b) and fig. 10 (b), specifically: the fifth control signal S5 and the seventh control signal S7 are respectively used for turning off the sixth transistor M6 and the eighth transistor M8, and the sixth control signal S6 and the eighth control signal S8 are respectively used for turning on the seventh transistor M7 and the ninth transistor M9 so as to convert voltages stored in the first capacitor C1, the second capacitor C2 and the second inductor L2 into charging voltages to be output from the second terminal.
During the charging and discharging processes of the charging and discharging circuit, if the buck converter 203 is in an operating state and the first end of the second inductor L2 is connected to the third node P3, the buck converter 203 has two operating modes according to the magnitude relation between the battery voltage and the output voltage of the power adapter, as shown in fig. 11. Specifically, when the voltage of the battery pack is greater than or equal to 0.5 times the output voltage of the power adapter, the buck conversion circuit 203 is in the first operation mode, as shown in fig. 11 (a); when the voltage of the battery pack is less than 0.5 times the power adapter voltage, the buck conversion circuit 203 is in the second mode of operation, as shown in fig. 11 (b). These two modes of operation are each described in detail below.
The first operation mode, which includes 4 states and may be respectively represented as states 21 to 24, the buck conversion circuit 203 alternately switches the 4 states in turn during the charge and discharge process to complete the charge process and the discharge process. Specifically, in state 21, the fifth control signal S5 and the sixth control signal S6 are used to turn on the sixth transistor M6 and the seventh transistor M7, respectively, the seventh control signal S7 and the eighth control signal S8 are used to turn off the eighth transistor M8 and the ninth transistor M9, respectively, and the load voltage received by the first end of the buck conversion circuit 203 is stored in the second inductor L2 after passing through the sixth transistor M6 and the seventh transistor M7. In state 22, the fifth control signal S5 and the seventh control signal S7 are used to turn on the sixth transistor M6 and the eighth transistor M8, respectively, the sixth control signal S6 and the eighth control signal S8 are used to turn off the seventh transistor M7 and the ninth transistor M9, respectively, the load voltage received by the first end of the buck conversion circuit 203 is stored in the first capacitor C1, and the voltage stored in the second inductor L2 is converted into a charging voltage, and the charging voltage can be used to charge the battery pack. In the state 23, the state 23 is the same as the state 21 described above, and a description thereof will be omitted. In state 24, the sixth control signal S6 and the eighth control signal S8 are used to turn on the seventh transistor M7 and the ninth transistor M9, respectively, and the fifth control signal S5 and the seventh control signal S7 are used to turn off the sixth transistor M6 and the eighth transistor M8, respectively, so as to convert the voltages stored in the second inductor L2 and the first capacitor C2 into charging voltages, which can be used to charge the battery pack.
The second mode of operation, which includes 4 states and may be denoted as states 31-34, respectively, the buck converter 203 alternately switches the 4 states in turn during the charge and discharge process to complete the charge and discharge process. Specifically, in the state 31, the state 31 is the same as the state 22 described above, and the description thereof will not be repeated here. In state 32, the seventh control signal S7 and the eighth control signal S8 are used to turn on the eighth transistor M8 and the ninth transistor M9, respectively, the fifth control signal S5 and the sixth control signal S6 are used to turn off the sixth transistor M6 and the seventh transistor M7, respectively, and the voltage stored in the second inductor L2 is converted into a charging voltage, which can be used to charge the battery pack. In the state 33, the state 33 is the same as the state 24 described above, and will not be described here. In the state 34, the state 34 is the same as the state 32 described above, and will not be described here.
The following describes in detail the operation procedures of the first charge-discharge mode, the fourth charge-discharge mode, and the fifth charge-discharge mode described above based on the specific structure of the charge-discharge circuit provided in the embodiment of the present application. The coupling of the one end of the second inductor L2 and the second node P2 in the charge-discharge circuit is described below as an example.
In the first charging mode, as shown in fig. 12, both the overvoltage protection circuit 201 and the buck conversion circuit 203 are in operation, and neither the boost conversion circuit 202 nor the charge-discharge transistor M0 is in operation. Specifically, for the overvoltage protection circuit 201, the input end of the overvoltage protection circuit 201 receives the fixed high voltage, and the first control signal S1 is used to turn on the first transistor M1 and the second transistor M2 so as to convert the fixed high voltage into the load voltage. For the buck converter 203, the switching operation is performed alternately according to the states 11 and 12 shown in fig. 9, that is, in the state 11, the fifth control signal S5 and the seventh control signal S7 are used to turn on the sixth transistor M6 and the eighth transistor M8, respectively, the sixth control signal S6 and the eighth control signal S8 are used to turn off the seventh transistor M7 and the ninth transistor M9, respectively, and the load voltage input at the first end of the buck converter 203 is stored in the first capacitor C1, the second capacitor C2 and the second inductor L2 after passing through the sixth transistor M6 and the eighth transistor M8; in state 12, the fifth control signal S5 and the seventh control signal S7 are used to turn off the sixth transistor M6 and the eighth transistor M8, respectively, and the sixth control signal S6 and the eighth control signal S8 are used to turn on the seventh transistor M7 and the ninth transistor M9, respectively, so as to convert the voltages stored in the first capacitor C1, the second capacitor C2 and the second inductor L2 into charging voltages, and output the charging voltages from the second terminal.
In the fourth charging mode, as shown in fig. 13, the overvoltage protection circuit 201 is in an operating state, the charge-discharge transistor M0 is in an operating state, and neither the boost converter circuit 202 nor the buck converter circuit 203 is operated. Specifically, for the overvoltage protection circuit 201, the input end of the overvoltage protection circuit 201 receives the adjustable high voltage, and the first control signal S1 is used for turning on the first transistor M1 and the second transistor M2 to convert the adjustable high voltage into the load voltage. For the charge-discharge transistor M0, the zeroth control signal S0 is used to turn on the charge-discharge transistor M0 to output a charge voltage according to the load voltage.
In the fifth charging mode, as shown in fig. 14, both the boost converter circuit 202 and the charge-discharge transistor M0 are in operation, and neither the overvoltage protection circuit 201 nor the buck converter circuit 203 are in operation. Specifically, for the boost converter circuit 202, the input terminal of the boost converter circuit 202 receives the low voltage, and alternately switches between the state 1 and the state 2, i.e. in the state 1, the second control signal S2 and the fourth control signal S4 are respectively used for turning on the third transistor M3 and the fifth transistor M5, the third control signal S3 is used for turning off the fourth transistor M4, and the low voltage received by the input terminal of the boost converter circuit 202 is stored in the first inductor L1 through the third transistor M3 and the fifth transistor M5; in state 2, the second control signal S2 and the third control signal S3 are used for turning on the third transistor M3 and the fourth transistor M4, respectively, the fourth control signal S4 is used for turning off the fifth transistor M5 to convert the electric energy stored in the first inductor L1 into a load voltage and output the load voltage from the output end of the boost converter circuit 202, and for the charge-discharge transistor M0, the zeroth control signal S0 is used for turning on the charge-discharge transistor M0 to output a charging voltage according to the load voltage.
The following describes the operation of the first discharging mode and the second discharging mode described above in detail based on the specific structure of the charging and discharging circuit provided in the embodiment of the present application. The coupling of the one end of the second inductor L2 and the second node P2 in the charge-discharge circuit is described below as an example.
In the first discharging mode, when the input terminal of the charge-discharge circuit does not receive the input voltage, the buck converter 203 is in an operating state, and the overvoltage protection circuit 201, the boost converter 202 and the charge-discharge transistor M0 do not operate. Specifically, for the buck converter 203, the operations are alternately switched according to the states 11 and 12 shown in fig. 9, and the specific process is described above, and will not be repeated here.
In the second charge-discharge mode, when the input terminal of the charge-discharge circuit does not receive the input voltage, the charge-discharge transistor M0 is operated, and the overvoltage protection circuit 201, the boost converter circuit 202 and the buck converter circuit 203 are not operated. Specifically, for the charge-discharge transistor M0, the zeroth control signal S0 is used to turn on the charge-discharge transistor M0 to output a load voltage according to a discharge voltage.
It should be noted that, in the embodiment of the present application, the different control signals may be pulse signals, and the pulse signals may include pulse width modulation (Pulse Width Modulation, abbreviated as PWM) signals, pulse frequency modulation (Pulse Frequency Modulation, abbreviated as PFM) signals, and the like.
Based on this, the embodiment of the present application also provides a power chip, which may include any of the charge-discharge circuits provided above. Further, when each circuit module in the charge-discharge circuit is implemented by a different transistor, inductance, or capacitance, the transistor in the charge-discharge circuit may be integrated on the power chip, and the inductance and capacitance other than the transistor may not be integrated in the power chip. Illustratively, the first transistor M1 and the second transistor M2 in the overvoltage protection circuit 201, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 in the boost conversion circuit 202, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8 and the ninth transistor M9 in the buck conversion circuit 203, and the charge-discharge transistor M0 may be integrated in the power supply chip; the first inductor L1 in the boost converter circuit 202, and the second inductor L2, the first capacitor C1, and the second capacitor C2 in the buck converter circuit 203 may not be integrated in the power chip.
The embodiment of the application also provides a terminal device, which comprises a load, a battery pack and a charge-discharge circuit, wherein the charge-discharge circuit can comprise any one of the charge-discharge circuits provided above.
It should be noted that, the description about the charge-discharge circuit can be referred to the description about the charge-discharge circuit provided above, and the embodiments of the present application are not repeated here.
Finally, it should be noted that: the foregoing is merely illustrative of specific embodiments of the present application, and the scope of the present application is not limited thereto, but any changes or substitutions within the technical scope of the present application should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (19)

  1. A charge-discharge circuit, characterized in that the charge-discharge circuit comprises: an overvoltage protection circuit, a boost conversion circuit and a buck conversion circuit;
    the input end of the overvoltage protection circuit and the input end of the boost conversion circuit are both coupled with the input end of the charge-discharge circuit, the output end of the overvoltage protection circuit, the output end of the boost conversion circuit and the first end of the buck conversion circuit are both coupled with a first node, the first node is the first output end of the charge-discharge circuit, the first end of the boost conversion circuit is coupled with a grounding end, the second end of the buck conversion circuit is coupled with the second output end of the charge-discharge circuit, and the third end of the buck conversion circuit is coupled with the grounding end.
  2. The charge-discharge circuit of claim 1, further comprising: and one pole of the charge-discharge transistor is coupled with the first output end, and the other pole of the charge-discharge transistor is coupled with the second output end.
  3. The charge-discharge circuit of claim 2, further comprising: and the control circuit is used for controlling the overvoltage protection circuit, the boost conversion circuit, the buck conversion circuit and the charge-discharge transistor respectively.
  4. A charge and discharge circuit according to any one of claims 1-3, wherein the input of the charge and discharge circuit is adapted to receive an input voltage, the first output is adapted to provide a load voltage, and the second output is adapted to provide a charge voltage or to receive a discharge voltage.
  5. The charge-discharge circuit according to any one of claims 1 to 4, wherein the overvoltage protection circuit includes a first transistor and a second transistor; one pole of the first transistor is coupled with the input end of the overvoltage protection circuit, one pole of the second transistor is coupled with the output end of the overvoltage protection circuit, the other pole of the first transistor and the other pole of the second transistor are the same pole and are coupled, and the grid electrode of the first transistor and the grid electrode of the second transistor are respectively used for receiving a first control signal.
  6. The charge-discharge circuit of claim 5, wherein the first control signal is configured to, during charging of the charge-discharge circuit and when the input of the charge-discharge circuit receives a first voltage greater than a first threshold:
    the first transistor and the second transistor are turned on.
  7. The charge-discharge circuit according to any one of claims 1 to 6, wherein the boost conversion circuit includes a third transistor, a fourth transistor, a fifth transistor, and a first inductance; one pole of the third transistor is coupled to the input end of the boost conversion circuit, the other pole of the third transistor is coupled to one end of the first inductor, the other end of the first inductor is coupled to one pole of the fourth transistor and one pole of the fifth transistor, the other pole of the fourth transistor is coupled to the output end of the boost conversion circuit, the other pole of the fifth transistor is coupled to the ground, and the gates of the third transistor, the fourth transistor and the fifth transistor are respectively used for receiving a second control signal, a third control signal and a fourth control signal.
  8. The charge-discharge circuit of claim 7, wherein the second control signal and the fourth control signal are used to turn on the third transistor and the fifth transistor, respectively, and the third control signal is used to turn off the fourth transistor, or the second control signal and the third control signal are used to turn on the fourth transistor and the third transistor, respectively, and the fourth control signal is used to turn off the fifth transistor, respectively, during charging of the charge-discharge circuit and when an input of the charge-discharge circuit receives a second voltage that is less than a second threshold.
  9. The charge-discharge circuit of any one of claims 1-8, wherein the buck conversion circuit includes a sixth transistor, a seventh transistor, and a second inductance; one pole of the sixth transistor is coupled to the first end of the buck conversion circuit, the other pole of the sixth transistor is coupled to one pole of the seventh transistor, the other pole of the seventh transistor is coupled to the ground, one end of the second inductor is coupled to the other pole of the sixth transistor, the other end of the second inductor is coupled to the second end of the buck conversion circuit, and the gates of the sixth transistor and the seventh transistor are respectively used for receiving a fifth control signal and a sixth control signal.
  10. The charge-discharge circuit of claim 9, wherein the fifth control signal is used to turn on the sixth transistor and the sixth control signal is used to turn off the seventh transistor or the fifth control signal is used to turn off the sixth transistor and the sixth control signal is used to turn on the seventh transistor when a first voltage greater than a first threshold is received at an input of the charge-discharge circuit during charging of the charge-discharge circuit and the first voltage is a fixed voltage; and/or the number of the groups of groups,
    during discharging of the charge-discharge circuit, the fifth control signal is used for turning off the sixth transistor and the sixth control signal is used for turning on the seventh transistor, or the fifth control signal is used for turning on the sixth transistor and the sixth control signal is used for turning off the seventh transistor.
  11. The charge-discharge circuit of any one of claims 1-8, wherein the buck conversion circuit includes a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a first capacitance, a second capacitance, and a second inductance; the sixth transistor, the seventh transistor, the eighth transistor and the ninth transistor are coupled in series between the first end and the third end of the buck conversion circuit, a coupling point of the sixth transistor and the seventh transistor is a second node, a coupling point of the seventh transistor and the eighth transistor is a third node, a coupling point of the eighth transistor and the ninth transistor is a fourth node, the first capacitor is coupled between the second node and the fourth node, the second capacitor is coupled between the third node and the ground, one end of the second inductor is coupled with one of the second node, the third node or the fourth node, the other end of the second inductor is coupled with the second end of the buck conversion circuit, and gates of the sixth transistor, the seventh transistor, the eighth transistor and the gates of the eighth transistor are respectively used for receiving a fifth control signal, a seventh control signal and a eighth control signal.
  12. The charge-discharge circuit of claim 11, wherein, during charging of the charge-discharge circuit and when an input of the charge-discharge circuit receives a first voltage that is greater than a first threshold, and the first voltage is a fixed voltage, the fifth and seventh control signals are used to turn on the sixth and eighth transistors, respectively, and the sixth and eighth control signals are used to turn off the seventh and ninth transistors, respectively, or the fifth and seventh control signals are used to turn off the sixth and eighth transistors, respectively, and the sixth and eighth control signals are used to turn on the seventh and ninth transistors, respectively; and/or the number of the groups of groups,
    during discharging of the charge-discharge circuit, the sixth and eighth control signals are used to turn on the seventh and ninth transistors, respectively, and the fifth and seventh control signals are used to turn off the sixth and eighth transistors, respectively, or the fifth and seventh control signals are used to turn on the sixth and eighth transistors, respectively, and the sixth and eighth control signals are used to turn off the seventh and ninth transistors, respectively.
  13. The charge-discharge circuit of any one of claims 1-12, wherein, during charging of the charge-discharge circuit, when an input of the charge-discharge circuit receives a first voltage greater than a first threshold, and the first voltage is a fixed voltage:
    the overvoltage protection circuit is used for outputting load voltage according to the first voltage;
    the buck conversion circuit is used for converting the load voltage into a charging voltage.
  14. The charge-discharge circuit of any one of claims 2-12, wherein, during charging of the charge-discharge circuit, when an input of the charge-discharge circuit receives a first voltage greater than a first threshold, and the first voltage is an adjustable voltage:
    the overvoltage protection circuit is used for outputting load voltage according to the first voltage;
    the charge-discharge transistor is used for converting the load voltage into a charging voltage.
  15. The charge-discharge circuit of any one of claims 2-12, wherein, during charging of the charge-discharge circuit, when an input of the charge-discharge circuit receives a second voltage that is less than a second threshold value:
    the boost conversion circuit is used for outputting load voltage according to the second voltage;
    The charge-discharge transistor is used for converting the load voltage into a charging voltage.
  16. The charge-discharge circuit of any one of claims 1-15, wherein during discharge of the charge-discharge circuit:
    the buck conversion circuit is also used for converting the discharge voltage into the load voltage.
  17. The charge-discharge circuit of any one of claims 1-15, wherein during discharge of the charge-discharge circuit:
    the charge-discharge transistor is also used for converting the discharge voltage into the load voltage.
  18. A power chip, characterized in that the power chip comprises the charge-discharge circuit of any one of claims 1-17.
  19. A terminal device, characterized in that the terminal device comprises a load, a battery pack and a charge-discharge circuit, the charge-discharge circuit according to any of claims 1-17, a first output of the charge-discharge circuit being coupled to the load, a second output of the charge-discharge circuit being coupled to the battery pack.
CN202180087066.7A 2021-05-27 2021-05-27 Charging and discharging circuit and terminal equipment Pending CN116670967A (en)

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Publication number Priority date Publication date Assignee Title
CN101120618A (en) * 2005-02-02 2008-02-06 Cap-Xx有限公司 A power supply
US9218043B2 (en) * 2012-07-26 2015-12-22 Intersil Americas LLC Battery charge system and method capable of operating in different configurations
CN105745812A (en) * 2013-12-27 2016-07-06 英特尔公司 Power delivery system for an electronic device
JP6644772B2 (en) * 2014-09-02 2020-02-12 アップル インコーポレイテッドＡｐｐｌｅ Ｉｎｃ． Multi-Phase Battery Charging Using Boost Bypass
US11101674B2 (en) * 2016-08-05 2021-08-24 Avago Technologies International Sales Pte. Limited Battery charging architectures
WO2018068243A1 (en) * 2016-10-12 2018-04-19 广东欧珀移动通信有限公司 Mobile terminal

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