WO2022266819A1 - Voltage conversion circuit and control method therefor, and electronic device - Google Patents

Abstract

Provided in the embodiments of the present application are a voltage conversion circuit and a control method therefor, and an electronic device, which relate to the technical field of voltage conversion and can improve the efficiency of a voltage conversion circuit. The voltage conversion circuit comprises a first switch, a second switch, a first device, a second device, a capacitor, a first control terminal, a second control terminal, a third control terminal, a first voltage terminal, a second voltage terminal and a grounding terminal, wherein the first switch is coupled between the first voltage terminal and a first terminal of the capacitor, and is also coupled with the first control terminal; the second switch is coupled between a second terminal of the capacitor and the second voltage terminal, and is also coupled with the second control terminal; the first device is coupled between the first voltage terminal and the second terminal of the capacitor; the second device is coupled between the first terminal of the capacitor and the grounding terminal; one of the first switch and the second switch is a third switch, and the other is an inductor; and the third switch is also coupled with the third control terminal.

Description

Voltage conversion circuit and its control method, electronic equipment technical field

The present application relates to the technical field of voltage conversion, and in particular to a voltage conversion circuit, a control method thereof, and electronic equipment.

Background technique

At present, in electronic products such as mobile phones and personal computers (PC), DC (direct current, DC)/DC voltage conversion is usually implemented by a voltage conversion circuit, and the voltage conversion circuit includes a buck (step-down voltage conversion) circuit and a boost circuit. (Boost voltage conversion) circuits, etc.

The core (corebuck) modules of electronic products such as mobile phones and personal computers, such as central processing unit (CPU) and graphics processing unit (GPU), require voltage conversion circuits to have high efficiency characteristics. However, due to the low conversion efficiency of the existing voltage conversion circuit itself, it cannot meet the increasing demand for high-efficiency performance in product applications.

Contents of the invention

Embodiments of the present application provide a voltage conversion circuit, a control method thereof, and an electronic device, which can improve the efficiency of the voltage conversion circuit. In order to achieve the above purpose, the present application adopts the following technical solutions.

In a first aspect, a voltage conversion circuit is provided, and the voltage conversion circuit includes a first switch, a second switch, a first device, a second device, a capacitor, a first control terminal, a second control terminal, a third control terminal, a first A voltage terminal, a second voltage terminal and a ground terminal; the first switch is coupled between the first voltage terminal and the first terminal of the capacitor, and the first switch is also coupled to the first control terminal; the second switch is coupled to the second terminal of the capacitor Between the terminal and the second voltage terminal, the second switch is also coupled to the second control terminal; the first device is coupled between the first voltage terminal and the second terminal of the capacitor, and the second device is coupled between the first terminal of the capacitor and ground Between the terminals; wherein, one of the first device and the second device is a third switch, and the other is an inductor; the third switch is also coupled to the third control terminal.

In the voltage conversion circuit, the first voltage terminal may be a voltage input terminal, and the second voltage terminal may be a voltage output terminal; or the first voltage terminal may be a voltage output terminal, and the second voltage terminal may be a voltage input terminal. In addition, the voltage conversion circuit can be used as a step-up voltage conversion circuit or as a step-down voltage conversion circuit.

Since in the voltage conversion circuit provided by the present application, the first switch is coupled between the first voltage terminal and the first terminal of the capacitor, and the second switch is coupled between the second terminal of the capacitor and the second voltage terminal, the voltage conversion circuit When used to realize energy transmission between the first voltage terminal and the second voltage terminal, at least part of the energy provided by the first voltage terminal can be directly transferred to the second voltage terminal through the capacitor without passing through the inductor, or the second voltage terminal provides At least part of the energy can be directly transferred to the first voltage terminal through the capacitor without passing through the inductor, and the loss of the capacitor is greatly reduced compared with the inductor. Compared with the traditional buck circuit or boost circuit, the energy provided by the voltage input terminal is transferred to the first voltage terminal through the inductor L. The voltage output terminal supplies power, so the efficiency of the voltage conversion circuit provided by the embodiment of the present application is greatly improved.

In addition, because the inductance will suppress the sudden change of the current, in the traditional buck circuit or boost circuit, the inductance will limit the improvement of the output transient response performance. In this embodiment of the application, since the first voltage terminal or the second voltage terminal provides At least part of the energy can be transmitted directly through the capacitor without passing through the inductance, so the output transient response performance of the voltage conversion circuit provided by the embodiment of the present application (the output transient response performance includes the transient drop response performance and the transient overshoot response performance ) was significantly improved.

In a possible implementation manner, the first device is a third switch, and the second device is an inductor. In the case where the second voltage terminal is a voltage input terminal and the first voltage terminal is a voltage output terminal, in this path, the voltage conversion circuit is a step-down voltage conversion circuit. In the case that the first voltage terminal is a voltage input terminal and the second voltage terminal is a voltage output terminal, in this path, the voltage conversion circuit is a step-up voltage conversion circuit.

In a possible implementation manner, the voltage conversion circuit further includes a first control logic circuit; the first control logic circuit is coupled to the first control terminal, the second control terminal and the third control terminal; the first control logic circuit is used for The first control signal is output in the first mode and the second control signal is output in the second mode; the first control signal is used to control the first switch and the second switch to be turned on or off at the same time, and to control the third switch and the first switch. The switches are turned on alternately; the second control signal is used to control the second switch and the third switch to be turned on. Wherein, when the voltage conversion circuit is a step-down voltage conversion circuit, the voltage output terminal is the first voltage terminal, and when the voltage conversion circuit is a boost voltage conversion circuit, the voltage output terminal is the second voltage terminal.

In the case where the voltage conversion circuit is a step-down voltage conversion circuit, since the voltage conversion circuit includes a first control logic circuit, when the load transient becomes heavy, the first control logic circuit outputs a second control signal to control the second switch and The third switch is turned on, so that the voltage input terminal (that is, the second voltage terminal) can directly supply power to the voltage output terminal (that is, the first voltage terminal) through the second switch and the third switch, so that the voltage can be greatly improved. Load transient drop response performance.

In the case where the voltage conversion circuit is a step-up voltage conversion circuit, since the voltage conversion circuit includes a first control logic circuit, when the transient load becomes lighter, the first control logic circuit outputs a second control signal to control the second switch and The third switch is turned on, so that the voltage input terminal (ie, the first voltage terminal) can directly discharge the voltage output terminal (ie, the second voltage terminal) through the second switch and the third switch, so that the load can be greatly increased Transient overshoot response performance.

In a possible implementation manner, the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal; at this time, the voltage conversion circuit is a step-down voltage conversion circuit, and the first control logic circuit is specifically used for: When the voltage at the voltage output terminal is greater than or equal to the first threshold voltage, the first control signal is output in the first mode. When the voltage at the voltage output terminal is greater than or equal to the first threshold voltage, the voltage input terminal (that is, the second voltage terminal) can fully supply power to the voltage output terminal (that is, the first voltage terminal) through the capacitor and the inductance, thus triggering the first mode, The first control logic circuit outputs a first control signal.

In a possible implementation manner, the first control logic circuit is specifically configured to: output the second control signal in the second mode when the voltage at the voltage output terminal is less than the second threshold voltage; wherein, the second threshold voltage is less than or equal to the second threshold voltage a threshold voltage. When the load transient becomes heavy and the voltage at the voltage output terminal drops to the lower limit, that is, the second threshold voltage, the second mode is triggered, the first control logic circuit outputs a second control signal, and the voltage input terminal (ie, the second voltage terminal ) directly supplements power to the voltage output terminal (ie, the first voltage terminal).

In a possible implementation manner, the first voltage terminal is a voltage input terminal, and the second voltage terminal is a voltage output terminal; at this time, the voltage conversion circuit is a step-up voltage conversion circuit, and the first control logic circuit is specifically used for: When the voltage at the voltage output terminal is less than or equal to the first threshold voltage, the first control signal is output in the first mode. When the voltage at the voltage output terminal is less than or equal to the first threshold voltage, the voltage input terminal (that is, the first voltage terminal) can fully supply power to the voltage output terminal (that is, the second voltage terminal) through the capacitor and the inductance, thus triggering the first mode, The first control logic circuit may output a first control signal.

In a possible implementation manner, the first control logic circuit is specifically configured to: output the second control signal in the second mode when the voltage at the voltage output terminal is greater than the second threshold voltage; wherein the second threshold voltage is greater than or equal to first threshold voltage. When the load transient becomes lighter and the voltage at the voltage output terminal overshoots to the threshold, that is, the second threshold voltage, the second mode is triggered, the first control logic circuit outputs a second control signal, and the voltage input terminal (that is, the first voltage terminal) can be The voltage output terminal (that is, the second voltage terminal) is directly discharged to further improve the transient overshoot response performance.

In a possible implementation manner, the first device is an inductor, and the second device is a third switch. When the second voltage terminal is a voltage input terminal and the first voltage terminal is a voltage output terminal, the voltage conversion circuit can be used as a step-up voltage conversion circuit or as a step-down voltage conversion circuit. When the first voltage terminal is a voltage input terminal and the second voltage terminal is a voltage output terminal, the voltage conversion circuit can be used as a step-up voltage conversion circuit; it can also be used as a step-down voltage conversion circuit.

In a possible implementation manner, the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal; the voltage conversion circuit further includes a second control logic circuit, and the second control logic circuit is connected to the first control terminal, the second The second control terminal is coupled to the third control terminal; when the voltage conversion circuit is a step-down voltage conversion circuit, the second control logic circuit is used to output the third control signal in the third mode and output the first control signal in the fourth mode. Four control signals; the third control signal is used to control the first switch and the second switch to be turned on or off at the same time, and to control the third switch and the first switch to be turned on alternately; the fourth control signal is used to control the first switch and the second switch Three switches are turned on. When the second control logic circuit outputs the fourth control signal in the fourth mode, the first switch and the third switch are turned on, and the ground terminal can pass through the first switch and the third switch to the voltage output terminal (that is, the first voltage terminal) It discharges and provides a fast discharge channel for load energy, so as to realize fast step-down adjustment and further improve the output transient response performance.

In a possible implementation manner, the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal; the voltage conversion circuit further includes a second control logic circuit, and the second control logic circuit is connected to the first control terminal, the second The second control terminal is coupled to the third control terminal; when the voltage conversion circuit is a step-up voltage conversion circuit, the second control logic circuit is used to output the third control signal in the third mode and output the first control signal in the fourth mode. Four control signals; the third control signal is used to control the second switch and the third switch to be turned on or off at the same time, and the first switch and the second switch are turned on alternately; the fourth control signal is used to control the first switch and the second switch. The third switch is turned on. When the second control logic circuit outputs the fourth control signal in the fourth mode, when the first switch and the third switch are turned on, the ground terminal can pass through the first switch and the third switch to the voltage output terminal (that is, the first voltage terminal ) to discharge and provide a fast discharge channel for the load energy, so as to realize fast step-down adjustment and further improve the output transient response performance.

In a possible implementation manner, the second control logic circuit is specifically configured to: trigger the fourth mode to output the fourth control signal when at least one of the following scenarios occurs: output voltage overshoot, output rapid step-down, or rapid Power off. In scenarios such as output voltage overshoot, output rapid step-down, and rapid power-off, etc., when the load changes from heavy load to light load, the voltage output terminal (that is, the first voltage terminal) may experience voltage overshoot, and the second control The logic circuit triggers the fourth mode to output the fourth control signal, and the ground terminal can discharge the voltage output terminal (ie, the first voltage terminal), providing a fast discharge channel for load energy, thereby realizing fast step-down adjustment.

In a possible implementation manner, the first switch, the second switch and the third switch include metal-oxide-semiconductor MOS (metal-oxide-semiconductor) transistors. The MOS transistor includes a gate, a source and a drain. The MOS tube has the advantages of small on-resistance, low loss, and good thermal resistance characteristics.

A second aspect provides an electronic device, which includes a load and the voltage conversion circuit provided in the first aspect above; the load is coupled to the first voltage end or the second voltage end of the voltage conversion circuit. Since the electronic device has the same technical effect as the voltage conversion circuit provided by the first aspect above, reference may be made to the first aspect above, and details will not be repeated here.

In a third aspect, a control method of a voltage conversion circuit is provided, the voltage conversion circuit includes a first switch, a second switch, a first device, a second device, a capacitor, a first control terminal, a second control terminal, a third control terminal terminal, the first voltage terminal, the second voltage terminal and the ground terminal; the first switch is coupled between the first voltage terminal and the first terminal of the capacitor, and the first switch is also coupled with the first control terminal; the second switch is coupled between the capacitor Between the second terminal of the second voltage terminal and the second voltage terminal, the second switch is also coupled with the second control terminal; the first device is coupled between the first voltage terminal and the second terminal of the capacitor, and the second device is coupled between the first terminal of the capacitor between the terminal and the ground terminal; the first device is the third switch, and the second device is the inductor; the voltage conversion circuit also includes a first control logic circuit; the first control logic circuit and the first control terminal, the second control terminal and the third Control terminal coupling. The control method of the voltage conversion circuit includes: in the first mode, outputting a first control signal; the first control signal is used to control the first switch and the second switch to be turned on or off at the same time, and to control the third switch and the first switch The switches are turned on alternately; in the second mode, a second control signal is output; the second control signal is used to control the second switch and the third switch to be turned on. The control method of the voltage conversion circuit has the same technical effect as that of the voltage conversion circuit provided in the above first aspect, and reference may be made to the relevant description of the above first aspect, which will not be repeated here.

In a possible implementation manner, the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal; at this time, the voltage conversion circuit is a step-down voltage conversion circuit, when the voltage of the voltage output terminal is greater than or equal to the first When a threshold voltage is reached, the first mode is triggered. Reference may be made to the relevant description of the first aspect above, and details are not repeated here.

In a possible implementation manner, the second mode is triggered when the voltage at the voltage output terminal is less than a second threshold voltage; wherein, the second threshold voltage is less than or equal to the first threshold voltage. Reference may be made to the relevant description of the first aspect above, and details are not repeated here.

In a possible implementation manner, the first voltage terminal is a voltage input terminal, and the second voltage terminal is a voltage output terminal; at this time, the voltage conversion circuit is a step-up voltage conversion circuit, and when the voltage of the voltage output terminal is less than or equal to the first When a threshold voltage is reached, the first mode is triggered. Reference may be made to the relevant description of the first aspect above, and details are not repeated here.

In a possible implementation manner, when the voltage at the voltage output terminal is greater than a second threshold voltage, the second mode is triggered; wherein, the second threshold voltage is greater than or equal to the first threshold voltage. Reference may be made to the relevant description of the first aspect above, and details are not repeated here.

In a fourth aspect, a method for controlling a voltage conversion circuit is provided. The voltage conversion circuit includes a first switch, a second switch, a first device, a second device, a capacitor, a first control terminal, a second control terminal, and a third control terminal. terminal, the first voltage terminal, the second voltage terminal and the ground terminal; the first switch is coupled between the first voltage terminal and the first terminal of the capacitor, and the first switch is also coupled with the first control terminal; the second switch is coupled between the capacitor Between the second terminal of the second voltage terminal and the second voltage terminal, the second switch is also coupled with the second control terminal; the first device is coupled between the first voltage terminal and the second terminal of the capacitor, and the second device is coupled between the first terminal of the capacitor Between terminal and ground terminal; wherein, the first device is an inductor, the second device is a third switch; the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal; the voltage conversion circuit also includes a second control logic circuit; the second control logic circuit is coupled to the first control terminal, the second control terminal and the third control terminal. The control method of the voltage conversion circuit includes: in the third mode, outputting a third control signal; the third control signal is used to control the first switch and the second switch to be turned on or off at the same time, and to control the third switch and the second switch. The first switch is turned on alternately; or, the third control signal is used to control the second switch and the third switch to be turned on or off at the same time, and the first switch and the second switch are turned on alternately; in the fourth mode, the output of the fourth Control signal; the fourth control signal is used to control the first switch and the third switch to be turned on. Reference may be made to the relevant description of the first aspect above, and details are not repeated here.

In a possible implementation manner, the fourth mode is triggered when at least one of the following scenarios occurs: output voltage overshoot, output rapid step-down, and rapid power-off. Reference may be made to the relevant description of the first aspect above, and details are not repeated here.

Description of drawings

FIG. 1 is a schematic structural diagram of an electronic device provided by an embodiment of the present application;

FIG. 2 is a schematic structural diagram of a voltage conversion circuit provided by an embodiment of the present application;

FIG. 3 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

Fig. 4a is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

Fig. 4b is a schematic diagram of waveforms of different signals in the voltage conversion circuit provided in Fig. 4a;

FIG. 5 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

FIG. 6a is a schematic structural diagram of a voltage conversion circuit coupled with a load provided by an embodiment of the present application;

Fig. 6b is a schematic structural diagram of a voltage conversion circuit coupled with a load provided by another embodiment of the present application;

Fig. 7a is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

Fig. 7b is a schematic diagram of waveforms of different signals in the voltage conversion circuit provided in Fig. 7a;

FIG. 8 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

Fig. 9a is a schematic diagram 1 comparing the simulation results of the efficiency of the voltage conversion circuit provided by the embodiment of the present application and the efficiency of the traditional buck circuit;

Fig. 9b is a schematic diagram 1 comparing the simulation results of the transient drop response performance of the voltage conversion circuit provided by the embodiment of the present application and the traditional buck circuit;

FIG. 10 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

Fig. 11a is a schematic diagram 2 comparing the simulation results of the efficiency of the voltage conversion circuit provided by the embodiment of the present application and the traditional buck circuit;

Figure 11b is a schematic diagram 2 comparing the simulation results of the transient drop response performance of the voltage conversion circuit provided by the embodiment of the present application and the traditional buck circuit;

FIG. 12 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

FIG. 13 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

Fig. 14 is a schematic diagram 1 of waveforms of different signals in the voltage conversion circuit provided in Fig. 13;

Fig. 15a is a schematic diagram of the simulation results of the transient drop response performance of the voltage conversion circuit provided by the embodiment of the present application;

Fig. 15b is a schematic diagram of the simulation results of the transient drop response performance of the traditional buck circuit;

FIG. 16 is a second schematic diagram of waveforms of different signals in the voltage conversion circuit provided in FIG. 13;

Fig. 17a is a schematic diagram of the simulation results of the transient overshoot response performance of the voltage conversion circuit provided by the embodiment of the present application;

Fig. 17b is a schematic diagram of the simulation results of the transient overshoot response performance of the traditional boost circuit;

FIG. 18 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

FIG. 19 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

FIG. 20 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

FIG. 21 is a schematic diagram of waveforms of different signals in the voltage conversion circuit provided in FIG. 20;

FIG. 22 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

FIG. 23 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application;

FIG. 24 is a schematic structural diagram of a voltage conversion circuit provided by another embodiment of the present application.

Reference signs: 1-antenna; 2-antenna; 10-voltage conversion circuit; 100-electronic equipment; 110-processor; 120-external memory interface; 121-internal memory; 130-USB interface; 140-charging management module; 141-power management module; 142-battery; 150-mobile communication module; 160-wireless communication module; 170-audio module; 180-sensor module; 190-button; 191-motor; 192-indicator; 193-camera; 194 -display screen; 195-SIM card interface; 101-first switch; 102-second switch; 103-first device; 104-second device; 105-third switch; 106-first control logic circuit; 1061- Comparator; 1062-first OR gate; 1063-second OR gate; 107-second control logic circuit; 1071-third OR gate; 1072-fourth OR gate; 1073-fifth OR gate.

detailed description

The following will describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them.

Hereinafter, the terms "first", "second", etc. are used for convenience of description only, and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Thus, a feature defined as "first", "second", etc. may expressly or implicitly include one or more of that feature. In the description of the present application, unless otherwise specified, "plurality" means two or more.

In the embodiments of the present application, unless otherwise specified and limited, the term "coupled" may be a direct coupling or an indirect coupling through an intermediary.

In the embodiments of the present application, words such as "exemplary" or "for example" are used as examples, illustrations or illustrations. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of the present application shall not be interpreted as being more preferred or more advantageous than other embodiments or design schemes. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete manner.

In this embodiment of the application, "and/or" describes the association relationship of associated objects, indicating that there may be three relationships, for example, A and/or B, which may mean: A exists alone, A and B exist simultaneously, and there exists alone In the case of B, where A and B can be singular or plural. The character "/" generally indicates that the contextual objects are an "or" relationship.

Embodiments of the present application provide an electronic device, which can be, for example, a mobile phone (mobile phone), a computer, a tablet computer (pad), a personal digital assistant (personal digital assistant, PDA), a TV, a smart wearable product (for example, Smart watches, smart bracelets), virtual reality (virtual reality, VR) terminal equipment, augmented reality (augmented reality, AR) terminal equipment, charging small household appliances (such as soybean milk machines, sweeping robots), drones, radar, aviation Different types of user equipment or terminal equipment such as aerospace equipment and vehicle equipment; the electronic equipment can also be network equipment such as base stations. The embodiment of the present application does not specifically limit the specific form of the electronic device.

FIG. 1 is a schematic structural diagram of an electronic device exemplarily provided in an embodiment of the present application. As shown in Figure 1, the electronic device 100 includes a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (universal serial bus, USB) interface 130, a charging management module 140, a power management module 141, and a battery 142 , antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, audio module 170, sensor module 180, button 190, motor 191, indicator 192, camera 193, display screen 194, and subscriber identification module (subscriber identification module , SIM) card interface 195 etc.

It can be understood that, the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100 . In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or combine some components, or separate some components, or arrange different components. The illustrated components can be realized in hardware, software or a combination of software and hardware.

The processor 110 may include one or more processing units, for example: the processor 110 may include an application processor (application processor, AP), a central processing unit (central processing unit, CPU), a modem processor, a graphics processor ( graphics processing unit (GPU), image signal processor (image signal processor, ISP), controller, video codec, digital signal processor (digital signal processor, DSP), baseband processor, and/or neural network processor (neural-network processing unit, NPU), etc. A memory may also be provided in the processor 110 for storing instructions and data.

In some embodiments, the processor 110 may include one or more interfaces, such as a universal serial bus (universal serial bus, USB) interface 130.

The charging management module 140 is configured to receive a charging input from a charger. Wherein, the charger may be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 can receive charging input from the wired charger through the USB interface 130 . In some wireless charging embodiments, the charging management module 140 may receive a wireless charging input through a wireless charging coil of the electronic device 100 . While the charging management module 140 is charging the battery 142 , it can also provide power for electronic devices through the power management module 141 .

The power management module 141 is used for connecting the battery 142 , the charging management module 140 and the processor 110 . The power management module 141 receives the input from the battery 142 and/or the charging management module 140 to provide power for the processor 110 , the internal memory 121 , the display screen 194 , the camera 193 , and the wireless communication module 160 . It can be understood that, after the power management module 141 receives the input from the battery 142 and/or the charging management module 140, before powering the processor 110, the internal memory 121, the display screen 194, the camera 193, and the wireless communication module 160, etc., In some cases, the power management module 141 also needs to perform step-down or step-up conversion on the received voltage before supplying power. The power management module 141 can also be used to monitor parameters such as battery capacity, battery cycle times, and battery health status (leakage, impedance). In some other embodiments, the power management module 141 may also be disposed in the processor 110 . In some other embodiments, the power management module 141 and the charging management module 140 may also be set in the same device.

The wireless communication function of the electronic device 100 can be realized by the antenna 1 , the antenna 2 , the mobile communication module 150 , the wireless communication module 160 , a modem processor, a baseband processor, and the like.

The electronic device 100 realizes the display function through the GPU, the display screen 194 , and the application processor.

The electronic device 100 can realize the shooting function through the ISP, the camera 193 , the video codec, the GPU, the display screen 194 and the application processor.

The electronic device 100 can implement audio functions through the audio module 170 , speaker, receiver, microphone, earphone interface, and application processor.

The sensor module 180 includes a pressure sensor, a gyro sensor, an air pressure sensor, a magnetic sensor, and the like.

The keys 190 include a power key, a volume key and the like. The motor 191 can generate a vibrating reminder. The indicator 192 can be an indicator light, and can be used to indicate charging status, power change, and can also be used to indicate messages, missed calls, notifications, and the like. The SIM card interface 195 is used for connecting a SIM card.

Embodiments of the present application provide a voltage conversion circuit, which can be applied to the power management module 141 of the above-mentioned electronic device 100 for performing boost conversion or down conversion.

FIG. 2 is a voltage conversion circuit provided by an embodiment of the present application, and the voltage conversion circuit is a third-order buck circuit. As shown in Figure 2, the third-order buck circuit includes a voltage input terminal Vin, a voltage output terminal Vout, an input capacitor Cin, an output capacitor Cout, a flying capacitor Cfly, an inductor L, and a first MOS (MOS is a MOSFET (metal-oxide- semiconductor field-effect transistor, the abbreviation of metal-oxide semiconductor field-effect transistor) transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4. The first pole of the first MOS transistor Q1 is coupled to the voltage input terminal Vin and the first terminal of the input capacitor Cin, the second terminal of the input capacitor Cin is coupled to the ground terminal GND, and the second pole of the first MOS transistor Q1 is coupled to the flying capacitor The first terminal of Cfly is coupled to the first pole of the second MOS transistor Q2, and the gate of the first MOS transistor Q1 is coupled to the first control terminal C1. The second pole of the second MOS transistor Q2 is coupled to the first pole of the third MOS transistor Q3 and the first terminal A of the inductor L, and the gate of the second MOS transistor Q2 is coupled to the second control terminal C2. The second pole of the third MOS transistor Q3 is coupled to the second terminal of the flying capacitor Cfly and the first pole of the fourth MOS transistor Q4, and the gate of the third MOS transistor Q3 is coupled to the third control terminal C3. The second electrode of the fourth MOS transistor Q4 is coupled to the ground terminal GND, and the gate of the fourth MOS transistor Q4 is coupled to the fourth control terminal C4. The second terminal of the inductor L is coupled to the voltage output terminal Vout, the voltage output terminal Vout is also coupled to the first terminal of the output capacitor Cout, and the second terminal of the output capacitor Cout is coupled to the ground terminal GND.

For the third-order buck circuit provided in Figure 2, when the first MOS transistor Q1 and the third MOS transistor Q3 are controlled to be turned on, and the second MOS transistor Q2 and the fourth MOS transistor Q4 are turned off, the voltage input terminal Vin is connected to the flying capacitor Cfly Charge and charge the inductance L, the voltage of the first terminal A of the inductance L is Vin-Vc, wherein, Vc is the voltage of the flying capacitor Cfly; when the third MOS transistor Q3 and the fourth MOS transistor Q4 are controlled to be turned on, the first When the first MOS transistor Q1 and the second MOS transistor Q2 are disconnected, the voltage at the first terminal A of the inductor L is 0; when the second MOS transistor Q2 and the fourth MOS transistor Q4 are controlled to be turned on, the first MOS transistor Q1 and the third MOS transistor When the MOS transistor Q3 is disconnected, the flying capacitor Cfly is discharged, and the voltage at the first terminal A of the inductor L is Vc.

During the working process of the third-stage buck circuit, by controlling the on and off of the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4, the first The voltage at terminal A is Vin/2. Compared with the traditional buck circuit, the voltage at the first terminal A of the inductor L is Vin. Since the voltage at the first terminal A of the inductor L is relatively small, this third-order buck circuit is helpful The ripple of the inductor L is reduced, so that the efficiency of the third-order buck circuit can be improved. In addition, the voltage at the first terminal A of the inductor L varies between Vin-Vc and 0. Compared with the traditional buck circuit, the voltage at the first terminal A of the inductor L varies between Vin and 0, so the first terminal A of the inductor L The voltage swing at one terminal A is small, which can also improve the efficiency of the third-order buck circuit.

However, since the third-order buck circuit includes a relatively large number of devices, the area occupied by the third-order buck circuit is relatively large, resulting in an increase in cost. In addition, in order not to affect the performance of the third-order buck circuit, the third-order buck circuit needs to ensure that the voltage across the flying capacitor Cfly is kept constant at Vin/2 during the operation of the third-order buck circuit. In this way, it is necessary to adjust the first MOS transistor Q1 , the duty cycle of the second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4, and the performance of the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3 and the fourth MOS transistor Q4 may be Different, so the control is relatively complicated. In addition, in the third-order buck circuit, the voltage input terminal Vin supplies power to the voltage output terminal Vout through the inductor L, and the loss of the inductor L is relatively large, so the loss of the third-order buck circuit is relatively large. In this way, the third-order buck circuit is limited. Improvement of buck circuit efficiency.

FIG. 3 is another voltage conversion circuit provided by the embodiment of the present application. The voltage conversion circuit includes a power conversion circuit and a MOS transistor Q1 connected in parallel between the voltage input terminal Vin and the voltage output terminal Vout of the power conversion circuit. For the voltage conversion circuit provided in Figure 3, when the load of the voltage output terminal Vout suddenly increases, the system detects that the voltage of the voltage output terminal Vout drops to a certain threshold and turns on the MOS transistor Q1, bypassing the main path, and directly using the voltage The input terminal Vin supplies power to the voltage output terminal Vout to achieve a fast response to load drops. Therefore, the voltage conversion circuit provided in Figure 3 improves the transient response performance of the output drop.

However, since the power conversion circuit still adopts the traditional buck circuit, when the MOS tube Q1 is disconnected, the voltage input terminal Vin supplies power to the voltage output terminal Vout through the inductance L in the power conversion circuit (the inductance L is not shown in Figure 3). , and the loss of the inductance L is relatively large, thus resulting in a decrease in the efficiency of the voltage conversion circuit provided in FIG. 3 . On this basis, since the voltage conversion circuit provided in FIG. 3 additionally adds a MOS transistor Q1, the cost increases. In addition, since the MOS transistor Q1 is additional to the power conversion circuit, an additional control circuit of the MOS transistor Q1 is required, and the control circuit of the MOS transistor Q1 needs to cooperate with the control circuit of the power conversion circuit, so the control scheme is complicated .

Figure 4a is another voltage conversion circuit provided by the embodiment of the present application. The voltage conversion circuit adopts a structure of three bucks connected in parallel. The voltage conversion circuit includes a power management chip, three parallel inductors LX0, LX1, LX2 and a capacitor C. The power management chip includes a switch circuit, a non-linear control logic circuit and a control circuit for controlling the switch circuit. The first ends of the inductors LX0, LX1, and LX2 are all coupled to the power management chip, and the second ends of the inductors LX0, LX1, and LX2 are all coupled to each other. It is coupled with the power management chip and the first terminal of the capacitor C, and the second terminal of the capacitor C is coupled with the ground terminal GND. Wherein, the inductance values of the three inductors LX0 , LX1 , and LX2 connected in parallel are different, the inductance value of the inductor LX0 is relatively large, for example 1 μH, and the inductance values of the inductors LX1 and LX2 are relatively small, such as 60 nH. Each buck structure includes an inductor, and the inductance LX1 and LX2 of the two bucks in the three buck structures are 60nH. The small inductance is used to realize the instantaneous anti-drop function of light load sudden change and heavy load, and achieve faster transient characteristics. FIG. 4b is a schematic diagram of driving signals of a large inductance (ie, inductor LX0 ) buck circuit and a small inductance (ie, inductors LX1 and LX2 ) buck circuit during a transient drop. PWM0 is the driving signal waveform diagram of the large inductance buck circuit, and PWM1 is the driving signal waveform diagram of the small inductance buck circuit. When it is detected that the voltage of the voltage output terminal Vout is greater than the threshold voltage Vth, the control circuit controls the on and off of the switch circuit; when it is detected that the voltage of the voltage output terminal Vout drops to a certain threshold voltage Vth, the nonlinear control logic circuit controls The small inductance buck circuit is turned on to supplement the output voltage Vout. In this way, the two channels of LX1 and LX2 are reused to improve the load transient performance.

However, for the voltage conversion circuit provided in Figure 4a, since the main circuit set on the power management chip still adopts the traditional buck structure, the voltage input terminal Vin supplies power to the voltage output terminal Vout through the inductor L, and the loss of the inductor L is relatively large, so The efficiency of the voltage conversion circuit itself is relatively low. In addition, in the voltage conversion circuit shown in Figure 4a, during transient power supply, the inductors LX1 and LX2 charge the load through the 60nH inductance, and the transient drop response performance is limited.

In order to solve the problems existing in the above-mentioned voltage conversion circuit, an embodiment of the present application also provides a voltage conversion circuit. As shown in FIG. 5 , the voltage conversion circuit 10 includes a first switch 101, a second switch 102, a first device 103, The second device 104, a capacitor (also called a flying capacitor) Cfly, a first control terminal GS1, a second control terminal GS2, a third control terminal GS3, a first voltage terminal V1, a second voltage terminal V2 and a ground terminal GND .

The first switch 101 is coupled between the first voltage terminal V1 and the first terminal a of the capacitor Cfly, the first switch 101 is also coupled to the first control terminal GS1, and the signal provided by the first control terminal GS1 can be used to control the first switch 101 is turned on or off; the second switch 102 is coupled between the second terminal b of the capacitor Cfly and the second voltage terminal V2, the second switch 102 is also coupled with the second control terminal GS2, and the second control terminal GS2 provides The signal can be used to control the on or off of the second switch 102; the first device 103 is coupled between the first voltage terminal V1 and the second terminal b of the capacitor Cfly, and the second device 104 is coupled to the first terminal of the capacitor Cfly a and the ground terminal GND.

Wherein, one of the first device 103 and the second device 104 is a third switch, and the other is an inductor L; the third switch is also coupled to the third control terminal GS3, and the signal provided by the third control terminal GS3 can be used to control the first The three switches are turned on and off.

Here, the first voltage terminal V1 may be the voltage input terminal Vin, and the second voltage terminal V2 may be the voltage output terminal Vout; or the first voltage terminal V1 may be the voltage output terminal Vout, and the second voltage terminal V2 may be the voltage input terminal. Vin. In the case that the second voltage terminal V2 is the voltage output terminal Vout, in some examples, as shown in FIG. 6a, the load R and the output capacitor Cout are connected in parallel between the second voltage terminal V2 and the ground terminal GND. When the first voltage terminal V1 is the voltage output terminal Vout, in some examples, as shown in FIG. 6b, the load R and the output capacitor Cout are connected in parallel between the first voltage terminal V1 and the ground terminal GND. Here, the load R may be, for example, a processor or a memory.

It should be noted that, in the voltage conversion circuit 10 provided in the embodiment of the present application, the transmission of energy between the first voltage terminal V1 and the second voltage terminal V2 may include the following four situations: first, the first voltage terminal The voltage of V1 is boosted to supply power to the second voltage terminal V2; the second is to supply power to the second voltage terminal V2 after the voltage of the first voltage terminal V1 is stepped down; the third is to boost the voltage of the second voltage terminal V2 Supplying power to the first voltage terminal V1; fourth, the voltage of the second voltage terminal V2 is stepped down to supply power to the first voltage terminal V1. In the first and second cases, the first voltage terminal V1 is used as the voltage input terminal Vin, and the second voltage terminal V2 is used as the voltage output terminal Vout; in the third and fourth cases, the second voltage terminal V2 is used as the voltage output terminal Vout; The voltage input terminal Vin and the first voltage terminal V1 serve as the voltage output terminal Vout.

In the voltage conversion circuit 10 provided by the embodiment of the present application, the first switch 101 is coupled between the first voltage terminal V1 and the first terminal a of the capacitor Cfly, and the second switch 102 is coupled between the second terminal b of the capacitor Cfly and the first terminal a of the capacitor Cfly. Between the two voltage terminals V2, therefore, when the voltage conversion circuit 101 is used to transmit energy between the first voltage terminal V1 and the second voltage terminal V2, at least part of the energy provided by the first voltage terminal V1 can be directly transferred to the The second voltage terminal V2 does not pass through the inductor L, or at least part of the energy provided by the second voltage terminal V2 can be directly transferred to the first voltage terminal V1 through the capacitor Cfly without passing through the inductor L, and the loss of the capacitor Cfly is relatively larger than that of the inductor L It is greatly reduced. Compared with the traditional buck circuit or boost circuit, the energy provided by the voltage input terminal Vin supplies power to the voltage output terminal Vout through the inductor L, so the efficiency of the voltage conversion circuit 10 provided by the embodiment of the present application is greatly improved.

In addition, since the inductance L will suppress the sudden change of the current, in the traditional buck circuit or boost circuit, the inductance L will limit the improvement of the output transient response performance. At least part of the energy provided by the voltage terminal V2 can be directly transmitted through the capacitor Cfly without passing through the inductor L, so the output transient response performance of the voltage conversion circuit 10 provided in the embodiment of the present application (the output transient response performance includes the transient drop response performance and transient overshoot response performance) are significantly improved.

The structure of the above-mentioned voltage conversion circuit 10 is illustrated below through two specific embodiments.

Embodiment one

As shown in Figure 7a, the voltage conversion circuit 10 includes a first switch 101, a second switch 102, a first device 103, a second device 104, a capacitor Cfly, a first control terminal GS1, a second control terminal GS2, a third control terminal terminal GS3 , the first voltage terminal V1 , the second voltage terminal V2 and the ground terminal GND. In the first embodiment, the first device 103 is the third switch 105 , and the second device 104 is the inductor L. The third switch 105 is coupled between the first voltage terminal V1 and the second terminal b of the capacitor Cfly; the first terminal a of the capacitor Cfly is coupled to the first terminal c of the inductor L; the second terminal d of the inductor L is connected to the ground terminal GND coupling. Here, the connection relationship between the first switch 101 , the second switch 102 and the capacitor Cfly, the first voltage terminal V1 and the second voltage terminal V2 can refer to the above description, and will not be repeated here.

In some examples, as shown in FIG. 7a, the first switch 101 includes a first switch tube Q1, the first pole of the first switch tube Q1 is coupled to the first voltage terminal V1, and the second pole is connected to the first terminal a of the capacitor Cfly. coupling, and the third pole is coupled with the first control terminal GS1. It should be noted that the first switch 101 includes but is not limited to the first switch transistor Q1 , and may also include one or more other switch transistors connected in parallel or in series with the first switch transistor Q1 . In addition, the first switching transistor Q1 may be an N-type transistor or a P-type transistor.

In addition, the type of the first switching tube Q1 may be, for example, a MOS tube, a triode, or a relay. When the first switching transistor Q1 is a MOS transistor, the third pole is the gate; the first pole is the source and the second pole is the drain, or the first pole is the drain and the second pole is the source. In the case that the first switching tube Q1 is a triode, the third pole is the base; the first pole is the collector, and the second pole is the emitter, or the first pole is the emitter, and the second pole is the collector.

In some examples, as shown in FIG. 7a, the second switch 102 includes a second switch tube Q2, the first pole of the second switch tube Q2 is coupled to the second terminal b of the capacitor Cfly, and the second pole is connected to the second voltage terminal V2 coupling, and the third pole is coupled with the second control terminal GS2. It should be noted that, the second switch 102 includes but is not limited to the second switch tube Q2, and may also include one or more other switch tubes connected in parallel or in series with the second switch tube Q2. In addition, the second switching transistor Q2 may be an N-type transistor or a P-type transistor. In addition, the type of the second switching tube Q2 can refer to the above-mentioned first switching tube Q1 , which will not be repeated here.

In some examples, as shown in FIG. 7a, the third switch 105 includes a third switching transistor Q3, the first pole of the third switching transistor Q3 is coupled to the first voltage terminal V1, and the second pole is coupled to the second terminal b of the capacitor Cfly. coupling, and the third pole is coupled to the third control terminal GS3. It should be noted that the third switch 105 includes but is not limited to the third switch transistor Q3, and may also include one or more other switch transistors connected in parallel or in series with the third switch transistor Q3. In addition, the third switching transistor Q3 may be an N-type transistor or a P-type transistor. In addition, the type of the third switching transistor Q3 can refer to the above-mentioned first switching transistor Q1 , which will not be repeated here.

Based on the above-mentioned voltage conversion circuit 10, the voltage conversion circuit 10 can be used as a step-up voltage conversion circuit; it can also be used as a step-down voltage conversion circuit. Regardless of whether the voltage conversion circuit 10 is used as a step-up voltage conversion circuit or as a step-down voltage conversion circuit, under normal working conditions, that is, under the basic control strategy, the voltage conversion circuit 10 works in the first mode, and the specific working process is as follows: : In the first stage, the first switch 101 and the second switch 102 are controlled to be turned on, and the third switch 105 is controlled to be turned off; in the second stage, the third switch 105 is controlled to be turned on, and the first switch 101 and the second switch 102 are controlled Disconnect; wherein, the first stage and the second stage are repeated alternately. That is to say, the first switch 101 and the second switch 102 are turned on or off at the same time, the first switch 101 and the third switch 105 are in reverse phase, and are turned on complementary, that is, alternately turned on.

It can be understood that the duration of the first stage and the second stage can be set as required, and the duration of the first stage and the second stage will affect the voltage at the voltage output terminal.

In the case where the first switch 101 includes a first switching tube Q1, the second switch 102 includes a second switching tube Q2, and the third switch 105 includes a third switching tube Q3, in some examples, the voltage conversion circuit 10 further includes a second switching tube Q3. A first signal terminal PWM_Q1 coupled to a control terminal GS1 , a second signal terminal PWM_Q2 coupled to a second control terminal GS2 , and a third signal terminal PWM_Q3 coupled to a third control terminal GS3 . As shown in Figure 7b, when the first signal terminal PWM_Q1, the second signal terminal PWM_Q2 and the third signal terminal PWM_Q3 all provide pulse signals with alternating high and low levels, and the signals provided by the first signal terminal PWM_Q1 and the second signal terminal PWM_Q2 Similarly, when the high and low levels of the signals provided by the first signal terminal PWM_Q1 and the third signal terminal PWM_Q3 are inverted, this can control the first switch tube Q1 and the second switch tube Q2 to be turned on or off at the same time, and the first switch tube Q1 and the second switch tube Q1 The three switching transistors Q3 are turned on in a complementary manner.

As shown in Figure 8, when the second voltage terminal V2 is the voltage input terminal Vin, and the first voltage terminal V1 is the voltage output terminal Vout, under this path (as shown by the thick arrow in Figure 8), the voltage conversion circuit 10 is a step-down voltage conversion circuit, which can also be called a buck circuit. At this time, Vin is greater than Vout.

In the case where the second voltage terminal V2 is the voltage input terminal Vin, and the first voltage terminal V1 is the voltage output terminal Vout, it should be noted that the second voltage terminal V2 (that is, the voltage input terminal Vin) is connected to the The first voltage terminal V1 (that is, the voltage output terminal Vout) supplies power.

The first switch 101 includes a first switch tube Q1, the second switch 102 includes a second switch tube Q2, the third switch 105 includes a third switch tube Q3, and the duty cycle of the conduction of the first switch tube Q1 and the second switch tube Q2 is The ratio is D as an example, when the voltage conversion circuit 10 is used as a step-down voltage conversion circuit, the first voltage terminal V1 (ie, the voltage output terminal Vout) and the second voltage terminal V2 (ie, the voltage input terminal Vin) transmit the gain function The relationship is as follows:

According to the above formula, it can be seen that the range of the output voltage of the first voltage terminal V1 is (0, 0.5V2), so the voltage conversion circuit 10 can realize a limited range of step-down conversion.

Since the first switching tube Q1 and the second switching tube Q2 are turned on, the second voltage terminal V2 (that is, the voltage input terminal Vin) directly charges the first voltage terminal V1 (that is, the voltage output terminal Vout) through the capacitor Cfly without passing through the inductor. L, and the loss of the capacitor Cfly is greatly reduced compared with the inductance L. Compared with the traditional buck circuit, the voltage input terminal Vin supplies power to the voltage output terminal Vout through the inductance L. Therefore, the conversion efficiency of the voltage conversion circuit 10 provided by the embodiment of the present application is It has been greatly improved, and the load transient drop response performance has been significantly improved.

Under the same conditions, when the voltage conversion circuit 10 provided by the embodiment of the present application is used as a step-down voltage conversion circuit, the voltage conversion circuit 10 provided by the embodiment of the present application and the traditional buck circuit are simulated, and the voltage input terminal Vin is input The voltage of the voltage is 5V, and the voltage output by the voltage output terminal Vout is 1.35V as an example. FIG. 9a is a schematic diagram comparing the simulation results of the conversion efficiency of the voltage conversion circuit 10 provided by the embodiment of the present application and the traditional buck circuit. The abscissa in FIG. 9a represents the current Iout at the voltage output terminal Vout, and the ordinate represents the efficiency. It can be seen from the simulation results shown in FIG. 9a that the efficiency of the voltage conversion circuit 10 provided by the embodiment of the present application is increased by about 1.5% on average compared with the traditional buck circuit. Fig. 9b is a schematic diagram of the comparison of the simulation results of the transient drop response performance of the voltage conversion circuit 10 provided by the embodiment of the present application and the traditional buck circuit, wherein the abscissa in Fig. 9b represents time, and the vertical in the lower figure in Fig. 9b The coordinates represent the current Iout of the voltage output terminal Vout. The current Iout of the voltage output terminal Vout in the lower figure of FIG. 9b changes suddenly from 1A to 5A. The ordinate of the upper figure in FIG. It can be seen from the simulation results shown in FIG. 9 b that the transient drop response performance of the voltage conversion circuit 10 provided by the embodiment of the present application is improved by about 20% compared with the traditional buck circuit.

As shown in Figure 10, when the first voltage terminal V1 is the voltage input terminal Vin, and the second voltage terminal V2 is the voltage output terminal Vout, under this path (as shown by the thick arrow in Figure 10), the voltage conversion circuit 10 is a step-up voltage conversion circuit, which can also be called a boost circuit. At this time, Vout is greater than Vin.

In the case where the first voltage terminal V1 is the voltage input terminal Vin, and the second voltage terminal V2 is the voltage output terminal Vout, it should be noted that the first voltage terminal V1 (that is, the voltage input terminal Vin) is connected to the The second voltage terminal V2 (that is, the voltage output terminal Vout) supplies power.

The first switch 101 includes a first switch tube Q1, the second switch 102 includes a second switch tube Q2, the third switch 105 includes a third switch tube Q3, and the duty cycle of the conduction of the first switch tube Q1 and the second switch tube Q2 is The ratio is D as an example, when the voltage conversion circuit 10 is used as a step-up voltage conversion circuit, the second voltage terminal V2 (ie, the voltage output terminal Vout) and the first voltage terminal V1 (ie, the voltage input terminal Vin) transmit the gain function The relationship is as follows:

According to the above formula, it can be seen that the range of the output voltage of the second voltage terminal V2 is (2V1, +∞), so the voltage conversion circuit 10 can realize a limited range of boost conversion.

During the conduction period of the first switch tube Q1 and the second switch tube Q2, the first voltage terminal V1 (that is, the voltage input terminal Vin) directly charges the second voltage terminal V2 (that is, the voltage output terminal Vout) through the capacitor Cfly without passing through the inductor. L, and the loss of the capacitor Cfly is greatly reduced compared with the inductance L. Compared with the traditional boost circuit, the voltage input terminal Vin supplies power to the voltage output terminal Vout through the inductance L. Therefore, the conversion efficiency of the voltage conversion circuit 10 provided by the embodiment of the present application is It has been greatly improved, and the load transient overshoot response performance has been significantly improved.

Under the same conditions, when the voltage conversion circuit 10 provided by the embodiment of the present application is used as a boost voltage conversion circuit, the voltage conversion circuit 10 provided by the embodiment of the present application and the traditional boost circuit are simulated, and the voltage input terminal Vin The input voltage is 5V, and the output voltage of the voltage output terminal Vout is 25V as an example. FIG. 11a is a schematic diagram comparing the simulation results of the conversion efficiency of the voltage conversion circuit 10 provided by the embodiment of the present application and the traditional boost circuit. The abscissa in FIG. 11a represents the current Iout at the voltage output terminal Vout, and the ordinate represents the efficiency. It can be seen from the simulation results shown in FIG. 11a that the efficiency of the voltage conversion circuit 10 provided by the embodiment of the present application is increased by about 2.5% on average compared with the traditional boost circuit. Fig. 11b is a schematic diagram of the comparison of the simulation results of the transient overshoot response performance of the voltage conversion circuit 10 provided by the embodiment of the present application and the traditional boost circuit, wherein the abscissa in Fig. 11b represents time, and the lower figure in Fig. 11b The ordinate represents the current Iout of the voltage output terminal Vout. The current Iout of the voltage output terminal Vout in the lower figure of FIG. 11b changes suddenly from 10A to 1A. The ordinate of the upper figure in FIG. It can be seen from the simulation results shown in FIG. 11 b that the transient overshoot response performance of the voltage conversion circuit 10 provided by the embodiment of the present application is improved by about 43% compared with the traditional boost circuit.

In order to further improve the output transient response performance of the voltage conversion circuit 10, in some examples, as shown in FIG. , the second control terminal GS2, and the third control terminal GS3 are coupled, and the first control logic circuit 106 is used to output the first control signal in the first mode and the second control signal in the second mode; the first control signal is used for The first switch 101 and the second switch 102 are controlled to be turned on or off at the same time, the third switch 105 and the first switch 101 are turned on alternately; the second control signal is used to control the second switch 102 and the third switch 105 to be turned on.

Wherein, the first control signal includes a control signal for controlling the first switch 101 , a control signal for controlling the second switch 102 and a control signal for controlling the third switch 105 . The second control signal includes a control signal for controlling the second switch 102 and a control signal for controlling the third switch 105 .

In the case that the voltage conversion circuit 10 includes the first control logic circuit 106, the control method of the voltage conversion circuit 10 includes: in the first mode, controlling the first control logic circuit 106 to output the first control signal; in the second mode, Control the first control logic circuit 106 to output the second control signal.

In addition, please continue to refer to FIG. 12 , the first control logic circuit 106 can also be coupled to the first signal terminal PWM_Q1 , the second signal terminal PWM_Q2 and the third signal terminal PWM_Q3 . Here, the first signal terminal PWM_Q1 , the second signal terminal PWM_Q2 and the third signal terminal PWM_Q3 can be used to provide pulse signals with alternating high and low levels, for details, refer to FIG. 7 b . The double S-curve in FIG. 12 indicates that the first control logic circuit 106 may be directly coupled to the first control terminal GS1 , the second control terminal GS2 and the third control terminal GS3 , or may be indirectly coupled through other electronic components.

On this basis, the first control logic circuit 106 can output the first control signal or the second control signal according to the magnitudes of the output voltage Vout and the first threshold voltage Vth1 and the first threshold voltage Vth2. Based on this, in some examples, as shown in FIG. 12 , the first control logic circuit 106 may also be coupled to the voltage output terminal Vout, the first threshold voltage terminal Vth1 and the first threshold voltage terminal Vth2, and the first threshold voltage terminal Vth1 is used for For providing the first threshold voltage Vth1, the first threshold voltage terminal Vth2 is used for providing the second threshold voltage Vth2.

It should be understood that the magnitudes of the above-mentioned first threshold voltage Vth1 and second threshold voltage Vth2 can be set in advance as required.

When the voltage conversion circuit 10 is used as a step-down voltage conversion circuit, the first voltage terminal V1 is the voltage output terminal Vout, that is, the first control logic circuit 106 can be coupled to the first voltage terminal V1. When the voltage conversion circuit 10 is used as a boost voltage conversion circuit, the second voltage terminal V2 is the voltage output terminal Vout, that is, the first control logic circuit 106 can be coupled to the second voltage terminal V2.

In the case where the voltage conversion circuit 10 includes a first control logic circuit 106, and the voltage conversion circuit 10 is used as a step-down voltage conversion circuit, at this time, the second voltage terminal V2 is the voltage input terminal Vin, and the first voltage terminal V1 is the voltage output terminal Vout, and the first control logic circuit 106 is specifically configured to: when the voltage of the voltage output terminal Vout is greater than or equal to the first threshold voltage Vth1, output the first control signal in the first mode; when the voltage of the voltage output terminal Vout When the voltage is less than the second threshold voltage Vth2, the second control signal is output in the second mode; wherein, the second threshold voltage Vth2 is less than or equal to the first threshold voltage Vth1.

Based on the above, the control method of the voltage conversion circuit 10 further includes: firstly, detecting the voltage of the voltage output terminal Vout (ie, the first voltage terminal V1) in real time, and comparing the detected output voltage Vout with the first threshold voltage Vth1, the second threshold voltage voltage Vth2 for comparison. Next, according to the comparison result of the output voltage Vout with the first threshold voltage Vth1 and the second threshold voltage Vth2, the control method of the voltage conversion circuit 10 can be implemented in the following two ways.

First, if the detected output voltage Vout of the voltage output terminal Vout (that is, the first voltage terminal V1) is lower than the second threshold voltage Vth2, that is to say, the load transient becomes heavy, and the voltage of the voltage output terminal Vout drops to reach When the lower limit value is the second threshold voltage Vth2, the voltage conversion circuit 10 is controlled according to the nonlinear control strategy to trigger the second mode, and the voltage conversion circuit 10 works in the second mode. In this way, the voltage input terminal Vin (ie, the second voltage terminal V2 ) can directly supply power to the voltage output terminal Vout (ie, the first voltage terminal V1 ) through the second switch 102 and the third switch 105 . It should be noted that, in this case, the first control terminal GS1 can control the first switch 101 to be in an on state or an off state.

In the second type, if the detected output voltage Vout of the voltage output terminal Vout (that is, the first voltage terminal V1) is greater than or equal to the first threshold voltage Vth1, the control is directly performed according to the basic control strategy, and the first mode is triggered, and the voltage conversion circuit 10 works in the first mode.

An exemplary introduction to the first control logic circuit 106 is given below. As shown in FIG. 13 , the first control logic circuit 106 includes a comparator 1061 , a first OR gate 1062 and a second OR gate 1063 .

The above-mentioned comparator 1061 can be a hysteresis comparator, for example, the first input terminal of the comparator 1061 is coupled to the voltage output terminal Vout; the second input terminal of the comparator 1061 is coupled to the first threshold voltage terminal Vth1; the third input terminal of the comparator 1061 The terminal is coupled with the second threshold voltage terminal Vth2. The output terminal of the comparator 1061 is coupled with the first input terminal of the first OR gate 1062 and the first input terminal of the second OR gate 1063; the second input terminal of the first OR gate 1062 is coupled with the third signal terminal PWM_Q3, the first The output terminal of the OR gate 1062 is coupled to the third control terminal GS3; the second input terminal of the second OR gate 1063 is coupled to the second signal terminal PWM_Q2, and the output terminal of the second OR gate 1063 is coupled to the second control terminal GS2. The signal terminal PWM_Q1 is coupled to the first control terminal GS1. The double S-curve in Figure 13 indicates that the output terminal of the first OR gate 1062 and the third control terminal GS3, the output terminal of the second OR gate 1063 and the second control terminal GS2, and the first signal terminal PWM_Q1 and the first control terminal GS1 can be It can be directly coupled or indirectly coupled through other electronic components. It can be understood that the first control logic circuit 106 includes but is not limited to the structure shown in FIG. 13 .

In the following, the voltage conversion circuit 10 has the structure shown in FIG. 13 , and the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are N-type tubes as an example, and the voltage conversion circuit 10 is used as a step-down When referring to the voltage conversion circuit, the control method of the voltage conversion circuit 10 will be described in detail. The control method of the voltage conversion circuit 10 specifically includes: firstly, detecting the voltage of the voltage output terminal Vout in real time, and comparing the detected voltage of the voltage output terminal Vout with the first threshold voltage Vth1 and the second threshold voltage Vth2. Next, according to the comparison result of the voltage of the voltage output terminal Vout with the first threshold voltage Vth1 and the second threshold voltage Vth2, the control method of the voltage conversion circuit 10 can be implemented in the following two ways.

First, if the detected voltage of the voltage output terminal Vout (ie, the first voltage terminal V1 ) is lower than the second threshold voltage Vth2 , the second mode is triggered. Specifically, as shown in FIG. 13 , the comparator 1061 outputs a signal "1", thereby controlling the output terminals of the first OR gate 1062 and the second OR gate 1063 to output high-level signals, and because the output of the first OR gate 1062 terminal is coupled with the third control terminal GS3, and the output terminal of the second OR gate 1063 is coupled with the second control terminal GS2, so as shown in Figure 14, both the third control terminal GS3 and the second control terminal GS2 input high-level signals, At this time, the third switching tube Q3 and the second switching tube Q2 are in the always-on state. In this way, the voltage input terminal Vin (that is, the second voltage terminal V2) can pass through the third switching tube Q3 and the second switching tube Q2. The voltage output terminal Vout (that is, the first voltage terminal V1 ) is directly supplemented with electricity. During this process, the first switching tube Q1 may be in a conducting state, or may be in an off state. It can be understood that when the voltage input terminal Vin (that is, the second voltage terminal V2) directly supplies power to the voltage output terminal Vout (that is, the first voltage terminal V1) through the third switch tube Q3 and the second switch tube Q2, the voltage output The voltage of the terminal Vout (that is, the first voltage terminal V1) will gradually increase.

Second, if the detected voltage of the voltage output terminal Vout (ie, the first voltage terminal V1 ) is greater than or equal to the first threshold voltage Vth1 , the first mode is triggered. Specifically, the comparator 1061 outputs a signal "0", so that the first OR gate 1062 outputs the signal provided by the third signal terminal PWM_Q3, that is, a pulse signal with alternating high and low levels, and the second OR gate 1063 outputs the signal provided by the second signal terminal PWM_Q2. The signal, that is, the pulse signal with alternating high and low levels, and the signal provided by the third signal terminal PWM_Q3 and the signal provided by the second signal terminal PWM_Q2 are inverted, and the signal provided by the first signal terminal PWM_Q1 received by the first control terminal GS1 The signal provided by the second signal terminal PWM_Q2 is the same, so that the first switching tube Q1 and the second switching tube Q2 are turned on or off at the same time, and the first switching tube Q1 and the third switching tube Q3 are turned on alternately.

Based on the above-mentioned control method of the voltage conversion circuit 10, when the load transient becomes heavy (that is, when the voltage at the voltage output terminal Vout (ie, the first voltage terminal V1) is less than the second threshold voltage Vth2), the voltage input terminal Vin can directly supply the voltage The output terminal Vout is supplemented with power, which can greatly improve the load transient drop response performance.

In addition, when the voltage conversion circuit 10 provided by the embodiment of the present application works in the second mode, since the existing devices of the circuit conversion circuit 10 are still used, the first control logic circuit 106 can operate in the first mode and the second mode respectively. It is used to control the first switch 101, the second switch 102 and the third switch 105, but the control signals output by the first control logic circuit 106 are different. Therefore, when this embodiment works in the second mode, no additional devices are added, and the control The method is simple, and achieves the best nonlinear control effect, and greatly improves the load transient drop response performance.

When the load changes from 1A to 10A, the voltage at the voltage output terminal Vout drops from 360mv to 200mv. The voltage conversion circuit 10 provided in FIG. 13 and the traditional buck circuit are simulated. FIG. 15a is the simulation of the voltage conversion circuit 10 provided in FIG. 13 As a result, Fig. 15b is the simulation result of the traditional buck circuit. Comparing Fig. 15a and Fig. 15b, it can be seen that the anti-transient drop response performance is improved by about 45%, and the voltage recovery time of the voltage output terminal Vout of the present application is also significantly improved.

In the case where the voltage conversion circuit 10 includes a first control logic circuit 106, and the voltage conversion circuit 10 is used as a step-up voltage conversion circuit, at this time, the first voltage terminal V1 is the voltage input terminal Vin, and the second voltage terminal V2 is the voltage output terminal Vout, and the first control logic circuit 106 is specifically configured to: when the voltage of the voltage output terminal Vout is less than or equal to the first threshold voltage Vth1, output the first control signal in the first mode; when the voltage of the voltage output terminal Vout When the voltage is greater than the second threshold voltage Vth2, the second control signal is output in the second mode; wherein the second threshold voltage Vth2 is greater than or equal to the first threshold voltage Vth1.

Based on the above, the control method of the voltage conversion circuit 10 further includes: firstly, detecting the voltage of the voltage output terminal Vout (that is, the second voltage terminal V2) in real time, and comparing the detected output voltage Vout with the first threshold voltage Vth1, the second threshold voltage The voltage of the voltage Vth2 is compared. Next, according to the comparison result of the output voltage Vout and the voltages of the first threshold voltage Vth1 and the second threshold voltage Vth2, the control method of the voltage conversion circuit 10 can be implemented in the following two ways.

First, if the detected output voltage Vout of the voltage output terminal Vout (ie, the second voltage terminal V2) is greater than the second threshold voltage Vth2, that is, the voltage of the voltage output terminal Vout overshoots to the threshold (ie, the second threshold voltage voltage Vth2), the voltage conversion circuit 10 is controlled according to the nonlinear control strategy, and the second mode is triggered, and the voltage conversion circuit 10 works in the second mode. In this way, the voltage input terminal Vin (ie, the first voltage terminal V1 ) can directly discharge the voltage output terminal Vout (ie, the second voltage terminal V2 ) via the second switch 102 and the third switch 105 . It can be understood that the voltage of the voltage output terminal Vout (that is, the second voltage terminal V2 ) decreases gradually.

In the second type, if it is detected that the voltage Vout output by the voltage output terminal Vout (that is, the second voltage terminal V2) is less than or equal to the first threshold voltage Vth1, the control is directly performed according to the basic control strategy, and the first mode is triggered. The voltage conversion circuit 10 Work in first mode.

Taking the voltage conversion circuit 10 as the structure shown in FIG. 13, and the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 as an example, the voltage conversion circuit 10 is used as a step-up When referring to the voltage conversion circuit, the control method of the voltage conversion circuit 10 will be described in detail. The control method of the voltage conversion circuit 10 specifically includes: firstly, detecting the voltage of the voltage output terminal Vout in real time, and comparing the detected voltage of the voltage output terminal Vout with the voltages of the first threshold voltage Vth1 and the second threshold voltage Vth2. Next, according to the comparison result of the voltage of the voltage output terminal Vout with the first threshold voltage Vth1 and the second threshold voltage Vth2, the control method of the voltage conversion circuit 10 can be implemented in the following two ways.

First, if the detected voltage of the voltage output terminal Vout (that is, the second voltage terminal V2 ) is greater than the second threshold voltage Vth2 , the second mode is triggered. Specifically, as shown in Figure 13, the comparator 1061 outputs a signal "1", thereby controlling the output terminals of the first OR gate 1062 and the second OR gate 1063 to output high-level signals, as shown in Figure 16, the second control Both the terminal GS2 and the third control terminal GS3 input a high-level signal, so that the second switching tube Q2 and the third switching tube Q3 are in the always-on state, so that the voltage input terminal Vin (that is, the first voltage The terminal V1) can directly discharge the voltage output terminal Vout (that is, the second voltage terminal V2) through the second switch tube Q2 and the third switch tube Q3. During this process, the first switching tube Q1 may be in a conducting state, or may be in an off state. In the process of discharging the voltage input terminal Vin (ie, the first voltage terminal V1) to the voltage output terminal Vout (ie, the second voltage terminal V2), the voltage of the voltage output terminal Vout (ie, the second voltage terminal V2) will gradually decrease .

Second, if it is detected that the voltage at the voltage output terminal Vout (that is, the second voltage terminal V2) is less than or equal to the first threshold voltage Vth1, the first mode is triggered. Specifically, the comparator 1061 outputs a signal "0", so that the first OR gate 1062 outputs the signal provided by the third signal terminal PWM_Q3, that is, a pulse signal with alternating high and low levels, and the second OR gate 1063 outputs the signal provided by the second signal terminal PWM_Q2. The signal, that is, the pulse signal with alternating high and low levels, and the signal provided by the third signal terminal PWM_Q3 and the signal provided by the second signal terminal PWM_Q2 are inverted, and the signal provided by the first signal terminal PWM_Q1 received by the first control terminal GS1 The signal provided by the second signal terminal PWM_Q2 is the same, so that the first switching tube Q1 and the second switching tube Q2 are turned on or off at the same time, and the first switching tube Q1 and the third switching tube Q3 are turned on alternately.

Based on the above-mentioned control method of the voltage conversion circuit 10 , when the transient load becomes lighter, the voltage input terminal Vin can directly discharge the voltage output terminal Vout, thus greatly improving the load transient overshoot response performance.

The voltage conversion circuit 10 provided in FIG. 13 and the traditional boost circuit are simulated. FIG. 17a is the simulation result of the voltage conversion circuit 10 provided in FIG. 13, and FIG. 17b is the simulation result of the traditional boost circuit. It can be seen by comparing FIG. , when the load changes suddenly from 10A to 1A, the anti-transient overshoot performance of the voltage output terminal Vout has obvious benefits. When the second threshold voltage Vth2 is designed to be (Vref+1)V, where Vref is the system required in a steady state Output voltage value, the voltage conversion circuit 10 provided in Figure 13 discharges immediately when the output voltage overshoots to 1V, so as to ensure that the voltage output by the voltage output terminal Vout is maintained within the required range, while the traditional boost circuit achieves this by naturally discharging the charge , without additional intervention, the overshoot voltage is as high as about 9V. In addition, it can be seen from the simulation results of FIG. 17a and FIG. 17b that the voltage recovery time of the voltage output terminal Vout of the present application is also significantly improved.

On this basis, when the voltage conversion circuit 10 provided by the embodiment of the present application works in the second mode, no additional power devices need to be added, and the first control logic circuit 106 can work in both the first mode and the second mode. The control of the first switch 101 , the second switch 102 and the third switch 105 is realized, so the realization scheme of this embodiment is simple and the effect is excellent.

Embodiment two

As shown in Figure 18, the voltage conversion circuit 10 includes a first switch 101, a second switch 102, a first device 103, a second device 104, a capacitor Cfly, a first control terminal GS1, a second control terminal GS2, a third control terminal terminal GS3 , the first voltage terminal V1 , the second voltage terminal V2 and the ground terminal GND. In the second embodiment, the first device 103 is an inductor L, and the second device 104 is a third switch 105 . The third switch 105 is coupled between the first terminal a of the capacitor Cfly and the ground terminal GND; the second terminal b of the capacitor Cfly is coupled to the first terminal c of the inductor L; the second terminal d of the inductor L is connected to the first voltage terminal V1 coupling. Here, the connection relationship between the first switch 101 , the second switch 102 and the capacitor Cfly, the first voltage terminal V1 and the second voltage terminal V2 can refer to the above description, and will not be repeated here.

In some examples, as shown in FIG. 19 , the first switch 101 includes a first switch tube Q1, the first pole of the first switch tube Q1 is coupled to the first voltage terminal V1, and the second pole is connected to the first terminal a of the capacitor Cfly. coupling, and the third pole is coupled with the first control terminal GS1. It should be noted that the first switch 101 includes but is not limited to the first switch transistor Q1 , and may also include one or more other switch transistors connected in parallel or in series with the first switch transistor Q1 .

In some examples, as shown in FIG. 19, the second switch 102 includes a second switch tube Q2; the first pole of the second switch tube Q2 is coupled to the second voltage terminal V2, and the second pole is coupled to the second terminal b of the capacitor Cfly. coupling, and the third pole is coupled with the second control terminal GS2. It should be noted that, the second switch 102 includes but is not limited to the second switch tube Q2, and may also include one or more other switch tubes connected in parallel or in series with the second switch tube Q2.

In some examples, as shown in FIG. 19, the third switch 105 includes a third switching transistor Q3; the first pole of the third switching transistor Q3 is coupled to the first terminal a of the capacitor Cfly, and the second pole is coupled to the ground terminal GND, The third pole is coupled with the third control terminal GS3. It should be noted that the third switch 105 includes but is not limited to the third switch transistor Q3, and may also include one or more other switch transistors connected in parallel or in series with the third switch transistor Q3.

Here, the relevant introduction of the first switching tube Q1, the second switching tube Q2, and the third switching tube Q3 can be referred to above, and will not be repeated here.

Based on the voltage conversion circuit 10 provided in Figure 18 and Figure 19 above, when the second voltage terminal V2 is the voltage input terminal Vin, and the first voltage terminal V1 is the voltage output terminal Vout, the voltage conversion circuit 10 can be used as a boost voltage conversion circuit; on the contrary, the voltage conversion circuit 10 can also be used as a step-down voltage conversion circuit. In the case where the first voltage terminal V1 is the voltage input terminal Vin, and the second voltage terminal V2 is the voltage output terminal Vout, similarly, the voltage conversion circuit 10 can be used as a step-up voltage conversion circuit; otherwise, the voltage conversion circuit 10 can also be As a step-down voltage conversion circuit. The working process of these four situations will be introduced respectively below.

In the first type, as shown in FIG. 20 , the second voltage terminal V2 is the voltage input terminal Vin, the first voltage terminal V1 is the voltage output terminal Vout, and the voltage conversion circuit 10 is a step-down voltage conversion circuit. At this time, Vin is greater than Vout. In this case, the voltage conversion circuit 10 outputs a third control signal in the third mode, and the third control signal is used to: control the conduction of the first switch 101 and the second switch 102 in the first stage, and control the third switch 105 In the second stage, the third switch 105 is controlled to be turned on, and the first switch 101 and the second switch 102 are controlled to be turned off; wherein, the first stage and the second stage are repeated alternately. That is to say, the second switch 102 and the first switch 101 are turned on or off at the same time, the second switch 102 and the third switch 105 are in reverse phase, and are turned on complementary.

It can be understood that the duration of the first stage and the second stage can be set as required, and the duration of the first stage and the second stage will affect the voltage of the voltage output terminal Vout.

In the case where the first switch 101 includes a first switching tube Q1, the second switch 102 includes a second switching tube Q2, and the third switch 105 includes a third switching tube Q3, in some examples, the voltage conversion circuit 10 further includes a second switching tube Q3. A first signal terminal PWM_Q1 coupled to a control terminal GS1 , a second signal terminal PWM_Q2 coupled to a second control terminal GS2 , and a third signal terminal PWM_Q3 coupled to a third control terminal GS3 . As shown in Figure 21, when the first signal terminal PWM_Q1, the second signal terminal PWM_Q2 and the third signal terminal PWM_Q3 all provide pulse signals with alternating high and low levels, and the signals provided by the first signal terminal PWM_Q1 and the second signal terminal PWM_Q2 Similarly, when the high and low levels of the signals provided by the first signal terminal PWM_Q1 and the third signal terminal PWM_Q3 are inverted, this can control the first switch tube Q1 and the second switch tube Q2 to be turned on or off at the same time, and the second switch tube Q2 and the second switch tube Q2 The three switching transistors Q3 are turned on in a complementary manner.

The first switch 101 includes a first switch tube Q1, the second switch 102 includes a second switch tube Q2, the third switch 105 includes a third switch tube Q3, and the duty cycle of the conduction of the first switch tube Q1 and the second switch tube Q2 is Taking the ratio D as an example, the relationship between the transfer gain function of the first voltage terminal V1 (that is, the voltage output terminal Vout) and the second voltage terminal V2 (that is, the voltage input terminal Vin) is as follows:

According to the above formula, it can be seen that the range of the output voltage of the first voltage terminal V1 is (0.5V2, V2), so the voltage conversion circuit 10 can realize a limited range of step-down conversion.

In the case that the voltage conversion circuit 10 is used as a step-down voltage conversion circuit, the voltage conversion circuit provided in FIG. 8 is a step-down architecture with a limited range of voltage gain (0-0.5), and the voltage conversion circuit provided in FIG. 18 has a voltage gain of (0.5-1) limited-range step-down architecture, the voltage conversion circuit provided in FIG. 8 and the voltage conversion circuit provided in FIG. 18 can be used as complementary architectures.

In the second type, as shown in FIG. 20 , the second voltage terminal V2 is the voltage input terminal Vin, the first voltage terminal V1 is the voltage output terminal Vout, and the voltage conversion circuit 10 is a boost voltage conversion circuit. At this time, Vout is greater than Vin. The voltage conversion circuit 10 outputs a third control signal in the third mode, and the third control signal is used to: in the first stage, control the second switch 102 and the third switch 105 to be turned on, and control the first switch 101 to be turned off; In the second stage, the first switch 101 is controlled to be turned on, and the second switch 102 and the third switch 105 are controlled to be turned off; wherein, the first stage and the second stage are repeated alternately. That is to say, the second switch 102 and the third switch 105 are turned on or off at the same time, and the first switch 101 and the second switch 102 are turned on alternately.

It should be noted that, in the first and second cases, the second voltage terminal V2 (ie, the voltage input terminal Vin) supplies power to the first voltage terminal V1 (ie, the voltage output terminal Vout) through the capacitor Cfly and the inductor L.

In the case where the first switch 101 includes a first switching tube Q1, the second switch 102 includes a second switching tube Q2, and the third switch 105 includes a third switching tube Q3, the second switching tube Q2 and the third switching tube Q3 are controlled simultaneously On or off, the control method for the complementary conduction of the second switching transistor Q2 and the first switching transistor Q1 can refer to the above-mentioned first method, which will not be repeated here. In this case, the transfer gain function relationship between the voltage input terminal Vin (that is, the second voltage terminal V2) and the voltage output terminal Vout (that is, the first voltage terminal V1) is as follows:

According to the above formula, it can be seen that the range of the output voltage of the first voltage terminal V1 is (V2, +∞), so the voltage conversion circuit 10 can realize an unlimited range of boost conversion.

In the above first and second cases, when the load changes suddenly from heavy load to light load, the voltage output terminal Vout (that is, the first voltage terminal V1) may have voltage overshoot, in order to further improve the voltage conversion circuit 10 transient overshoot response performance. In some examples, as shown in FIG. GS2 is coupled to the third control terminal GS3. The double S-curve in FIG. 22 indicates that the second control logic circuit 107 may be directly coupled to the first control terminal GS1 , the second control terminal GS2 and the third control terminal GS3 , or may be indirectly coupled through other electronic components. The second control logic circuit 107 is used for outputting the third control signal in the third mode and outputting the fourth control signal in the fourth mode. Wherein, in the above-mentioned first case, the third control signal is used to control the first switch 101 and the second switch 102 to be turned on or off at the same time, and to control the third switch 105 and the first switch 101 to be turned on alternately; In the second case, the third control signal is used to control the second switch 102 and the third switch 105 to be turned on or off at the same time, and to control the first switch 101 and the second switch 102 to be turned on alternately; the fourth control signal is used for Control the first switch 101 and the third switch 105 to be turned on.

In the case that the voltage conversion circuit 10 includes a second control logic circuit 107, the control method of the voltage conversion circuit 10 includes: in the third mode, controlling the second control logic circuit 107 to output a third control signal, and the voltage conversion circuit 10 is In the case of a step-down voltage conversion circuit, the third control signal is used to control the first switch 101 and the second switch 102 to be turned on or off at the same time, and to control the first switch 101 and the third switch 105 to be turned on alternately; In the case where the conversion circuit 10 is a step-up voltage conversion circuit, the third control signal is used to control the second switch 102 and the third switch 105 to be turned on or off at the same time, and to control the first switch 101 and the second switch 102 to be turned on alternately. On; in the fourth mode, control the second control logic circuit 107 to output the fourth control signal.

In the fourth mode, due to the fourth control signal output by the second control logic circuit 107, the first switch 101 and the third switch 105 are controlled to be turned on, and the first switch 101 and the third switch 105 are turned on, and the ground terminal GND can Discharge the voltage output terminal Vout (that is, the first voltage terminal V1) through the first switch 101 and the third switch 105 to provide a fast discharge channel for load energy, thereby realizing fast step-down adjustment and further improving the output transient response performance .

Based on the above, in some examples, the second control logic circuit 107 is specifically configured to: trigger the fourth mode to output the fourth control signal when at least one of the following scenarios occurs: output voltage overshoot, output rapid step-down, or rapid Power off. It should be understood that triggering the fourth mode includes but is not limited to the above three scenarios.

In the case that the voltage conversion circuit 10 includes the second control logic circuit 107, the control method of the voltage conversion circuit 10 further includes: under normal working conditions, triggering the above-mentioned third mode; when at least one of the following scenarios occurs, triggering the fourth mode Mode: output voltage overshoot, output fast step-down, or fast power-off.

In order to enable the voltage conversion circuit 10 to execute the third mode or the fourth mode in different scenarios, in some examples, as shown in FIG. The terminal PWM_Q2 and the third signal terminal PWM_Q3 are coupled to a plurality of signal input terminals. The multiple signal input terminals may include signal input terminal A, signal input terminal B and signal input terminal C as shown in FIG. 22 , for example.

It should be noted that the multiple signal input terminals may respectively correspond to different scenarios, for example, the signal input terminal A corresponds to a scenario in which the output voltage overshoots. For another example, the signal input terminal B corresponds to a scenario where the output voltage drops rapidly. For another example, the signal input terminal C corresponds to a scene of rapid power-off. In scenarios such as output voltage overshoot, output rapid step-down, and rapid power-off, the signal input terminal corresponding to the scenario may output a high-level signal, for example.

Here, the first signal terminal PWM_Q1 , the second signal terminal PWM_Q2 and the third signal terminal PWM_Q3 can be used to provide pulse signals with alternating high and low levels.

An exemplary introduction to the second control logic circuit 107 is given below. As shown in Figure 23, the second control logic circuit 107 includes the third OR gate 1071, the fourth OR gate 1072 and the fifth OR gate 1073; a plurality of signal input terminals such as signal input terminal A, signal input terminal B and signal input terminal C is coupled with the input end of the third OR gate 1071, and the output end of the third OR gate 1071 is coupled with the first input end of the fourth OR gate 1072 and the first input end of the fifth OR gate 1073; the fourth OR gate 1072 The second input terminal of the gate is coupled to the first signal terminal PWM_Q1, the output terminal of the fourth OR gate 1072 is coupled to the first control terminal GS1; the second input terminal of the fifth OR gate 1073 is coupled to the third signal terminal PWM_Q3, and the fifth OR gate 1072 is coupled to the third signal terminal PWM_Q3. The output terminal of the gate 1073 is coupled to the third control terminal GS3. The second signal terminal PWM_Q2 is coupled to the second control terminal GS2. The double S-curve in FIG. 23 indicates that the output terminal of the fourth OR gate 1072 and the first control terminal GS1, the output terminal of the fifth OR gate 1073 and the third control terminal GS3, and the second signal terminal PWM_Q2 and the second control terminal GS2 can be It can be directly coupled or indirectly coupled through other electronic components.

It can be understood that the second control logic circuit 107 includes but is not limited to the structure shown in FIG. 23 .

Taking the structure shown in FIG. 23 and the first switch tube Q1 , the second switch tube Q2 and the third switch tube Q3 as an example, the control method of the voltage conversion circuit 10 is specifically introduced.

If any one of the multiple signal input terminals outputs a high-level signal, the fourth mode is triggered, and the third OR gate 1071 outputs a signal "1", thereby controlling the output terminals of the fourth OR gate 1072 and the fifth OR gate 1073 to output High-level signal, in this way, the first switch tube Q1 and the third switch tube Q3 are in a conduction state, so the ground terminal GND can be connected to the voltage output terminal Vout (that is, through the first switch tube Q1 and the third switch tube Q3 The first voltage terminal V1) is discharged, so as to realize fast step-down regulation.

If none of the multiple signal input terminals output a high-level signal, the third mode is triggered, and the third OR gate 1071 outputs a signal "0", so that the fourth OR gate 1072 outputs the signal provided by the first signal terminal PWM_Q1, that is, the high-low voltage Alternately changing pulse signal, the fifth OR gate 1073 outputs the signal provided by the third signal terminal PWM_Q3, that is, a pulse signal with alternately changing high and low levels, and the second signal terminal PWM_Q2 provides a pulse signal with alternating high and low levels. When the circuit 10 is a step-down voltage conversion circuit, the first switch tube Q1 and the second switch tube Q2 are turned on or off at the same time, and the first switch tube Q1 and the third switch tube Q3 are turned on alternately; In the step-up voltage conversion circuit, the second switch tube Q2 and the third switch tube Q3 are turned on or off at the same time, and the first switch tube Q1 and the second switch tube Q2 are turned on alternately.

The third type, as shown in FIG. 24, the first voltage terminal V1 is the voltage input terminal Vin, the second voltage terminal V2 is the voltage output terminal Vout, and the voltage conversion circuit 10 is a step-up voltage conversion circuit. At this time, Vin is smaller than Vout . In this case, the voltage conversion circuit 10 outputs a third control signal in the third mode, and the third control signal is used to: control the conduction of the first switch 101 and the second switch 102 in the first stage, and control the third switch 105 In the second stage, the third switch 105 is controlled to be turned on, and the second switch 102 and the first switch 101 are controlled to be turned off; wherein, the first stage and the second stage are repeated alternately. That is to say, the first switch 101 and the second switch 102 are turned on or off at the same time, and the second switch 102 and the third switch 105 are turned on alternately.

In the case where the first switch 101 includes a first switching tube Q1, the second switch 102 includes a second switching tube Q2, and the third switch 105 includes a third switching tube Q3, the first switching tube Q1, the second switching tube Q2 and the second switching tube Q2 For the control method of the three-switch transistor Q3, reference may be made to the above-mentioned first case, which will not be repeated here.

The first switch 101 includes a first switch tube Q1, the second switch 102 includes a second switch tube Q2, the third switch 105 includes a third switch tube Q3, and the duty cycle of the conduction of the first switch tube Q1 and the second switch tube Q2 is Taking the ratio D as an example, the transfer gain function relationship between the second voltage terminal V2 (that is, the voltage output terminal Vout) and the first voltage terminal V1 (that is, the voltage input terminal Vin) is as follows:

V2=(2-D)V1

According to the above formula, it can be seen that the range of the output voltage of the second voltage terminal V2 is (V1, 2V1), so the voltage conversion circuit 10 can realize a limited range of boost conversion.

Fourth, as shown in FIG. 24, the first voltage terminal V1 is the voltage input terminal Vin, the second voltage terminal V2 is the voltage output terminal Vout, and the voltage conversion circuit 10 is a step-down voltage conversion circuit. At this time, Vout is smaller than Vin . In this case, the voltage conversion circuit 10 outputs a third control signal in the third mode, and the third control signal is used to: control the conduction of the second switch 102 and the third switch 105 in the first stage, and control the first switch 101 In the second stage, the first switch 101 is controlled to be turned on, and the second switch 102 and the third switch 105 are controlled to be turned off; wherein, the first stage and the second stage are repeated alternately. That is to say, the second switch 102 and the third switch 105 are turned on or off at the same time, and the first switch 101 and the second switch 102 are turned on alternately.

In the third and fourth cases, the voltage input terminal Vin (ie, the first voltage terminal V1 ) charges the voltage output terminal Vout (ie, the second voltage terminal V2 ) through the capacitor Cfly and the inductor L.

In the case where the first switch 101 includes a first switching tube Q1, the second switch 102 includes a second switching tube Q2, and the third switch 105 includes a third switching tube Q3, that is, control the second switching tube Q2 and the third switching tube Q3 Simultaneously turned on or off, the first switching tube Q1 and the second switching tube Q2 are turned on complementary, the control method can refer to the first one above, and will not be repeated here. In this case, the transfer gain function relationship between the voltage input terminal Vin (ie, the first voltage terminal V1) and the voltage output terminal Vout (ie, the second voltage terminal V2) is as follows:

V2=D×V1

According to the formula, it can be seen that the range of the output voltage of the second voltage terminal V2 is (0, V2 ), so the voltage conversion circuit 10 can realize step-down conversion in an infinite range.

The above is only a specific implementation of the application, but the scope of protection of the application is not limited thereto. Anyone familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the application. Should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be determined by the protection scope of the claims.

Claims (15)

1. A voltage conversion circuit, characterized by comprising a first switch, a second switch, a first device, a second device, a capacitor, a first control terminal, a second control terminal, a third control terminal, a first voltage terminal, a second Two voltage terminals and a ground terminal;

   The first switch is coupled between the first voltage terminal and the first terminal of the capacitor, and the first switch is also coupled to the first control terminal; the second switch is coupled between the first terminal of the capacitor Between the second terminal and the second voltage terminal, the second switch is also coupled to the second control terminal;

   the first device is coupled between the first voltage terminal and the second terminal of the capacitor, the second device is coupled between the first terminal of the capacitor and the ground terminal;

   Wherein, one of the first device and the second device is a third switch, and the other is an inductor; the third switch is also coupled to the third control terminal.
2. The voltage conversion circuit according to claim 1, wherein the first device is the third switch, and the second device is an inductor.
3. The voltage conversion circuit according to claim 2, wherein the voltage conversion circuit further comprises a first control logic circuit; the first control logic circuit is connected to the first control terminal, the second control terminal and The third control terminal is coupled;

   The first control logic circuit is configured to output a first control signal in a first mode and a second control signal in a second mode;

   The first control signal is used to control the first switch and the second switch to be turned on or off simultaneously, and to control the third switch and the first switch to be turned on alternately;

   The second control signal is used to control the second switch and the third switch to be turned on.
4. The voltage conversion circuit according to claim 3, wherein the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal;

   The first control logic circuit is specifically configured to: output the first control signal in the first mode when the voltage at the voltage output terminal is greater than or equal to a first threshold voltage.
5. The voltage conversion circuit according to claim 4, wherein the first control logic circuit is specifically configured to: when the voltage at the voltage output terminal is less than the second threshold voltage, output the the second control signal;

   Wherein, the second threshold voltage is less than or equal to the first threshold voltage.
6. The voltage conversion circuit according to claim 3, wherein the first voltage terminal is a voltage input terminal, and the second voltage terminal is a voltage output terminal;

   The first control logic circuit is specifically configured to: output the first control signal in the first mode when the voltage at the voltage output terminal is less than or equal to a first threshold voltage.
7. The voltage conversion circuit according to claim 6, wherein the first control logic circuit is specifically configured to: when the voltage at the voltage output terminal is greater than the second threshold voltage, output in the second mode said second control signal;

   Wherein, the second threshold voltage is greater than or equal to the first threshold voltage.
8. The voltage conversion circuit according to claim 1, wherein the first device is an inductor, and the second device is a third switch.
9. The voltage conversion circuit according to claim 8, wherein the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal; the voltage conversion circuit further includes a second control logic circuit, The second control logic circuit is coupled to the first control terminal, the second control terminal and the third control terminal;

   The second control logic circuit is used to output a third control signal in a third mode and a fourth control signal in a fourth mode;

   The third control signal is used to control the first switch and the second switch to be turned on or off at the same time, and to control the third switch and the first switch to be turned on alternately;

   The fourth control signal is used to control the first switch and the third switch to be turned on.
10. The voltage conversion circuit according to claim 8, wherein the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal; the voltage conversion circuit further includes a second control logic circuit, The second control logic circuit is coupled to the first control terminal, the second control terminal and the third control terminal;

    The second control logic circuit is used to output a third control signal in a third mode and a fourth control signal in a fourth mode;

    The third control signal is used to control the second switch and the third switch to be turned on or off simultaneously, and to control the first switch and the second switch to be turned on alternately;

    The fourth control signal is used to control the first switch and the third switch to be turned on.
11. The voltage conversion circuit according to claim 9 or 10, wherein the second control logic circuit is specifically configured to trigger the fourth mode to output the fourth control logic circuit when at least one of the following scenarios occurs: Signals: output voltage overshoot, output rapid step-down, or rapid power-off.
12. The voltage conversion circuit according to any one of claims 1-11, wherein the first switch, the second switch and the third switch comprise metal-oxide-semiconductor MOS transistors.
13. An electronic device, characterized in that it includes a load and the voltage conversion circuit according to any one of claims 1-12;

    The load is coupled to the first voltage terminal or the second voltage terminal of the voltage conversion circuit.
14. A method for controlling a voltage conversion circuit, characterized in that the voltage conversion circuit includes a first switch, a second switch, a first device, a second device, a capacitor, a first control terminal, a second control terminal, a third control terminal terminal, a first voltage terminal, a second voltage terminal and a ground terminal;

    The first switch is coupled between the first voltage terminal and the first terminal of the capacitor, and the first switch is also coupled to the first control terminal; the second switch is coupled between the first terminal of the capacitor Between the second terminal and the second voltage terminal, the second switch is also coupled to the second control terminal;

    the first device is coupled between the first voltage terminal and the second terminal of the capacitor, the second device is coupled between the first terminal of the capacitor and the ground terminal;

    Wherein, the first device is the third switch, and the second device is an inductor; the voltage conversion circuit further includes a first control logic circuit; the first control logic circuit is connected to the first control terminal, The second control terminal is coupled to the third control terminal;

    The control methods include:

    In the first mode, a first control signal is output; the first control signal is used to control the first switch and the second switch to be turned on or off at the same time, and to control the third switch and the second switch. A switch is turned on alternately;

    In the second mode, a second control signal is output; the second control signal is used to control the conduction of the second switch and the third switch.
15. A method for controlling a voltage conversion circuit, characterized in that the voltage conversion circuit includes a first switch, a second switch, a first device, a second device, a capacitor, a first control terminal, a second control terminal, a third control terminal terminal, a first voltage terminal, a second voltage terminal and a ground terminal;

    The first switch is coupled between the first voltage terminal and the first terminal of the capacitor, and the first switch is also coupled to the first control terminal; the second switch is coupled between the first terminal of the capacitor Between the second terminal and the second voltage terminal, the second switch is also coupled to the second control terminal;

    the first device is coupled between the first voltage terminal and the second terminal of the capacitor, the second device is coupled between the first terminal of the capacitor and the ground terminal;

    Wherein, the first device is an inductor, the second device is a third switch; the second voltage terminal is a voltage input terminal, and the first voltage terminal is a voltage output terminal; the voltage conversion circuit also includes a first Two control logic circuits; the second control logic circuit is coupled to the first control terminal, the second control terminal and the third control terminal;

    The control methods include:

    In the third mode, a third control signal is output; the third control signal is used to control the first switch and the second switch to be turned on or off at the same time, and to control the third switch and the second switch. A switch is turned on alternately; or, the third control signal is used to control the second switch and the third switch to be turned on or off at the same time, and to control the first switch and the second switch to be turned on alternately. Pass;

    In the fourth mode, a fourth control signal is output; the fourth control signal is used to control the first switch and the third switch to be turned on.

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